RE: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller
Hi Boris, > -Original Message- > From: Boris Brezillon [mailto:bbrezil...@kernel.org] > Sent: Tuesday, January 22, 2019 2:47 PM > To: Yogesh Narayan Gaur > Cc: r...@kernel.org; shawn...@kernel.org; mark.rutl...@arm.com; > devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; > frieder.schre...@kontron.de; linux-...@vger.kernel.org; > marek.va...@gmail.com; broo...@kernel.org; linux-...@lists.infradead.org; > computersforpe...@gmail.com; linux-arm-ker...@lists.infradead.org > Subject: Re: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI > controller > > On Tue, 22 Jan 2019 09:00:14 + > Yogesh Narayan Gaur wrote: > > > Hi Rob / Shawn, > > > > Can you please apply patches [1] [2]. > > No, DT bindings should go through Mark's tree. Just wait a bit please. Ok, thanks. -- Regards Yogesh Gaur
Re: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller
On Tue, 22 Jan 2019 09:00:14 + Yogesh Narayan Gaur wrote: > Hi Rob / Shawn, > > Can you please apply patches [1] [2]. No, DT bindings should go through Mark's tree. Just wait a bit please.
RE: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller
Hi Rob / Shawn,
Can you please apply patches [1] [2].
--
Regards,
Yogesh Gaur
[1] https://patchwork.ozlabs.org/patch/1025136/
[2] https://patchwork.ozlabs.org/patch/1025137/
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, January 15, 2019 5:30 PM
> To: linux-...@lists.infradead.org; bbrezil...@kernel.org;
> marek.va...@gmail.com; broo...@kernel.org; linux-...@vger.kernel.org;
> devicet...@vger.kernel.org
> Cc: r...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; linux-
> arm-ker...@lists.infradead.org; computersforpe...@gmail.com;
> frieder.schre...@kontron.de; linux-kernel@vger.kernel.org; Yogesh Narayan
> Gaur
> Subject: [PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI
> controller
>
> Add binding file for NXP FlexSPI controller
>
> Signed-off-by: Yogesh Narayan Gaur
> Reviewed-by: Rob Herring
> ---
> Changes for v8:
> - None
> Changes for v7:
> - None
> Changes for v6:
> - None
> Changes for v5:
> - None
> Changes for v4:
> - Incorporated Rob review comments.
> Changes for v3:
> - Removed node property 'big-endian'.
> Changes for v2:
> - Incorporated Rob review comments.
>
> .../devicetree/bindings/spi/spi-nxp-fspi.txt | 39 +++
> 1 file changed, 39 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
>
> diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
> b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
> new file mode 100644
> index ..2cd67eb727d4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
> @@ -0,0 +1,39 @@
> +* NXP Flex Serial Peripheral Interface (FSPI)
> +
> +Required properties:
> + - compatible : Should be "nxp,lx2160a-fspi"
> + - reg :First contains the register location and length,
> + Second contains the memory mapping address and length
> + - reg-names : Should contain the resource reg names:
> + - fspi_base: configuration register address space
> + - fspi_mmap: memory mapped address space
> + - interrupts : Should contain the interrupt for the device
> +
> +Required SPI slave node properties:
> + - reg :There are two buses (A and B) with two chip selects each.
> + This encodes to which bus and CS the flash is connected:
> + - <0>: Bus A, CS 0
> + - <1>: Bus A, CS 1
> + - <2>: Bus B, CS 0
> + - <3>: Bus B, CS 1
> +
> +Example showing the usage of two SPI NOR slave devices on bus A:
> +
> +fspi0: spi@20c {
> + compatible = "nxp,lx2160a-fspi";
> + reg = <0x0 0x20c 0x0 0x1>, <0x0 0x2000 0x0
> 0x1000>;
> + reg-names = "fspi_base", "fspi_mmap";
> + interrupts = <0 25 0x4>; /* Level high type */
> + clocks = < 4 3>, < 4 3>;
> + clock-names = "fspi_en", "fspi";
> +
> + mt35xu512aba0: flash@0 {
> + reg = <0>;
> +
> + };
> +
> + mt35xu512aba1: flash@1 {
> + reg = <1>;
> +
> + };
> +};
> --
> 2.17.1
[PATCH v8 2/5] dt-bindings: spi: add binding file for NXP FlexSPI controller
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Narayan Gaur
Reviewed-by: Rob Herring
---
Changes for v8:
- None
Changes for v7:
- None
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
.../devicetree/bindings/spi/spi-nxp-fspi.txt | 39 +++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
new file mode 100644
index ..2cd67eb727d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
@@ -0,0 +1,39 @@
+* NXP Flex Serial Peripheral Interface (FSPI)
+
+Required properties:
+ - compatible : Should be "nxp,lx2160a-fspi"
+ - reg :First contains the register location and length,
+ Second contains the memory mapping address and length
+ - reg-names : Should contain the resource reg names:
+- fspi_base: configuration register address space
+ - fspi_mmap: memory mapped address space
+ - interrupts : Should contain the interrupt for the device
+
+Required SPI slave node properties:
+ - reg :There are two buses (A and B) with two chip selects each.
+ This encodes to which bus and CS the flash is connected:
+ - <0>: Bus A, CS 0
+ - <1>: Bus A, CS 1
+ - <2>: Bus B, CS 0
+ - <3>: Bus B, CS 1
+
+Example showing the usage of two SPI NOR slave devices on bus A:
+
+fspi0: spi@20c {
+ compatible = "nxp,lx2160a-fspi";
+ reg = <0x0 0x20c 0x0 0x1>, <0x0 0x2000 0x0 0x1000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <0 25 0x4>; /* Level high type */
+ clocks = < 4 3>, < 4 3>;
+ clock-names = "fspi_en", "fspi";
+
+ mt35xu512aba0: flash@0 {
+ reg = <0>;
+
+ };
+
+ mt35xu512aba1: flash@1 {
+ reg = <1>;
+
+ };
+};
--
2.17.1
