Re: [PATCH v9 3/3] phy: intel: Add driver support for ComboPhy
Hi Dilip,
On 5/19/2020 11:49 AM, Dilip Kota wrote:
> ComboPhy subsystem provides PHYs for various
> controllers like PCIe, SATA and EMAC.
>
> Signed-off-by: Dilip Kota
> ---
> Changes on v9:
> Add Acked-By: Vinod Koul
I added Acked-By myself and merged this patch.
Thanks
Kishon
>
> Fix compiler warning
> drivers/phy/intel/phy-intel-combo.c:229:6: warning: cb_mode may be used
> uninitialized in this function [-Wmaybe-uninitialized]
>ret = regmap_write(cbphy->hsiocfg, REG_COMBO_MODE(cbphy->bid), cb_mode);
>^~~
> drivers/phy/intel/phy-intel-combo.c:204:24: note: cb_mode was declared here
>enum intel_combo_mode cb_mode;
>
> Changes on v8:
> As per PHY Maintainer's request add description for doing register access
> through regmap in comments.
>
> Changes on v7:
> Use device_node_to_regmap instead of fwnode_to_regmap
>
> Changes on v6:
> No changes
>
> Changes on v5:
> Add changes as per inputs from Andy and Rob:
> DT node uses phy-mode values as defined in
> "include/dt-bindings/phy/phy.h",
> add changes to handle it.
> ComboPhy no longer has children nodes, and children node properties(reset)
> moved to parent node, so do the code changes accordingly.
> Add _xlate() function to pass the appropriate phy handle.
> Fix couple of nitpicks.
>
> Changes on v4:
> Address review comments
>Remove dependency on OF config
>Update copyright to 2019-2020
>Define register macro PAD_DIS_CFG instead of const variable inside
> function.
>Improve the error prints, and error returns.
>Call put_device(dev), for get_dev_from_fwnode()
>Move platform_set_drvdata() at the end of the probe().
>Correct alignment in phy_ops intel_cbphy_ops.
>Correct commented lines with proper vocabulary and punctuation.
>Add/remove commas for the required constant arrays and enums.
>Remove in driver:
> linux/kernel.h, not required
> macros: PCIE_PHY_MPLLA_CTRL, PCIE_PHY_MPLLB_CTRL
> temp variable u32 prop;
>Change function names:
> intel_cbphy_iphy_dt_parse() -> intel_cbphy_iphy_fwnode_parse()
> intel_cbphy_dt_sanity_check() -> intel_cbphy_sanity_check()
> intel_cbphy_dt_parse() -> intel_cbphy_fwnode_parse()
>
> Changes on v3:
> Remove intel_iphy_names
> Remove struct phy in struct intel_cbphy_iphy
> Imporve if conditions logic
> Use fwnode_to_regmap()
> Call devm_of_platform_populate() to populate child nodes
> Fix reset sequence during phy_init
> Add SoC specific compatible "intel,combophy-lgm"
> Add description for enums
> Remove default case in switch {} intel_cbphy_set_mode() as it
> never happens.
> Use mutex_lock to synchronise combophy initialization across
> two phys.
> Change init_cnt to u32 datatype as it is within mutex lock.
> Correct error handling of
> fwnode_property_read_u32_array(fwnode, "intel,phy-mode", ...)
>
> drivers/phy/intel/Kconfig | 14 +
> drivers/phy/intel/Makefile | 1 +
> drivers/phy/intel/phy-intel-combo.c | 632
>
> 3 files changed, 647 insertions(+)
> create mode 100644 drivers/phy/intel/phy-intel-combo.c
>
> diff --git a/drivers/phy/intel/Kconfig b/drivers/phy/intel/Kconfig
> index 4ea6a8897cd7..3b40eb7b4fb4 100644
> --- a/drivers/phy/intel/Kconfig
> +++ b/drivers/phy/intel/Kconfig
> @@ -2,6 +2,20 @@
> #
> # Phy drivers for Intel Lightning Mountain(LGM) platform
> #
> +config PHY_INTEL_COMBO
> + bool "Intel ComboPHY driver"
> + depends on X86 || COMPILE_TEST
> + depends on OF && HAS_IOMEM
> + select MFD_SYSCON
> + select GENERIC_PHY
> + select REGMAP
> + help
> + Enable this to support Intel ComboPhy.
> +
> + This driver configures ComboPhy subsystem on Intel gateway
> + chipsets which provides PHYs for various controllers, EMAC,
> + SATA and PCIe.
> +
> config PHY_INTEL_EMMC
> tristate "Intel EMMC PHY driver"
> select GENERIC_PHY
> diff --git a/drivers/phy/intel/Makefile b/drivers/phy/intel/Makefile
> index 6b876a75599d..233d530dadde 100644
> --- a/drivers/phy/intel/Makefile
> +++ b/drivers/phy/intel/Makefile
> @@ -1,2 +1,3 @@
> # SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_PHY_INTEL_COMBO)+= phy-intel-combo.o
> obj-$(CONFIG_PHY_INTEL_EMMC)+= phy-intel-emmc.o
> diff --git a/drivers/phy/intel/phy-intel-combo.c
> b/drivers/phy/intel/phy-intel-combo.c
> new file mode 100644
> index ..c2a35be4cdfb
> --- /dev/null
> +++ b/drivers/phy/intel/phy-intel-combo.c
> @@ -0,0 +1,632 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Intel Combo-PHY driver
> + *
> + * Copyright (C) 2019-2020 Intel Corporation.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#define PCIE_PHY_GEN_CTRL0x00
> +#def
[PATCH v9 3/3] phy: intel: Add driver support for ComboPhy
ComboPhy subsystem provides PHYs for various
controllers like PCIe, SATA and EMAC.
Signed-off-by: Dilip Kota
---
Changes on v9:
Add Acked-By: Vinod Koul
Fix compiler warning
drivers/phy/intel/phy-intel-combo.c:229:6: warning: cb_mode may be used
uninitialized in this function [-Wmaybe-uninitialized]
ret = regmap_write(cbphy->hsiocfg, REG_COMBO_MODE(cbphy->bid), cb_mode);
^~~
drivers/phy/intel/phy-intel-combo.c:204:24: note: cb_mode was declared here
enum intel_combo_mode cb_mode;
Changes on v8:
As per PHY Maintainer's request add description for doing register access
through regmap in comments.
Changes on v7:
Use device_node_to_regmap instead of fwnode_to_regmap
Changes on v6:
No changes
Changes on v5:
Add changes as per inputs from Andy and Rob:
DT node uses phy-mode values as defined in "include/dt-bindings/phy/phy.h",
add changes to handle it.
ComboPhy no longer has children nodes, and children node properties(reset)
moved to parent node, so do the code changes accordingly.
Add _xlate() function to pass the appropriate phy handle.
Fix couple of nitpicks.
Changes on v4:
Address review comments
Remove dependency on OF config
Update copyright to 2019-2020
Define register macro PAD_DIS_CFG instead of const variable inside function.
Improve the error prints, and error returns.
Call put_device(dev), for get_dev_from_fwnode()
Move platform_set_drvdata() at the end of the probe().
Correct alignment in phy_ops intel_cbphy_ops.
Correct commented lines with proper vocabulary and punctuation.
Add/remove commas for the required constant arrays and enums.
Remove in driver:
linux/kernel.h, not required
macros: PCIE_PHY_MPLLA_CTRL, PCIE_PHY_MPLLB_CTRL
temp variable u32 prop;
Change function names:
intel_cbphy_iphy_dt_parse() -> intel_cbphy_iphy_fwnode_parse()
intel_cbphy_dt_sanity_check() -> intel_cbphy_sanity_check()
intel_cbphy_dt_parse() -> intel_cbphy_fwnode_parse()
Changes on v3:
Remove intel_iphy_names
Remove struct phy in struct intel_cbphy_iphy
Imporve if conditions logic
Use fwnode_to_regmap()
Call devm_of_platform_populate() to populate child nodes
Fix reset sequence during phy_init
Add SoC specific compatible "intel,combophy-lgm"
Add description for enums
Remove default case in switch {} intel_cbphy_set_mode() as it
never happens.
Use mutex_lock to synchronise combophy initialization across
two phys.
Change init_cnt to u32 datatype as it is within mutex lock.
Correct error handling of
fwnode_property_read_u32_array(fwnode, "intel,phy-mode", ...)
drivers/phy/intel/Kconfig | 14 +
drivers/phy/intel/Makefile | 1 +
drivers/phy/intel/phy-intel-combo.c | 632
3 files changed, 647 insertions(+)
create mode 100644 drivers/phy/intel/phy-intel-combo.c
diff --git a/drivers/phy/intel/Kconfig b/drivers/phy/intel/Kconfig
index 4ea6a8897cd7..3b40eb7b4fb4 100644
--- a/drivers/phy/intel/Kconfig
+++ b/drivers/phy/intel/Kconfig
@@ -2,6 +2,20 @@
#
# Phy drivers for Intel Lightning Mountain(LGM) platform
#
+config PHY_INTEL_COMBO
+ bool "Intel ComboPHY driver"
+ depends on X86 || COMPILE_TEST
+ depends on OF && HAS_IOMEM
+ select MFD_SYSCON
+ select GENERIC_PHY
+ select REGMAP
+ help
+ Enable this to support Intel ComboPhy.
+
+ This driver configures ComboPhy subsystem on Intel gateway
+ chipsets which provides PHYs for various controllers, EMAC,
+ SATA and PCIe.
+
config PHY_INTEL_EMMC
tristate "Intel EMMC PHY driver"
select GENERIC_PHY
diff --git a/drivers/phy/intel/Makefile b/drivers/phy/intel/Makefile
index 6b876a75599d..233d530dadde 100644
--- a/drivers/phy/intel/Makefile
+++ b/drivers/phy/intel/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PHY_INTEL_COMBO) += phy-intel-combo.o
obj-$(CONFIG_PHY_INTEL_EMMC)+= phy-intel-emmc.o
diff --git a/drivers/phy/intel/phy-intel-combo.c
b/drivers/phy/intel/phy-intel-combo.c
new file mode 100644
index ..c2a35be4cdfb
--- /dev/null
+++ b/drivers/phy/intel/phy-intel-combo.c
@@ -0,0 +1,632 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Combo-PHY driver
+ *
+ * Copyright (C) 2019-2020 Intel Corporation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define PCIE_PHY_GEN_CTRL 0x00
+#define PCIE_PHY_CLK_PAD BIT(17)
+
+#define PAD_DIS_CFG0x174
+
+#define PCS_XF_ATE_OVRD_IN_2 0x3008
+#define ADAPT_REQ_MSK GENMASK(5, 4)
+
+#define PCS_XF_RX_ADAPT_ACK0x3010
+#define RX_ADAPT_ACK_BIT BIT(0)
+
+#define CR_ADDR(addr, lane)(((addr) + (lane) * 0x100) << 2)
+#define REG_COMBO_MODE(x) ((x) * 0x200)
+#define REG_CLK_DISABLE(x)
