[PATCHv4 4/9] arm: dts: ls1021a: share all MSIs

2017-07-05 Thread Zhiqiang Hou
From: Minghuan Lian 

In order to maximize the use of MSI, a PCIe controller will share
all MSI controllers. The patch changes msi-parent to refer to all
MSI controller dts nodes.

Signed-off-by: Minghuan Lian 
Signed-off-by: Hou Zhiqiang 
---
v4-v1:
 - None

 arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 51b0f69..9319e1f 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -699,7 +699,7 @@
bus-range = <0x0 0xff>;
ranges = <0x8100 0x0 0x 0x40 0x0001 0x0 
0x0001   /* downstream I/O */
  0x8200 0x0 0x4000 0x40 0x4000 0x0 
0x4000>; /* non-prefetchable memory */
-   msi-parent = <>;
+   msi-parent = <>, <>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = < 0 0 1  GIC_SPI 91  
IRQ_TYPE_LEVEL_HIGH>,
@@ -722,7 +722,7 @@
bus-range = <0x0 0xff>;
ranges = <0x8100 0x0 0x 0x48 0x0001 0x0 
0x0001   /* downstream I/O */
  0x8200 0x0 0x4000 0x48 0x4000 0x0 
0x4000>; /* non-prefetchable memory */
-   msi-parent = <>;
+   msi-parent = <>, <>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = < 0 0 1  GIC_SPI 92  
IRQ_TYPE_LEVEL_HIGH>,
-- 
2.1.0.27.g96db324



[PATCHv4 4/9] arm: dts: ls1021a: share all MSIs

2017-07-05 Thread Zhiqiang Hou
From: Minghuan Lian 

In order to maximize the use of MSI, a PCIe controller will share
all MSI controllers. The patch changes msi-parent to refer to all
MSI controller dts nodes.

Signed-off-by: Minghuan Lian 
Signed-off-by: Hou Zhiqiang 
---
v4-v1:
 - None

 arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 51b0f69..9319e1f 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -699,7 +699,7 @@
bus-range = <0x0 0xff>;
ranges = <0x8100 0x0 0x 0x40 0x0001 0x0 
0x0001   /* downstream I/O */
  0x8200 0x0 0x4000 0x40 0x4000 0x0 
0x4000>; /* non-prefetchable memory */
-   msi-parent = <>;
+   msi-parent = <>, <>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = < 0 0 1  GIC_SPI 91  
IRQ_TYPE_LEVEL_HIGH>,
@@ -722,7 +722,7 @@
bus-range = <0x0 0xff>;
ranges = <0x8100 0x0 0x 0x48 0x0001 0x0 
0x0001   /* downstream I/O */
  0x8200 0x0 0x4000 0x48 0x4000 0x0 
0x4000>; /* non-prefetchable memory */
-   msi-parent = <>;
+   msi-parent = <>, <>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = < 0 0 1  GIC_SPI 92  
IRQ_TYPE_LEVEL_HIGH>,
-- 
2.1.0.27.g96db324