Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On Sat, Jun 21, 2014 at 2:08 PM, Thomas Gleixner wrote:
> Jiang,
>
> On Mon, 9 Jun 2014, Jiang Liu wrote:
>
>> On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot.
>> There are two issues with this design. First it causes trouble to IOAPIC
>> hotplug because we need to allocate a block of IRQ numbers for each IOAPIC.
>> Second it may waste IRQ nubmers even if some IOAPIC pins are not used because
>> IRQ numbers are statically assigned.
>>
>> This patchset tries to enable dynamic IRQ number allocation for IOAPIC
>> by adopting the irqdomain framework, it solves the two issues mentioned
>> above. It also simplifies the IOAPIC driver by consolidating ways to
>> program IOAPIC pins with the irqdomain map interface.
>>
>> We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug
>> once the IOAPIC driver has been converted to irqdomain.
>
> I merged the whole lot. Thanks for doing this and reacting on all the
> review comments. Very nice cleanup work!
>
I got following warning on RHEL 7.0 shutdown path.
[58018.128900] [ cut here ]
[58018.134081] WARNING: CPU: 21 PID: 1 at fs/proc/generic.c:521
remove_proc_entry+0x150/0x1a0()
[58018.143596] remove_proc_entry: removing non-empty directory
'irq/23', leaking at least 'ehci_hcd:usb2'
[58018.154001] Modules linked in:
[58018.157435] CPU: 21 PID: 1 Comm: systemd-shutdow Tainted: G
W 3.16.0-rc2-yh-00420-g6d62036-dirty #36
[58018.168716] Hardware name: Oracle Corporation ORACLE SERVER
[58018.179703] 0009 885e759bfb60 81f76520
885e759bfba8
[58018.188033] 885e759bfb98 8109d03d 88edf9fb9f00
0002
[58018.196358] 885e759bfc6e 88f07b3f4330 88edf9fb9fb9
885e759bfbf8
[58018.204682] Call Trace:
[58018.207432] [] dump_stack+0x45/0x56
[58018.213186] [] warn_slowpath_common+0x7d/0xa0
[58018.219903] [] warn_slowpath_fmt+0x4c/0x50
[58018.226336] [] remove_proc_entry+0x150/0x1a0
[58018.232963] [] unregister_irq_proc+0xbf/0xd0
[58018.239589] [] free_desc+0x31/0xa0
[58018.245240] [] irq_free_descs+0x6c/0x80
[58018.251375] [] irq_dispose_mapping+0x53/0x60
[58018.258011] [] mp_unmap_irq+0xa0/0xc0
[58018.263960] [] acpi_unregister_gsi_ioapic+0x2f/0x40
[58018.271263] [] acpi_unregister_gsi+0x17/0x20
[58018.277896] [] acpi_pci_irq_disable+0x5e/0x68
[58018.284619] [] pcibios_disable_device+0x20/0x30
[58018.291536] [] do_pci_disable_device+0x52/0x60
[58018.298350] [] pci_disable_device+0x92/0xb0
[58018.304876] [] usb_hcd_pci_shutdown+0x3f/0x50
[58018.311593] [] pci_device_shutdown+0x36/0x70
[58018.318220] [] device_shutdown+0x135/0x190
[58018.324651] [] kernel_power_off+0x35/0x80
[58018.330980] [] SyS_reboot+0x233/0x260
[58018.336919] [] ? cpuacct_account_field+0x99/0xb0
[58018.343929] [] ? cpuacct_account_field+0x5/0xb0
[58018.350843] [] ? _raw_spin_unlock+0x27/0x30
[58018.357378] [] ? trace_hardirqs_on_caller+0x16/0x260
[58018.364774] [] ? trace_hardirqs_on+0xd/0x10
[58018.371302] [] ? syscall_trace_enter+0x17c/0x1c0
[58018.378312] [] tracesys+0xd4/0xd9
[58018.383867] ---[ end trace fade991312a6a2d9 ]---
[58018.389026] free irq_desc for 23
Like to suggest attached patch that skip mp_unregister_gsi on shutdown path.
Thanks
Yinghai
---
arch/x86/kernel/acpi/boot.c |6 ++
1 file changed, 6 insertions(+)
Index: linux-2.6/arch/x86/kernel/acpi/boot.c
===
--- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
+++ linux-2.6/arch/x86/kernel/acpi/boot.c
@@ -659,6 +659,12 @@ static int acpi_register_gsi_ioapic(stru
static void acpi_unregister_gsi_ioapic(u32 gsi)
{
#ifdef CONFIG_X86_IO_APIC
+ /* should not worry about shutdown path */
+ if (system_state == SYSTEM_HALT ||
+ system_state == SYSTEM_POWER_OFF ||
+ system_state == SYSTEM_RESTART)
+ return;
+
mp_unregister_gsi(gsi);
#endif
}
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On Sat, Jun 21, 2014 at 2:08 PM, Thomas Gleixner t...@linutronix.de wrote:
Jiang,
On Mon, 9 Jun 2014, Jiang Liu wrote:
On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot.
There are two issues with this design. First it causes trouble to IOAPIC
hotplug because we need to allocate a block of IRQ numbers for each IOAPIC.
Second it may waste IRQ nubmers even if some IOAPIC pins are not used because
IRQ numbers are statically assigned.
This patchset tries to enable dynamic IRQ number allocation for IOAPIC
by adopting the irqdomain framework, it solves the two issues mentioned
above. It also simplifies the IOAPIC driver by consolidating ways to
program IOAPIC pins with the irqdomain map interface.
We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug
once the IOAPIC driver has been converted to irqdomain.
I merged the whole lot. Thanks for doing this and reacting on all the
review comments. Very nice cleanup work!
I got following warning on RHEL 7.0 shutdown path.
[58018.128900] [ cut here ]
[58018.134081] WARNING: CPU: 21 PID: 1 at fs/proc/generic.c:521
remove_proc_entry+0x150/0x1a0()
[58018.143596] remove_proc_entry: removing non-empty directory
'irq/23', leaking at least 'ehci_hcd:usb2'
[58018.154001] Modules linked in:
[58018.157435] CPU: 21 PID: 1 Comm: systemd-shutdow Tainted: G
W 3.16.0-rc2-yh-00420-g6d62036-dirty #36
[58018.168716] Hardware name: Oracle Corporation ORACLE SERVER
[58018.179703] 0009 885e759bfb60 81f76520
885e759bfba8
[58018.188033] 885e759bfb98 8109d03d 88edf9fb9f00
0002
[58018.196358] 885e759bfc6e 88f07b3f4330 88edf9fb9fb9
885e759bfbf8
[58018.204682] Call Trace:
[58018.207432] [81f76520] dump_stack+0x45/0x56
[58018.213186] [8109d03d] warn_slowpath_common+0x7d/0xa0
[58018.219903] [8109d0ac] warn_slowpath_fmt+0x4c/0x50
[58018.226336] [8124b830] remove_proc_entry+0x150/0x1a0
[58018.232963] [810fdb5f] unregister_irq_proc+0xbf/0xd0
[58018.239589] [810f7b41] free_desc+0x31/0xa0
[58018.245240] [810f7c1c] irq_free_descs+0x6c/0x80
[58018.251375] [810fd2e3] irq_dispose_mapping+0x53/0x60
[58018.258011] [81083d60] mp_unmap_irq+0xa0/0xc0
[58018.263960] [8107ac8f] acpi_unregister_gsi_ioapic+0x2f/0x40
[58018.271263] [8107ab17] acpi_unregister_gsi+0x17/0x20
[58018.277896] [815a4562] acpi_pci_irq_disable+0x5e/0x68
[58018.284619] [81e33680] pcibios_disable_device+0x20/0x30
[58018.291536] [81557222] do_pci_disable_device+0x52/0x60
[58018.298350] [815572c2] pci_disable_device+0x92/0xb0
[58018.304876] [81c710bf] usb_hcd_pci_shutdown+0x3f/0x50
[58018.311593] [81559666] pci_device_shutdown+0x36/0x70
[58018.318220] [817a4875] device_shutdown+0x135/0x190
[58018.324651] [810bd935] kernel_power_off+0x35/0x80
[58018.330980] [810bdc33] SyS_reboot+0x233/0x260
[58018.336919] [810de239] ? cpuacct_account_field+0x99/0xb0
[58018.343929] [810de1a5] ? cpuacct_account_field+0x5/0xb0
[58018.350843] [81f86327] ? _raw_spin_unlock+0x27/0x30
[58018.357378] [810e3446] ? trace_hardirqs_on_caller+0x16/0x260
[58018.364774] [810e369d] ? trace_hardirqs_on+0xd/0x10
[58018.371302] [8105c83c] ? syscall_trace_enter+0x17c/0x1c0
[58018.378312] [81f870aa] tracesys+0xd4/0xd9
[58018.383867] ---[ end trace fade991312a6a2d9 ]---
[58018.389026] free irq_desc for 23
Like to suggest attached patch that skip mp_unregister_gsi on shutdown path.
Thanks
Yinghai
---
arch/x86/kernel/acpi/boot.c |6 ++
1 file changed, 6 insertions(+)
Index: linux-2.6/arch/x86/kernel/acpi/boot.c
===
--- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
+++ linux-2.6/arch/x86/kernel/acpi/boot.c
@@ -659,6 +659,12 @@ static int acpi_register_gsi_ioapic(stru
static void acpi_unregister_gsi_ioapic(u32 gsi)
{
#ifdef CONFIG_X86_IO_APIC
+ /* should not worry about shutdown path */
+ if (system_state == SYSTEM_HALT ||
+ system_state == SYSTEM_POWER_OFF ||
+ system_state == SYSTEM_RESTART)
+ return;
+
mp_unregister_gsi(gsi);
#endif
}
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On Sun, Jun 22, 2014 at 10:39:46PM +0800, Feng Tang wrote: > Hi, > > On Sun, Jun 22, 2014 at 04:42:27PM +0800, Ingo Molnar wrote: > > > > JFYI, with these patches applied x86 allyes32config fails with: > > > > arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: > > implicit declaration of function ‘io_apic_set_pci_routing’ > > In some intel-mid platforms (Medfield/Merrifield etc), the IOAPIC > may have more than 80 pins, and some devices like a i2c based touch > screen has its interrupt line directly connected to IOAPIC (this > platform_wdt.c here should be the same case). > > Since these devices are not PCI device or ACPI device, they can't > use the general PCI/ACPI xxx_enable_dev APIs which implicitly set > up the ioapic entry, but use this "io_apic_set_pci_routing" > directly. Just quickly read Jiang's patch set, guess these driver should be ok by using Jiang's new cleaner API "mp_set_gsi_attr()" to replace these io_apic_set_pci_routing(). Thanks, Feng -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
Hi, On Sun, Jun 22, 2014 at 04:42:27PM +0800, Ingo Molnar wrote: > > JFYI, with these patches applied x86 allyes32config fails with: > > arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: > implicit declaration of function ‘io_apic_set_pci_routing’ In some intel-mid platforms (Medfield/Merrifield etc), the IOAPIC may have more than 80 pins, and some devices like a i2c based touch screen has its interrupt line directly connected to IOAPIC (this platform_wdt.c here should be the same case). Since these devices are not PCI device or ACPI device, they can't use the general PCI/ACPI xxx_enable_dev APIs which implicitly set up the ioapic entry, but use this "io_apic_set_pci_routing" directly. Thanks, Feng > > Thanks, > > Ingo > -- > To unsubscribe from this list: send the line "unsubscribe linux-acpi" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
JFYI, with these patches applied x86 allyes32config fails with: arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: implicit declaration of function ‘io_apic_set_pci_routing’ Thanks, Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
JFYI, with these patches applied x86 allyes32config fails with: arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: implicit declaration of function ‘io_apic_set_pci_routing’ Thanks, Ingo -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
Hi, On Sun, Jun 22, 2014 at 04:42:27PM +0800, Ingo Molnar wrote: JFYI, with these patches applied x86 allyes32config fails with: arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: implicit declaration of function ‘io_apic_set_pci_routing’ In some intel-mid platforms (Medfield/Merrifield etc), the IOAPIC may have more than 80 pins, and some devices like a i2c based touch screen has its interrupt line directly connected to IOAPIC (this platform_wdt.c here should be the same case). Since these devices are not PCI device or ACPI device, they can't use the general PCI/ACPI xxx_enable_dev APIs which implicitly set up the ioapic entry, but use this io_apic_set_pci_routing directly. Thanks, Feng Thanks, Ingo -- To unsubscribe from this list: send the line unsubscribe linux-acpi in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On Sun, Jun 22, 2014 at 10:39:46PM +0800, Feng Tang wrote: Hi, On Sun, Jun 22, 2014 at 04:42:27PM +0800, Ingo Molnar wrote: JFYI, with these patches applied x86 allyes32config fails with: arch/x86/platform/intel-mid/device_libs/platform_wdt.c:45:3: error: implicit declaration of function ‘io_apic_set_pci_routing’ In some intel-mid platforms (Medfield/Merrifield etc), the IOAPIC may have more than 80 pins, and some devices like a i2c based touch screen has its interrupt line directly connected to IOAPIC (this platform_wdt.c here should be the same case). Since these devices are not PCI device or ACPI device, they can't use the general PCI/ACPI xxx_enable_dev APIs which implicitly set up the ioapic entry, but use this io_apic_set_pci_routing directly. Just quickly read Jiang's patch set, guess these driver should be ok by using Jiang's new cleaner API mp_set_gsi_attr() to replace these io_apic_set_pci_routing(). Thanks, Feng -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
Jiang, On Mon, 9 Jun 2014, Jiang Liu wrote: > On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot. > There are two issues with this design. First it causes trouble to IOAPIC > hotplug because we need to allocate a block of IRQ numbers for each IOAPIC. > Second it may waste IRQ nubmers even if some IOAPIC pins are not used because > IRQ numbers are statically assigned. > > This patchset tries to enable dynamic IRQ number allocation for IOAPIC > by adopting the irqdomain framework, it solves the two issues mentioned > above. It also simplifies the IOAPIC driver by consolidating ways to > program IOAPIC pins with the irqdomain map interface. > > We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug > once the IOAPIC driver has been converted to irqdomain. I merged the whole lot. Thanks for doing this and reacting on all the review comments. Very nice cleanup work! Thanks, tglx -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
Jiang, On Mon, 9 Jun 2014, Jiang Liu wrote: On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot. There are two issues with this design. First it causes trouble to IOAPIC hotplug because we need to allocate a block of IRQ numbers for each IOAPIC. Second it may waste IRQ nubmers even if some IOAPIC pins are not used because IRQ numbers are statically assigned. This patchset tries to enable dynamic IRQ number allocation for IOAPIC by adopting the irqdomain framework, it solves the two issues mentioned above. It also simplifies the IOAPIC driver by consolidating ways to program IOAPIC pins with the irqdomain map interface. We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug once the IOAPIC driver has been converted to irqdomain. I merged the whole lot. Thanks for doing this and reacting on all the review comments. Very nice cleanup work! Thanks, tglx -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot. There are two issues with this design. First it causes trouble to IOAPIC hotplug because we need to allocate a block of IRQ numbers for each IOAPIC. Second it may waste IRQ nubmers even if some IOAPIC pins are not used because IRQ numbers are statically assigned. This patchset tries to enable dynamic IRQ number allocation for IOAPIC by adopting the irqdomain framework, it solves the two issues mentioned above. It also simplifies the IOAPIC driver by consolidating ways to program IOAPIC pins with the irqdomain map interface. We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug once the IOAPIC driver has been converted to irqdomain. This patchset applies to tip/irq/core and you may pull from https://github.com/jiangliu/linux.git ioapic/irqdomain_v4 The patchset has been tested on a two socket 64 bit Intel platforms with: 1) ACPI and mpparse enabled (boot successfully) 2) Mpparse enabled with ACPI disabled (boot successfully) 3) ACPI enabled with Mpparse disabled (boot successfully) 4) boot parameter "pci=nomsi" 5) boot parameter "acpi=noirq" 6) boot parameter "pci=noacpi" 7) UP mode (SMP disabled) It has also been tested on an one socket laptop with 32bit Ubuntu with: 1) ACPI and mpparse enabled (boot successfully) 2) Mpparse enabled with ACPI disabled (boot successfully) 3) ACPI enabled with Mpparse disabled (boot successfully) 4) boot parameter "pci=nomsi" 5) boot parameter "acpi=noirq" 6) boot parameter "pci=noacpi" 7) UP mode (SMP disabled) 8) UP mode with IOAPIC disabled It also builds successfully (but without booting due to hardware resource constraints) for 32 bit platforms with following configuraitons: 1) SFI enabled 2) devicetree (CE4100) enabled V3->V4 1) simplify interfaces/implementation to enable irqdomain for IOAPIC 2) clean up usage of NR_IRQS_LEGACY 3) refine support of CE4100 4) address review comments from last round of review V2->V3 1) Implement irqdomain unmap() interface and free IRQ when it's not used 2) Fix posssible conflicts with native and PV Xen IRQ management 3) Fix build errors on CE4100 4) Code quality and readability improvement V1->V2 1) Rebase to tip/irq/core 2) reorder patches to put bugfixes at the head 3) fix bug in handling shared ISA IRQs 4) refine commit messages Patch 1 is simple bugfix for MSI. Patch 2-20 are trivial code improvements, bugfixes and preparation. Patch 21-28 enable basic irqdomain support and IRQ number dynamic allocation. Patch 29-33 consoldate the way to program IOAPIC pins by using irqdomain map() interface. Patch 34-35 cleans up unused interfaces and functions in IOAPIC driver. Patch 36-41 implement irqdoamin unmap() interfaces and free IRQ when it's not used Patch 42 is a simple clean up Tests and comments are warmly welcomed! Jiang Liu (42): x86, irq: update high address field when updating affinity for MSI IRQ x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) x86, mpparse: simplify arch/x86/include/asm/mpspec.h x86, acpi: reorganize code to avoid forward declaration in boot.c x86, PCI, ACPI: use kmalloc_node() to optimize for performance x86, acpi, irq: kill static function irq_to_gsi() x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c x86, ACPI, irq: enhance error handling in function acpi_register_gsi() x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ x86, irq, trivial: minor improvements of IRQ related code x86, ioapic: kill unused global variable timer_through_8259 x86, ioapic: kill static variable nr_irqs_gsi x86, ioapic: introduce helper utilities to walk ioapics and pins x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain x86, irq: introduce some helper utilities to improve readability ce4100, irq: make CE4100 depend on CONFIG_X86_IO_APIC ce4100, irq: do not set legacy_pic to null_legacy_pic x86, irq: count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY x86, irq: simplify arch_early_irq_init() x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number x86, irq, ACPI: change __acpi_register_gsi to return IRQ number instead of GSI x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC x86, irq: enhance mp_register_ioapic() to support irqdomain x86, ACPI, irq: provide basic irqdomain support x86, mpparse, irq: provide basic irqdomain support x86, SFI, irq: provide basic irqdomain support x86, devicetree, irq: use common mechanism to support irqdomain x86, irq: introduce two helper functions to support irqdomain map operation x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins x86, irq, mpparse: use common irqdomain map interface to program IOAPIC pins x86, irq,
[Patch V4 00/42] use irqdomain to dynamically allocate IRQ for IOAPIC
On x86 platforms, IRQ number are statically allocated to IOAPIC pins at boot. There are two issues with this design. First it causes trouble to IOAPIC hotplug because we need to allocate a block of IRQ numbers for each IOAPIC. Second it may waste IRQ nubmers even if some IOAPIC pins are not used because IRQ numbers are statically assigned. This patchset tries to enable dynamic IRQ number allocation for IOAPIC by adopting the irqdomain framework, it solves the two issues mentioned above. It also simplifies the IOAPIC driver by consolidating ways to program IOAPIC pins with the irqdomain map interface. We will enhance the IOAPIC driver core to support ACPI based IOAPIC hotplug once the IOAPIC driver has been converted to irqdomain. This patchset applies to tip/irq/core and you may pull from https://github.com/jiangliu/linux.git ioapic/irqdomain_v4 The patchset has been tested on a two socket 64 bit Intel platforms with: 1) ACPI and mpparse enabled (boot successfully) 2) Mpparse enabled with ACPI disabled (boot successfully) 3) ACPI enabled with Mpparse disabled (boot successfully) 4) boot parameter pci=nomsi 5) boot parameter acpi=noirq 6) boot parameter pci=noacpi 7) UP mode (SMP disabled) It has also been tested on an one socket laptop with 32bit Ubuntu with: 1) ACPI and mpparse enabled (boot successfully) 2) Mpparse enabled with ACPI disabled (boot successfully) 3) ACPI enabled with Mpparse disabled (boot successfully) 4) boot parameter pci=nomsi 5) boot parameter acpi=noirq 6) boot parameter pci=noacpi 7) UP mode (SMP disabled) 8) UP mode with IOAPIC disabled It also builds successfully (but without booting due to hardware resource constraints) for 32 bit platforms with following configuraitons: 1) SFI enabled 2) devicetree (CE4100) enabled V3-V4 1) simplify interfaces/implementation to enable irqdomain for IOAPIC 2) clean up usage of NR_IRQS_LEGACY 3) refine support of CE4100 4) address review comments from last round of review V2-V3 1) Implement irqdomain unmap() interface and free IRQ when it's not used 2) Fix posssible conflicts with native and PV Xen IRQ management 3) Fix build errors on CE4100 4) Code quality and readability improvement V1-V2 1) Rebase to tip/irq/core 2) reorder patches to put bugfixes at the head 3) fix bug in handling shared ISA IRQs 4) refine commit messages Patch 1 is simple bugfix for MSI. Patch 2-20 are trivial code improvements, bugfixes and preparation. Patch 21-28 enable basic irqdomain support and IRQ number dynamic allocation. Patch 29-33 consoldate the way to program IOAPIC pins by using irqdomain map() interface. Patch 34-35 cleans up unused interfaces and functions in IOAPIC driver. Patch 36-41 implement irqdoamin unmap() interfaces and free IRQ when it's not used Patch 42 is a simple clean up Tests and comments are warmly welcomed! Jiang Liu (42): x86, irq: update high address field when updating affinity for MSI IRQ x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) x86, mpparse: simplify arch/x86/include/asm/mpspec.h x86, acpi: reorganize code to avoid forward declaration in boot.c x86, PCI, ACPI: use kmalloc_node() to optimize for performance x86, acpi, irq: kill static function irq_to_gsi() x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c x86, ACPI, irq: enhance error handling in function acpi_register_gsi() x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ x86, irq, trivial: minor improvements of IRQ related code x86, ioapic: kill unused global variable timer_through_8259 x86, ioapic: kill static variable nr_irqs_gsi x86, ioapic: introduce helper utilities to walk ioapics and pins x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain x86, irq: introduce some helper utilities to improve readability ce4100, irq: make CE4100 depend on CONFIG_X86_IO_APIC ce4100, irq: do not set legacy_pic to null_legacy_pic x86, irq: count legacy IRQs by legacy_pic-nr_legacy_irqs instead of NR_IRQS_LEGACY x86, irq: simplify arch_early_irq_init() x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number x86, irq, ACPI: change __acpi_register_gsi to return IRQ number instead of GSI x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC x86, irq: enhance mp_register_ioapic() to support irqdomain x86, ACPI, irq: provide basic irqdomain support x86, mpparse, irq: provide basic irqdomain support x86, SFI, irq: provide basic irqdomain support x86, devicetree, irq: use common mechanism to support irqdomain x86, irq: introduce two helper functions to support irqdomain map operation x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins x86, irq, mpparse: use common irqdomain map interface to program IOAPIC pins x86, irq, SFI: use common
