Re: [RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-26 Thread Dwivedi, Avaneesh Kumar (avani) 



On 5/26/2017 11:39 AM, Bjorn Andersson wrote:

On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:


diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,msm8916-mss-pil",
-   "qcom,msm8974-mss-pil"
-
+   "qcom,msm8974-mss-pil",
+   "qcom,msm8996-mss-pil"

Indentation please.

OK.



  - reg:
Usage: required
Value type: 
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
b/drivers/remoteproc/qcom_q6v5_pil.c

[..]

+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYP   BIT(25)
+#define QDSP6v56_BHS_ONBIT(24)
+#define QDSP6v56_CLAMP_WL  BIT(21)
+#define QDSP6v56_CLAMP_QMC_MEM BIT(22)
+#define HALT_CHECK_MAX_LOOPS   200
+#define QDSP6SS_XO_CBCR0x0038
+#define QDSP6SS_ACC_OVERRIDE_VAL   0x20

Please keep the blank line between the defines and the struct
definition.

OK.



  struct reg_info {
struct regulator *reg;
int uV;

[..]
  
+static const struct rproc_hexagon_res msm8996_mss = {

+   .hexagon_mba_image = "mba.mbn",
+   .proxy_supply = (struct qcom_mss_reg_res[]) {
+   {}
+   },
+   .active_supply = (struct qcom_mss_reg_res[]) {
+   {},
+   {}
+   },

It's possible to just leave .proxy_supply and .active_supply out (i.e.
leaving them as NULL), as I made q6v5_regulator_init() handle this
gracefully a while back.

OK.


Regards,
Bjorn


--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. 
is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-26 Thread Dwivedi, Avaneesh Kumar (avani) 



On 5/26/2017 11:39 AM, Bjorn Andersson wrote:

On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:


diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,msm8916-mss-pil",
-   "qcom,msm8974-mss-pil"
-
+   "qcom,msm8974-mss-pil",
+   "qcom,msm8996-mss-pil"

Indentation please.

OK.



  - reg:
Usage: required
Value type: 
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
b/drivers/remoteproc/qcom_q6v5_pil.c

[..]

+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYP   BIT(25)
+#define QDSP6v56_BHS_ONBIT(24)
+#define QDSP6v56_CLAMP_WL  BIT(21)
+#define QDSP6v56_CLAMP_QMC_MEM BIT(22)
+#define HALT_CHECK_MAX_LOOPS   200
+#define QDSP6SS_XO_CBCR0x0038
+#define QDSP6SS_ACC_OVERRIDE_VAL   0x20

Please keep the blank line between the defines and the struct
definition.

OK.



  struct reg_info {
struct regulator *reg;
int uV;

[..]
  
+static const struct rproc_hexagon_res msm8996_mss = {

+   .hexagon_mba_image = "mba.mbn",
+   .proxy_supply = (struct qcom_mss_reg_res[]) {
+   {}
+   },
+   .active_supply = (struct qcom_mss_reg_res[]) {
+   {},
+   {}
+   },

It's possible to just leave .proxy_supply and .active_supply out (i.e.
leaving them as NULL), as I made q6v5_regulator_init() handle this
gracefully a while back.

OK.


Regards,
Bjorn


--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. 
is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

Re: [RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-26 Thread Bjorn Andersson 
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:

> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
> b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> index 92347fe..f9dfb6c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> @@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
>   Definition: must be one of:
>   "qcom,q6v5-pil",
>   "qcom,msm8916-mss-pil",
> - "qcom,msm8974-mss-pil"
> -
> + "qcom,msm8974-mss-pil",
> + "qcom,msm8996-mss-pil"

Indentation please.

>  - reg:
>   Usage: required
>   Value type: 
> diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
> b/drivers/remoteproc/qcom_q6v5_pil.c
[..]
> +/* QDSP6v56 parameters */
> +#define QDSP6v56_LDO_BYP BIT(25)
> +#define QDSP6v56_BHS_ON  BIT(24)
> +#define QDSP6v56_CLAMP_WLBIT(21)
> +#define QDSP6v56_CLAMP_QMC_MEM   BIT(22)
> +#define HALT_CHECK_MAX_LOOPS 200
> +#define QDSP6SS_XO_CBCR  0x0038
> +#define QDSP6SS_ACC_OVERRIDE_VAL 0x20

Please keep the blank line between the defines and the struct
definition.

>  struct reg_info {
>   struct regulator *reg;
>   int uV;
[..]
>  
> +static const struct rproc_hexagon_res msm8996_mss = {
> + .hexagon_mba_image = "mba.mbn",
> + .proxy_supply = (struct qcom_mss_reg_res[]) {
> + {}
> + },
> + .active_supply = (struct qcom_mss_reg_res[]) {
> + {},
> + {}
> + },

It's possible to just leave .proxy_supply and .active_supply out (i.e.
leaving them as NULL), as I made q6v5_regulator_init() handle this
gracefully a while back.

Regards,
Bjorn

Re: [RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-26 Thread Bjorn Andersson 
On Tue 16 May 11:02 PDT 2017, Avaneesh Kumar Dwivedi wrote:

> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
> b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> index 92347fe..f9dfb6c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> @@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
>   Definition: must be one of:
>   "qcom,q6v5-pil",
>   "qcom,msm8916-mss-pil",
> - "qcom,msm8974-mss-pil"
> -
> + "qcom,msm8974-mss-pil",
> + "qcom,msm8996-mss-pil"

Indentation please.

>  - reg:
>   Usage: required
>   Value type: 
> diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
> b/drivers/remoteproc/qcom_q6v5_pil.c
[..]
> +/* QDSP6v56 parameters */
> +#define QDSP6v56_LDO_BYP BIT(25)
> +#define QDSP6v56_BHS_ON  BIT(24)
> +#define QDSP6v56_CLAMP_WLBIT(21)
> +#define QDSP6v56_CLAMP_QMC_MEM   BIT(22)
> +#define HALT_CHECK_MAX_LOOPS 200
> +#define QDSP6SS_XO_CBCR  0x0038
> +#define QDSP6SS_ACC_OVERRIDE_VAL 0x20

Please keep the blank line between the defines and the struct
definition.

>  struct reg_info {
>   struct regulator *reg;
>   int uV;
[..]
>  
> +static const struct rproc_hexagon_res msm8996_mss = {
> + .hexagon_mba_image = "mba.mbn",
> + .proxy_supply = (struct qcom_mss_reg_res[]) {
> + {}
> + },
> + .active_supply = (struct qcom_mss_reg_res[]) {
> + {},
> + {}
> + },

It's possible to just leave .proxy_supply and .active_supply out (i.e.
leaving them as NULL), as I made q6v5_regulator_init() handle this
gracefully a while back.

Regards,
Bjorn

[RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-16 Thread Avaneesh Kumar Dwivedi 
This patch add support for mss boot on msm8996.
Major changes include initializing mss rproc for
msm8996, making appropriate change for executing
mss reset sequence etc.

Signed-off-by: Avaneesh Kumar Dwivedi 
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   4 +-
 drivers/remoteproc/qcom_q6v5_pil.c | 171 ++---
 2 files changed, 150 insertions(+), 25 deletions(-)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,msm8916-mss-pil",
-   "qcom,msm8974-mss-pil"
-
+   "qcom,msm8974-mss-pil",
+   "qcom,msm8996-mss-pil"
 - reg:
Usage: required
Value type: 
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
b/drivers/remoteproc/qcom_q6v5_pil.c
index 57a4cfec..97da382 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -32,6 +32,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "remoteproc_internal.h"
 #include "qcom_common.h"
@@ -64,6 +65,8 @@
 #define QDSP6SS_RESET_REG  0x014
 #define QDSP6SS_GFMUX_CTL_REG  0x020
 #define QDSP6SS_PWR_CTL_REG0x030
+#define QDSP6SS_MEM_PWR_CTL0x0B0
+#define QDSP6SS_STRAP_ACC  0x110
 
 /* AXI Halt Register Offsets */
 #define AXI_HALTREQ_REG0x0
@@ -92,6 +95,14 @@
 #define QDSS_BHS_ONBIT(21)
 #define QDSS_LDO_BYP   BIT(22)
 
+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYP   BIT(25)
+#define QDSP6v56_BHS_ONBIT(24)
+#define QDSP6v56_CLAMP_WL  BIT(21)
+#define QDSP6v56_CLAMP_QMC_MEM BIT(22)
+#define HALT_CHECK_MAX_LOOPS   200
+#define QDSP6SS_XO_CBCR0x0038
+#define QDSP6SS_ACC_OVERRIDE_VAL   0x20
 struct reg_info {
struct regulator *reg;
int uV;
@@ -110,6 +121,7 @@ struct rproc_hexagon_res {
struct qcom_mss_reg_res *active_supply;
char **proxy_clk_names;
char **active_clk_names;
+   int version;
bool need_mem_protection;
 };
 
@@ -155,6 +167,13 @@ struct q6v5 {
bool need_mem_protection;
 
struct qcom_rproc_subdev smd_subdev;
+   int version;
+};
+
+enum {
+   MSS_MSM8916,
+   MSS_MSM8974,
+   MSS_MSM8996,
 };
 
 static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
@@ -391,33 +410,97 @@ static int q6v5proc_reset(struct q6v5 *qproc)
 {
u32 val;
int ret;
+   int i;
 
-   /* Assert resets, stop core */
-   val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
-   val |= (Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE);
-   writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
 
-   /* Enable power block headswitch, and wait for it to stabilize */
-   val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= QDSS_BHS_ON | QDSS_LDO_BYP;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   udelay(1);
+   if (qproc->version == MSS_MSM8996) {
+   /* Override the ACC value if required */
+   writel(QDSP6SS_ACC_OVERRIDE_VAL,
+   qproc->reg_base + QDSP6SS_STRAP_ACC);
 
-   /*
-* Turn on memories. L2 banks should be done individually
-* to minimize inrush current.
-*/
-   val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_SLP_RET_N | Q6SS_L2TAG_SLP_NRET_N |
-   Q6SS_ETB_SLP_NRET_N | Q6SS_L2DATA_STBY_N;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_2;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_1;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_0;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+   /* Assert resets, stop core */
+   val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
+   val |= Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE;
+   writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
+
+   /* BHS require xo cbcr to be enabled */
+   val = readl(qproc->reg_base + QDSP6SS_XO_CBCR);
+   val |= 0x1;
+   writel(val, qproc->reg_base + QDSP6SS_XO_CBCR);
 
+   /* Read CLKOFF bit to go low indicating CLK is enabled */
+   ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR,
+   val, !(val & BIT(31)), 1, HALT_CHECK_MAX_LOOPS);
+

[RESEND: PATCH v4 4/4] remoteproc: qcom: Add support for mss boot on msm8996

2017-05-16 Thread Avaneesh Kumar Dwivedi 
This patch add support for mss boot on msm8996.
Major changes include initializing mss rproc for
msm8996, making appropriate change for executing
mss reset sequence etc.

Signed-off-by: Avaneesh Kumar Dwivedi 
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |   4 +-
 drivers/remoteproc/qcom_q6v5_pil.c | 171 ++---
 2 files changed, 150 insertions(+), 25 deletions(-)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 92347fe..f9dfb6c 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,8 +9,8 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,msm8916-mss-pil",
-   "qcom,msm8974-mss-pil"
-
+   "qcom,msm8974-mss-pil",
+   "qcom,msm8996-mss-pil"
 - reg:
Usage: required
Value type: 
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c 
b/drivers/remoteproc/qcom_q6v5_pil.c
index 57a4cfec..97da382 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -32,6 +32,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "remoteproc_internal.h"
 #include "qcom_common.h"
@@ -64,6 +65,8 @@
 #define QDSP6SS_RESET_REG  0x014
 #define QDSP6SS_GFMUX_CTL_REG  0x020
 #define QDSP6SS_PWR_CTL_REG0x030
+#define QDSP6SS_MEM_PWR_CTL0x0B0
+#define QDSP6SS_STRAP_ACC  0x110
 
 /* AXI Halt Register Offsets */
 #define AXI_HALTREQ_REG0x0
@@ -92,6 +95,14 @@
 #define QDSS_BHS_ONBIT(21)
 #define QDSS_LDO_BYP   BIT(22)
 
+/* QDSP6v56 parameters */
+#define QDSP6v56_LDO_BYP   BIT(25)
+#define QDSP6v56_BHS_ONBIT(24)
+#define QDSP6v56_CLAMP_WL  BIT(21)
+#define QDSP6v56_CLAMP_QMC_MEM BIT(22)
+#define HALT_CHECK_MAX_LOOPS   200
+#define QDSP6SS_XO_CBCR0x0038
+#define QDSP6SS_ACC_OVERRIDE_VAL   0x20
 struct reg_info {
struct regulator *reg;
int uV;
@@ -110,6 +121,7 @@ struct rproc_hexagon_res {
struct qcom_mss_reg_res *active_supply;
char **proxy_clk_names;
char **active_clk_names;
+   int version;
bool need_mem_protection;
 };
 
@@ -155,6 +167,13 @@ struct q6v5 {
bool need_mem_protection;
 
struct qcom_rproc_subdev smd_subdev;
+   int version;
+};
+
+enum {
+   MSS_MSM8916,
+   MSS_MSM8974,
+   MSS_MSM8996,
 };
 
 static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
@@ -391,33 +410,97 @@ static int q6v5proc_reset(struct q6v5 *qproc)
 {
u32 val;
int ret;
+   int i;
 
-   /* Assert resets, stop core */
-   val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
-   val |= (Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE);
-   writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
 
-   /* Enable power block headswitch, and wait for it to stabilize */
-   val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= QDSS_BHS_ON | QDSS_LDO_BYP;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   udelay(1);
+   if (qproc->version == MSS_MSM8996) {
+   /* Override the ACC value if required */
+   writel(QDSP6SS_ACC_OVERRIDE_VAL,
+   qproc->reg_base + QDSP6SS_STRAP_ACC);
 
-   /*
-* Turn on memories. L2 banks should be done individually
-* to minimize inrush current.
-*/
-   val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_SLP_RET_N | Q6SS_L2TAG_SLP_NRET_N |
-   Q6SS_ETB_SLP_NRET_N | Q6SS_L2DATA_STBY_N;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_2;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_1;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-   val |= Q6SS_L2DATA_SLP_NRET_N_0;
-   writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+   /* Assert resets, stop core */
+   val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
+   val |= Q6SS_CORE_ARES | Q6SS_BUS_ARES_ENABLE | Q6SS_STOP_CORE;
+   writel(val, qproc->reg_base + QDSP6SS_RESET_REG);
+
+   /* BHS require xo cbcr to be enabled */
+   val = readl(qproc->reg_base + QDSP6SS_XO_CBCR);
+   val |= 0x1;
+   writel(val, qproc->reg_base + QDSP6SS_XO_CBCR);
 
+   /* Read CLKOFF bit to go low indicating CLK is enabled */
+   ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR,
+   val, !(val & BIT(31)), 1, HALT_CHECK_MAX_LOOPS);
+   if (ret) {
+