[RESEND PATCH v5 8/8] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

2015-12-11 Thread Pankaj Dubey 
As now we have dedicated driver for SROM controller, it will take care
of saving register banks during S2R so we can safely remove these
settings from mach-exynos.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Kukjin Kim 
---
 arch/arm/mach-exynos/Kconfig |  2 ++
 arch/arm/mach-exynos/exynos.c| 17 -
 arch/arm/mach-exynos/include/mach/map.h  |  3 --
 arch/arm/mach-exynos/regs-srom.h | 53 
 arch/arm/mach-exynos/suspend.c   | 20 ++-
 arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
 6 files changed, 4 insertions(+), 92 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/regs-srom.h

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 3a10f1a..83c85f5 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
select ARM_GIC
select COMMON_CLK_SAMSUNG
select EXYNOS_THERMAL
+   select EXYNOS_SROM if PM
select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
@@ -24,6 +25,7 @@ menuconfig ARCH_EXYNOS
select PINCTRL_EXYNOS
select PM_GENERIC_DOMAINS if PM
select S5P_DEV_MFC
+   select SOC_SAMSUNG
select SRAM
select THERMAL
select MFD_SYSCON
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 524aa6f..4ffb90e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -37,11 +37,6 @@ void __iomem *pmu_base_addr;
 
 static struct map_desc exynos4_iodesc[] __initdata = {
{
-   .virtual= (unsigned long)S5P_VA_SROMC,
-   .pfn= __phys_to_pfn(EXYNOS4_PA_SROMC),
-   .length = SZ_4K,
-   .type   = MT_DEVICE,
-   }, {
.virtual= (unsigned long)S5P_VA_CMU,
.pfn= __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
@@ -64,15 +59,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
},
 };
 
-static struct map_desc exynos5_iodesc[] __initdata = {
-   {
-   .virtual= (unsigned long)S5P_VA_SROMC,
-   .pfn= __phys_to_pfn(EXYNOS5_PA_SROMC),
-   .length = SZ_4K,
-   .type   = MT_DEVICE,
-   },
-};
-
 static struct platform_device exynos_cpuidle = {
.name  = "exynos_cpuidle",
 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
@@ -144,9 +130,6 @@ static void __init exynos_map_io(void)
 {
if (soc_is_exynos4())
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-   if (soc_is_exynos5())
-   iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
 }
 
 static void __init exynos_init_io(void)
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index 86d8085..351e839 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -32,7 +32,4 @@
 #define EXYNOS4_PA_COREPERI0x1050
 #define EXYNOS4_PA_L2CC0x10502000
 
-#define EXYNOS4_PA_SROMC   0x1257
-#define EXYNOS5_PA_SROMC   0x1225
-
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/regs-srom.h b/arch/arm/mach-exynos/regs-srom.h
deleted file mode 100644
index 5c4d442..000
--- a/arch/arm/mach-exynos/regs-srom.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * S5P SROMC register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_REGS_SROM_H
-#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
-
-#include 
-
-#define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
-
-#define S5P_SROM_BWS5P_SROMREG(0x0)
-#define S5P_SROM_BC0   S5P_SROMREG(0x4)
-#define S5P_SROM_BC1   S5P_SROMREG(0x8)
-#define S5P_SROM_BC2   S5P_SROMREG(0xc)
-#define S5P_SROM_BC3   S5P_SROMREG(0x10)
-#define S5P_SROM_BC4   S5P_SROMREG(0x14)
-#define S5P_SROM_BC5   S5P_SROMREG(0x18)
-
-/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
-
-#define S5P_SROM_BW__DATAWIDTH__SHIFT  0
-#define S5P_SROM_BW__ADDRMODE__SHIFT   1
-#define S5P_SROM_BW__WAITENABLE__SHIFT 2
-#define S5P_SROM_BW__BYTEENABLE__SHIFT 3
-
-#define S5P_SROM_BW__CS_MASK   0xf
-
-#define S5P_SROM_BW__NCS0__SHIFT   0
-#define S5P_SROM_BW__NCS1__SHIFT   4
-#define S5P_SROM_BW__NCS2__SHIFT   8
-#define S5P_SROM_BW__NCS3__SHIFT   12

[RESEND PATCH v5 8/8] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

2015-12-11 Thread Pankaj Dubey 
As now we have dedicated driver for SROM controller, it will take care
of saving register banks during S2R so we can safely remove these
settings from mach-exynos.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Kukjin Kim 
---
 arch/arm/mach-exynos/Kconfig |  2 ++
 arch/arm/mach-exynos/exynos.c| 17 -
 arch/arm/mach-exynos/include/mach/map.h  |  3 --
 arch/arm/mach-exynos/regs-srom.h | 53 
 arch/arm/mach-exynos/suspend.c   | 20 ++-
 arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
 6 files changed, 4 insertions(+), 92 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/regs-srom.h

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 3a10f1a..83c85f5 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
select ARM_GIC
select COMMON_CLK_SAMSUNG
select EXYNOS_THERMAL
+   select EXYNOS_SROM if PM
select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
@@ -24,6 +25,7 @@ menuconfig ARCH_EXYNOS
select PINCTRL_EXYNOS
select PM_GENERIC_DOMAINS if PM
select S5P_DEV_MFC
+   select SOC_SAMSUNG
select SRAM
select THERMAL
select MFD_SYSCON
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 524aa6f..4ffb90e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -37,11 +37,6 @@ void __iomem *pmu_base_addr;
 
 static struct map_desc exynos4_iodesc[] __initdata = {
{
-   .virtual= (unsigned long)S5P_VA_SROMC,
-   .pfn= __phys_to_pfn(EXYNOS4_PA_SROMC),
-   .length = SZ_4K,
-   .type   = MT_DEVICE,
-   }, {
.virtual= (unsigned long)S5P_VA_CMU,
.pfn= __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
@@ -64,15 +59,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
},
 };
 
-static struct map_desc exynos5_iodesc[] __initdata = {
-   {
-   .virtual= (unsigned long)S5P_VA_SROMC,
-   .pfn= __phys_to_pfn(EXYNOS5_PA_SROMC),
-   .length = SZ_4K,
-   .type   = MT_DEVICE,
-   },
-};
-
 static struct platform_device exynos_cpuidle = {
.name  = "exynos_cpuidle",
 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
@@ -144,9 +130,6 @@ static void __init exynos_map_io(void)
 {
if (soc_is_exynos4())
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-   if (soc_is_exynos5())
-   iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
 }
 
 static void __init exynos_init_io(void)
diff --git a/arch/arm/mach-exynos/include/mach/map.h 
b/arch/arm/mach-exynos/include/mach/map.h
index 86d8085..351e839 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -32,7 +32,4 @@
 #define EXYNOS4_PA_COREPERI0x1050
 #define EXYNOS4_PA_L2CC0x10502000
 
-#define EXYNOS4_PA_SROMC   0x1257
-#define EXYNOS5_PA_SROMC   0x1225
-
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/regs-srom.h b/arch/arm/mach-exynos/regs-srom.h
deleted file mode 100644
index 5c4d442..000
--- a/arch/arm/mach-exynos/regs-srom.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * S5P SROMC register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_REGS_SROM_H
-#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
-
-#include 
-
-#define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
-
-#define S5P_SROM_BWS5P_SROMREG(0x0)
-#define S5P_SROM_BC0   S5P_SROMREG(0x4)
-#define S5P_SROM_BC1   S5P_SROMREG(0x8)
-#define S5P_SROM_BC2   S5P_SROMREG(0xc)
-#define S5P_SROM_BC3   S5P_SROMREG(0x10)
-#define S5P_SROM_BC4   S5P_SROMREG(0x14)
-#define S5P_SROM_BC5   S5P_SROMREG(0x18)
-
-/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
-
-#define S5P_SROM_BW__DATAWIDTH__SHIFT  0
-#define S5P_SROM_BW__ADDRMODE__SHIFT   1
-#define S5P_SROM_BW__WAITENABLE__SHIFT 2
-#define S5P_SROM_BW__BYTEENABLE__SHIFT 3
-
-#define S5P_SROM_BW__CS_MASK   0xf
-
-#define S5P_SROM_BW__NCS0__SHIFT   0
-#define S5P_SROM_BW__NCS1__SHIFT   4
-#define S5P_SROM_BW__NCS2__SHIFT