Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions

2019-05-28 Thread Leonard Crestez
On 22.05.2019 16:40, Lucas Stach wrote:
> Am Mittwoch, den 22.05.2019, 13:30 + schrieb Leonard Crestez:
>> On 22.05.2019 16:13, Guido Günther wrote:
>>> Subject: Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions
>>> On Wed, May 08, 2019 at 02:40:18PM +0200, Guido Günther wrote:

>>>> Thanks for your comments. Let's try s.th. different then: identify by
>>>> bootrom, ocotop and anatop and fall back to ATF afterwards (I'll split
>>>> out the DT part and add binding docs if this makes sense). I'm also
>>>> happy to drop the whole ATF logic until mailine ATF catched up:
>>>>
>>>> The mainline ATF doesn't currently support the FSL_SIP_GET_SOC_INFO call
>>>> nor does it have the code to identify different imx8mq SOC revisions so
>>>> mimic what NXPs ATF does here.
>>>
>>> Does this makes sense? If so I'll send this out as a series.
>>
>> Mainline ATF has recently caught up:
>>
>>>> As a fallback use ATF so we can identify new revisions once it gains
>>>> support or when using NXPs ATF.
>>>
>>> I'm also fine with dropping the ATF part if we don't want to depend on
>>> it in mainline.
>>
>> Linux arm64 depends on ATF to implement power management via PSCI:
>> hotplug cpuidle and suspend.
>>
>> It is not clear why Linux would avoid other services and insist on
>> reimplementing hardware workarounds.
> 
> I fully agree. We should not duplicate functionality between ATF and
> Linux kernel.

Excellent, will remember this when debating who should manipulate GPC.

Guido: Are you going to resend a variant of your V1?

You mentioned that you need this for erratas, how exactly are you going 
to fetch soc revision from a driver? For 32bit imx there is a global 
imx_get_soc_revision(), maybe the definition could be moved from 
arch/arm/mach-imx/cpu.c to drivers/soc/imx/revision.c so that it's 
available everywhere?

--
Regards,
Leonard


Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions

2019-05-22 Thread Lucas Stach
Am Mittwoch, den 22.05.2019, 13:30 + schrieb Leonard Crestez:
> On 22.05.2019 16:13, Guido Günther wrote:
> > Subject: Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions
> 
> Fixed subject
> 
> > On Wed, May 08, 2019 at 02:40:18PM +0200, Guido Günther wrote:
> > > Thanks for your comments. Let's try s.th. different then: identify by
> > > bootrom, ocotop and anatop and fall back to ATF afterwards (I'll split
> > > out the DT part and add binding docs if this makes sense). I'm also
> > > happy to drop the whole ATF logic until mailine ATF catched up:
> > > 
> > > The mainline ATF doesn't currently support the FSL_SIP_GET_SOC_INFO call
> > > nor does it have the code to identify different imx8mq SOC revisions so
> > > mimic what NXPs ATF does here.
> > 
> > Does this makes sense? If so I'll send this out as a series.
> 
> Mainline ATF has recently caught up:
> 
> https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c#n52
> 
> > > As a fallback use ATF so we can identify new revisions once it gains
> > > support or when using NXPs ATF.
> > 
> > I'm also fine with dropping the ATF part if we don't want to depend on
> > it in mainline.
> 
> Linux arm64 depends on ATF to implement power management via PSCI: 
> hotplug cpuidle and suspend.
> 
> It is not clear why Linux would avoid other services and insist on 
> reimplementing hardware workarounds.

I fully agree. We should not duplicate functionality between ATF and
Linux kernel. If the mainline ATF provides the facilities to do the SoC
identification the kernel should use them as the sole source to get
this information.

Regards,
Lucas


Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions

2019-05-22 Thread Leonard Crestez
On 22.05.2019 16:13, Guido Günther wrote:
> Subject: Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions

Fixed subject

> On Wed, May 08, 2019 at 02:40:18PM +0200, Guido Günther wrote:
>> Thanks for your comments. Let's try s.th. different then: identify by
>> bootrom, ocotop and anatop and fall back to ATF afterwards (I'll split
>> out the DT part and add binding docs if this makes sense). I'm also
>> happy to drop the whole ATF logic until mailine ATF catched up:
>>
>> The mainline ATF doesn't currently support the FSL_SIP_GET_SOC_INFO call
>> nor does it have the code to identify different imx8mq SOC revisions so
>> mimic what NXPs ATF does here.
> 
> Does this makes sense? If so I'll send this out as a series.

Mainline ATF has recently caught up:

https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c#n52

>> As a fallback use ATF so we can identify new revisions once it gains
>> support or when using NXPs ATF.
> 
> I'm also fine with dropping the ATF part if we don't want to depend on
> it in mainline.

Linux arm64 depends on ATF to implement power management via PSCI: 
hotplug cpuidle and suspend.

It is not clear why Linux would avoid other services and insist on 
reimplementing hardware workarounds.

--
Regards,
Leonard


[RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions

2019-05-08 Thread Guido Günther
Hi Leonard,

Thanks for your comments. Let's try s.th. different then: identify by
bootrom, ocotop and anatop and fall back to ATF afterwards (I'll split
out the DT part and add binding docs if this makes sense). I'm also
happy to drop the whole ATF logic until mailine ATF catched up:

The mainline ATF doesn't currently support the FSL_SIP_GET_SOC_INFO call
nor does it have the code to identify different imx8mq SOC revisions so
mimic what NXPs ATF does here.

As a fallback use ATF so we can identify new revisions once it gains
support or when using NXPs ATF.

Signed-off-by: Guido Günther 
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 12 
 drivers/soc/imx/soc-imx8.c| 68 ++-
 2 files changed, 67 insertions(+), 13 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6d635ba0904c..52aa1600b33b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -246,6 +246,18 @@
ranges = <0x0 0x0 0x0 0x3e00>;
dma-ranges = <0x4000 0x0 0x4000 0xc000>;
 
+   bus@ { /* ROM */
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x 0x 0x2>;
+
+   rom@ {
+   compatible = "fsl,imx8mq-bootrom";
+   reg = <0x 0x1e800>;
+   };
+   };
+
bus@3000 { /* AIPS1 */
compatible = "fsl,imx8mq-aips-bus", "simple-bus";
#address-cells = <1>;
diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
index fc6429f9170a..0a1fe82efe86 100644
--- a/drivers/soc/imx/soc-imx8.c
+++ b/drivers/soc/imx/soc-imx8.c
@@ -3,6 +3,7 @@
  * Copyright 2019 NXP.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -11,39 +12,80 @@
 #include 
 #include 
 
+#define REV_A0 0x10
+#define REV_B0 0x20
 #define REV_B1 0x21
 
+#define IMX8MQ_SW_INFO_A0  0x800
+#define IMX8MQ_SW_INFO_B0  0x83C
 #define IMX8MQ_SW_INFO_B1  0x40
 #define IMX8MQ_SW_MAGIC_B1 0xff0055aa
 
+#define FSL_SIP_GET_SOC_INFO   0xc206
+
 struct imx8_soc_data {
char *name;
u32 (*soc_revision)(void);
 };
 
-static u32 __init imx8mq_soc_revision(void)
+static u32 __init imx8mq_soc_revision_atf(void)
+{
+   struct arm_smccc_res res = { 0 };
+
+   arm_smccc_smc(FSL_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, );
+   /*
+* Bit [23:16] is the silicon ID
+* Bit[7:4] is the base layer revision,
+* Bit[3:0] is the metal layer revision
+* e.g. 0x10 stands for Tapeout 1.0
+*/
+   return res.a0 & 0xff;
+}
+
+static u32 __init imx8mq_soc_magic_node(const char *node, u32 offset)
 {
struct device_node *np;
-   void __iomem *ocotp_base;
+   void __iomem *base;
u32 magic;
-   u32 rev = 0;
 
-   np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
+   np = of_find_compatible_node(NULL, NULL, node);
if (!np)
-   goto out;
+   return 0;
+   base = of_iomap(np, 0);
+   WARN_ON(!base);
+
+   magic = readl_relaxed(base + offset);
+   iounmap(base);
+   of_node_put(np);
+
+   return magic;
+}
 
-   ocotp_base = of_iomap(np, 0);
-   WARN_ON(!ocotp_base);
+static u32 __init imx8mq_soc_revision(void)
+{
+   u32 magic;
 
-   magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
+   /* B1 revision identified by ocotop */
+   magic = imx8mq_soc_magic_node("fsl,imx8mq-ocotp", IMX8MQ_SW_INFO_B1);
if (magic == IMX8MQ_SW_MAGIC_B1)
-   rev = REV_B1;
+   return REV_B1;
 
-   iounmap(ocotp_base);
+   /* B0 identified by bootrom */
+   magic = imx8mq_soc_magic_node("fsl,imx8mq-bootrom", IMX8MQ_SW_INFO_B0);
+   if ((magic & 0xff) == REV_B0)
+   return REV_B0;
 
-out:
-   of_node_put(np);
-   return rev;
+   /* A0 identified by anatop */
+   magic = imx8mq_soc_magic_node("fsl,imx8mq-anatop", IMX8MQ_SW_INFO_A0);
+   if ((magic & 0xff) == REV_A0)
+   return REV_A0;
+
+   /* Read revision from ATF as fallback */
+   magic = imx8mq_soc_revision_atf();
+   if (magic != 0xff)
+   return magic;
+
+   return 0;
 }
 
 static const struct imx8_soc_data imx8mq_soc_data = {
-- 
2.20.1