[RFC PATCH v2 10/17] ARM: dts: tegra20: paz00: Setup voltage regulators for DVFS
Set min/max regulators voltage and add CPU node that hooks up CPU with
voltage regulators.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20-paz00.dts | 31 -
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 8861e0976e37..51a09ae99f3a 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -337,17 +337,19 @@
regulator-always-on;
};
- sm0 {
+ core_vdd_reg: sm0 {
regulator-name = "+1.2vs_sm0,vdd_core";
- regulator-min-microvolt = <120>;
- regulator-max-microvolt = <120>;
+ regulator-min-microvolt = <100>;
+ regulator-max-microvolt = <130>;
+ regulator-coupled-with = <_vdd_reg>;
+ regulator-coupled-max-spread = <15>;
regulator-always-on;
};
- sm1 {
+ cpu_vdd_reg: sm1 {
regulator-name = "+1.0vs_sm1,vdd_cpu";
- regulator-min-microvolt = <100>;
- regulator-max-microvolt = <100>;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <1125000>;
regulator-always-on;
};
@@ -367,10 +369,13 @@
regulator-always-on;
};
- ldo2 {
+ rtc_vdd_reg: ldo2 {
regulator-name = "+1.2vs_ldo2,vdd_rtc";
- regulator-min-microvolt = <120>;
- regulator-max-microvolt = <120>;
+ regulator-min-microvolt = <95>;
+ regulator-max-microvolt = <130>;
+ regulator-coupled-with =
<_vdd_reg>;
+ regulator-coupled-max-spread = <15>;
+ regulator-always-on;
};
ldo3 {
@@ -603,4 +608,12 @@
<_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
+
+ cpus {
+ cpu0: cpu@0 {
+ cpu-supply = <_vdd_reg>;
+ core-supply = <_vdd_reg>;
+ rtc-supply = <_vdd_reg>;
+ };
+ };
};
--
2.19.0
[RFC PATCH v2 10/17] ARM: dts: tegra20: paz00: Setup voltage regulators for DVFS
Set min/max regulators voltage and add CPU node that hooks up CPU with
voltage regulators.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20-paz00.dts | 31 -
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 8861e0976e37..51a09ae99f3a 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -337,17 +337,19 @@
regulator-always-on;
};
- sm0 {
+ core_vdd_reg: sm0 {
regulator-name = "+1.2vs_sm0,vdd_core";
- regulator-min-microvolt = <120>;
- regulator-max-microvolt = <120>;
+ regulator-min-microvolt = <100>;
+ regulator-max-microvolt = <130>;
+ regulator-coupled-with = <_vdd_reg>;
+ regulator-coupled-max-spread = <15>;
regulator-always-on;
};
- sm1 {
+ cpu_vdd_reg: sm1 {
regulator-name = "+1.0vs_sm1,vdd_cpu";
- regulator-min-microvolt = <100>;
- regulator-max-microvolt = <100>;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <1125000>;
regulator-always-on;
};
@@ -367,10 +369,13 @@
regulator-always-on;
};
- ldo2 {
+ rtc_vdd_reg: ldo2 {
regulator-name = "+1.2vs_ldo2,vdd_rtc";
- regulator-min-microvolt = <120>;
- regulator-max-microvolt = <120>;
+ regulator-min-microvolt = <95>;
+ regulator-max-microvolt = <130>;
+ regulator-coupled-with =
<_vdd_reg>;
+ regulator-coupled-max-spread = <15>;
+ regulator-always-on;
};
ldo3 {
@@ -603,4 +608,12 @@
<_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
+
+ cpus {
+ cpu0: cpu@0 {
+ cpu-supply = <_vdd_reg>;
+ core-supply = <_vdd_reg>;
+ rtc-supply = <_vdd_reg>;
+ };
+ };
};
--
2.19.0
