Hi,
2019년 7월 24일 (수) 오후 10:36, Leonard Crestez 님이 작성:
>
> Add initial dt bindings for the interconnects inside i.MX chips.
> Multiple external IPs are involved but SOC integration means the
> software controllable interfaces are very similar.
>
> This is initially only for imx8mm but add an "fsl,imx-bus" fallback
> similar to exynos-bus.
>
> Signed-off-by: Leonard Crestez
> ---
> .../devicetree/bindings/devfreq/imx.yaml | 59 +++
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/devfreq/imx.yaml
>
> diff --git a/Documentation/devicetree/bindings/devfreq/imx.yaml
> b/Documentation/devicetree/bindings/devfreq/imx.yaml
> new file mode 100644
> index ..87f90cddfd29
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/devfreq/imx.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/devfreq/imx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Generic i.MX bus frequency device
> +
> +maintainers:
> + - Leonard Crestez
> +
> +description: |
> + The i.MX SoC family has multiple buses for which clock frequency (and
> sometimes
> + voltage) can be adjusted.
> +
> + Some of those buses expose register areas mentioned in the memory maps as
> GPV
> + ("Global Programmers View") but not all. Access to this area might be
> denied for
> + normal world.
> +
> + The buses are based on externally licensed IPs such as ARM NIC-301 and
> Arteris
> + FlexNOC but DT bindings are specific to the integration of these bus
> + interconnect IPs into imx SOCs.
> +
> +properties:
> + reg:
> +maxItems: 1
> +description: GPV area
> +
> + compatible:
> +contains:
> + enum:
> + - fsl,imx8m-noc
> + - fsl,imx8m-nic
> + - fsl,imx8m-ddrc
> +
> + clocks:
> +maxItems: 1
> +
> +required:
> + - compatible
> + - clocks
> +
> +examples:
> + - |
> +#include
> +ddrc: dram-controller@3d40 {
> +compatible = "fsl,imx8mm-ddrc";
s/imx8mm/imx8m
> +reg = <0x3d40 0x40>;
> +clocks = < IMX8MM_CLK_DRAM>;
> +operating-points-v2 = <_opp_table>;
> +};
> +
> + - |
> +noc: noc@3270 {
> +compatible = "fsl,imx8mm-noc";
s/imx8mm/imx8m
> +reg = <0x3270 0x10>;
> +clocks = < IMX8MM_CLK_NOC>;
> +operating-points-v2 = <_opp_table>;
> +};
> --
> 2.17.1
>
--
Best Regards,
Chanwoo Choi
