[patch 1/4] x86: PAT followup - Do not fold two bits in _PAGE_PCD
Do not fold PCD and PWT bits in _PAGE_PCD. Instead, introduce a new
_PAGE_UC which defines uncached mappings and use it in place of _PAGE_PCD.
Signed-off-by: Venkatesh Pallipadi <[EMAIL PROTECTED]>
Signed-off-by: Suresh Siddha <[EMAIL PROTECTED]>
Index: linux-2.6.git/arch/x86/mm/ioremap_32.c
===
--- linux-2.6.git.orig/arch/x86/mm/ioremap_32.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/ioremap_32.c 2008-01-15 04:42:59.0
-0800
@@ -173,7 +173,7 @@
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
{
- return __ioremap(phys_addr, size, _PAGE_PCD);
+ return __ioremap(phys_addr, size, _PAGE_UC);
}
EXPORT_SYMBOL(ioremap_nocache);
Index: linux-2.6.git/arch/x86/mm/ioremap_64.c
===
--- linux-2.6.git.orig/arch/x86/mm/ioremap_64.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/ioremap_64.c 2008-01-15 04:43:07.0
-0800
@@ -150,7 +150,7 @@
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
{
- return __ioremap(phys_addr, size, _PAGE_PCD);
+ return __ioremap(phys_addr, size, _PAGE_UC);
}
EXPORT_SYMBOL(ioremap_nocache);
Index: linux-2.6.git/arch/x86/mm/pat.c
===
--- linux-2.6.git.orig/arch/x86/mm/pat.c2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/pat.c 2008-01-15 05:01:43.0 -0800
@@ -64,7 +64,7 @@
if (smp_processor_id() && !pat_wc_enabled)
return;
- /* Set PWT+PCD to Write-Combining. All other bits stay the same */
+ /* Set PCD to Write-Combining. All other bits stay the same */
/* PTE encoding used in Linux:
PAT
|PCD
@@ -72,7 +72,7 @@
|||
000 WB default
010 WC _PAGE_WC
- 011 UC _PAGE_PCD
+ 011 UC _PAGE_UC
PAT bit unused */
pat = PAT(0,WB) | PAT(1,WT) | PAT(2,WC) | PAT(3,UC) |
PAT(4,WB) | PAT(5,WT) | PAT(6,WC) | PAT(7,UC);
@@ -97,7 +97,7 @@
{
switch (flags & _PAGE_CACHE_MASK) {
case _PAGE_WC: return "write combining";
- case _PAGE_PCD: return "uncached";
+ case _PAGE_UC: return "uncached";
case 0: return "default";
default:return "broken";
}
@@ -144,7 +144,7 @@
if (!fattr)
return -EINVAL;
else
- *fattr = _PAGE_PCD;
+ *fattr = _PAGE_UC;
}
return 0;
@@ -227,13 +227,13 @@
unsigned long flags;
unsigned long want_flags = 0;
if (file->f_flags & O_SYNC)
- want_flags = _PAGE_PCD;
+ want_flags = _PAGE_UC;
#ifdef CONFIG_X86_32
/*
* On the PPro and successors, the MTRRs are used to set
* memory types for physical addresses outside main memory,
-* so blindly setting PCD or PWT on those pages is wrong.
+* so blindly setting UC or PWT on those pages is wrong.
* For Pentiums and earlier, the surround logic should disable
* caching for the high addresses through the KEN pin, but
* we maintain the tradition of paranoia in this code.
@@ -244,7 +244,7 @@
test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) ||
test_bit(X86_FEATURE_CENTAUR_MCR,
boot_cpu_data.x86_capability)) &&
offset >= __pa(high_memory))
- want_flags = _PAGE_PCD;
+ want_flags = _PAGE_UC;
#endif
/* ignore error because we can't handle it here */
Index: linux-2.6.git/arch/x86/pci/i386.c
===
--- linux-2.6.git.orig/arch/x86/pci/i386.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/pci/i386.c 2008-01-15 05:02:12.0 -0800
@@ -353,7 +353,7 @@
*/
prot = pgprot_val(vma->vm_page_prot);
if (boot_cpu_data.x86 > 3) {
- prot |= _PAGE_PCD;
+ prot |= _PAGE_UC;
}
vma->vm_page_prot = __pgprot(prot);
}
Index: linux-2.6.git/include/asm-x86/pgtable.h
===
--- linux-2.6.git.orig/include/asm-x86/pgtable.h2008-01-15
03:29:38.0 -0800
+++ linux-2.6.git/include/asm-x86/pgtable.h 2008-01-15 05:11:12.0
-0800
@@ -28,14 +28,16 @@
#define _PAGE_RW (_AC(1, L)<<_PAGE_BIT_RW)
#define _PAGE_USER (_AC(1, L)<<_PAGE_BIT_USER)
#define _PAGE_PWT (_AC(1, L)<<_PAGE_BIT_PWT)
-#define _PAGE_PCD ((_AC(1, L)<<_PAGE_BIT_PCD) |
[patch 1/4] x86: PAT followup - Do not fold two bits in _PAGE_PCD
Do not fold PCD and PWT bits in _PAGE_PCD. Instead, introduce a new
_PAGE_UC which defines uncached mappings and use it in place of _PAGE_PCD.
Signed-off-by: Venkatesh Pallipadi [EMAIL PROTECTED]
Signed-off-by: Suresh Siddha [EMAIL PROTECTED]
Index: linux-2.6.git/arch/x86/mm/ioremap_32.c
===
--- linux-2.6.git.orig/arch/x86/mm/ioremap_32.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/ioremap_32.c 2008-01-15 04:42:59.0
-0800
@@ -173,7 +173,7 @@
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
{
- return __ioremap(phys_addr, size, _PAGE_PCD);
+ return __ioremap(phys_addr, size, _PAGE_UC);
}
EXPORT_SYMBOL(ioremap_nocache);
Index: linux-2.6.git/arch/x86/mm/ioremap_64.c
===
--- linux-2.6.git.orig/arch/x86/mm/ioremap_64.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/ioremap_64.c 2008-01-15 04:43:07.0
-0800
@@ -150,7 +150,7 @@
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)
{
- return __ioremap(phys_addr, size, _PAGE_PCD);
+ return __ioremap(phys_addr, size, _PAGE_UC);
}
EXPORT_SYMBOL(ioremap_nocache);
Index: linux-2.6.git/arch/x86/mm/pat.c
===
--- linux-2.6.git.orig/arch/x86/mm/pat.c2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/mm/pat.c 2008-01-15 05:01:43.0 -0800
@@ -64,7 +64,7 @@
if (smp_processor_id() !pat_wc_enabled)
return;
- /* Set PWT+PCD to Write-Combining. All other bits stay the same */
+ /* Set PCD to Write-Combining. All other bits stay the same */
/* PTE encoding used in Linux:
PAT
|PCD
@@ -72,7 +72,7 @@
|||
000 WB default
010 WC _PAGE_WC
- 011 UC _PAGE_PCD
+ 011 UC _PAGE_UC
PAT bit unused */
pat = PAT(0,WB) | PAT(1,WT) | PAT(2,WC) | PAT(3,UC) |
PAT(4,WB) | PAT(5,WT) | PAT(6,WC) | PAT(7,UC);
@@ -97,7 +97,7 @@
{
switch (flags _PAGE_CACHE_MASK) {
case _PAGE_WC: return write combining;
- case _PAGE_PCD: return uncached;
+ case _PAGE_UC: return uncached;
case 0: return default;
default:return broken;
}
@@ -144,7 +144,7 @@
if (!fattr)
return -EINVAL;
else
- *fattr = _PAGE_PCD;
+ *fattr = _PAGE_UC;
}
return 0;
@@ -227,13 +227,13 @@
unsigned long flags;
unsigned long want_flags = 0;
if (file-f_flags O_SYNC)
- want_flags = _PAGE_PCD;
+ want_flags = _PAGE_UC;
#ifdef CONFIG_X86_32
/*
* On the PPro and successors, the MTRRs are used to set
* memory types for physical addresses outside main memory,
-* so blindly setting PCD or PWT on those pages is wrong.
+* so blindly setting UC or PWT on those pages is wrong.
* For Pentiums and earlier, the surround logic should disable
* caching for the high addresses through the KEN pin, but
* we maintain the tradition of paranoia in this code.
@@ -244,7 +244,7 @@
test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) ||
test_bit(X86_FEATURE_CENTAUR_MCR,
boot_cpu_data.x86_capability))
offset = __pa(high_memory))
- want_flags = _PAGE_PCD;
+ want_flags = _PAGE_UC;
#endif
/* ignore error because we can't handle it here */
Index: linux-2.6.git/arch/x86/pci/i386.c
===
--- linux-2.6.git.orig/arch/x86/pci/i386.c 2008-01-15 03:29:38.0
-0800
+++ linux-2.6.git/arch/x86/pci/i386.c 2008-01-15 05:02:12.0 -0800
@@ -353,7 +353,7 @@
*/
prot = pgprot_val(vma-vm_page_prot);
if (boot_cpu_data.x86 3) {
- prot |= _PAGE_PCD;
+ prot |= _PAGE_UC;
}
vma-vm_page_prot = __pgprot(prot);
}
Index: linux-2.6.git/include/asm-x86/pgtable.h
===
--- linux-2.6.git.orig/include/asm-x86/pgtable.h2008-01-15
03:29:38.0 -0800
+++ linux-2.6.git/include/asm-x86/pgtable.h 2008-01-15 05:11:12.0
-0800
@@ -28,14 +28,16 @@
#define _PAGE_RW (_AC(1, L)_PAGE_BIT_RW)
#define _PAGE_USER (_AC(1, L)_PAGE_BIT_USER)
#define _PAGE_PWT (_AC(1, L)_PAGE_BIT_PWT)
-#define _PAGE_PCD ((_AC(1, L)_PAGE_BIT_PCD) | _PAGE_PWT)
+#define _PAGE_PCD
