Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Martin Mares
Hi!

> it's so very unfortunate the PCI standard has no feature bit to indicate 
> the presence of ECS.
> 
> FWIW in my testing on a range of machines spanning 7 or 8 years i could 
> read config space reg 256... and get 0x when the device didn't 
> support ECS, and get valid data when the device did support ECS... granted 
> there may be some system out there which behaves really badly when you do 
> this.
> 
> perhaps someone could write a userspace program and test that concept on a 
> far wider range of machines.

If you want to experiment with this in user space, it's easy to write
a couple of access functions for the libpci in pciutils. (Patches welcome,
as usually :) )

Have a nice fortnight
-- 
Martin `MJ' Mares  <[EMAIL PROTECTED]>   
http://mj.ucw.cz/
Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth
God is real, unless declared integer.
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Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Robert Richter
On 03.09.07 09:48:15, dean gaudet wrote:
> it's so very unfortunate the PCI standard has no feature bit to indicate 
> the presence of ECS.

Right. Not nice.

> FWIW in my testing on a range of machines spanning 7 or 8 years i could 
> read config space reg 256... and get 0x when the device didn't 
> support ECS, and get valid data when the device did support ECS... granted 
> there may be some system out there which behaves really badly when you do 
> this.
> 
> perhaps someone could write a userspace program and test that concept on a 
> far wider range of machines.

A user space programm could map the config space (if MMCONFIG is usable)
and scan the PCI devices directly using memory access.

This patch sets pcidev->cfg_size to 4096 for certain devices so that
the ECS is also available using proc/sys fs or lspci -. In this
case the Kernel access functions are used. This works with both
methods, CF8 and MMCONFIG. For CF8, all patches of these series must
be used.

Note also, that ECS access is not only for CPU devices available, but
also of other PCI Express devices on the bus.

-Robert

-- 
AMD Saxony, Dresden, Germany
Operating System Research Center
email: [EMAIL PROTECTED]


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Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread dean gaudet
it's so very unfortunate the PCI standard has no feature bit to indicate 
the presence of ECS.

FWIW in my testing on a range of machines spanning 7 or 8 years i could 
read config space reg 256... and get 0x when the device didn't 
support ECS, and get valid data when the device did support ECS... granted 
there may be some system out there which behaves really badly when you do 
this.

perhaps someone could write a userspace program and test that concept on a 
far wider range of machines.

-dean

On Mon, 3 Sep 2007, Robert Richter wrote:

> This patch sets the config space size for AMD Barcelona PCI devices to
> 4096.
> 
> Signed-off-by: Robert Richter <[EMAIL PROTECTED]>
> 
> ---
>  arch/i386/pci/fixup.c |   14 ++
>  1 file changed, 14 insertions(+)
> 
> Index: linux-2.6/arch/i386/pci/fixup.c
> ===
> --- linux-2.6.orig/arch/i386/pci/fixup.c
> +++ linux-2.6/arch/i386/pci/fixup.c
> @@ -8,6 +8,7 @@
>  #include 
>  #include "pci.h"
>  
> +#define PCI_CFG_SPACE_EXP_SIZE   4096
>  
>  static void __devinit pci_fixup_i450nx(struct pci_dev *d)
>  {
> @@ -444,3 +445,16 @@ static void __devinit pci_siemens_interr
>  }
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
> pci_siemens_interrupt_controller);
> +
> +/*
> + * Extend size of PCI configuration space for AMD CPUs
> + */
> +static void __devinit pci_ext_cfg_space_access(struct pci_dev *dev)
> +{
> + dev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_HT,   
> pci_ext_cfg_space_access);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MAP,  
> pci_ext_cfg_space_access);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_DRAM, 
> pci_ext_cfg_space_access);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MISC, 
> pci_ext_cfg_space_access);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_LINK, 
> pci_ext_cfg_space_access);
> 
> -- 
> AMD Saxony, Dresden, Germany
> Operating System Research Center
> email: [EMAIL PROTECTED]
> 
> 
> 
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [EMAIL PROTECTED]
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> Please read the FAQ at  http://www.tux.org/lkml/
> 
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[patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Robert Richter
This patch sets the config space size for AMD Barcelona PCI devices to
4096.

Signed-off-by: Robert Richter <[EMAIL PROTECTED]>

---
 arch/i386/pci/fixup.c |   14 ++
 1 file changed, 14 insertions(+)

Index: linux-2.6/arch/i386/pci/fixup.c
===
--- linux-2.6.orig/arch/i386/pci/fixup.c
+++ linux-2.6/arch/i386/pci/fixup.c
@@ -8,6 +8,7 @@
 #include 
 #include "pci.h"
 
+#define PCI_CFG_SPACE_EXP_SIZE 4096
 
 static void __devinit pci_fixup_i450nx(struct pci_dev *d)
 {
@@ -444,3 +445,16 @@ static void __devinit pci_siemens_interr
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
  pci_siemens_interrupt_controller);
+
+/*
+ * Extend size of PCI configuration space for AMD CPUs
+ */
+static void __devinit pci_ext_cfg_space_access(struct pci_dev *dev)
+{
+   dev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_HT,   
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MAP,  
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_DRAM, 
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MISC, 
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_LINK, 
pci_ext_cfg_space_access);

-- 
AMD Saxony, Dresden, Germany
Operating System Research Center
email: [EMAIL PROTECTED]



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[patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Robert Richter
This patch sets the config space size for AMD Barcelona PCI devices to
4096.

Signed-off-by: Robert Richter [EMAIL PROTECTED]

---
 arch/i386/pci/fixup.c |   14 ++
 1 file changed, 14 insertions(+)

Index: linux-2.6/arch/i386/pci/fixup.c
===
--- linux-2.6.orig/arch/i386/pci/fixup.c
+++ linux-2.6/arch/i386/pci/fixup.c
@@ -8,6 +8,7 @@
 #include linux/init.h
 #include pci.h
 
+#define PCI_CFG_SPACE_EXP_SIZE 4096
 
 static void __devinit pci_fixup_i450nx(struct pci_dev *d)
 {
@@ -444,3 +445,16 @@ static void __devinit pci_siemens_interr
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
  pci_siemens_interrupt_controller);
+
+/*
+ * Extend size of PCI configuration space for AMD CPUs
+ */
+static void __devinit pci_ext_cfg_space_access(struct pci_dev *dev)
+{
+   dev-cfg_size = PCI_CFG_SPACE_EXP_SIZE;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_HT,   
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MAP,  
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_DRAM, 
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MISC, 
pci_ext_cfg_space_access);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_LINK, 
pci_ext_cfg_space_access);

-- 
AMD Saxony, Dresden, Germany
Operating System Research Center
email: [EMAIL PROTECTED]



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Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread dean gaudet
it's so very unfortunate the PCI standard has no feature bit to indicate 
the presence of ECS.

FWIW in my testing on a range of machines spanning 7 or 8 years i could 
read config space reg 256... and get 0x when the device didn't 
support ECS, and get valid data when the device did support ECS... granted 
there may be some system out there which behaves really badly when you do 
this.

perhaps someone could write a userspace program and test that concept on a 
far wider range of machines.

-dean

On Mon, 3 Sep 2007, Robert Richter wrote:

 This patch sets the config space size for AMD Barcelona PCI devices to
 4096.
 
 Signed-off-by: Robert Richter [EMAIL PROTECTED]
 
 ---
  arch/i386/pci/fixup.c |   14 ++
  1 file changed, 14 insertions(+)
 
 Index: linux-2.6/arch/i386/pci/fixup.c
 ===
 --- linux-2.6.orig/arch/i386/pci/fixup.c
 +++ linux-2.6/arch/i386/pci/fixup.c
 @@ -8,6 +8,7 @@
  #include linux/init.h
  #include pci.h
  
 +#define PCI_CFG_SPACE_EXP_SIZE   4096
  
  static void __devinit pci_fixup_i450nx(struct pci_dev *d)
  {
 @@ -444,3 +445,16 @@ static void __devinit pci_siemens_interr
  }
  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
 pci_siemens_interrupt_controller);
 +
 +/*
 + * Extend size of PCI configuration space for AMD CPUs
 + */
 +static void __devinit pci_ext_cfg_space_access(struct pci_dev *dev)
 +{
 + dev-cfg_size = PCI_CFG_SPACE_EXP_SIZE;
 +}
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_HT,   
 pci_ext_cfg_space_access);
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MAP,  
 pci_ext_cfg_space_access);
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_DRAM, 
 pci_ext_cfg_space_access);
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_MISC, 
 pci_ext_cfg_space_access);
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FAM10H_LINK, 
 pci_ext_cfg_space_access);
 
 -- 
 AMD Saxony, Dresden, Germany
 Operating System Research Center
 email: [EMAIL PROTECTED]
 
 
 
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Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Robert Richter
On 03.09.07 09:48:15, dean gaudet wrote:
 it's so very unfortunate the PCI standard has no feature bit to indicate 
 the presence of ECS.

Right. Not nice.

 FWIW in my testing on a range of machines spanning 7 or 8 years i could 
 read config space reg 256... and get 0x when the device didn't 
 support ECS, and get valid data when the device did support ECS... granted 
 there may be some system out there which behaves really badly when you do 
 this.
 
 perhaps someone could write a userspace program and test that concept on a 
 far wider range of machines.

A user space programm could map the config space (if MMCONFIG is usable)
and scan the PCI devices directly using memory access.

This patch sets pcidev-cfg_size to 4096 for certain devices so that
the ECS is also available using proc/sys fs or lspci -. In this
case the Kernel access functions are used. This works with both
methods, CF8 and MMCONFIG. For CF8, all patches of these series must
be used.

Note also, that ECS access is not only for CPU devices available, but
also of other PCI Express devices on the bus.

-Robert

-- 
AMD Saxony, Dresden, Germany
Operating System Research Center
email: [EMAIL PROTECTED]


-
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Re: [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona

2007-09-03 Thread Martin Mares
Hi!

 it's so very unfortunate the PCI standard has no feature bit to indicate 
 the presence of ECS.
 
 FWIW in my testing on a range of machines spanning 7 or 8 years i could 
 read config space reg 256... and get 0x when the device didn't 
 support ECS, and get valid data when the device did support ECS... granted 
 there may be some system out there which behaves really badly when you do 
 this.
 
 perhaps someone could write a userspace program and test that concept on a 
 far wider range of machines.

If you want to experiment with this in user space, it's easy to write
a couple of access functions for the libpci in pciutils. (Patches welcome,
as usually :) )

Have a nice fortnight
-- 
Martin `MJ' Mares  [EMAIL PROTECTED]   
http://mj.ucw.cz/
Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth
God is real, unless declared integer.
-
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to [EMAIL PROTECTED]
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Please read the FAQ at  http://www.tux.org/lkml/