[tip:irq/core] Documentation: Update IRQ-domain.txt to document irq_domain_mapping

[tip-bot for Marc Zyngier]

Commit-ID:  53286669392b2d888f4b78b0e7894e022e668d11
Gitweb: http://git.kernel.org/tip/53286669392b2d888f4b78b0e7894e022e668d11
Author: Marc Zyngier 
AuthorDate: Fri, 12 May 2017 12:55:38 +0100
Committer:  Thomas Gleixner 
CommitDate: Mon, 22 May 2017 22:29:45 +0200

Documentation: Update IRQ-domain.txt to document irq_domain_mapping

irq_domain_mapping is a rather useful tool to understand how IRqs
are mapped in irqdomains, and yet it is not documented anywhere.
Let's address this.

Signed-off-by: Marc Zyngier 
Link: http://lkml.kernel.org/r/20170512115538.10767-5-marc.zyng...@arm.com
Signed-off-by: Thomas Gleixner 

---
 Documentation/IRQ-domain.txt | 41 +++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
index 82001a2..1f246eb 100644
--- a/Documentation/IRQ-domain.txt
+++ b/Documentation/IRQ-domain.txt
@@ -231,5 +231,42 @@ needs to:
 4) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,
they are unused with hierarchy irq_domain.
 
-Hierarchy irq_domain may also be used to support other architectures,
-such as ARM, ARM64 etc.
+Hierarchy irq_domain is in no way x86 specific, and is heavily used to
+support other architectures, such as ARM, ARM64 etc.
+
+=== Debugging ===
+
+If you switch on CONFIG_IRQ_DOMAIN_DEBUG (which depends on
+CONFIG_IRQ_DOMAIN and CONFIG_DEBUG_FS), you will find a new file in
+your debugfs mount point, called irq_domain_mapping. This file
+contains a live snapshot of all the IRQ domains in the system:
+
+ name  mapped  linear-max  direct-max  devtree-node
+ pl061  8   8   0  /smb/gpio@e008
+ pl061  8   8   0  /smb/gpio@e105
+ pMSI   0   0   0  
/interrupt-controller@e1101000/v2m@e008
+ MSI   37   0   0  
/interrupt-controller@e1101000/v2m@e008
+ GICv2m37   0   0  
/interrupt-controller@e1101000/v2m@e008
+ GICv2448 448   0  
/interrupt-controller@e1101000
+
+it also iterates over the interrupts to display their mapping in the
+domains, and makes the domain stacking visible:
+
+
+irqhwirqchip namechip data   active  type
domain
+1  0x00019  GICv20x0916bfd8 *LINEAR  
GICv2
+2  0x0001d  GICv20x0916bfd8  LINEAR  
GICv2
+3  0x0001e  GICv20x0916bfd8 *LINEAR  
GICv2
+4  0x0001b  GICv20x0916bfd8 *LINEAR  
GICv2
+5  0x0001a  GICv20x0916bfd8  LINEAR  
GICv2
+[...]
+   96  0x81808  MSI  0x  (null)   RADIX  
MSI
+   96+ 0x00063  GICv2m   0x8003ee116980   RADIX  
GICv2m
+   96+ 0x00063  GICv20x0916bfd8  LINEAR  
GICv2
+   97  0x08800  MSI  0x  (null) * RADIX  
MSI
+   97+ 0x00064  GICv2m   0x8003ee116980 * RADIX  
GICv2m
+   97+ 0x00064  GICv20x0916bfd8 *LINEAR  
GICv2
+
+Here, interrupts 1-5 are only using a single domain, while 96 and 97
+are build out of a stack of three domain, each level performing a
+particular function.

[tip:irq/core] Documentation: Update IRQ-domain.txt to document irq_domain_mapping

[tip-bot for Marc Zyngier]

Commit-ID:  53286669392b2d888f4b78b0e7894e022e668d11
Gitweb: http://git.kernel.org/tip/53286669392b2d888f4b78b0e7894e022e668d11
Author: Marc Zyngier 
AuthorDate: Fri, 12 May 2017 12:55:38 +0100
Committer:  Thomas Gleixner 
CommitDate: Mon, 22 May 2017 22:29:45 +0200

Documentation: Update IRQ-domain.txt to document irq_domain_mapping

irq_domain_mapping is a rather useful tool to understand how IRqs
are mapped in irqdomains, and yet it is not documented anywhere.
Let's address this.

Signed-off-by: Marc Zyngier 
Link: http://lkml.kernel.org/r/20170512115538.10767-5-marc.zyng...@arm.com
Signed-off-by: Thomas Gleixner 

---
 Documentation/IRQ-domain.txt | 41 +++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ-domain.txt
index 82001a2..1f246eb 100644
--- a/Documentation/IRQ-domain.txt
+++ b/Documentation/IRQ-domain.txt
@@ -231,5 +231,42 @@ needs to:
 4) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,
they are unused with hierarchy irq_domain.
 
-Hierarchy irq_domain may also be used to support other architectures,
-such as ARM, ARM64 etc.
+Hierarchy irq_domain is in no way x86 specific, and is heavily used to
+support other architectures, such as ARM, ARM64 etc.
+
+=== Debugging ===
+
+If you switch on CONFIG_IRQ_DOMAIN_DEBUG (which depends on
+CONFIG_IRQ_DOMAIN and CONFIG_DEBUG_FS), you will find a new file in
+your debugfs mount point, called irq_domain_mapping. This file
+contains a live snapshot of all the IRQ domains in the system:
+
+ name  mapped  linear-max  direct-max  devtree-node
+ pl061  8   8   0  /smb/gpio@e008
+ pl061  8   8   0  /smb/gpio@e105
+ pMSI   0   0   0  
/interrupt-controller@e1101000/v2m@e008
+ MSI   37   0   0  
/interrupt-controller@e1101000/v2m@e008
+ GICv2m37   0   0  
/interrupt-controller@e1101000/v2m@e008
+ GICv2448 448   0  
/interrupt-controller@e1101000
+
+it also iterates over the interrupts to display their mapping in the
+domains, and makes the domain stacking visible:
+
+
+irqhwirqchip namechip data   active  type
domain
+1  0x00019  GICv20x0916bfd8 *LINEAR  
GICv2
+2  0x0001d  GICv20x0916bfd8  LINEAR  
GICv2
+3  0x0001e  GICv20x0916bfd8 *LINEAR  
GICv2
+4  0x0001b  GICv20x0916bfd8 *LINEAR  
GICv2
+5  0x0001a  GICv20x0916bfd8  LINEAR  
GICv2
+[...]
+   96  0x81808  MSI  0x  (null)   RADIX  
MSI
+   96+ 0x00063  GICv2m   0x8003ee116980   RADIX  
GICv2m
+   96+ 0x00063  GICv20x0916bfd8  LINEAR  
GICv2
+   97  0x08800  MSI  0x  (null) * RADIX  
MSI
+   97+ 0x00064  GICv2m   0x8003ee116980 * RADIX  
GICv2m
+   97+ 0x00064  GICv20x0916bfd8 *LINEAR  
GICv2
+
+Here, interrupts 1-5 are only using a single domain, while 96 and 97
+are build out of a stack of three domain, each level performing a
+particular function.