[tip:irq/core] irqchip/gic-v3: Report that effective affinity is a single target

[tip-bot for Marc Zyngier]

Commit-ID:  956ae91ae8761f2cd8cd7b8d6cb90fd4d0b8a596
Gitweb: http://git.kernel.org/tip/956ae91ae8761f2cd8cd7b8d6cb90fd4d0b8a596
Author: Marc Zyngier 
AuthorDate: Fri, 18 Aug 2017 09:39:17 +0100
Committer:  Thomas Gleixner 
CommitDate: Fri, 18 Aug 2017 10:54:40 +0200

irqchip/gic-v3: Report that effective affinity is a single target

The GICv3 driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: Marc Zyngier 
Signed-off-by: Thomas Gleixner 
Cc: Andrew Lunn 
Cc: James Hogan 
Cc: Jason Cooper 
Cc: Paul Burton 
Cc: Chris Zankel 
Cc: Kevin Cernekee 
Cc: Wei Xu 
Cc: Max Filippov 
Cc: Florian Fainelli 
Cc: Gregory Clement 
Cc: Matt Redfearn 
Cc: Sebastian Hesselbarth 
Link: http://lkml.kernel.org/r/20170818083925.10108-5-marc.zyng...@arm.com

---
 drivers/irqchip/Kconfig  | 1 +
 drivers/irqchip/irq-gic-v3.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 586929d..ce99c1e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -35,6 +35,7 @@ config ARM_GIC_V3
select MULTI_IRQ_HANDLER
select IRQ_DOMAIN_HIERARCHY
select PARTITION_PERCPU
+   select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config ARM_GIC_V3_ITS
bool
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index dbffb7a..511c290 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -670,6 +670,8 @@ static int gic_set_affinity(struct irq_data *d, const 
struct cpumask *mask_val,
else
gic_dist_wait_for_rwp();
 
+   irq_data_update_effective_affinity(d, cpumask_of(cpu));
+
return IRQ_SET_MASK_OK_DONE;
 }
 #else
@@ -768,6 +770,7 @@ static int gic_irq_domain_map(struct irq_domain *d, 
unsigned int irq,
irq_domain_set_info(d, irq, hw, chip, d->host_data,
handle_fasteoi_irq, NULL, NULL);
irq_set_probe(irq);
+   irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));
}
/* LPIs */
if (hw >= 8192 && hw < GIC_ID_NR) {

[tip:irq/core] irqchip/gic-v3: Report that effective affinity is a single target

[tip-bot for Marc Zyngier]

Commit-ID:  956ae91ae8761f2cd8cd7b8d6cb90fd4d0b8a596
Gitweb: http://git.kernel.org/tip/956ae91ae8761f2cd8cd7b8d6cb90fd4d0b8a596
Author: Marc Zyngier 
AuthorDate: Fri, 18 Aug 2017 09:39:17 +0100
Committer:  Thomas Gleixner 
CommitDate: Fri, 18 Aug 2017 10:54:40 +0200

irqchip/gic-v3: Report that effective affinity is a single target

The GICv3 driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: Marc Zyngier 
Signed-off-by: Thomas Gleixner 
Cc: Andrew Lunn 
Cc: James Hogan 
Cc: Jason Cooper 
Cc: Paul Burton 
Cc: Chris Zankel 
Cc: Kevin Cernekee 
Cc: Wei Xu 
Cc: Max Filippov 
Cc: Florian Fainelli 
Cc: Gregory Clement 
Cc: Matt Redfearn 
Cc: Sebastian Hesselbarth 
Link: http://lkml.kernel.org/r/20170818083925.10108-5-marc.zyng...@arm.com

---
 drivers/irqchip/Kconfig  | 1 +
 drivers/irqchip/irq-gic-v3.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 586929d..ce99c1e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -35,6 +35,7 @@ config ARM_GIC_V3
select MULTI_IRQ_HANDLER
select IRQ_DOMAIN_HIERARCHY
select PARTITION_PERCPU
+   select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config ARM_GIC_V3_ITS
bool
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index dbffb7a..511c290 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -670,6 +670,8 @@ static int gic_set_affinity(struct irq_data *d, const 
struct cpumask *mask_val,
else
gic_dist_wait_for_rwp();
 
+   irq_data_update_effective_affinity(d, cpumask_of(cpu));
+
return IRQ_SET_MASK_OK_DONE;
 }
 #else
@@ -768,6 +770,7 @@ static int gic_irq_domain_map(struct irq_domain *d, 
unsigned int irq,
irq_domain_set_info(d, irq, hw, chip, d->host_data,
handle_fasteoi_irq, NULL, NULL);
irq_set_probe(irq);
+   irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq)));
}
/* LPIs */
if (hw >= 8192 && hw < GIC_ID_NR) {