subject:"RE\: \[PATCH v6 2\/2\] mtd\: nand\: Add support for Arasan Nand Flash Controller"

RE: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-05 Thread Punnaiah Choudary Kalluri

Hi Marek,

  Thanks for the review and comments.

> -Original Message-
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Monday, December 05, 2016 10:10 AM
> To: Punnaiah Choudary Kalluri <punn...@xilinx.com>;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@free-electrons.com; rich...@nod.at;
> cyrille.pitc...@atmel.com; robh...@kernel.org; mark.rutl...@arm.com
> Cc: linux-kernel@vger.kernel.org; linux-...@lists.infradead.org;
> devicet...@vger.kernel.org; Michal Simek <mich...@xilinx.com>;
> kalluripunnaiahchoud...@gmail.com; kpc...@gmail.com; Punnaiah
> Choudary Kalluri <punn...@xilinx.com>
> Subject: Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash
> Controller
> 
> On 12/05/2016 05:11 AM, Punnaiah Choudary Kalluri wrote:
> > Added the basic driver for Arasan Nand Flash Controller used in
> > Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> > correction.
> 
> Ummm, NAND, ECC, can you fix the acronyms to be in caps ?
>
 
Ok

> > Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
> > ---
> > Chnages in v6:
> > - Addressed most of the Brian and Boris comments
> > - Separated the nandchip from the nand controller
> > - Removed the ecc lookup table from driver
> > - Now use framework nand waitfunction and readoob
> > - Fixed the compiler warning
> > - Adapted the new frameowrk changes related to ecc and ooblayout
> > - Disabled the clocks after the nand_reelase
> > - Now using only one completion object
> > - Boris suggessions like adapting cmd_ctrl and rework on read/write byte
> >   are not implemented and i will patch them later
> > - Also check_erased_ecc_chunk for erase and check for is_vmalloc_addr
> will
> >   implement later once the basic driver is mainlined.
> > Changes in v5:
> > - Renamed the driver filei as arasan_nand.c
> > - Fixed all comments relaqted coding style
> > - Fixed comments related to propagating the errors
> > - Modified the anfc_write_page_hwecc as per the write_page
> >   prototype
> > Changes in v4:
> > - Added support for onfi timing mode configuration
> > - Added clock suort
> > - Added support for multiple chipselects
> > Changes in v3:
> > - Removed unused variables
> > - Avoided busy loop and used jifies based implementation
> > - Fixed compiler warnings "right shift count >= width of type"
> > - Removed unneeded codei and improved error reporting
> > - Added onfi version check to ensure reading the valid address cycles
> > Changes in v2:
> > - Added missing of.h to avoid kbuild system report erro
> > ---
> >  drivers/mtd/nand/Kconfig   |   8 +
> >  drivers/mtd/nand/Makefile  |   1 +
> >  drivers/mtd/nand/arasan_nand.c | 974
> +
> >  3 files changed, 983 insertions(+)
> >  create mode 100644 drivers/mtd/nand/arasan_nand.c
> >
> > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> > index 7b7a887..e831f4e 100644
> > --- a/drivers/mtd/nand/Kconfig
> > +++ b/drivers/mtd/nand/Kconfig
> > @@ -569,4 +569,12 @@ config MTD_NAND_MTK
> >   Enables support for NAND controller on MTK SoCs.
> >   This controller is found on mt27xx, mt81xx, mt65xx SoCs.
> >
> > +config MTD_NAND_ARASAN
> > +   tristate "Support for Arasan Nand Flash controller"
> > +   depends on HAS_IOMEM
> > +   depends on HAS_DMA
> > +   help
> > + Enables the driver for the Arasan Nand Flash controller on
> > + Zynq UltraScale+ MPSoC.
> > +
> >  endif # MTD_NAND
> > diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> > index cafde6f..44b8b00 100644
> > --- a/drivers/mtd/nand/Makefile
> > +++ b/drivers/mtd/nand/Makefile
> > @@ -58,5 +58,6 @@ obj-$(CONFIG_MTD_NAND_HISI504)+=
> hisi504_nand.o
> >  obj-$(CONFIG_MTD_NAND_BRCMNAND)+= brcmnand/
> >  obj-$(CONFIG_MTD_NAND_QCOM)+= qcom_nandc.o
> >  obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o mtk_ecc.o
> > +obj-$(CONFIG_MTD_NAND_ARASAN)  += arasan_nand.o
> 
> Keep the list at least reasonably sorted.

Ok

> 
> >  nand-objs := nand_base.o nand_bbt.o nand_timings.o
> > diff --git a/drivers/mtd/nand/arasan_nand.c
> b/drivers/mtd/nand/arasan_nand.c
> > new file mode 100644
> > index 000..6b0670e
> > --- /dev/null
> > +++ b/drivers/mtd/nand/arasan_nand.c
> > @@ -0,0 +1,974 @@
> > +/*
> > + * Arasan Nand Flash Controller Driver
> 
> NAND
&g

RE: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-05 Thread Punnaiah Choudary Kalluri

Hi Marek,

  Thanks for the review and comments.

> -Original Message-
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Monday, December 05, 2016 10:10 AM
> To: Punnaiah Choudary Kalluri ;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@free-electrons.com; rich...@nod.at;
> cyrille.pitc...@atmel.com; robh...@kernel.org; mark.rutl...@arm.com
> Cc: linux-kernel@vger.kernel.org; linux-...@lists.infradead.org;
> devicet...@vger.kernel.org; Michal Simek ;
> kalluripunnaiahchoud...@gmail.com; kpc...@gmail.com; Punnaiah
> Choudary Kalluri 
> Subject: Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash
> Controller
> 
> On 12/05/2016 05:11 AM, Punnaiah Choudary Kalluri wrote:
> > Added the basic driver for Arasan Nand Flash Controller used in
> > Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> > correction.
> 
> Ummm, NAND, ECC, can you fix the acronyms to be in caps ?
>
 
Ok

> > Signed-off-by: Punnaiah Choudary Kalluri 
> > ---
> > Chnages in v6:
> > - Addressed most of the Brian and Boris comments
> > - Separated the nandchip from the nand controller
> > - Removed the ecc lookup table from driver
> > - Now use framework nand waitfunction and readoob
> > - Fixed the compiler warning
> > - Adapted the new frameowrk changes related to ecc and ooblayout
> > - Disabled the clocks after the nand_reelase
> > - Now using only one completion object
> > - Boris suggessions like adapting cmd_ctrl and rework on read/write byte
> >   are not implemented and i will patch them later
> > - Also check_erased_ecc_chunk for erase and check for is_vmalloc_addr
> will
> >   implement later once the basic driver is mainlined.
> > Changes in v5:
> > - Renamed the driver filei as arasan_nand.c
> > - Fixed all comments relaqted coding style
> > - Fixed comments related to propagating the errors
> > - Modified the anfc_write_page_hwecc as per the write_page
> >   prototype
> > Changes in v4:
> > - Added support for onfi timing mode configuration
> > - Added clock suort
> > - Added support for multiple chipselects
> > Changes in v3:
> > - Removed unused variables
> > - Avoided busy loop and used jifies based implementation
> > - Fixed compiler warnings "right shift count >= width of type"
> > - Removed unneeded codei and improved error reporting
> > - Added onfi version check to ensure reading the valid address cycles
> > Changes in v2:
> > - Added missing of.h to avoid kbuild system report erro
> > ---
> >  drivers/mtd/nand/Kconfig   |   8 +
> >  drivers/mtd/nand/Makefile  |   1 +
> >  drivers/mtd/nand/arasan_nand.c | 974
> +
> >  3 files changed, 983 insertions(+)
> >  create mode 100644 drivers/mtd/nand/arasan_nand.c
> >
> > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> > index 7b7a887..e831f4e 100644
> > --- a/drivers/mtd/nand/Kconfig
> > +++ b/drivers/mtd/nand/Kconfig
> > @@ -569,4 +569,12 @@ config MTD_NAND_MTK
> >   Enables support for NAND controller on MTK SoCs.
> >   This controller is found on mt27xx, mt81xx, mt65xx SoCs.
> >
> > +config MTD_NAND_ARASAN
> > +   tristate "Support for Arasan Nand Flash controller"
> > +   depends on HAS_IOMEM
> > +   depends on HAS_DMA
> > +   help
> > + Enables the driver for the Arasan Nand Flash controller on
> > + Zynq UltraScale+ MPSoC.
> > +
> >  endif # MTD_NAND
> > diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> > index cafde6f..44b8b00 100644
> > --- a/drivers/mtd/nand/Makefile
> > +++ b/drivers/mtd/nand/Makefile
> > @@ -58,5 +58,6 @@ obj-$(CONFIG_MTD_NAND_HISI504)+=
> hisi504_nand.o
> >  obj-$(CONFIG_MTD_NAND_BRCMNAND)+= brcmnand/
> >  obj-$(CONFIG_MTD_NAND_QCOM)+= qcom_nandc.o
> >  obj-$(CONFIG_MTD_NAND_MTK) += mtk_nand.o mtk_ecc.o
> > +obj-$(CONFIG_MTD_NAND_ARASAN)  += arasan_nand.o
> 
> Keep the list at least reasonably sorted.

Ok

> 
> >  nand-objs := nand_base.o nand_bbt.o nand_timings.o
> > diff --git a/drivers/mtd/nand/arasan_nand.c
> b/drivers/mtd/nand/arasan_nand.c
> > new file mode 100644
> > index 000..6b0670e
> > --- /dev/null
> > +++ b/drivers/mtd/nand/arasan_nand.c
> > @@ -0,0 +1,974 @@
> > +/*
> > + * Arasan Nand Flash Controller Driver
> 
> NAND
> 
> > + * Copyright (C) 2014 - 2015 Xilinx, Inc.
> 
> It's 2016 now ...

Sorry :). Yes, I will updat

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-05 Thread kbuild test robot

Hi Punnaiah,

[auto build test ERROR on mtd/master]
[also build test ERROR on v4.9-rc8 next-20161205]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Punnaiah-Choudary-Kalluri/mtd-arasan-Add-device-tree-binding-documentation/20161205-162929
base:   git://git.infradead.org/linux-mtd.git master
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/mtd/nand/arasan_nand.c: In function 'anfc_read_buf':
>> drivers/mtd/nand/arasan_nand.c:348:3: error: implicit declaration of 
>> function 'readsl' [-Werror=implicit-function-declaration]
  readsl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
  ^~
   drivers/mtd/nand/arasan_nand.c: In function 'anfc_write_buf':
>> drivers/mtd/nand/arasan_nand.c:402:3: error: implicit declaration of 
>> function 'writesl' [-Werror=implicit-function-declaration]
  writesl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
  ^~~
   cc1: some warnings being treated as errors

vim +/readsl +348 drivers/mtd/nand/arasan_nand.c

   342  anfc_wait_for_event(nfc);
   343  buf_rd_cnt++;
   344  
   345  if (buf_rd_cnt == pktcount)
   346  anfc_enable_intrs(nfc, XFER_COMPLETE);
   347  
 > 348  readsl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
   349  bufptr += (pktsize / 4);
   350  
   351  if (buf_rd_cnt < pktcount)
   352  anfc_enable_intrs(nfc, (READ_READY | eccintr));
   353  }
   354  
   355  anfc_wait_for_event(nfc);
   356  }
   357  
   358  static void anfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, 
int len)
   359  {
   360  u32 pktcount, pktsize;
   361  unsigned int buf_wr_cnt = 0;
   362  u32 *bufptr = (u32 *)buf;
   363  struct nand_chip *chip = mtd_to_nand(mtd);
   364  struct anfc_nand_chip *achip = to_anfc_nand(chip);
   365  struct anfc *nfc = to_anfc(chip->controller);
   366  dma_addr_t paddr;
   367  
   368  if (nfc->iswriteoob) {
   369  pktsize = len;
   370  pktcount = 1;
   371  } else {
   372  pktsize = achip->pktsize;
   373  pktcount = mtd->writesize / pktsize;
   374  }
   375  
   376  anfc_setpktszcnt(nfc, pktsize, pktcount);
   377  
   378  if (nfc->dma) {
   379  paddr = dma_map_single(nfc->dev, (void *)buf, len,
   380 DMA_TO_DEVICE);
   381  if (dma_mapping_error(nfc->dev, paddr)) {
   382  dev_err(nfc->dev, "Write buffer mapping error");
   383  return;
   384  }
   385  lo_hi_writeq(paddr, nfc->base + DMA_ADDR0_OFST);
   386  anfc_enable_intrs(nfc, XFER_COMPLETE);
   387  writel(PROG_PGPROG, nfc->base + PROG_OFST);
   388  anfc_wait_for_event(nfc);
   389  dma_unmap_single(nfc->dev, paddr, len, DMA_TO_DEVICE);
   390  return;
   391  }
   392  
   393  anfc_enable_intrs(nfc, WRITE_READY);
   394  writel(PROG_PGPROG, nfc->base + PROG_OFST);
   395  
   396  while (buf_wr_cnt < pktcount) {
   397  anfc_wait_for_event(nfc);
   398  buf_wr_cnt++;
   399  if (buf_wr_cnt == pktcount)
   400  anfc_enable_intrs(nfc, XFER_COMPLETE);
   401  
 > 402  writesl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
   403  bufptr += (pktsize / 4);
   404  
   405  if (buf_wr_cnt < pktcount)

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-05 Thread kbuild test robot

Hi Punnaiah,

[auto build test ERROR on mtd/master]
[also build test ERROR on v4.9-rc8 next-20161205]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Punnaiah-Choudary-Kalluri/mtd-arasan-Add-device-tree-binding-documentation/20161205-162929
base:   git://git.infradead.org/linux-mtd.git master
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/mtd/nand/arasan_nand.c: In function 'anfc_read_buf':
>> drivers/mtd/nand/arasan_nand.c:348:3: error: implicit declaration of 
>> function 'readsl' [-Werror=implicit-function-declaration]
  readsl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
  ^~
   drivers/mtd/nand/arasan_nand.c: In function 'anfc_write_buf':
>> drivers/mtd/nand/arasan_nand.c:402:3: error: implicit declaration of 
>> function 'writesl' [-Werror=implicit-function-declaration]
  writesl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
  ^~~
   cc1: some warnings being treated as errors

vim +/readsl +348 drivers/mtd/nand/arasan_nand.c

   342  anfc_wait_for_event(nfc);
   343  buf_rd_cnt++;
   344  
   345  if (buf_rd_cnt == pktcount)
   346  anfc_enable_intrs(nfc, XFER_COMPLETE);
   347  
 > 348  readsl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
   349  bufptr += (pktsize / 4);
   350  
   351  if (buf_rd_cnt < pktcount)
   352  anfc_enable_intrs(nfc, (READ_READY | eccintr));
   353  }
   354  
   355  anfc_wait_for_event(nfc);
   356  }
   357  
   358  static void anfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, 
int len)
   359  {
   360  u32 pktcount, pktsize;
   361  unsigned int buf_wr_cnt = 0;
   362  u32 *bufptr = (u32 *)buf;
   363  struct nand_chip *chip = mtd_to_nand(mtd);
   364  struct anfc_nand_chip *achip = to_anfc_nand(chip);
   365  struct anfc *nfc = to_anfc(chip->controller);
   366  dma_addr_t paddr;
   367  
   368  if (nfc->iswriteoob) {
   369  pktsize = len;
   370  pktcount = 1;
   371  } else {
   372  pktsize = achip->pktsize;
   373  pktcount = mtd->writesize / pktsize;
   374  }
   375  
   376  anfc_setpktszcnt(nfc, pktsize, pktcount);
   377  
   378  if (nfc->dma) {
   379  paddr = dma_map_single(nfc->dev, (void *)buf, len,
   380 DMA_TO_DEVICE);
   381  if (dma_mapping_error(nfc->dev, paddr)) {
   382  dev_err(nfc->dev, "Write buffer mapping error");
   383  return;
   384  }
   385  lo_hi_writeq(paddr, nfc->base + DMA_ADDR0_OFST);
   386  anfc_enable_intrs(nfc, XFER_COMPLETE);
   387  writel(PROG_PGPROG, nfc->base + PROG_OFST);
   388  anfc_wait_for_event(nfc);
   389  dma_unmap_single(nfc->dev, paddr, len, DMA_TO_DEVICE);
   390  return;
   391  }
   392  
   393  anfc_enable_intrs(nfc, WRITE_READY);
   394  writel(PROG_PGPROG, nfc->base + PROG_OFST);
   395  
   396  while (buf_wr_cnt < pktcount) {
   397  anfc_wait_for_event(nfc);
   398  buf_wr_cnt++;
   399  if (buf_wr_cnt == pktcount)
   400  anfc_enable_intrs(nfc, XFER_COMPLETE);
   401  
 > 402  writesl(nfc->base + DATA_PORT_OFST, bufptr, pktsize/4);
   403  bufptr += (pktsize / 4);
   404  
   405  if (buf_wr_cnt < pktcount)

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-04 Thread Marek Vasut

On 12/05/2016 05:11 AM, Punnaiah Choudary Kalluri wrote:
> Added the basic driver for Arasan Nand Flash Controller used in
> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> correction.

Ummm, NAND, ECC, can you fix the acronyms to be in caps ?

> Signed-off-by: Punnaiah Choudary Kalluri 
> ---
> Chnages in v6:
> - Addressed most of the Brian and Boris comments
> - Separated the nandchip from the nand controller
> - Removed the ecc lookup table from driver
> - Now use framework nand waitfunction and readoob
> - Fixed the compiler warning
> - Adapted the new frameowrk changes related to ecc and ooblayout
> - Disabled the clocks after the nand_reelase
> - Now using only one completion object
> - Boris suggessions like adapting cmd_ctrl and rework on read/write byte
>   are not implemented and i will patch them later
> - Also check_erased_ecc_chunk for erase and check for is_vmalloc_addr will
>   implement later once the basic driver is mainlined. 
> Changes in v5:
> - Renamed the driver filei as arasan_nand.c
> - Fixed all comments relaqted coding style
> - Fixed comments related to propagating the errors
> - Modified the anfc_write_page_hwecc as per the write_page
>   prototype
> Changes in v4:
> - Added support for onfi timing mode configuration
> - Added clock suort
> - Added support for multiple chipselects
> Changes in v3:
> - Removed unused variables
> - Avoided busy loop and used jifies based implementation
> - Fixed compiler warnings "right shift count >= width of type"
> - Removed unneeded codei and improved error reporting
> - Added onfi version check to ensure reading the valid address cycles
> Changes in v2:
> - Added missing of.h to avoid kbuild system report erro
> ---
>  drivers/mtd/nand/Kconfig   |   8 +
>  drivers/mtd/nand/Makefile  |   1 +
>  drivers/mtd/nand/arasan_nand.c | 974 
> +
>  3 files changed, 983 insertions(+)
>  create mode 100644 drivers/mtd/nand/arasan_nand.c
> 
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index 7b7a887..e831f4e 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -569,4 +569,12 @@ config MTD_NAND_MTK
> Enables support for NAND controller on MTK SoCs.
> This controller is found on mt27xx, mt81xx, mt65xx SoCs.
>  
> +config MTD_NAND_ARASAN
> + tristate "Support for Arasan Nand Flash controller"
> + depends on HAS_IOMEM
> + depends on HAS_DMA
> + help
> +   Enables the driver for the Arasan Nand Flash controller on
> +   Zynq UltraScale+ MPSoC.
> +
>  endif # MTD_NAND
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index cafde6f..44b8b00 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -58,5 +58,6 @@ obj-$(CONFIG_MTD_NAND_HISI504)  += 
> hisi504_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)  += brcmnand/
>  obj-$(CONFIG_MTD_NAND_QCOM)  += qcom_nandc.o
>  obj-$(CONFIG_MTD_NAND_MTK)   += mtk_nand.o mtk_ecc.o
> +obj-$(CONFIG_MTD_NAND_ARASAN)+= arasan_nand.o

Keep the list at least reasonably sorted.

>  nand-objs := nand_base.o nand_bbt.o nand_timings.o
> diff --git a/drivers/mtd/nand/arasan_nand.c b/drivers/mtd/nand/arasan_nand.c
> new file mode 100644
> index 000..6b0670e
> --- /dev/null
> +++ b/drivers/mtd/nand/arasan_nand.c
> @@ -0,0 +1,974 @@
> +/*
> + * Arasan Nand Flash Controller Driver

NAND

> + * Copyright (C) 2014 - 2015 Xilinx, Inc.

It's 2016 now ...

> + * This program is free software; you can redistribute it and/or modify it 
> under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define DRIVER_NAME  "arasan_nand"
> +#define EVNT_TIMEOUT 1000

Rename to EVENT_TIMEOUT_ to make this less cryptic

> +#define STATUS_TIMEOUT   2000

DTTO

> +#define PKT_OFST 0x00
> +#define MEM_ADDR1_OFST   0x04
> +#define MEM_ADDR2_OFST   0x08
> +#define CMD_OFST 0x0C
> +#define PROG_OFST0x10
> +#define INTR_STS_EN_OFST 0x14
> +#define INTR_SIG_EN_OFST 0x18
> +#define INTR_STS_OFST0x1C
> +#define READY_STS_OFST   0x20
> +#define DMA_ADDR1_OFST   0x24
> +#define FLASH_STS_OFST   0x28
> +#define DATA_PORT_OFST   0x30
> +#define ECC_OFST 0x34
> +#define ECC_ERR_CNT_OFST 0x38
> +#define ECC_SPR_CMD_OFST 0x3C
> +#define ECC_ERR_CNT_1BIT_OFST0x40
> +#define

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

2016-12-04 Thread Marek Vasut

On 12/05/2016 05:11 AM, Punnaiah Choudary Kalluri wrote:
> Added the basic driver for Arasan Nand Flash Controller used in
> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> correction.

Ummm, NAND, ECC, can you fix the acronyms to be in caps ?

> Signed-off-by: Punnaiah Choudary Kalluri 
> ---
> Chnages in v6:
> - Addressed most of the Brian and Boris comments
> - Separated the nandchip from the nand controller
> - Removed the ecc lookup table from driver
> - Now use framework nand waitfunction and readoob
> - Fixed the compiler warning
> - Adapted the new frameowrk changes related to ecc and ooblayout
> - Disabled the clocks after the nand_reelase
> - Now using only one completion object
> - Boris suggessions like adapting cmd_ctrl and rework on read/write byte
>   are not implemented and i will patch them later
> - Also check_erased_ecc_chunk for erase and check for is_vmalloc_addr will
>   implement later once the basic driver is mainlined. 
> Changes in v5:
> - Renamed the driver filei as arasan_nand.c
> - Fixed all comments relaqted coding style
> - Fixed comments related to propagating the errors
> - Modified the anfc_write_page_hwecc as per the write_page
>   prototype
> Changes in v4:
> - Added support for onfi timing mode configuration
> - Added clock suort
> - Added support for multiple chipselects
> Changes in v3:
> - Removed unused variables
> - Avoided busy loop and used jifies based implementation
> - Fixed compiler warnings "right shift count >= width of type"
> - Removed unneeded codei and improved error reporting
> - Added onfi version check to ensure reading the valid address cycles
> Changes in v2:
> - Added missing of.h to avoid kbuild system report erro
> ---
>  drivers/mtd/nand/Kconfig   |   8 +
>  drivers/mtd/nand/Makefile  |   1 +
>  drivers/mtd/nand/arasan_nand.c | 974 
> +
>  3 files changed, 983 insertions(+)
>  create mode 100644 drivers/mtd/nand/arasan_nand.c
> 
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index 7b7a887..e831f4e 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -569,4 +569,12 @@ config MTD_NAND_MTK
> Enables support for NAND controller on MTK SoCs.
> This controller is found on mt27xx, mt81xx, mt65xx SoCs.
>  
> +config MTD_NAND_ARASAN
> + tristate "Support for Arasan Nand Flash controller"
> + depends on HAS_IOMEM
> + depends on HAS_DMA
> + help
> +   Enables the driver for the Arasan Nand Flash controller on
> +   Zynq UltraScale+ MPSoC.
> +
>  endif # MTD_NAND
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index cafde6f..44b8b00 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -58,5 +58,6 @@ obj-$(CONFIG_MTD_NAND_HISI504)  += 
> hisi504_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)  += brcmnand/
>  obj-$(CONFIG_MTD_NAND_QCOM)  += qcom_nandc.o
>  obj-$(CONFIG_MTD_NAND_MTK)   += mtk_nand.o mtk_ecc.o
> +obj-$(CONFIG_MTD_NAND_ARASAN)+= arasan_nand.o

Keep the list at least reasonably sorted.

>  nand-objs := nand_base.o nand_bbt.o nand_timings.o
> diff --git a/drivers/mtd/nand/arasan_nand.c b/drivers/mtd/nand/arasan_nand.c
> new file mode 100644
> index 000..6b0670e
> --- /dev/null
> +++ b/drivers/mtd/nand/arasan_nand.c
> @@ -0,0 +1,974 @@
> +/*
> + * Arasan Nand Flash Controller Driver

NAND

> + * Copyright (C) 2014 - 2015 Xilinx, Inc.

It's 2016 now ...

> + * This program is free software; you can redistribute it and/or modify it 
> under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define DRIVER_NAME  "arasan_nand"
> +#define EVNT_TIMEOUT 1000

Rename to EVENT_TIMEOUT_ to make this less cryptic

> +#define STATUS_TIMEOUT   2000

DTTO

> +#define PKT_OFST 0x00
> +#define MEM_ADDR1_OFST   0x04
> +#define MEM_ADDR2_OFST   0x08
> +#define CMD_OFST 0x0C
> +#define PROG_OFST0x10
> +#define INTR_STS_EN_OFST 0x14
> +#define INTR_SIG_EN_OFST 0x18
> +#define INTR_STS_OFST0x1C
> +#define READY_STS_OFST   0x20
> +#define DMA_ADDR1_OFST   0x24
> +#define FLASH_STS_OFST   0x28
> +#define DATA_PORT_OFST   0x30
> +#define ECC_OFST 0x34
> +#define ECC_ERR_CNT_OFST 0x38
> +#define ECC_SPR_CMD_OFST 0x3C
> +#define ECC_ERR_CNT_1BIT_OFST0x40
> +#define ECC_ERR_CNT_2BIT_OFST

RE: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

RE: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

Re: [PATCH v6 2/2] mtd: nand: Add support for Arasan Nand Flash Controller

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