subject:"RE\: \[PATCH v6 3\/3\] mfd\: add Intel Broxton Whiskey Cove PMIC driver"

Re: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

2015-09-22 Thread Lee Jones

On Tue, 15 Sep 2015, Qipeng Zha wrote:

> Add MFD core driver for Intel Broxton Whiskey Cove PMIC,
> which is specially accessed by hardware IPC, not a generic
> I2C device
> 
> Signed-off-by: Qipeng Zha 
> 
> ---
> change in v6
>  Replace INIT_REGMAP_IRQ with REGMAP_IRQ_REG.
> 
> change in v5
>  Fix issues in code style, espcially make error messages readable;
>  Put regmap_irq macro in header file and separate into two patch;
>  Use DEFFINE_RES_IRQ to define irq resource;
>  Remove default_i2c_addr and use macro directly;
>  Change platform driver name to make it more readable;
> 
> change in v4
>  Add compile dependency to PMC IPC driver in Makefile, or will
> use NULL stubs defined in PMC IPC header file;
> 
> change in v3
>  Implement ipc regmap r/w callback in pmic driver, since there dropped
> before patch of implement virtual ipc support in regmap core;
>  Update some function's comment;
> ---
>  drivers/mfd/Makefile   |   1 +
>  drivers/mfd/intel_soc_pmic_bxtwc.c | 478 
> +
>  include/linux/mfd/intel_bxtwc.h|  69 ++
>  3 files changed, 548 insertions(+)
>  create mode 100644 drivers/mfd/intel_soc_pmic_bxtwc.c
>  create mode 100644 include/linux/mfd/intel_bxtwc.h

Applied, thanks.

> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 0e5cfeb..8fc894e 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -183,5 +183,6 @@ obj-$(CONFIG_MFD_RT5033)  += rt5033.o
>  obj-$(CONFIG_MFD_SKY81452)   += sky81452.o
>  
>  intel-soc-pmic-objs  := intel_soc_pmic_core.o intel_soc_pmic_crc.o
> +intel-soc-pmic-$(CONFIG_INTEL_PMC_IPC)   += intel_soc_pmic_bxtwc.o
>  obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
>  obj-$(CONFIG_MFD_MT6397) += mt6397-core.o
> diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c 
> b/drivers/mfd/intel_soc_pmic_bxtwc.c
> new file mode 100644
> index 000..40acaff
> --- /dev/null
> +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
> @@ -0,0 +1,478 @@
> +/*
> + * MFD core driver for Intel Broxton Whiskey Cove PMIC
> + *
> + * Copyright (C) 2015 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* PMIC device registers */
> +#define REG_ADDR_MASK0xFF00
> +#define REG_ADDR_SHIFT   8
> +#define REG_OFFSET_MASK  0xFF
> +
> +/* Interrupt Status Registers */
> +#define BXTWC_IRQLVL10x4E02
> +#define BXTWC_PWRBTNIRQ  0x4E03
> +
> +#define BXTWC_THRM0IRQ   0x4E04
> +#define BXTWC_THRM1IRQ   0x4E05
> +#define BXTWC_THRM2IRQ   0x4E06
> +#define BXTWC_BCUIRQ 0x4E07
> +#define BXTWC_ADCIRQ 0x4E08
> +#define BXTWC_CHGR0IRQ   0x4E09
> +#define BXTWC_CHGR1IRQ   0x4E0A
> +#define BXTWC_GPIOIRQ0   0x4E0B
> +#define BXTWC_GPIOIRQ1   0x4E0C
> +#define BXTWC_CRITIRQ0x4E0D
> +
> +/* Interrupt MASK Registers */
> +#define BXTWC_MIRQLVL1   0x4E0E
> +#define BXTWC_MPWRTNIRQ  0x4E0F
> +
> +#define BXTWC_MTHRM0IRQ  0x4E12
> +#define BXTWC_MTHRM1IRQ  0x4E13
> +#define BXTWC_MTHRM2IRQ  0x4E14
> +#define BXTWC_MBCUIRQ0x4E15
> +#define BXTWC_MADCIRQ0x4E16
> +#define BXTWC_MCHGR0IRQ  0x4E17
> +#define BXTWC_MCHGR1IRQ  0x4E18
> +#define BXTWC_MGPIO0IRQ  0x4E19
> +#define BXTWC_MGPIO1IRQ  0x4E1A
> +#define BXTWC_MCRITIRQ   0x4E1B
> +
> +/* Whiskey Cove PMIC share same ACPI ID between different platforms */
> +#define BROXTON_PMIC_WC_HRV  4
> +
> +/* Manage in two IRQ chips since mask registers are not consecutive */
> +enum bxtwc_irqs {
> + /* Level 1 */
> + BXTWC_PWRBTN_LVL1_IRQ = 0,
> + BXTWC_TMU_LVL1_IRQ,
> + BXTWC_THRM_LVL1_IRQ,
> + BXTWC_BCU_LVL1_IRQ,
> + BXTWC_ADC_LVL1_IRQ,
> + BXTWC_CHGR_LVL1_IRQ,
> + BXTWC_GPIO_LVL1_IRQ,
> + BXTWC_CRIT_LVL1_IRQ,
> +
> + /* Level 2 */
> + BXTWC_PWRBTN_IRQ,
> +};
> +
> +enum bxtwc_irqs_level2 {
> + /* Level 2 */
> + BXTWC_THRM0_IRQ = 0,
> + BXTWC_THRM1_IRQ,
> + BXTWC_THRM2_IRQ,
> + BXTWC_BCU_IRQ,
> + BXTWC_ADC_IRQ,
> + BXTWC_CHGR0_IRQ,
> + BXTWC_CHGR1_IRQ,
> + BXTWC_GPIO0_IRQ,
> + BXTWC_GPIO1_IRQ,
> + BXTWC_CRIT_IRQ,
> +};
> +
> +static const struct regmap_irq bxtwc_regmap_irqs[] = {

RE: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

2015-09-20 Thread Zha, Qipeng

> > ---
> > change in v6
> >  Replace INIT_REGMAP_IRQ with REGMAP_IRQ_REG.

> If that's all that has changed my Ack can carry:

> Acked-by: Lee Jones 

> Still no Ack for the regmap side though, so still can't apply.
Yes, compare to V5, that's all change for V6.
Mark acked patch set 1 for regmap core change, and need to wait for that's 
applied, right ?
Thanks.

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Re: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

2015-09-19 Thread Lee Jones

On Tue, 15 Sep 2015, Qipeng Zha wrote:

> Add MFD core driver for Intel Broxton Whiskey Cove PMIC,
> which is specially accessed by hardware IPC, not a generic
> I2C device
> 
> Signed-off-by: Qipeng Zha 
> 
> ---
> change in v6
>  Replace INIT_REGMAP_IRQ with REGMAP_IRQ_REG.

If that's all that has changed my Ack can carry:

Acked-by: Lee Jones 

Still no Ack for the regmap side though, so still can't apply.

> change in v5
>  Fix issues in code style, espcially make error messages readable;
>  Put regmap_irq macro in header file and separate into two patch;
>  Use DEFFINE_RES_IRQ to define irq resource;
>  Remove default_i2c_addr and use macro directly;
>  Change platform driver name to make it more readable;
> 
> change in v4
>  Add compile dependency to PMC IPC driver in Makefile, or will
> use NULL stubs defined in PMC IPC header file;
> 
> change in v3
>  Implement ipc regmap r/w callback in pmic driver, since there dropped
> before patch of implement virtual ipc support in regmap core;
>  Update some function's comment;
> ---
>  drivers/mfd/Makefile   |   1 +
>  drivers/mfd/intel_soc_pmic_bxtwc.c | 478 
> +
>  include/linux/mfd/intel_bxtwc.h|  69 ++
>  3 files changed, 548 insertions(+)
>  create mode 100644 drivers/mfd/intel_soc_pmic_bxtwc.c
>  create mode 100644 include/linux/mfd/intel_bxtwc.h
> 
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 0e5cfeb..8fc894e 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -183,5 +183,6 @@ obj-$(CONFIG_MFD_RT5033)  += rt5033.o
>  obj-$(CONFIG_MFD_SKY81452)   += sky81452.o
>  
>  intel-soc-pmic-objs  := intel_soc_pmic_core.o intel_soc_pmic_crc.o
> +intel-soc-pmic-$(CONFIG_INTEL_PMC_IPC)   += intel_soc_pmic_bxtwc.o
>  obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
>  obj-$(CONFIG_MFD_MT6397) += mt6397-core.o
> diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c 
> b/drivers/mfd/intel_soc_pmic_bxtwc.c
> new file mode 100644
> index 000..40acaff
> --- /dev/null
> +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
> @@ -0,0 +1,478 @@
> +/*
> + * MFD core driver for Intel Broxton Whiskey Cove PMIC
> + *
> + * Copyright (C) 2015 Intel Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* PMIC device registers */
> +#define REG_ADDR_MASK0xFF00
> +#define REG_ADDR_SHIFT   8
> +#define REG_OFFSET_MASK  0xFF
> +
> +/* Interrupt Status Registers */
> +#define BXTWC_IRQLVL10x4E02
> +#define BXTWC_PWRBTNIRQ  0x4E03
> +
> +#define BXTWC_THRM0IRQ   0x4E04
> +#define BXTWC_THRM1IRQ   0x4E05
> +#define BXTWC_THRM2IRQ   0x4E06
> +#define BXTWC_BCUIRQ 0x4E07
> +#define BXTWC_ADCIRQ 0x4E08
> +#define BXTWC_CHGR0IRQ   0x4E09
> +#define BXTWC_CHGR1IRQ   0x4E0A
> +#define BXTWC_GPIOIRQ0   0x4E0B
> +#define BXTWC_GPIOIRQ1   0x4E0C
> +#define BXTWC_CRITIRQ0x4E0D
> +
> +/* Interrupt MASK Registers */
> +#define BXTWC_MIRQLVL1   0x4E0E
> +#define BXTWC_MPWRTNIRQ  0x4E0F
> +
> +#define BXTWC_MTHRM0IRQ  0x4E12
> +#define BXTWC_MTHRM1IRQ  0x4E13
> +#define BXTWC_MTHRM2IRQ  0x4E14
> +#define BXTWC_MBCUIRQ0x4E15
> +#define BXTWC_MADCIRQ0x4E16
> +#define BXTWC_MCHGR0IRQ  0x4E17
> +#define BXTWC_MCHGR1IRQ  0x4E18
> +#define BXTWC_MGPIO0IRQ  0x4E19
> +#define BXTWC_MGPIO1IRQ  0x4E1A
> +#define BXTWC_MCRITIRQ   0x4E1B
> +
> +/* Whiskey Cove PMIC share same ACPI ID between different platforms */
> +#define BROXTON_PMIC_WC_HRV  4
> +
> +/* Manage in two IRQ chips since mask registers are not consecutive */
> +enum bxtwc_irqs {
> + /* Level 1 */
> + BXTWC_PWRBTN_LVL1_IRQ = 0,
> + BXTWC_TMU_LVL1_IRQ,
> + BXTWC_THRM_LVL1_IRQ,
> + BXTWC_BCU_LVL1_IRQ,
> + BXTWC_ADC_LVL1_IRQ,
> + BXTWC_CHGR_LVL1_IRQ,
> + BXTWC_GPIO_LVL1_IRQ,
> + BXTWC_CRIT_LVL1_IRQ,
> +
> + /* Level 2 */
> + BXTWC_PWRBTN_IRQ,
> +};
> +
> +enum bxtwc_irqs_level2 {
> + /* Level 2 */
> + BXTWC_THRM0_IRQ = 0,
> + BXTWC_THRM1_IRQ,
> + BXTWC_THRM2_IRQ,
> + BXTWC_BCU_IRQ,
> + BXTWC_ADC_IRQ,
> + BXTWC_CHGR0_IRQ,
> + BXTWC_CHGR1_IRQ,
> + BXTWC_GPIO0_IRQ,

Re: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

RE: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

Re: [PATCH v6 3/3] mfd: add Intel Broxton Whiskey Cove PMIC driver

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