Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Suravee Suthikulpanit]

On 08/09/2016 09:58 PM, Joerg Roedel wrote:

On Mon, Aug 08, 2016 at 09:42:36PM +0700, Suthikulpanit, Suravee wrote:

Hi Joerg/Radim/Paolo,

Are there any other concerns about this series?


Okay, looked again through the iommu-patches and sent you my feedback.
Overall I think we are on track to merge this for v4.9 when the
remaining small issues are addressed and Radim and Paolo give their
Acked-bys and/or Reviewed-bys too.



Joerg




Thanks Joerg. I'll update the patch and send out V6.

Suravee

Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Suravee Suthikulpanit]

On 08/09/2016 09:58 PM, Joerg Roedel wrote:

On Mon, Aug 08, 2016 at 09:42:36PM +0700, Suthikulpanit, Suravee wrote:

Hi Joerg/Radim/Paolo,

Are there any other concerns about this series?


Okay, looked again through the iommu-patches and sent you my feedback.
Overall I think we are on track to merge this for v4.9 when the
remaining small issues are addressed and Radim and Paolo give their
Acked-bys and/or Reviewed-bys too.



Joerg




Thanks Joerg. I'll update the patch and send out V6.

Suravee

Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Joerg Roedel]

On Mon, Aug 08, 2016 at 09:42:36PM +0700, Suthikulpanit, Suravee wrote:
> Hi Joerg/Radim/Paolo,
> 
> Are there any other concerns about this series?

Okay, looked again through the iommu-patches and sent you my feedback.
Overall I think we are on track to merge this for v4.9 when the
remaining small issues are addressed and Radim and Paolo give their
Acked-bys and/or Reviewed-bys too.



Joerg

Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Joerg Roedel]

On Mon, Aug 08, 2016 at 09:42:36PM +0700, Suthikulpanit, Suravee wrote:
> Hi Joerg/Radim/Paolo,
> 
> Are there any other concerns about this series?

Okay, looked again through the iommu-patches and sent you my feedback.
Overall I think we are on track to merge this for v4.9 when the
remaining small issues are addressed and Radim and Paolo give their
Acked-bys and/or Reviewed-bys too.



Joerg

Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Suravee Suthikulpanit]

Hi Joerg/Radim/Paolo,

Are there any other concerns about this series?

Thanks,
Suravee

On 7/25/16 16:31, Suravee Suthikulpanit wrote:

From: Suravee Suthikulpanit 

CHANGES FROM V4
===
  * Remove the hash look up in the amd_iommu_update_ga() (see patch 7/12).
Instead, use per-vcpu pi_list to keep track of posted interrupts so that
SVM can directly update IOMMU interrupt remapping table entries directly
when rescheduling VCPUs. (see patch 8/12 and 12/12)(per Radim's suggestion)

  * Re-implement AVIC VM-ID using a set of bit-mask to ensure no ID conflict
between active VMs. (see patch 10/12)

  * Verify VM-ID of the hash entry in avic_ga_log_notifier() before referencing
each per-VM data structure. (see patch 11/12) (per Radim's suggestion)

GITHUB
==
Latest git tree can be found at:
http://github.com/ssuthiku/linux.gitavic_part2_v5

OVERVIEW

This patch set is the second part of the two-part patch series to introduce
the new AMD Advance Virtual Interrupt Controller (AVIC) support.

In addition to the SVM AVIC, AMD IOMMU also extends the AVIC capability
to allow I/O interrupts injection directly into the virtualized guest
local APIC without the need for hypervisor intervention.

This patch series introduces a new hardware interrupt remapping (IR) mode
in AMD IOMMU driver, the Guest Virtual APIC (GA) mode. This is in contrast
to the existing "legacy" mode. The IR mode can be specified with a new
kernel parameter:

amd_iommu_guest_ir=[vapic (default) | legacy]

When enabling GA mode, the AMD IOMMU driver will configure device interrupt
remapping in GA mode when possible (i.e. SVM AVIC must be enabled, and if
the interrupt types are supported). Otherewise, the driver will fallback
to using the legacy IR mode.

This patch series also introduces new interfaces between SVM and IOMMU
to allow:
  * SVM driver to communicate to IOMMU with updated vcpu scheduling
information.
  * IOMMU driver to notify SVM driver to schedule vcpu on to physical core
handle IOMMU GALog entry.

DOCUMENTATIONS
==
More information about SVM AVIC can be found in the
AMD64 Architecture Programmer’s Manual Volume 2 - System Programming.

http://support.amd.com/TechDocs/24593.pdf

More information about IOMMU AVIC can be found int the
AMD I/O Virtualization Technology (IOMMU) Specification - Rev 2.62.

http://support.amd.com/TechDocs/48882_IOMMU.pdf

Any feedback and comments are very much appreciated.

Thank you,
Suravee

Suravee Suthikulpanit (12):
  iommu/amd: Detect and enable guest vAPIC support
  iommu/amd: Move and introduce new IRTE-related unions and structures
  iommu/amd: Introduce interrupt remapping ops structure
  iommu/amd: Add support for multiple IRTE formats
  iommu/amd: Detect and initialize guest vAPIC log
  iommu/amd: Adding GALOG interrupt handler
  iommu/amd: Introduce amd_iommu_update_ga()
  iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode
for pass-through devices
  iommu/amd: Enable vAPIC interrupt remapping mode by default
  svm: Introduces AVIC per-VM ID
  svm: Introduce AMD IOMMU avic_ga_log_notifier
  svm: Implements update_pi_irte hook to setup posted interrupt

 arch/x86/include/asm/kvm_host.h |   2 +
 arch/x86/kvm/svm.c  | 381 +-
 drivers/iommu/amd_iommu.c   | 501 +++-
 drivers/iommu/amd_iommu_init.c  | 183 ++-
 drivers/iommu/amd_iommu_proto.h |   1 +
 drivers/iommu/amd_iommu_types.h | 151 
 include/linux/amd-iommu.h   |  42 +++-
 7 files changed, 1191 insertions(+), 70 deletions(-)

Re: [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support

[Suravee Suthikulpanit]

Hi Joerg/Radim/Paolo,

Are there any other concerns about this series?

Thanks,
Suravee

On 7/25/16 16:31, Suravee Suthikulpanit wrote:

From: Suravee Suthikulpanit 

CHANGES FROM V4
===
  * Remove the hash look up in the amd_iommu_update_ga() (see patch 7/12).
Instead, use per-vcpu pi_list to keep track of posted interrupts so that
SVM can directly update IOMMU interrupt remapping table entries directly
when rescheduling VCPUs. (see patch 8/12 and 12/12)(per Radim's suggestion)

  * Re-implement AVIC VM-ID using a set of bit-mask to ensure no ID conflict
between active VMs. (see patch 10/12)

  * Verify VM-ID of the hash entry in avic_ga_log_notifier() before referencing
each per-VM data structure. (see patch 11/12) (per Radim's suggestion)

GITHUB
==
Latest git tree can be found at:
http://github.com/ssuthiku/linux.gitavic_part2_v5

OVERVIEW

This patch set is the second part of the two-part patch series to introduce
the new AMD Advance Virtual Interrupt Controller (AVIC) support.

In addition to the SVM AVIC, AMD IOMMU also extends the AVIC capability
to allow I/O interrupts injection directly into the virtualized guest
local APIC without the need for hypervisor intervention.

This patch series introduces a new hardware interrupt remapping (IR) mode
in AMD IOMMU driver, the Guest Virtual APIC (GA) mode. This is in contrast
to the existing "legacy" mode. The IR mode can be specified with a new
kernel parameter:

amd_iommu_guest_ir=[vapic (default) | legacy]

When enabling GA mode, the AMD IOMMU driver will configure device interrupt
remapping in GA mode when possible (i.e. SVM AVIC must be enabled, and if
the interrupt types are supported). Otherewise, the driver will fallback
to using the legacy IR mode.

This patch series also introduces new interfaces between SVM and IOMMU
to allow:
  * SVM driver to communicate to IOMMU with updated vcpu scheduling
information.
  * IOMMU driver to notify SVM driver to schedule vcpu on to physical core
handle IOMMU GALog entry.

DOCUMENTATIONS
==
More information about SVM AVIC can be found in the
AMD64 Architecture Programmer’s Manual Volume 2 - System Programming.

http://support.amd.com/TechDocs/24593.pdf

More information about IOMMU AVIC can be found int the
AMD I/O Virtualization Technology (IOMMU) Specification - Rev 2.62.

http://support.amd.com/TechDocs/48882_IOMMU.pdf

Any feedback and comments are very much appreciated.

Thank you,
Suravee

Suravee Suthikulpanit (12):
  iommu/amd: Detect and enable guest vAPIC support
  iommu/amd: Move and introduce new IRTE-related unions and structures
  iommu/amd: Introduce interrupt remapping ops structure
  iommu/amd: Add support for multiple IRTE formats
  iommu/amd: Detect and initialize guest vAPIC log
  iommu/amd: Adding GALOG interrupt handler
  iommu/amd: Introduce amd_iommu_update_ga()
  iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode
for pass-through devices
  iommu/amd: Enable vAPIC interrupt remapping mode by default
  svm: Introduces AVIC per-VM ID
  svm: Introduce AMD IOMMU avic_ga_log_notifier
  svm: Implements update_pi_irte hook to setup posted interrupt

 arch/x86/include/asm/kvm_host.h |   2 +
 arch/x86/kvm/svm.c  | 381 +-
 drivers/iommu/amd_iommu.c   | 501 +++-
 drivers/iommu/amd_iommu_init.c  | 183 ++-
 drivers/iommu/amd_iommu_proto.h |   1 +
 drivers/iommu/amd_iommu_types.h | 151 
 include/linux/amd-iommu.h   |  42 +++-
 7 files changed, 1191 insertions(+), 70 deletions(-)