Re: [PATCH] vfio: re-arrange vfio region definitions
On Wed, 31 Jul 2019 20:47:07 +0200
Auger Eric wrote:
> Hi Connie,
>
> On 7/17/19 1:49 PM, Cornelia Huck wrote:
> > It is easy to miss already defined region types. Let's re-arrange
> > the definitions a bit and add more comments to make it hopefully
> > a bit clearer.
> >
> > No functional change.
> >
> > Signed-off-by: Cornelia Huck
> > ---
> > include/uapi/linux/vfio.h | 19 ---
> > 1 file changed, 12 insertions(+), 7 deletions(-)
> >
> > diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> > index 8f10748dac79..d9bcf40240be 100644
> > --- a/include/uapi/linux/vfio.h
> > +++ b/include/uapi/linux/vfio.h
> > @@ -295,15 +295,23 @@ struct vfio_region_info_cap_type {
> > __u32 subtype; /* type specific */
> > };
> >
> > +/*
> > + * List of region types, global per bus driver.
> > + * If you introduce a new type, please add it here.
> > + */
> > +
> > +/* PCI region type containing a PCI vendor part */
> > #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
> > #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0x)
> > +#define VFIO_REGION_TYPE_GFX(1)
> > +#define VFIO_REGION_TYPE_CCW (2)
> >
> > -/* 8086 Vendor sub-types */
> > +/* 8086 vendor PCI sub-types */
> > #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
> > #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
> > #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
> >
> > -#define VFIO_REGION_TYPE_GFX(1)
> > +/* GFX sub-types */
> > #define VFIO_REGION_SUBTYPE_GFX_EDID(1)
> >
> > /**
> > @@ -353,20 +361,17 @@ struct vfio_region_gfx_edid {
> > #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
> > };
> >
> > -#define VFIO_REGION_TYPE_CCW (2)
> > /* ccw sub-types */
> > #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1)
> >
> > +/* 10de vendor PCI sub-types */
> > /*
> > - * 10de vendor sub-type
> > - *
> > * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address
> > space.
> > */
> > #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
> >
> > +/* 1014 vendor PCI sub-types*/
> > /*
> > - * 1014 vendor sub-type
> Maybe the 10de vendor sub-type and 1014 vendor sub-type could be put
> just after /* 8086 vendor PCI sub-types */
>
> More generally if it were possible to leave the subtypes close to their
> parent type too, this would be beneficial I think.
>
> Besides that becomes sensible to put all those definitions together.
Any sort of consolidation or grouping is an improvement here, thanks
for taking this on, Connie! I haven't started my branch yet for v5.4,
but if you want to iterate to something agreeable, I'll happily take
the end product :) The original patch here looks like a good degree of
consolidating the type definitions and improving consistency without
moving large chunks of code. Thanks,
Alex
Re: [PATCH] vfio: re-arrange vfio region definitions
Hi Connie,
On 7/17/19 1:49 PM, Cornelia Huck wrote:
> It is easy to miss already defined region types. Let's re-arrange
> the definitions a bit and add more comments to make it hopefully
> a bit clearer.
>
> No functional change.
>
> Signed-off-by: Cornelia Huck
> ---
> include/uapi/linux/vfio.h | 19 ---
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> index 8f10748dac79..d9bcf40240be 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -295,15 +295,23 @@ struct vfio_region_info_cap_type {
> __u32 subtype; /* type specific */
> };
>
> +/*
> + * List of region types, global per bus driver.
> + * If you introduce a new type, please add it here.
> + */
> +
> +/* PCI region type containing a PCI vendor part */
> #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
> #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0x)
> +#define VFIO_REGION_TYPE_GFX(1)
> +#define VFIO_REGION_TYPE_CCW (2)
>
> -/* 8086 Vendor sub-types */
> +/* 8086 vendor PCI sub-types */
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG(3)
>
> -#define VFIO_REGION_TYPE_GFX(1)
> +/* GFX sub-types */
> #define VFIO_REGION_SUBTYPE_GFX_EDID(1)
>
> /**
> @@ -353,20 +361,17 @@ struct vfio_region_gfx_edid {
> #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
> };
>
> -#define VFIO_REGION_TYPE_CCW (2)
> /* ccw sub-types */
> #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD(1)
>
> +/* 10de vendor PCI sub-types */
> /*
> - * 10de vendor sub-type
> - *
> * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
> */
> #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
>
> +/* 1014 vendor PCI sub-types*/
> /*
> - * 1014 vendor sub-type
Maybe the 10de vendor sub-type and 1014 vendor sub-type could be put
just after /* 8086 vendor PCI sub-types */
More generally if it were possible to leave the subtypes close to their
parent type too, this would be beneficial I think.
Besides that becomes sensible to put all those definitions together.
Thanks
Eric
> - *
> * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
> * to do TLB invalidation on a GPU.
> */
>
Re: [PATCH] vfio: re-arrange vfio region definitions
On Wed, 17 Jul 2019 13:49:56 +0200
Cornelia Huck wrote:
> It is easy to miss already defined region types. Let's re-arrange
> the definitions a bit and add more comments to make it hopefully
> a bit clearer.
>
> No functional change.
>
> Signed-off-by: Cornelia Huck
> ---
> include/uapi/linux/vfio.h | 19 ---
> 1 file changed, 12 insertions(+), 7 deletions(-)
Friendly ping :)
>
> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> index 8f10748dac79..d9bcf40240be 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -295,15 +295,23 @@ struct vfio_region_info_cap_type {
> __u32 subtype; /* type specific */
> };
>
> +/*
> + * List of region types, global per bus driver.
> + * If you introduce a new type, please add it here.
> + */
> +
> +/* PCI region type containing a PCI vendor part */
> #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
> #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0x)
> +#define VFIO_REGION_TYPE_GFX(1)
> +#define VFIO_REGION_TYPE_CCW (2)
>
> -/* 8086 Vendor sub-types */
> +/* 8086 vendor PCI sub-types */
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG(3)
>
> -#define VFIO_REGION_TYPE_GFX(1)
> +/* GFX sub-types */
> #define VFIO_REGION_SUBTYPE_GFX_EDID(1)
>
> /**
> @@ -353,20 +361,17 @@ struct vfio_region_gfx_edid {
> #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2
> };
>
> -#define VFIO_REGION_TYPE_CCW (2)
> /* ccw sub-types */
> #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD(1)
>
> +/* 10de vendor PCI sub-types */
> /*
> - * 10de vendor sub-type
> - *
> * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
> */
> #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
>
> +/* 1014 vendor PCI sub-types*/
> /*
> - * 1014 vendor sub-type
> - *
> * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
> * to do TLB invalidation on a GPU.
> */
