Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Andre Przywara 
Hi,

On 08/03/17 12:20, Philipp Zabel wrote:
> On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote:
>> Hi Philipp,
>>
>> On 03/08/2017 11:19 AM, Andre Przywara wrote:
>>> Hi,
>>>
>>> On 08/03/17 09:54, Philipp Zabel wrote:
 Reset operations for simple reset controllers with reset lines that can
 be controlled by toggling bits in (mostly) contiguous register ranges
 using read-modify-write cycles under a spinlock. So far this covers the
 socfpga, stm32, and sunxi drivers.
>>>
>>> Wow, that looks nice, thanks for that.
>>>
>>> But can't we go one step further and unify those driver into one file then?
>>> And either have different probe functions to cover the different DT
>>> requirements or to just have one unified probe checking for the super
>>> set of all properties?
>>
>> I agree with Andre. It looks nice and it should be a good thing to have 
>> a common probe inside reset-simple.c
>> Maybe only "nresets" and "inverted"  DT properties are needed.
> 
> Adding DT properties is not an option, as the driver would have to work
> with the existing bindings. We could merge them into one file, with a
> single probe function that configures different parameters depending on
> the of_device_id returned by of_match_device.

Yes, either that or we could just parse all possible properties, as
allowing additional properties on top of the documented binding doc
shouldn't hurt, I think. That's what I mean with super-set. I have to
check if this is acceptable, though.

And I think it would be worthwhile to create a generic binding (or at
least a generic compatible string) on the way, specifying all the
existing properties there, so new drivers could just use that without
having to add their own compatible string to the *driver* (but just to
the binding doc). This would have the advantage of new SoCs possibly
being supported without actual kernel changes.

Cheers,
Andre.

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Andre Przywara 
Hi,

On 08/03/17 12:20, Philipp Zabel wrote:
> On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote:
>> Hi Philipp,
>>
>> On 03/08/2017 11:19 AM, Andre Przywara wrote:
>>> Hi,
>>>
>>> On 08/03/17 09:54, Philipp Zabel wrote:
 Reset operations for simple reset controllers with reset lines that can
 be controlled by toggling bits in (mostly) contiguous register ranges
 using read-modify-write cycles under a spinlock. So far this covers the
 socfpga, stm32, and sunxi drivers.
>>>
>>> Wow, that looks nice, thanks for that.
>>>
>>> But can't we go one step further and unify those driver into one file then?
>>> And either have different probe functions to cover the different DT
>>> requirements or to just have one unified probe checking for the super
>>> set of all properties?
>>
>> I agree with Andre. It looks nice and it should be a good thing to have 
>> a common probe inside reset-simple.c
>> Maybe only "nresets" and "inverted"  DT properties are needed.
> 
> Adding DT properties is not an option, as the driver would have to work
> with the existing bindings. We could merge them into one file, with a
> single probe function that configures different parameters depending on
> the of_device_id returned by of_match_device.

Yes, either that or we could just parse all possible properties, as
allowing additional properties on top of the documented binding doc
shouldn't hurt, I think. That's what I mean with super-set. I have to
check if this is acceptable, though.

And I think it would be worthwhile to create a generic binding (or at
least a generic compatible string) on the way, specifying all the
existing properties there, so new drivers could just use that without
having to add their own compatible string to the *driver* (but just to
the binding doc). This would have the advantage of new SoCs possibly
being supported without actual kernel changes.

Cheers,
Andre.

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Alexandre Torgue 

Hi Philipp,

On 03/08/2017 11:19 AM, Andre Przywara wrote:

Hi,

On 08/03/17 09:54, Philipp Zabel wrote:

Reset operations for simple reset controllers with reset lines that can
be controlled by toggling bits in (mostly) contiguous register ranges
using read-modify-write cycles under a spinlock. So far this covers the
socfpga, stm32, and sunxi drivers.


Wow, that looks nice, thanks for that.

But can't we go one step further and unify those driver into one file then?
And either have different probe functions to cover the different DT
requirements or to just have one unified probe checking for the super
set of all properties?


I agree with Andre. It looks nice and it should be a good thing to have 
a common probe inside reset-simple.c

Maybe only "nresets" and "inverted"  DT properties are needed.

Regards

Alex





Also 



Signed-off-by: Philipp Zabel 
---
 drivers/reset/Kconfig |  6 +++
 drivers/reset/Makefile|  1 +
 drivers/reset/reset-simple.c  | 92 +
 drivers/reset/reset-simple.h  | 53 
 drivers/reset/reset-socfpga.c | 96 +--
 drivers/reset/reset-stm32.c   | 73 
 drivers/reset/reset-sunxi.c   | 82 +---
 7 files changed, 181 insertions(+), 222 deletions(-)
 create mode 100644 drivers/reset/reset-simple.c
 create mode 100644 drivers/reset/reset-simple.h

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d21c07ccc94e5..d968becd0474c 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -62,21 +62,27 @@ config RESET_PISTACHIO
help
  This enables the reset driver for ImgTec Pistachio SoCs.

+config RESET_SIMPLE
+   bool
+
 config RESET_SOCFPGA
bool "SoCFPGA Reset Driver" if COMPILE_TEST
default ARCH_SOCFPGA
+   select RESET_SIMPLE
help
  This enables the reset controller driver for Altera SoCFPGAs.

 config RESET_STM32
bool "STM32 Reset Driver" if COMPILE_TEST
default ARCH_STM32
+   select RESET_SIMPLE
help
  This enables the RCC reset controller driver for STM32 MCUs.

 config RESET_SUNXI
bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
default ARCH_SUNXI
+   select RESET_SIMPLE
help
  This enables the reset driver for Allwinner SoCs.

diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 02a74db943397..f5cc015f20956 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
 obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
+obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
 obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
 obj-$(CONFIG_RESET_STM32) += reset-stm32.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
new file mode 100644
index 0..2160e84fe216b
--- /dev/null
+++ b/drivers/reset/reset-simple.c
@@ -0,0 +1,92 @@
+/*
+ * Simple Reset Controller ops
+ *
+ * Based on Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "reset-simple.h"
+
+static inline struct reset_simple_data *
+to_reset_simple_data(struct reset_controller_dev *rcdev)
+{
+   return container_of(rcdev, struct reset_simple_data, rcdev);
+}
+
+static int reset_simple_clear(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+   struct reset_simple_data *data = to_reset_simple_data(rcdev);
+   int reg_width = sizeof(u32);
+   int bank = id / (reg_width * BITS_PER_BYTE);
+   int offset = id % (reg_width * BITS_PER_BYTE);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(>lock, flags);
+
+   reg = readl(data->membase + (bank * reg_width));
+   writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
+
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int reset_simple_set(struct reset_controller_dev *rcdev,
+   unsigned long id)
+{
+   struct reset_simple_data *data = to_reset_simple_data(rcdev);
+   int reg_width = sizeof(u32);
+   int bank = id / (reg_width * BITS_PER_BYTE);
+   int offset = id % (reg_width * BITS_PER_BYTE);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(>lock, flags);
+
+   reg = readl(data->membase + (bank *

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Alexandre Torgue 

Hi Philipp,

On 03/08/2017 11:19 AM, Andre Przywara wrote:

Hi,

On 08/03/17 09:54, Philipp Zabel wrote:

Reset operations for simple reset controllers with reset lines that can
be controlled by toggling bits in (mostly) contiguous register ranges
using read-modify-write cycles under a spinlock. So far this covers the
socfpga, stm32, and sunxi drivers.


Wow, that looks nice, thanks for that.

But can't we go one step further and unify those driver into one file then?
And either have different probe functions to cover the different DT
requirements or to just have one unified probe checking for the super
set of all properties?


I agree with Andre. It looks nice and it should be a good thing to have 
a common probe inside reset-simple.c

Maybe only "nresets" and "inverted"  DT properties are needed.

Regards

Alex





Also 



Signed-off-by: Philipp Zabel 
---
 drivers/reset/Kconfig |  6 +++
 drivers/reset/Makefile|  1 +
 drivers/reset/reset-simple.c  | 92 +
 drivers/reset/reset-simple.h  | 53 
 drivers/reset/reset-socfpga.c | 96 +--
 drivers/reset/reset-stm32.c   | 73 
 drivers/reset/reset-sunxi.c   | 82 +---
 7 files changed, 181 insertions(+), 222 deletions(-)
 create mode 100644 drivers/reset/reset-simple.c
 create mode 100644 drivers/reset/reset-simple.h

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d21c07ccc94e5..d968becd0474c 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -62,21 +62,27 @@ config RESET_PISTACHIO
help
  This enables the reset driver for ImgTec Pistachio SoCs.

+config RESET_SIMPLE
+   bool
+
 config RESET_SOCFPGA
bool "SoCFPGA Reset Driver" if COMPILE_TEST
default ARCH_SOCFPGA
+   select RESET_SIMPLE
help
  This enables the reset controller driver for Altera SoCFPGAs.

 config RESET_STM32
bool "STM32 Reset Driver" if COMPILE_TEST
default ARCH_STM32
+   select RESET_SIMPLE
help
  This enables the RCC reset controller driver for STM32 MCUs.

 config RESET_SUNXI
bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
default ARCH_SUNXI
+   select RESET_SIMPLE
help
  This enables the reset driver for Allwinner SoCs.

diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 02a74db943397..f5cc015f20956 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
 obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
+obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
 obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
 obj-$(CONFIG_RESET_STM32) += reset-stm32.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
new file mode 100644
index 0..2160e84fe216b
--- /dev/null
+++ b/drivers/reset/reset-simple.c
@@ -0,0 +1,92 @@
+/*
+ * Simple Reset Controller ops
+ *
+ * Based on Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "reset-simple.h"
+
+static inline struct reset_simple_data *
+to_reset_simple_data(struct reset_controller_dev *rcdev)
+{
+   return container_of(rcdev, struct reset_simple_data, rcdev);
+}
+
+static int reset_simple_clear(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+   struct reset_simple_data *data = to_reset_simple_data(rcdev);
+   int reg_width = sizeof(u32);
+   int bank = id / (reg_width * BITS_PER_BYTE);
+   int offset = id % (reg_width * BITS_PER_BYTE);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(>lock, flags);
+
+   reg = readl(data->membase + (bank * reg_width));
+   writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
+
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int reset_simple_set(struct reset_controller_dev *rcdev,
+   unsigned long id)
+{
+   struct reset_simple_data *data = to_reset_simple_data(rcdev);
+   int reg_width = sizeof(u32);
+   int bank = id / (reg_width * BITS_PER_BYTE);
+   int offset = id % (reg_width * BITS_PER_BYTE);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(>lock, flags);
+
+   reg = readl(data->membase + (bank * reg_width));
+   writel(reg | BIT(offset),

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Philipp Zabel 
On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote:
> Hi Philipp,
> 
> On 03/08/2017 11:19 AM, Andre Przywara wrote:
> > Hi,
> >
> > On 08/03/17 09:54, Philipp Zabel wrote:
> >> Reset operations for simple reset controllers with reset lines that can
> >> be controlled by toggling bits in (mostly) contiguous register ranges
> >> using read-modify-write cycles under a spinlock. So far this covers the
> >> socfpga, stm32, and sunxi drivers.
> >
> > Wow, that looks nice, thanks for that.
> >
> > But can't we go one step further and unify those driver into one file then?
> > And either have different probe functions to cover the different DT
> > requirements or to just have one unified probe checking for the super
> > set of all properties?
> 
> I agree with Andre. It looks nice and it should be a good thing to have 
> a common probe inside reset-simple.c
> Maybe only "nresets" and "inverted"  DT properties are needed.

Adding DT properties is not an option, as the driver would have to work
with the existing bindings. We could merge them into one file, with a
single probe function that configures different parameters depending on
the of_device_id returned by of_match_device.

regards
Philipp

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Philipp Zabel 
On Wed, 2017-03-08 at 12:05 +0100, Alexandre Torgue wrote:
> Hi Philipp,
> 
> On 03/08/2017 11:19 AM, Andre Przywara wrote:
> > Hi,
> >
> > On 08/03/17 09:54, Philipp Zabel wrote:
> >> Reset operations for simple reset controllers with reset lines that can
> >> be controlled by toggling bits in (mostly) contiguous register ranges
> >> using read-modify-write cycles under a spinlock. So far this covers the
> >> socfpga, stm32, and sunxi drivers.
> >
> > Wow, that looks nice, thanks for that.
> >
> > But can't we go one step further and unify those driver into one file then?
> > And either have different probe functions to cover the different DT
> > requirements or to just have one unified probe checking for the super
> > set of all properties?
> 
> I agree with Andre. It looks nice and it should be a good thing to have 
> a common probe inside reset-simple.c
> Maybe only "nresets" and "inverted"  DT properties are needed.

Adding DT properties is not an option, as the driver would have to work
with the existing bindings. We could merge them into one file, with a
single probe function that configures different parameters depending on
the of_device_id returned by of_match_device.

regards
Philipp

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Andre Przywara 
Hi,

On 08/03/17 09:54, Philipp Zabel wrote:
> Reset operations for simple reset controllers with reset lines that can
> be controlled by toggling bits in (mostly) contiguous register ranges
> using read-modify-write cycles under a spinlock. So far this covers the
> socfpga, stm32, and sunxi drivers.

Wow, that looks nice, thanks for that.

But can't we go one step further and unify those driver into one file then?
And either have different probe functions to cover the different DT
requirements or to just have one unified probe checking for the super
set of all properties?

Also 

> 
> Signed-off-by: Philipp Zabel 
> ---
>  drivers/reset/Kconfig |  6 +++
>  drivers/reset/Makefile|  1 +
>  drivers/reset/reset-simple.c  | 92 +
>  drivers/reset/reset-simple.h  | 53 
>  drivers/reset/reset-socfpga.c | 96 
> +--
>  drivers/reset/reset-stm32.c   | 73 
>  drivers/reset/reset-sunxi.c   | 82 +---
>  7 files changed, 181 insertions(+), 222 deletions(-)
>  create mode 100644 drivers/reset/reset-simple.c
>  create mode 100644 drivers/reset/reset-simple.h
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index d21c07ccc94e5..d968becd0474c 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -62,21 +62,27 @@ config RESET_PISTACHIO
>   help
> This enables the reset driver for ImgTec Pistachio SoCs.
>  
> +config RESET_SIMPLE
> + bool
> +
>  config RESET_SOCFPGA
>   bool "SoCFPGA Reset Driver" if COMPILE_TEST
>   default ARCH_SOCFPGA
> + select RESET_SIMPLE
>   help
> This enables the reset controller driver for Altera SoCFPGAs.
>  
>  config RESET_STM32
>   bool "STM32 Reset Driver" if COMPILE_TEST
>   default ARCH_STM32
> + select RESET_SIMPLE
>   help
> This enables the RCC reset controller driver for STM32 MCUs.
>  
>  config RESET_SUNXI
>   bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
>   default ARCH_SUNXI
> + select RESET_SIMPLE
>   help
> This enables the reset driver for Allwinner SoCs.
>  
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 02a74db943397..f5cc015f20956 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
>  obj-$(CONFIG_RESET_MESON) += reset-meson.o
>  obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
>  obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> +obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
>  obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
>  obj-$(CONFIG_RESET_STM32) += reset-stm32.o
>  obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
> new file mode 100644
> index 0..2160e84fe216b
> --- /dev/null
> +++ b/drivers/reset/reset-simple.c
> @@ -0,0 +1,92 @@
> +/*
> + * Simple Reset Controller ops
> + *
> + * Based on Allwinner SoCs Reset Controller driver
> + *
> + * Copyright 2013 Maxime Ripard
> + *
> + * Maxime Ripard 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "reset-simple.h"
> +
> +static inline struct reset_simple_data *
> +to_reset_simple_data(struct reset_controller_dev *rcdev)
> +{
> + return container_of(rcdev, struct reset_simple_data, rcdev);
> +}
> +
> +static int reset_simple_clear(struct reset_controller_dev *rcdev,
> +   unsigned long id)
> +{
> + struct reset_simple_data *data = to_reset_simple_data(rcdev);
> + int reg_width = sizeof(u32);
> + int bank = id / (reg_width * BITS_PER_BYTE);
> + int offset = id % (reg_width * BITS_PER_BYTE);
> + unsigned long flags;
> + u32 reg;
> +
> + spin_lock_irqsave(>lock, flags);
> +
> + reg = readl(data->membase + (bank * reg_width));
> + writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
> +
> + spin_unlock_irqrestore(>lock, flags);
> +
> + return 0;
> +}
> +
> +static int reset_simple_set(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct reset_simple_data *data = to_reset_simple_data(rcdev);
> + int reg_width = sizeof(u32);
> + int bank = id / (reg_width * BITS_PER_BYTE);
> + int offset = id % (reg_width * BITS_PER_BYTE);
> + unsigned long flags;
> + u32 reg;
> +
> + spin_lock_irqsave(>lock, flags);
> +
> + reg = readl(data->membase + (bank * reg_width));
> + writel(reg | BIT(offset), data->membase + (bank *

Re: [PATCH 1/2] reset: add reset-simple to unify socfpga, stm32, and sunxi

2017-03-08 Thread Andre Przywara 
Hi,

On 08/03/17 09:54, Philipp Zabel wrote:
> Reset operations for simple reset controllers with reset lines that can
> be controlled by toggling bits in (mostly) contiguous register ranges
> using read-modify-write cycles under a spinlock. So far this covers the
> socfpga, stm32, and sunxi drivers.

Wow, that looks nice, thanks for that.

But can't we go one step further and unify those driver into one file then?
And either have different probe functions to cover the different DT
requirements or to just have one unified probe checking for the super
set of all properties?

Also 

> 
> Signed-off-by: Philipp Zabel 
> ---
>  drivers/reset/Kconfig |  6 +++
>  drivers/reset/Makefile|  1 +
>  drivers/reset/reset-simple.c  | 92 +
>  drivers/reset/reset-simple.h  | 53 
>  drivers/reset/reset-socfpga.c | 96 
> +--
>  drivers/reset/reset-stm32.c   | 73 
>  drivers/reset/reset-sunxi.c   | 82 +---
>  7 files changed, 181 insertions(+), 222 deletions(-)
>  create mode 100644 drivers/reset/reset-simple.c
>  create mode 100644 drivers/reset/reset-simple.h
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index d21c07ccc94e5..d968becd0474c 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -62,21 +62,27 @@ config RESET_PISTACHIO
>   help
> This enables the reset driver for ImgTec Pistachio SoCs.
>  
> +config RESET_SIMPLE
> + bool
> +
>  config RESET_SOCFPGA
>   bool "SoCFPGA Reset Driver" if COMPILE_TEST
>   default ARCH_SOCFPGA
> + select RESET_SIMPLE
>   help
> This enables the reset controller driver for Altera SoCFPGAs.
>  
>  config RESET_STM32
>   bool "STM32 Reset Driver" if COMPILE_TEST
>   default ARCH_STM32
> + select RESET_SIMPLE
>   help
> This enables the RCC reset controller driver for STM32 MCUs.
>  
>  config RESET_SUNXI
>   bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
>   default ARCH_SUNXI
> + select RESET_SIMPLE
>   help
> This enables the reset driver for Allwinner SoCs.
>  
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 02a74db943397..f5cc015f20956 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
>  obj-$(CONFIG_RESET_MESON) += reset-meson.o
>  obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
>  obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> +obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
>  obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
>  obj-$(CONFIG_RESET_STM32) += reset-stm32.o
>  obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
> new file mode 100644
> index 0..2160e84fe216b
> --- /dev/null
> +++ b/drivers/reset/reset-simple.c
> @@ -0,0 +1,92 @@
> +/*
> + * Simple Reset Controller ops
> + *
> + * Based on Allwinner SoCs Reset Controller driver
> + *
> + * Copyright 2013 Maxime Ripard
> + *
> + * Maxime Ripard 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "reset-simple.h"
> +
> +static inline struct reset_simple_data *
> +to_reset_simple_data(struct reset_controller_dev *rcdev)
> +{
> + return container_of(rcdev, struct reset_simple_data, rcdev);
> +}
> +
> +static int reset_simple_clear(struct reset_controller_dev *rcdev,
> +   unsigned long id)
> +{
> + struct reset_simple_data *data = to_reset_simple_data(rcdev);
> + int reg_width = sizeof(u32);
> + int bank = id / (reg_width * BITS_PER_BYTE);
> + int offset = id % (reg_width * BITS_PER_BYTE);
> + unsigned long flags;
> + u32 reg;
> +
> + spin_lock_irqsave(>lock, flags);
> +
> + reg = readl(data->membase + (bank * reg_width));
> + writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
> +
> + spin_unlock_irqrestore(>lock, flags);
> +
> + return 0;
> +}
> +
> +static int reset_simple_set(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct reset_simple_data *data = to_reset_simple_data(rcdev);
> + int reg_width = sizeof(u32);
> + int bank = id / (reg_width * BITS_PER_BYTE);
> + int offset = id % (reg_width * BITS_PER_BYTE);
> + unsigned long flags;
> + u32 reg;
> +
> + spin_lock_irqsave(>lock, flags);
> +
> + reg = readl(data->membase + (bank * reg_width));
> + writel(reg | BIT(offset), data->membase + (bank * reg_width));
> +
> + spin_unlock_irqrestore(>lock,