Re: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1
On 3/15/2013 10:51 AM, Philip, Avinash wrote: > On Fri, Mar 15, 2013 at 10:38:58, Nori, Sekhar wrote: >> On 3/15/2013 10:27 AM, Philip, Avinash wrote: >>> On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: On 3/14/2013 4:07 PM, Philip Avinash wrote: > da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > DT node status is set to "okay" DT blob. > Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > DA8XX_CFGCHIP1_REG. So there is actually a TBCLK in DA850 - it's just not modeled as a clock similar to the way it is done on AM335x? If yes, then instead of adding a dummy clock node and doing the TBCLK enable as part of init, why not model TBCLK in clock tree even on DA850? >>> >>> >>> TBCLK enabling should done from platform specific way. In DA850 it is done >>> at >>> CFGCHIP1 register. Unfortunately Davinci clock frame work will support only >>> clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require >> >> That's true at the moment, but that can be fixed. > > I will check. For an example of non-PLL non-PSC clock on davinci, you can look at cdce clock registration in board-dm646x-evm.c > >> >>> modifications in clock frame work. >>> >>> Hence handling it as part of initialization. >> >> I am curious as to how this clock is handled in am335x. I searched for >> tbclk in arch/arm/ of linux-next but could not find any references. >> Where should I be looking? > > Patch is submitted. This patch is not in Paul's tree. > > [PATCH v2] ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK > https://patchwork.kernel.org/patch/2127581/ Thanks! ~Sekhar -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1
On Fri, Mar 15, 2013 at 10:38:58, Nori, Sekhar wrote:
> On 3/15/2013 10:27 AM, Philip, Avinash wrote:
> > On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote:
> >> On 3/14/2013 4:07 PM, Philip Avinash wrote:
> >>> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for
> >>> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM
> >>> DT node status is set to "okay" DT blob.
> >>> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and
> >>> DA8XX_CFGCHIP1_REG.
> >>
> >> So there is actually a TBCLK in DA850 - it's just not modeled as a clock
> >> similar to the way it is done on AM335x? If yes, then instead of adding
> >> a dummy clock node and doing the TBCLK enable as part of init, why not
> >> model TBCLK in clock tree even on DA850?
> >
> >
> > TBCLK enabling should done from platform specific way. In DA850 it is done
> > at
> > CFGCHIP1 register. Unfortunately Davinci clock frame work will support only
> > clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require
>
> That's true at the moment, but that can be fixed.
I will check.
>
> > modifications in clock frame work.
> >
> > Hence handling it as part of initialization.
>
> I am curious as to how this clock is handled in am335x. I searched for
> tbclk in arch/arm/ of linux-next but could not find any references.
> Where should I be looking?
Patch is submitted. This patch is not in Paul's tree.
[PATCH v2] ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK
https://patchwork.kernel.org/patch/2127581/
Paul,
Can you accept the above patch.
Thanks
Avinash
>
> Thanks,
> Sekhar
>
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Re: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1
On 3/15/2013 10:27 AM, Philip, Avinash wrote: > On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: >> On 3/14/2013 4:07 PM, Philip Avinash wrote: >>> da850 platforms require TBCLK synchronization in CFG_CHIP1 register for >>> TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM >>> DT node status is set to "okay" DT blob. >>> Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and >>> DA8XX_CFGCHIP1_REG. >> >> So there is actually a TBCLK in DA850 - it's just not modeled as a clock >> similar to the way it is done on AM335x? If yes, then instead of adding >> a dummy clock node and doing the TBCLK enable as part of init, why not >> model TBCLK in clock tree even on DA850? > > > TBCLK enabling should done from platform specific way. In DA850 it is done at > CFGCHIP1 register. Unfortunately Davinci clock frame work will support only > clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require That's true at the moment, but that can be fixed. > modifications in clock frame work. > > Hence handling it as part of initialization. I am curious as to how this clock is handled in am335x. I searched for tbclk in arch/arm/ of linux-next but could not find any references. Where should I be looking? Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1
On Thu, Mar 14, 2013 at 18:31:52, Nori, Sekhar wrote: > On 3/14/2013 4:07 PM, Philip Avinash wrote: > > da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > > TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > > DT node status is set to "okay" DT blob. > > Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > > DA8XX_CFGCHIP1_REG. > > So there is actually a TBCLK in DA850 - it's just not modeled as a clock > similar to the way it is done on AM335x? If yes, then instead of adding > a dummy clock node and doing the TBCLK enable as part of init, why not > model TBCLK in clock tree even on DA850? TBCLK enabling should done from platform specific way. In DA850 it is done at CFGCHIP1 register. Unfortunately Davinci clock frame work will support only clock nodes inside PLLC and PSC modules. Handling of CFGCHP1 require modifications in clock frame work. Hence handling it as part of initialization. Thanks Avinash > > Thanks, > Sekhar >
Re: [PATCH 2/3] ARM: davinci: da850: Enable EHRPWM TBCLK from CFG_CHIP1
On 3/14/2013 4:07 PM, Philip Avinash wrote: > da850 platforms require TBCLK synchronization in CFG_CHIP1 register for > TBCLK enable in EHRPWM modules. Enabling of TBCLK is done only if EHRPWM > DT node status is set to "okay" DT blob. > Also adds macro definitions for DA8XX_EHRPWM_TBCLKSYNC and > DA8XX_CFGCHIP1_REG. So there is actually a TBCLK in DA850 - it's just not modeled as a clock similar to the way it is done on AM335x? If yes, then instead of adding a dummy clock node and doing the TBCLK enable as part of init, why not model TBCLK in clock tree even on DA850? Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
