Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

2017-09-18 Thread Matthias Brugger



On 09/18/2017 01:20 AM, Levin, Alexander (Sasha Levin) wrote:

On Fri, Sep 15, 2017 at 01:15:43PM +0200, Matthias Brugger wrote:

On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote:

From: James Liao 

[ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ]

Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys,
vdecsys, hifsys, ethsys and bdpsys.

Signed-off-by: James Liao 
Signed-off-by: Matthias Brugger 
Signed-off-by: Sasha Levin 
---
  arch/arm/boot/dts/mt2701.dtsi | 36 
  1 file changed, 36 insertions(+)



It's not clear to me which bug in v4.9.y you are fixing with this. Can
you please explain.


Hi Matthias,

Note that beyond bug fixes, stable kernel rules also allow for:

"""
  - New device IDs and quirks are also accepted.
"""

In general, patches that enable devices which use existing in-kernel drivers 
are also accepted to the stable kernel tree.

If this is not the case here, or you have a reason to keep it out, please let 
me know.


Hm, I checked linux-4.9.y and it lacks commit:
e9862118272a ("clk: mediatek: Add MT2701 clock support")

Which got's merged in v4.10, so this patch has no effect at all.
What do I miss?

Regards,
Matthias


Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

2017-09-17 Thread Levin, Alexander (Sasha Levin)
On Fri, Sep 15, 2017 at 01:15:43PM +0200, Matthias Brugger wrote:
>On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote:
>>From: James Liao 
>>
>>[ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ]
>>
>>Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys,
>>vdecsys, hifsys, ethsys and bdpsys.
>>
>>Signed-off-by: James Liao 
>>Signed-off-by: Matthias Brugger 
>>Signed-off-by: Sasha Levin 
>>---
>>  arch/arm/boot/dts/mt2701.dtsi | 36 
>>  1 file changed, 36 insertions(+)
>>
>
>It's not clear to me which bug in v4.9.y you are fixing with this. Can 
>you please explain.

Hi Matthias,

Note that beyond bug fixes, stable kernel rules also allow for:

"""
 - New device IDs and quirks are also accepted.
"""

In general, patches that enable devices which use existing in-kernel drivers 
are also accepted to the stable kernel tree.

If this is not the case here, or you have a reason to keep it out, please let 
me know.


-- 

Thanks,
Sasha

Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

2017-09-15 Thread Matthias Brugger



On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote:

From: James Liao 

[ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ]

Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys,
vdecsys, hifsys, ethsys and bdpsys.

Signed-off-by: James Liao 
Signed-off-by: Matthias Brugger 
Signed-off-by: Sasha Levin 
---
  arch/arm/boot/dts/mt2701.dtsi | 36 
  1 file changed, 36 insertions(+)



It's not clear to me which bug in v4.9.y you are fixing with this. Can you 
please explain.


Thanks,
Matthias


diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 18596a2c58a1..77c6b931dc24 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -174,4 +174,40 @@
clocks = <&uart_clk>;
status = "disabled";
};
+
+   mmsys: syscon@1400 {
+   compatible = "mediatek,mt2701-mmsys", "syscon";
+   reg = <0 0x1400 0 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   imgsys: syscon@1500 {
+   compatible = "mediatek,mt2701-imgsys", "syscon";
+   reg = <0 0x1500 0 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   vdecsys: syscon@1600 {
+   compatible = "mediatek,mt2701-vdecsys", "syscon";
+   reg = <0 0x1600 0 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   hifsys: syscon@1a00 {
+   compatible = "mediatek,mt2701-hifsys", "syscon";
+   reg = <0 0x1a00 0 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   ethsys: syscon@1b00 {
+   compatible = "mediatek,mt2701-ethsys", "syscon";
+   reg = <0 0x1b00 0 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   bdpsys: syscon@1c00 {
+   compatible = "mediatek,mt2701-bdpsys", "syscon";
+   reg = <0 0x1c00 0 0x1000>;
+   #clock-cells = <1>;
+   };
  };