Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-27 Thread Tanwar, Rahul


On 27/5/2020 5:15 pm, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 02:28:53PM +0800, Tanwar, Rahul wrote:
>> On 22/5/2020 4:56 pm, Uwe Kleine-König wrote:
>>> On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:
> ...
>
>>> I'm a unhappy to have this in the PWM driver. The PWM driver is supposed
>>> to be generic and I think this belongs into a dedicated driver.
>> Well noted about all other review concerns. I will rework the driver in v2.
>> However, i am not very sure about the above point - of having a separate
>> dedicated driver for tach_work because its logic is tightly coupled with
>> this driver.
> Actually I agree with Uwe.
> Here is layering violation, i.e. provider and consumer in the same pot. It's
> not good from design perspective.
>

Just to clarify, the PWM controller in our SoC serves just one purpose which
is to control the fan. Its actually named as PWM Fan Controller. There is no
other generic usage or any other consumer for this PWM driver. So separating
out this part seems redundant to me. Also, if we separate it out as a
dedicated driver, this will endup as a very small daemon which is going to be
very hard to justify while upstreaming..

Regards,
Rahul 


Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-27 Thread Andy Shevchenko
On Wed, May 27, 2020 at 02:28:53PM +0800, Tanwar, Rahul wrote:
> On 22/5/2020 4:56 pm, Uwe Kleine-König wrote:
> > On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:

...

> > I'm a unhappy to have this in the PWM driver. The PWM driver is supposed
> > to be generic and I think this belongs into a dedicated driver.
> 
> Well noted about all other review concerns. I will rework the driver in v2.
> However, i am not very sure about the above point - of having a separate
> dedicated driver for tach_work because its logic is tightly coupled with
> this driver.

Actually I agree with Uwe.
Here is layering violation, i.e. provider and consumer in the same pot. It's
not good from design perspective.

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-26 Thread Tanwar, Rahul


Hi Uwe,

Thanks for review.

On 22/5/2020 4:56 pm, Uwe Kleine-König wrote:
> Hello,
>
> On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:
>> Add PWM controller driver for Intel's Lightning Mountain(LGM) SoC.
>>
>> Signed-off-by: Rahul Tanwar 
>> ---
>>  drivers/pwm/Kconfig |   9 ++
>>  drivers/pwm/Makefile|   1 +
>>  drivers/pwm/pwm-intel-lgm.c | 356 
>> 
>>  3 files changed, 366 insertions(+)
>>  create mode 100644 drivers/pwm/pwm-intel-lgm.c
>>
>> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
>> index eebbc917ac97..a582214f50b2 100644
>> --- a/drivers/pwm/Kconfig
>> +++ b/drivers/pwm/Kconfig
>> @@ -232,6 +232,15 @@ config PWM_IMX_TPM
>>To compile this driver as a module, choose M here: the module
>>will be called pwm-imx-tpm.
>>  
>> +config PWM_INTEL_LGM
>> +tristate "Intel LGM PWM support"
>> +depends on X86 || COMPILE_TEST
>> +help
>> +  Generic PWM framework driver for LGM SoC.
[...]
>> +};
>> +
>> +static void tach_work(struct work_struct *work)
>> +{
>> +struct intel_pwm_chip *pc = container_of(work, struct intel_pwm_chip,
>> + work.work);
>> +struct regmap *regmap = pc->regmap;
>> +u32 fan_tach, fan_dc, val;
>> +s32 diff;
>> +static u32 fanspeed_err_cnt, time_window, delta_dc;
>> +
>> +/*
>> + * Fan speed is tracked by reading the active duty cycle of PWM output
>> + * from the active duty cycle register. Some variance in the duty cycle
>> + * register value is expected. So we set a time window of 30 seconds and
>> + * if we detect inaccurate fan speed 6 times within 30 seconds then we
>> + * mark it as fan speed problem and fix it by readjusting the duty 
>> cycle.
>> + */
> I'm a unhappy to have this in the PWM driver. The PWM driver is supposed
> to be generic and I think this belongs into a dedicated driver.

Well noted about all other review concerns. I will rework the driver in v2.
However, i am not very sure about the above point - of having a separate
dedicated driver for tach_work because its logic is tightly coupled with
this driver.

Regards,
Rahul


Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-22 Thread Uwe Kleine-König
Hello Andy,

On Fri, May 22, 2020 at 12:18:24PM +0300, Andy Shevchenko wrote:
> On Fri, May 22, 2020 at 10:56:13AM +0200, Uwe Kleine-König wrote:
> > On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:
> 
> > > + io_base = devm_platform_ioremap_resource(pdev, 0);
> > > + if (IS_ERR(io_base))
> > 
> > error message here?
> 
> platform core provides it. No need to duplicate (esp. taking into 
> consideration
> that it can issue IIRC three different error messages depending on actual 
> error).

Ah, missed that. Indeed that's fine as is in the patch.

Thanks
Uwe

-- 
Pengutronix e.K.   | Uwe Kleine-König|
Industrial Linux Solutions | https://www.pengutronix.de/ |


Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-22 Thread Andy Shevchenko
On Fri, May 22, 2020 at 10:56:13AM +0200, Uwe Kleine-König wrote:
> On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:

> > +   io_base = devm_platform_ioremap_resource(pdev, 0);
> > +   if (IS_ERR(io_base))
> 
> error message here?

platform core provides it. No need to duplicate (esp. taking into consideration
that it can issue IIRC three different error messages depending on actual 
error).

> 
> > +   return PTR_ERR(io_base);

-- 
With Best Regards,
Andy Shevchenko




Re: [PATCH v1 2/2] Add PWM driver for LGM

2020-05-22 Thread Uwe Kleine-König
Hello,

On Fri, May 22, 2020 at 03:41:59PM +0800, Rahul Tanwar wrote:
> Add PWM controller driver for Intel's Lightning Mountain(LGM) SoC.
> 
> Signed-off-by: Rahul Tanwar 
> ---
>  drivers/pwm/Kconfig |   9 ++
>  drivers/pwm/Makefile|   1 +
>  drivers/pwm/pwm-intel-lgm.c | 356 
> 
>  3 files changed, 366 insertions(+)
>  create mode 100644 drivers/pwm/pwm-intel-lgm.c
> 
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
> index eebbc917ac97..a582214f50b2 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -232,6 +232,15 @@ config PWM_IMX_TPM
> To compile this driver as a module, choose M here: the module
> will be called pwm-imx-tpm.
>  
> +config PWM_INTEL_LGM
> + tristate "Intel LGM PWM support"
> + depends on X86 || COMPILE_TEST
> + help
> +   Generic PWM framework driver for LGM SoC.

I wouldn't call this "framework".

> +   To compile this driver as a module, choose M here: the module
> +   will be called pwm-intel-lgm.
> +
>  config PWM_JZ4740
>   tristate "Ingenic JZ47xx PWM support"
>   depends on MACH_INGENIC
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index 9a475073dafc..c16a972a101d 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -20,6 +20,7 @@ obj-$(CONFIG_PWM_IMG)   += pwm-img.o
>  obj-$(CONFIG_PWM_IMX1)   += pwm-imx1.o
>  obj-$(CONFIG_PWM_IMX27)  += pwm-imx27.o
>  obj-$(CONFIG_PWM_IMX_TPM)+= pwm-imx-tpm.o
> +obj-$(CONFIG_PWM_INTEL_LGM)  += pwm-intel-lgm.o
>  obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o
>  obj-$(CONFIG_PWM_LP3943) += pwm-lp3943.o
>  obj-$(CONFIG_PWM_LPC18XX_SCT)+= pwm-lpc18xx-sct.o
> diff --git a/drivers/pwm/pwm-intel-lgm.c b/drivers/pwm/pwm-intel-lgm.c
> new file mode 100644
> index ..e307fd2457df
> --- /dev/null
> +++ b/drivers/pwm/pwm-intel-lgm.c
> @@ -0,0 +1,356 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 Intel Corporation.
> + */

Please point out limitations of your driver here similar to e.g.
drivers/pwm/pwm-sifive.c (and in the same format).

You should mention the fixed period of the hardware here (assuming I
interpreted this correctly below) and missing support for polarity.

How does the PWM behave on disable? Does the output become inactive
then? Does it complete the currently running period? What about
reconfiguration? Does changing the duty cycle complete the currently
running period?

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define PWM_FAN_CON0 0x0
> +#define PWM_FAN_EN_ENBIT(0)
> +#define PWM_FAN_EN_DIS   0x0
> +#define PWM_FAN_EN_MSK   BIT(0)
> +#define PWM_FAN_MODE_2WIRE   0x0
> +#define PWM_FAN_MODE_4WIRE   0x1
> +#define PWM_FAN_MODE_MSK BIT(1)
> +#define PWM_FAN_PWM_DIS_DIS  0x0
> +#define PWM_FAN_PWM_DIS_MSK  BIT(2)
> +#define PWM_TACH_EN_EN   0x1
> +#define PWM_TACH_EN_MSK  BIT(4)
> +#define PWM_TACH_PLUS_2  0x0
> +#define PWM_TACH_PLUS_4  0x1
> +#define PWM_TACH_PLUS_MSKBIT(5)
> +#define PWM_FAN_DC_MSK   GENMASK(23, 16)
> +
> +#define PWM_FAN_CON1 0x4
> +#define PWM_FAN_MAX_RPM_MSK  GENMASK(15, 0)
> +
> +#define PWM_FAN_STAT 0x10
> +#define PWM_FAN_TACH_MASKGENMASK(15, 0)
> +
> +#define MAX_RPM  (BIT(16) - 1)
> +#define DFAULT_RPM   4000
> +#define MAX_DUTY_CYCLE   (BIT(8) - 1)
> +
> +#define FRAC_BITS10
> +#define TWO_TENTH204
> +
> +#define TWO_SECONDS  2000
> +#define IGNORE_FIRST_ERR 1
> +#define THIRTY_SECS_WINDOW   15
> +#define ERR_CNT_THRESHOLD6
> +
> +struct intel_pwm_chip {
> + struct pwm_chip chip;
> + struct regmap   *regmap;
> + struct clk  *clk;
> + struct reset_control*rst;
> + u32 tach_en;
> + u32 max_rpm;
> + u32 set_rpm;
> + u32 set_dc;
> + struct delayed_work work;
> +};

I don't like aligning the member names and prefer a single space here.
(But I'm aware this is subjective and others like it the why you did
it.)

> +
> +static inline struct intel_pwm_chip *to_intel_pwm_chip(struct pwm_chip *chip)
> +{
> + return container_of(chip, struct intel_pwm_chip, chip);
> +}
> +
> +static int pwm_update_dc(struct intel_pwm_chip *pc, u32 val)

Please use a common function prefix for all functions in your driver.

> +{
> + return regmap_update_bits(pc->regmap, PWM_FAN_CON0, PWM_FAN_DC_MSK,
> +   FIELD_PREP(PWM_FAN_DC_MSK, val));
> +}
> +
> +static int intel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
> + int duty_ns, int period_ns)
> +{
> + struct intel_pwm_chip *pc = to_intel_pwm_chip(chip);