Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Geert Uytterhoeven]

Hi Linus,

On Tue, Apr 11, 2017 at 11:05 AM, Linus Walleij
 wrote:
> On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  
> wrote:
>> Hi Linus,
>>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>>
>> As you suggested in v3 review, I have now added what we called pinmux flags
>> to the list of standard pinconf generic properties, and we're now using
>> generic parsing routines to collect them and apply them when multiplexing
>> pins.
>
> I have merged patch 1/9 so you have the necessary infrastructure in place.
>
> If Geert want to send a pull request based on my devel branch that is fine
> (but a bit late) else the requirements are there for a merge in the early
> v4.12 kernel cycle.

I agree it's a bit late. Will queue for v4.13.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Geert Uytterhoeven]

Hi Linus,

On Tue, Apr 11, 2017 at 11:05 AM, Linus Walleij
 wrote:
> On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  
> wrote:
>> Hi Linus,
>>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>>
>> As you suggested in v3 review, I have now added what we called pinmux flags
>> to the list of standard pinconf generic properties, and we're now using
>> generic parsing routines to collect them and apply them when multiplexing
>> pins.
>
> I have merged patch 1/9 so you have the necessary infrastructure in place.
>
> If Geert want to send a pull request based on my devel branch that is fine
> (but a bit late) else the requirements are there for a merge in the early
> v4.12 kernel cycle.

I agree it's a bit late. Will queue for v4.13.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Linus Walleij]

On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  wrote:

> Hi Linus,
>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>
> As you suggested in v3 review, I have now added what we called pinmux flags
> to the list of standard pinconf generic properties, and we're now using
> generic parsing routines to collect them and apply them when multiplexing
> pins.

I have merged patch 1/9 so you have the necessary infrastructure in place.

If Geert want to send a pull request based on my devel branch that is fine
(but a bit late) else the requirements are there for a merge in the early
v4.12 kernel cycle.

Yours,
Linus Walleij

Re: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Linus Walleij]

On Wed, Apr 5, 2017 at 4:07 PM, Jacopo Mondi  wrote:

> Hi Linus,
>this is 4th round of gpio/pincontroller for RZ/A1 devices.
>
> As you suggested in v3 review, I have now added what we called pinmux flags
> to the list of standard pinconf generic properties, and we're now using
> generic parsing routines to collect them and apply them when multiplexing
> pins.

I have merged patch 1/9 so you have the necessary infrastructure in place.

If Geert want to send a pull request based on my devel branch that is fine
(but a bit late) else the requirements are there for a merge in the early
v4.12 kernel cycle.

Yours,
Linus Walleij

RE: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Chris Brandt]

Hi Jacopo,

On Wednesday, April 05, 2017, Jacopo Mondi wrote:
> v3 -> v4:
> - use "pinmux" property in pmx sub-nodes in place of "renesas,pins"
> - use pinconf standard properties to set pin mux additional flags
> - add "bi-directional" and "output-enable" to pinconf generic properties
> - perform pmx function parsing at dt_node_to_map() time
> - change DT bindings to use GENERIC_PINCONF
> - change DT bindings to allow sub-nodes to have "pinmux" property
> specified
> - several renames (register names, DT parse functions, set_mux() function)


I just tested this driver on the RZ/A1 RSK board.
The following worked good.

   SCIF2, I2C, SDHI, Ethernet


SDHI also has bi-direction pins. For your reference, here was my DT:


/* SHDI ch1 on CN1 */
sdhi1_pins: sdhi1 {
pins {
pinmux = ,/* SD_CD_1 */
 ,/* SD_WP_1 */
 ,   /* SD_CLK_1 */
 ;   /* SD_CMD_1 */
};

pins_bidir {
pinmux = ,   /* SD_D1_1 */
 ,   /* SD_D0_1 */
 ,   /* SD_D3_1 */
 ;   /* SD_D2_1 */
bi-directional;
};
};


Thanks,
Chris

RE: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller

[Chris Brandt]

Hi Jacopo,

On Wednesday, April 05, 2017, Jacopo Mondi wrote:
> v3 -> v4:
> - use "pinmux" property in pmx sub-nodes in place of "renesas,pins"
> - use pinconf standard properties to set pin mux additional flags
> - add "bi-directional" and "output-enable" to pinconf generic properties
> - perform pmx function parsing at dt_node_to_map() time
> - change DT bindings to use GENERIC_PINCONF
> - change DT bindings to allow sub-nodes to have "pinmux" property
> specified
> - several renames (register names, DT parse functions, set_mux() function)


I just tested this driver on the RZ/A1 RSK board.
The following worked good.

   SCIF2, I2C, SDHI, Ethernet


SDHI also has bi-direction pins. For your reference, here was my DT:


/* SHDI ch1 on CN1 */
sdhi1_pins: sdhi1 {
pins {
pinmux = ,/* SD_CD_1 */
 ,/* SD_WP_1 */
 ,   /* SD_CLK_1 */
 ;   /* SD_CMD_1 */
};

pins_bidir {
pinmux = ,   /* SD_D1_1 */
 ,   /* SD_D0_1 */
 ,   /* SD_D3_1 */
 ;   /* SD_D2_1 */
bi-directional;
};
};


Thanks,
Chris