Hi, Mason, YC Lin,
On 5/29/20 10:36 AM, Mason Yang wrote:
> JESD251, xSPI profile 1.0 table supports octal DTR mode.
> Extract information like the fast read opcode, dummy cycles for various
> frequencies, the number of dummy cycles needed for a Read Status
> Register command, the number of address bytes needed for a Read
> Status Register command, read volatile register command and write
> volatile register command.
>
> According to BFPT 20th DWORD of octal maximum speed, driver get it's
> specific dummy cycles from profile 1.0 table and then could update
> it to device by their fixup hooks.
>
> Since driver get octal DTR read opcode and then set read settings,
> expose spi_nor_set_read_settings() in core.h.
>
> Signed-off-by: Mason Yang
> ---
> drivers/mtd/spi-nor/core.c | 2 +-
> drivers/mtd/spi-nor/core.h | 16 +++
> drivers/mtd/spi-nor/sfdp.c | 106
> +
> 3 files changed, 123 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 1ab4386..3799417 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2204,7 +2204,7 @@ static int spi_nor_check(struct spi_nor *nor)
> return 0;
> }
>
> -static void
> +void
> spi_nor_set_read_settings(struct spi_nor_read_command *read,
> u8 num_mode_clocks,
> u8 num_wait_states,
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 7a36b22..a33f807 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -191,6 +191,12 @@ struct spi_nor_locking_ops {
> * @size:the flash memory density in bytes.
> * @page_size: the page size of the SPI NOR flash memory.
> * @octal_max_speed: maximum operation speed of device in octal mode.
> + * @rdsr_dummy: dummy cycles needed for Read Status Register
> command.
> + * @rdsr_addr_nbytes:dummy address bytes needed for Read Status
> Register
> + * command.
> + * @rd_reg_cmd: read volatile register command for xSPI device.
> + * @wr_reg_cmd: write volatile register command for xSPI device.
Can all the volatile registers be accessed with these commands?
The profile1.0 table lacks description.
> + * @dummy_cycles:dummy cycles used for various frequencies
> * @hwcaps: describes the read and page program hardware
> * capabilities.
> * @reads: read capabilities ordered by priority: the higher index
> @@ -214,6 +220,11 @@ struct spi_nor_flash_parameter {
> u64 size;
> u32 page_size;
> u16 octal_max_speed;
> + u8 rdsr_dummy;
> + u8 rdsr_addr_nbytes;
> + u8 rd_reg_cmd;
> + u8 wr_reg_cmd;
> + u8 dummy_cycles;
>
> struct spi_nor_hwcaps hwcaps;
> struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
> @@ -420,6 +431,11 @@ ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t
> to, size_t len,
>
> int spi_nor_hwcaps_read2cmd(u32 hwcaps);
> u8 spi_nor_convert_3to4_read(u8 opcode);
> +void spi_nor_set_read_settings(struct spi_nor_read_command *read,
> +u8 num_mode_clocks,
> +u8 num_wait_states,
> +u8 opcode,
> +enum spi_nor_protocol proto);
> void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
>enum spi_nor_protocol proto);
>
> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> index 4d13f66..27a4de4 100644
> --- a/drivers/mtd/spi-nor/sfdp.c
> +++ b/drivers/mtd/spi-nor/sfdp.c
> @@ -20,6 +20,7 @@
> #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */
> #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
> #define SFDP_4BAIT_ID0xff84 /* 4-byte Address Instruction
> Table */
> +#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
>
> #define SFDP_SIGNATURE 0x50444653U
> #define SFDP_JESD216_MAJOR 1
> @@ -27,6 +28,27 @@
> #define SFDP_JESD216A_MINOR 5
> #define SFDP_JESD216B_MINOR 6
>
> +/* xSPI Profile 1.0 table (from JESD216D.01). */
> +#define XSPI_PF1_DWORD1_RD_CMD GENMASK(15, 8)
> +#define XSPI_PF1_DWORD1_RDSR_ADDR_BYTES BIT(29)
> +#define XSPI_PF1_DWORD1_RDSR_DUMMY_CYCLES BIT(28)
> +#define XSPI_PF1_DWORD2_RD_REG_CMD GENMASK(31, 24)
> +#define XSPI_PF1_DWORD2_WR_REG_CMD GENMASK(15, 8)
> +#define XSPI_PF1_DUMMY_CYCLES_DEFAULT20
> +#define XSPI_DWORD(x) ((x) - 1)
> +#define XSPI_DWORD_MAX 5
> +
> +struct sfdp_xspi {
> + u32
