Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-18 Thread Ramuthevar, Vadivel MuruganX

Hi Rob,

On 19/5/2020 2:27 am, Rob Herring wrote:

On Thu, May 14, 2020 at 8:08 PM Ramuthevar, Vadivel MuruganX
 wrote:


Hi Rob,

On 14/5/2020 8:57 pm, Rob Herring wrote:

On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:

From: Ramuthevar Vadivel Murugan 

Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
   .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 
++
   1 file changed, 83 insertions(+)
   create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml




My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/intel,lgm-nand.example.dt.yaml:
 nand-controller@e0f0: 'dmas' is a dependency of 'dma-names'

See https://patchwork.ozlabs.org/patch/1289160

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master 
--upgrade

Please check and re-submit.

Thank you very much for review comments...
I didn't find build errors, successfully built.


You need to build without DT_SCHEMA_FILES set or be on 5.7-rc (you
should be on a current -rcX at least for any patch submission). This
comes from the core schema.

Yes, reproduced the issue as above mentioned and fixed it. Thanks!

Regards
Vadivel


Rob



Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-18 Thread Rob Herring
On Thu, May 14, 2020 at 8:08 PM Ramuthevar, Vadivel MuruganX
 wrote:
>
> Hi Rob,
>
> On 14/5/2020 8:57 pm, Rob Herring wrote:
> > On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:
> >> From: Ramuthevar Vadivel Murugan 
> >> 
> >>
> >> Add YAML file for dt-bindings to support NAND Flash Controller
> >> on Intel's Lightning Mountain SoC.
> >>
> >> Signed-off-by: Ramuthevar Vadivel Murugan 
> >> 
> >> ---
> >>   .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 
> >> ++
> >>   1 file changed, 83 insertions(+)
> >>   create mode 100644 
> >> Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> >>
> >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
> > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/intel,lgm-nand.example.dt.yaml:
> >  nand-controller@e0f0: 'dmas' is a dependency of 'dma-names'
> >
> > See https://patchwork.ozlabs.org/patch/1289160
> >
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure dt-schema is up to date:
> >
> > pip3 install git+https://github.com/devicetree-org/dt-schema.git@master 
> > --upgrade
> >
> > Please check and re-submit.
> Thank you very much for review comments...
> I didn't find build errors, successfully built.

You need to build without DT_SCHEMA_FILES set or be on 5.7-rc (you
should be on a current -rcX at least for any patch submission). This
comes from the core schema.

Rob


Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-18 Thread Rob Herring
On Thu, May 14, 2020 at 8:06 PM Ramuthevar, Vadivel MuruganX
 wrote:
>
> Hi Rob,
>
> Thank you for the review comments...
>
> On 14/5/2020 9:03 pm, Rob Herring wrote:
> > On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote:
> >> From: Ramuthevar Vadivel Murugan 
> >> 
> >>
> >> Add YAML file for dt-bindings to support NAND Flash Controller
> >> on Intel's Lightning Mountain SoC.
> >>
> >> Signed-off-by: Ramuthevar Vadivel Murugan 
> >> 
> >> ---
> >>   .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 
> >> ++
> >>   1 file changed, 83 insertions(+)
> >>   create mode 100644 
> >> Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml

> >> +  clocks = < 125>;
> >> +  dma-names = "tx", "rx";
> >> +  #address-cells = <1>;
> >> +  #size-cells = <0>;
> >> +  #clock-cells = <1>;
> >
> > This is a clock provider too?
> Yes, it is getting clock from CGU for nand-controller.

That is a clock client (e.g. 'clocks' property), not a provider. The
CGU is the provider.

Rob


Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-15 Thread Ramuthevar, Vadivel MuruganX

Hi Rob,

On 15/5/2020 10:08 am, Ramuthevar, Vadivel MuruganX wrote:

Hi Rob,

On 14/5/2020 8:57 pm, Rob Herring wrote:

On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan 



Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 


---
  .../devicetree/bindings/mtd/intel,lgm-nand.yaml    | 83 
++

  1 file changed, 83 insertions(+)
  create mode 100644 
Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml





My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/intel,lgm-nand.example.dt.yaml: 
nand-controller@e0f0: 'dmas' is a dependency of 'dma-names'


See https://patchwork.ozlabs.org/patch/1289160

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install 
git+https://github.com/devicetree-org/dt-schema.git@master --upgrade


Please check and re-submit.Sure, will check and re-submit, Thanks!


Regards
Vadivel


Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-14 Thread Ramuthevar, Vadivel MuruganX

Hi Rob,

On 14/5/2020 8:57 pm, Rob Herring wrote:

On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:

From: Ramuthevar Vadivel Murugan 

Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
  .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 ++
  1 file changed, 83 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml




My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/intel,lgm-nand.example.dt.yaml:
 nand-controller@e0f0: 'dmas' is a dependency of 'dma-names'

See https://patchwork.ozlabs.org/patch/1289160

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master 
--upgrade

Please check and re-submit.

Thank you very much for review comments...
I didn't find build errors, successfully built.

Regards
Vadivel





Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-14 Thread Ramuthevar, Vadivel MuruganX

Hi Rob,

   Thank you for the review comments...

On 14/5/2020 9:03 pm, Rob Herring wrote:

On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote:

From: Ramuthevar Vadivel Murugan 

Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
  .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 ++
  1 file changed, 83 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml

diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml 
b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
new file mode 100644
index ..d9e0df8553fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0


Dual license new bindings please:

(GPL-2.0-only OR BSD-2-Clause)

Noted.



+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel LGM SoC NAND Controller Device Tree Bindings
+
+allOf:
+  - $ref: "nand-controller.yaml"
+
+maintainers:
+  - Ramuthevar Vadivel Murugan 
+
+properties:
+  compatible:
+const: intel,lgm-nand-controller
+
+  reg:
+maxItems: 1


Looks like you have 4 or 6 entries, not 1. Need to define what each one
is.

Sure, will define it.



+
+  clocks:
+maxItems: 1
+
+  dmas:
+maxItems: 2
+
+  dma-names:
+enum:
+  - rx
+  - tx


This defines a single entry. I believe you want:

items:
   - const: tx
   - const: rx

Yes, Thanks!




+
+  pinctrl-names: true


No need for this. Tools add pinctrl properties.

will drop it.



+
+patternProperties:
+  "^nand@[a-f0-9]+$":
+type: object
+properties:
+  reg:
+minimum: 0
+maximum: 7
+
+  nand-ecc-mode: true
+
+  nand-ecc-algo:
+const: hw
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - dmas
+
+additionalProperties: false
+
+examples:
+  - |
+nand-controller@e0f0 {
+  compatible = "intel,nand-controller";


Doesn't match the schema.

Noted, will update the schema name.



+  reg = <0xe0f0 0x100>,
+<0xe100 0x300>,
+<0xe140 0x8000>,
+<0xe1c0 0x1000>;


Is it 4 or 6 entries?

yes, will update.



+  reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
+"addr_sel0","addr_sel1";


Not documented.

Noted, will document it.



+  clocks = < 125>;
+  dma-names = "tx", "rx";
+  #address-cells = <1>;
+  #size-cells = <0>;
+  #clock-cells = <1>;


This is a clock provider too?

Yes, it is getting clock from CGU for nand-controller.

Regards
Vadivel



+
+  nand@0 {
+reg = <0>;
+nand-on-flash-bbt;
+#address-cells = <1>;
+#size-cells = <1>;
+  };
+};
+
+...
--
2.11.0



Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-14 Thread Rob Herring
On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan 
> 
> Add YAML file for dt-bindings to support NAND Flash Controller
> on Intel's Lightning Mountain SoC.
> 
> Signed-off-by: Ramuthevar Vadivel Murugan 
> 
> ---
>  .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 
> ++
>  1 file changed, 83 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml 
> b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> new file mode 100644
> index ..d9e0df8553fa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings please:

(GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel LGM SoC NAND Controller Device Tree Bindings
> +
> +allOf:
> +  - $ref: "nand-controller.yaml"
> +
> +maintainers:
> +  - Ramuthevar Vadivel Murugan 
> +
> +properties:
> +  compatible:
> +const: intel,lgm-nand-controller
> +
> +  reg:
> +maxItems: 1

Looks like you have 4 or 6 entries, not 1. Need to define what each one 
is.

> +
> +  clocks:
> +maxItems: 1
> +
> +  dmas:
> +maxItems: 2
> +
> +  dma-names:
> +enum:
> +  - rx
> +  - tx

This defines a single entry. I believe you want:

items:
  - const: tx
  - const: rx

> +
> +  pinctrl-names: true

No need for this. Tools add pinctrl properties.

> +
> +patternProperties:
> +  "^nand@[a-f0-9]+$":
> +type: object
> +properties:
> +  reg:
> +minimum: 0
> +maximum: 7
> +
> +  nand-ecc-mode: true
> +
> +  nand-ecc-algo:
> +const: hw
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - dmas
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +nand-controller@e0f0 {
> +  compatible = "intel,nand-controller";

Doesn't match the schema.

> +  reg = <0xe0f0 0x100>,
> +<0xe100 0x300>,
> +<0xe140 0x8000>,
> +<0xe1c0 0x1000>;

Is it 4 or 6 entries?

> +  reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
> +"addr_sel0","addr_sel1";

Not documented.

> +  clocks = < 125>;
> +  dma-names = "tx", "rx";
> +  #address-cells = <1>;
> +  #size-cells = <0>;
> +  #clock-cells = <1>;

This is a clock provider too?

> +
> +  nand@0 {
> +reg = <0>;
> +nand-on-flash-bbt;
> +#address-cells = <1>;
> +#size-cells = <1>;
> +  };
> +};
> +
> +...
> -- 
> 2.11.0
> 


Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

2020-05-14 Thread Rob Herring
On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan 
> 
> Add YAML file for dt-bindings to support NAND Flash Controller
> on Intel's Lightning Mountain SoC.
> 
> Signed-off-by: Ramuthevar Vadivel Murugan 
> 
> ---
>  .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 83 
> ++
>  1 file changed, 83 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/intel,lgm-nand.example.dt.yaml:
 nand-controller@e0f0: 'dmas' is a dependency of 'dma-names'

See https://patchwork.ozlabs.org/patch/1289160

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master 
--upgrade

Please check and re-submit.