Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
On Wed 18 Jul 19:36 PDT 2018, David Dai wrote: > diff --git a/drivers/interconnect/qcom/sdm845.c > b/drivers/interconnect/qcom/sdm845.c [..] > +DEFINE_QNODE(ipa_core_master, MASTER_IPA_CORE, 1, 8, 1, SLAVE_IPA_CORE); [..] > +DEFINE_QNODE(ipa_core_slave, SLAVE_IPA_CORE, 1, 8, 0); As discussed before; while the two sides of IPA_CORE are controlled through the "bus mechanism", they do represent the clock of the IPA block. I think it would make sense to make this interconnect provider also register a clock provider and expose this as a clock, for the IPA driver to consume. Regards, Bjorn
Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
On Wed 18 Jul 19:36 PDT 2018, David Dai wrote: > diff --git a/drivers/interconnect/qcom/sdm845.c > b/drivers/interconnect/qcom/sdm845.c [..] > +DEFINE_QNODE(ipa_core_master, MASTER_IPA_CORE, 1, 8, 1, SLAVE_IPA_CORE); [..] > +DEFINE_QNODE(ipa_core_slave, SLAVE_IPA_CORE, 1, 8, 0); As discussed before; while the two sides of IPA_CORE are controlled through the "bus mechanism", they do represent the clock of the IPA block. I think it would make sense to make this interconnect provider also register a clock provider and expose this as a clock, for the IPA driver to consume. Regards, Bjorn
Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile | 1 +
drivers/interconnect/qcom/qcom-icc-ids.h | 142
drivers/interconnect/qcom/sdm845.c | 826 +
5 files changed, 999 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interconnect/qcom-sdm845.txt
create mode 100644 drivers/interconnect/qcom/qcom-icc-ids.h
create mode 100644 drivers/interconnect/qcom/sdm845.c
...
diff --git a/drivers/interconnect/qcom/sdm845.c
b/drivers/interconnect/qcom/sdm845.c
new file mode 100644
index 000..bf13053
--- /dev/null
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -0,0 +1,826 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "qcom-icc-ids.h"
+
+#define BCM_TCS_CMD_COMMIT_SHFT30
+#define BCM_TCS_CMD_COMMIT_MASK0x4000
+#define BCM_TCS_CMD_VALID_SHFT 29
+#define BCM_TCS_CMD_VALID_MASK 0x20001
+#define BCM_TCS_CMD_VOTE_X_SHFT14
+#define BCM_TCS_CMD_VOTE_MASK 0x3fff
+#define BCM_TCS_CMD_VOTE_Y_SHFT0
+#define BCM_TCS_CMD_VOTE_Y_MASK0xfffc000
+
+#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
+ ((commit << BCM_TCS_CMD_COMMIT_SHFT) |\
+ (valid << BCM_TCS_CMD_VALID_SHFT) |\
+ ((vote_x & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) |\
+ ((vote_y & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
These values that are >8 bits (vote_x and vote_y) should be converted
from cpu to little endian.
Done.
+
+#define to_qcom_provider(_provider) \
+ container_of(_provider, struct qcom_icc_provider, provider)
+
+#define DEFINE_QNODE(_name, _id, _channels, _buswidth, \
+ _numlinks, ...) \
+ static struct qcom_icc_node _name = { \
+ .id = _id, \
+ .name = #_name, \
+ .channels = _channels, \
+ .buswidth = _buswidth, \
+ .num_links = _numlinks, \
+ .links = { __VA_ARGS__ }, \
+ }
+
+#define DEFINE_QBCM(_name, _bcmname, _keepalive, _numnodes, ...) \
+ static struct qcom_icc_bcm _name = {\
+ .name = _bcmname, \
+ .keepalive = _keepalive,\
+ .num_nodes = _numnodes, \
+ .nodes = { __VA_ARGS__ }, \
+ }
+
+struct qcom_icc_provider {
+ struct icc_provider provider;
+ void __iomem*base;
+ struct device *dev;
+ struct qcom_icc_bcm **bcms;
+ size_t num_bcms;
+};
+
+/**
+ * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
+ * @unit: bcm threshold values are in magnitudes of this
+ * @width: prototype width
+ * @vcd: virtual clock domain that this bcm belongs to
+ */
+
+struct bcm_db {
+ u32 unit;
+ u16 width;
+ u8 vcd;
+ u8 reserved;
+};
+
+#define SDM845_MAX_LINKS 43
+#define SDM845_MAX_BCMS30
+#define SDM845_MAX_BCM_PER_NODE2
+#define SDM845_MAX_VCD 10
+
+/**
+ * struct qcom_icc_node - Qualcomm specific interconnect nodes
+ * @name: the node name used in debugfs
+ * @links: an array of nodes where we can go next while traversing
+ * @id: a unique node identifier
+ * @num_links: the total number of @links
+ * @channels: num of channels at this node
+ * @buswidth: width of the interconnect between a node and the bus
+ * @sum_avg: current sum aggregate value of all avg bw requests
+ * @max_peak: current max aggregate value of all peak bw requests
+ * @bcms: list of bcms associated with this logical node
+ * @num_bcm: num of @bcms
+ */
+struct qcom_icc_node {
+ const char *name;
+ u16 links[SDM845_MAX_LINKS];
+ u16 id;
+ u16 num_links;
+ u16 channels;
+ u16 buswidth;
+ u64 sum_avg;
+ u64 max_peak;
+ struct qcom_icc_bcm *bcms[SDM845_MAX_BCM_PER_NODE];
+ size_t
Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile | 1 +
drivers/interconnect/qcom/qcom-icc-ids.h | 142
drivers/interconnect/qcom/sdm845.c | 826 +
5 files changed, 999 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interconnect/qcom-sdm845.txt
create mode 100644 drivers/interconnect/qcom/qcom-icc-ids.h
create mode 100644 drivers/interconnect/qcom/sdm845.c
...
diff --git a/drivers/interconnect/qcom/sdm845.c
b/drivers/interconnect/qcom/sdm845.c
new file mode 100644
index 000..bf13053
--- /dev/null
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -0,0 +1,826 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include "qcom-icc-ids.h"
+
+#define BCM_TCS_CMD_COMMIT_SHFT30
+#define BCM_TCS_CMD_COMMIT_MASK0x4000
+#define BCM_TCS_CMD_VALID_SHFT 29
+#define BCM_TCS_CMD_VALID_MASK 0x20001
+#define BCM_TCS_CMD_VOTE_X_SHFT14
+#define BCM_TCS_CMD_VOTE_MASK 0x3fff
+#define BCM_TCS_CMD_VOTE_Y_SHFT0
+#define BCM_TCS_CMD_VOTE_Y_MASK0xfffc000
+
+#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
+ ((commit << BCM_TCS_CMD_COMMIT_SHFT) |\
+ (valid << BCM_TCS_CMD_VALID_SHFT) |\
+ ((vote_x & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) |\
+ ((vote_y & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
These values that are >8 bits (vote_x and vote_y) should be converted
from cpu to little endian.
Done.
+
+#define to_qcom_provider(_provider) \
+ container_of(_provider, struct qcom_icc_provider, provider)
+
+#define DEFINE_QNODE(_name, _id, _channels, _buswidth, \
+ _numlinks, ...) \
+ static struct qcom_icc_node _name = { \
+ .id = _id, \
+ .name = #_name, \
+ .channels = _channels, \
+ .buswidth = _buswidth, \
+ .num_links = _numlinks, \
+ .links = { __VA_ARGS__ }, \
+ }
+
+#define DEFINE_QBCM(_name, _bcmname, _keepalive, _numnodes, ...) \
+ static struct qcom_icc_bcm _name = {\
+ .name = _bcmname, \
+ .keepalive = _keepalive,\
+ .num_nodes = _numnodes, \
+ .nodes = { __VA_ARGS__ }, \
+ }
+
+struct qcom_icc_provider {
+ struct icc_provider provider;
+ void __iomem*base;
+ struct device *dev;
+ struct qcom_icc_bcm **bcms;
+ size_t num_bcms;
+};
+
+/**
+ * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
+ * @unit: bcm threshold values are in magnitudes of this
+ * @width: prototype width
+ * @vcd: virtual clock domain that this bcm belongs to
+ */
+
+struct bcm_db {
+ u32 unit;
+ u16 width;
+ u8 vcd;
+ u8 reserved;
+};
+
+#define SDM845_MAX_LINKS 43
+#define SDM845_MAX_BCMS30
+#define SDM845_MAX_BCM_PER_NODE2
+#define SDM845_MAX_VCD 10
+
+/**
+ * struct qcom_icc_node - Qualcomm specific interconnect nodes
+ * @name: the node name used in debugfs
+ * @links: an array of nodes where we can go next while traversing
+ * @id: a unique node identifier
+ * @num_links: the total number of @links
+ * @channels: num of channels at this node
+ * @buswidth: width of the interconnect between a node and the bus
+ * @sum_avg: current sum aggregate value of all avg bw requests
+ * @max_peak: current max aggregate value of all peak bw requests
+ * @bcms: list of bcms associated with this logical node
+ * @num_bcm: num of @bcms
+ */
+struct qcom_icc_node {
+ const char *name;
+ u16 links[SDM845_MAX_LINKS];
+ u16 id;
+ u16 num_links;
+ u16 channels;
+ u16 buswidth;
+ u64 sum_avg;
+ u64 max_peak;
+ struct qcom_icc_bcm *bcms[SDM845_MAX_BCM_PER_NODE];
+ size_t
Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
>
> Introduce Qualcomm SDM845 specific provider driver using the
> interconnect framework.
>
> Signed-off-by: David Dai
> ---
> .../bindings/interconnect/qcom-sdm845.txt | 22 +
> drivers/interconnect/qcom/Kconfig | 8 +
> drivers/interconnect/qcom/Makefile | 1 +
> drivers/interconnect/qcom/qcom-icc-ids.h | 142
> drivers/interconnect/qcom/sdm845.c | 826
> +
> 5 files changed, 999 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/interconnect/qcom-sdm845.txt
> create mode 100644 drivers/interconnect/qcom/qcom-icc-ids.h
> create mode 100644 drivers/interconnect/qcom/sdm845.c
>
...
> diff --git a/drivers/interconnect/qcom/sdm845.c
> b/drivers/interconnect/qcom/sdm845.c
> new file mode 100644
> index 000..bf13053
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sdm845.c
> @@ -0,0 +1,826 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2018, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +
> +#include "qcom-icc-ids.h"
> +
> +#define BCM_TCS_CMD_COMMIT_SHFT30
> +#define BCM_TCS_CMD_COMMIT_MASK0x4000
> +#define BCM_TCS_CMD_VALID_SHFT 29
> +#define BCM_TCS_CMD_VALID_MASK 0x20001
> +#define BCM_TCS_CMD_VOTE_X_SHFT14
> +#define BCM_TCS_CMD_VOTE_MASK 0x3fff
> +#define BCM_TCS_CMD_VOTE_Y_SHFT0
> +#define BCM_TCS_CMD_VOTE_Y_MASK0xfffc000
> +
> +#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
> + ((commit << BCM_TCS_CMD_COMMIT_SHFT) |\
> + (valid << BCM_TCS_CMD_VALID_SHFT) |\
> + ((vote_x & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) |\
> + ((vote_y & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
These values that are >8 bits (vote_x and vote_y) should be converted
from cpu to little endian.
> +
> +#define to_qcom_provider(_provider) \
> + container_of(_provider, struct qcom_icc_provider, provider)
> +
> +#define DEFINE_QNODE(_name, _id, _channels, _buswidth, \
> + _numlinks, ...) \
> + static struct qcom_icc_node _name = { \
> + .id = _id, \
> + .name = #_name, \
> + .channels = _channels, \
> + .buswidth = _buswidth, \
> + .num_links = _numlinks, \
> + .links = { __VA_ARGS__ }, \
> + }
> +
> +#define DEFINE_QBCM(_name, _bcmname, _keepalive, _numnodes, ...) \
> + static struct qcom_icc_bcm _name = {\
> + .name = _bcmname, \
> + .keepalive = _keepalive,\
> + .num_nodes = _numnodes, \
> + .nodes = { __VA_ARGS__ }, \
> + }
> +
> +struct qcom_icc_provider {
> + struct icc_provider provider;
> + void __iomem*base;
> + struct device *dev;
> + struct qcom_icc_bcm **bcms;
> + size_t num_bcms;
> +};
> +
> +/**
> + * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
> + * @unit: bcm threshold values are in magnitudes of this
> + * @width: prototype width
> + * @vcd: virtual clock domain that this bcm belongs to
> + */
> +
> +struct bcm_db {
> + u32 unit;
> + u16 width;
> + u8 vcd;
> + u8 reserved;
> +};
> +
> +#define SDM845_MAX_LINKS 43
> +#define SDM845_MAX_BCMS30
> +#define SDM845_MAX_BCM_PER_NODE2
> +#define SDM845_MAX_VCD 10
> +
> +/**
> + * struct qcom_icc_node - Qualcomm specific interconnect nodes
> + * @name: the node name used in debugfs
> + * @links: an array of nodes where we can go next while traversing
> + * @id: a unique node identifier
> + * @num_links: the total number of @links
> + * @channels: num of channels at this node
> + * @buswidth: width of the interconnect between a node and the bus
> + * @sum_avg: current sum aggregate value of all avg bw requests
> + * @max_peak: current max aggregate value of all peak bw requests
> + * @bcms: list of bcms associated with this logical node
> + * @num_bcm: num of @bcms
> + */
> +struct qcom_icc_node {
> + const char *name;
> + u16 links[SDM845_MAX_LINKS];
> + u16 id;
> + u16 num_links;
> + u16 channels;
> +
Re: [RFC PATCH v2 1/2] interconnect: qcom: Add sdm845 interconnect provider driver
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
>
> Introduce Qualcomm SDM845 specific provider driver using the
> interconnect framework.
>
> Signed-off-by: David Dai
> ---
> .../bindings/interconnect/qcom-sdm845.txt | 22 +
> drivers/interconnect/qcom/Kconfig | 8 +
> drivers/interconnect/qcom/Makefile | 1 +
> drivers/interconnect/qcom/qcom-icc-ids.h | 142
> drivers/interconnect/qcom/sdm845.c | 826
> +
> 5 files changed, 999 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/interconnect/qcom-sdm845.txt
> create mode 100644 drivers/interconnect/qcom/qcom-icc-ids.h
> create mode 100644 drivers/interconnect/qcom/sdm845.c
>
...
> diff --git a/drivers/interconnect/qcom/sdm845.c
> b/drivers/interconnect/qcom/sdm845.c
> new file mode 100644
> index 000..bf13053
> --- /dev/null
> +++ b/drivers/interconnect/qcom/sdm845.c
> @@ -0,0 +1,826 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2018, The Linux Foundation. All rights reserved.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +
> +#include "qcom-icc-ids.h"
> +
> +#define BCM_TCS_CMD_COMMIT_SHFT30
> +#define BCM_TCS_CMD_COMMIT_MASK0x4000
> +#define BCM_TCS_CMD_VALID_SHFT 29
> +#define BCM_TCS_CMD_VALID_MASK 0x20001
> +#define BCM_TCS_CMD_VOTE_X_SHFT14
> +#define BCM_TCS_CMD_VOTE_MASK 0x3fff
> +#define BCM_TCS_CMD_VOTE_Y_SHFT0
> +#define BCM_TCS_CMD_VOTE_Y_MASK0xfffc000
> +
> +#define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \
> + ((commit << BCM_TCS_CMD_COMMIT_SHFT) |\
> + (valid << BCM_TCS_CMD_VALID_SHFT) |\
> + ((vote_x & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) |\
> + ((vote_y & BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
These values that are >8 bits (vote_x and vote_y) should be converted
from cpu to little endian.
> +
> +#define to_qcom_provider(_provider) \
> + container_of(_provider, struct qcom_icc_provider, provider)
> +
> +#define DEFINE_QNODE(_name, _id, _channels, _buswidth, \
> + _numlinks, ...) \
> + static struct qcom_icc_node _name = { \
> + .id = _id, \
> + .name = #_name, \
> + .channels = _channels, \
> + .buswidth = _buswidth, \
> + .num_links = _numlinks, \
> + .links = { __VA_ARGS__ }, \
> + }
> +
> +#define DEFINE_QBCM(_name, _bcmname, _keepalive, _numnodes, ...) \
> + static struct qcom_icc_bcm _name = {\
> + .name = _bcmname, \
> + .keepalive = _keepalive,\
> + .num_nodes = _numnodes, \
> + .nodes = { __VA_ARGS__ }, \
> + }
> +
> +struct qcom_icc_provider {
> + struct icc_provider provider;
> + void __iomem*base;
> + struct device *dev;
> + struct qcom_icc_bcm **bcms;
> + size_t num_bcms;
> +};
> +
> +/**
> + * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
> + * @unit: bcm threshold values are in magnitudes of this
> + * @width: prototype width
> + * @vcd: virtual clock domain that this bcm belongs to
> + */
> +
> +struct bcm_db {
> + u32 unit;
> + u16 width;
> + u8 vcd;
> + u8 reserved;
> +};
> +
> +#define SDM845_MAX_LINKS 43
> +#define SDM845_MAX_BCMS30
> +#define SDM845_MAX_BCM_PER_NODE2
> +#define SDM845_MAX_VCD 10
> +
> +/**
> + * struct qcom_icc_node - Qualcomm specific interconnect nodes
> + * @name: the node name used in debugfs
> + * @links: an array of nodes where we can go next while traversing
> + * @id: a unique node identifier
> + * @num_links: the total number of @links
> + * @channels: num of channels at this node
> + * @buswidth: width of the interconnect between a node and the bus
> + * @sum_avg: current sum aggregate value of all avg bw requests
> + * @max_peak: current max aggregate value of all peak bw requests
> + * @bcms: list of bcms associated with this logical node
> + * @num_bcm: num of @bcms
> + */
> +struct qcom_icc_node {
> + const char *name;
> + u16 links[SDM845_MAX_LINKS];
> + u16 id;
> + u16 num_links;
> + u16 channels;
> +
