Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can parse.

2019-05-28 Thread Atish Patra
> On 5/28/19 3:47 AM, Ard Biesheuvel wrote:
>> On Tue, 28 May 2019 at 12:34, Anup Patel  wrote:
>> 
>> 
>> 
>>> -Original Message-
>>> From: Karsten Merker 
>>> Sent: Tuesday, May 28, 2019 1:53 PM
>>> To: Anup Patel 
>>> Cc: Troy Benjegerdes ; Karsten Merker
>>> ; Albert Ou ; Jonathan
>>> Corbet ; Ard Biesheuvel ;
>>> linux-kernel@vger.kernel.org List ; Zong Li
>>> ; Atish Patra ; Palmer
>>> Dabbelt ; paul.walms...@sifive.com; Nick Kossifidis
>>> ; linux-ri...@lists.infradead.org;
>>> marek.va...@gmail.com
>>> Subject: Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can
>>> parse.
>>> 
>>>> On Tue, May 28, 2019 at 03:54:02AM +, Anup Patel wrote:
>>>>>> From: Troy Benjegerdes 
>>>>>>> On May 27, 2019, at 5:16 PM, Karsten Merker 
>>>>>> wrote:
>>>>>> 
>>>>>>> On Mon, May 27, 2019 at 04:34:57PM +0200, Ard Biesheuvel wrote:
>>>>>>> On Fri, 24 May 2019 at 06:18, Atish Patra 
>>> wrote:
>>>>>>>> Currently, the last stage boot loaders such as U-Boot can accept
>>>>>>>> only uImage which is an unnecessary additional step in
>>>>>>>> automating boot process.
>>>>>>>> 
>>>>>>>> Add an image header that boot loader understands and boot Linux
>>>>>>>> from flat Image directly.
>>>>>>>> 
>>>>>>>> This header is based on ARM64 boot image header and provides an
>>>>>>>> opportunity to combine both ARM64 & RISC-V image headers in
>>> future.
>>>>>>>> 
>>>>>>>> Also make sure that PE/COFF header can co-exist in the same
>>>>>>>> image so that EFI stub can be supported for RISC-V in future.
>>>>>>>> EFI specification needs PE/COFF image header in the beginning of
>>>>>>>> the kernel image in order to load it as an EFI application. In
>>>>>>>> order to support EFI stub, code0 should be replaced with "MZ"
>>>>>>>> magic string and res4(at offset 0x3c) should point to the rest
>>>>>>>> of the PE/COFF header (which will be added during EFI support).
>>>>>> [...]
>>>>>>>> Documentation/riscv/boot-image-header.txt | 50
>>>>> ++
>>>>>>>> arch/riscv/include/asm/image.h| 64
>>> +++
>>>>>>>> arch/riscv/kernel/head.S  | 32 
>>>>>>>> 3 files changed, 146 insertions(+) create mode 100644
>>>>>>>> Documentation/riscv/boot-image-header.txt
>>>>>>>> create mode 100644 arch/riscv/include/asm/image.h
>>>>>>>> 
>>>>>>>> diff --git a/Documentation/riscv/boot-image-header.txt
>>>>>>>> b/Documentation/riscv/boot-image-header.txt
>>>>>>>> new file mode 100644
>>>>>>>> index ..68abc2353cec
>>>>>>>> --- /dev/null
>>>>>>>> +++ b/Documentation/riscv/boot-image-header.txt
>>>>>>>> @@ -0,0 +1,50 @@
>>>>>>>> +   Boot image header in RISC-V
>>>>>>>> + Linux
>>>>>>>> +
>>>>>>>> + =
>>>>>>>> +
>>>>>>>> +Author: Atish Patra  Date  : 20 May 2019
>>>>>>>> +
>>>>>>>> +This document only describes the boot image header details for
>>>>>>>> +RISC-V
>>>>> Linux.
>>>>>>>> +The complete booting guide will be available at
>>>>> Documentation/riscv/booting.txt.
>>>>>>>> +
>>>>>>>> +The following 64-byte header is present in decompressed Linux
>>>>>>>> +kernel
>>>>> image.
>>>>>>>> +
>>>>>>>> +   u32 code0;/* Executable code */
>>>>>>>> +   u32 code1;/* Executable code */
>>>>>>> 
>>>>>>> Apologies for not mentioning this in my previous reply, but given
>>>>>>> that you alrea

Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can parse.

2019-05-28 Thread Ard Biesheuvel
On Tue, 28 May 2019 at 12:34, Anup Patel  wrote:
>
>
>
> > -Original Message-
> > From: Karsten Merker 
> > Sent: Tuesday, May 28, 2019 1:53 PM
> > To: Anup Patel 
> > Cc: Troy Benjegerdes ; Karsten Merker
> > ; Albert Ou ; Jonathan
> > Corbet ; Ard Biesheuvel ;
> > linux-kernel@vger.kernel.org List ; Zong Li
> > ; Atish Patra ; Palmer
> > Dabbelt ; paul.walms...@sifive.com; Nick Kossifidis
> > ; linux-ri...@lists.infradead.org;
> > marek.va...@gmail.com
> > Subject: Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can
> > parse.
> >
> > On Tue, May 28, 2019 at 03:54:02AM +, Anup Patel wrote:
> > > > From: Troy Benjegerdes 
> > > > > On May 27, 2019, at 5:16 PM, Karsten Merker 
> > > > wrote:
> > > > >
> > > > > On Mon, May 27, 2019 at 04:34:57PM +0200, Ard Biesheuvel wrote:
> > > > >> On Fri, 24 May 2019 at 06:18, Atish Patra 
> > wrote:
> > > > >>> Currently, the last stage boot loaders such as U-Boot can accept
> > > > >>> only uImage which is an unnecessary additional step in
> > > > >>> automating boot process.
> > > > >>>
> > > > >>> Add an image header that boot loader understands and boot Linux
> > > > >>> from flat Image directly.
> > > > >>>
> > > > >>> This header is based on ARM64 boot image header and provides an
> > > > >>> opportunity to combine both ARM64 & RISC-V image headers in
> > future.
> > > > >>>
> > > > >>> Also make sure that PE/COFF header can co-exist in the same
> > > > >>> image so that EFI stub can be supported for RISC-V in future.
> > > > >>> EFI specification needs PE/COFF image header in the beginning of
> > > > >>> the kernel image in order to load it as an EFI application. In
> > > > >>> order to support EFI stub, code0 should be replaced with "MZ"
> > > > >>> magic string and res4(at offset 0x3c) should point to the rest
> > > > >>> of the PE/COFF header (which will be added during EFI support).
> > > > > [...]
> > > > >>> Documentation/riscv/boot-image-header.txt | 50
> > > > ++
> > > > >>> arch/riscv/include/asm/image.h| 64
> > +++
> > > > >>> arch/riscv/kernel/head.S  | 32 
> > > > >>> 3 files changed, 146 insertions(+) create mode 100644
> > > > >>> Documentation/riscv/boot-image-header.txt
> > > > >>> create mode 100644 arch/riscv/include/asm/image.h
> > > > >>>
> > > > >>> diff --git a/Documentation/riscv/boot-image-header.txt
> > > > >>> b/Documentation/riscv/boot-image-header.txt
> > > > >>> new file mode 100644
> > > > >>> index ..68abc2353cec
> > > > >>> --- /dev/null
> > > > >>> +++ b/Documentation/riscv/boot-image-header.txt
> > > > >>> @@ -0,0 +1,50 @@
> > > > >>> +   Boot image header in RISC-V
> > > > >>> + Linux
> > > > >>> +
> > > > >>> + =
> > > > >>> +
> > > > >>> +Author: Atish Patra  Date  : 20 May 2019
> > > > >>> +
> > > > >>> +This document only describes the boot image header details for
> > > > >>> +RISC-V
> > > > Linux.
> > > > >>> +The complete booting guide will be available at
> > > > Documentation/riscv/booting.txt.
> > > > >>> +
> > > > >>> +The following 64-byte header is present in decompressed Linux
> > > > >>> +kernel
> > > > image.
> > > > >>> +
> > > > >>> +   u32 code0;/* Executable code */
> > > > >>> +   u32 code1;/* Executable code */
> > > > >>
> > > > >> Apologies for not mentioning this in my previous reply, but given
> > > > >> that you already know that you will need to put the magic string
> > > > >> MZ at offset 0x0, it makes more sense to not put any code there
> > > >

RE: [v4 PATCH] RISC-V: Add an Image header that boot loader can parse.

2019-05-28 Thread Anup Patel


> -Original Message-
> From: Karsten Merker 
> Sent: Tuesday, May 28, 2019 1:53 PM
> To: Anup Patel 
> Cc: Troy Benjegerdes ; Karsten Merker
> ; Albert Ou ; Jonathan
> Corbet ; Ard Biesheuvel ;
> linux-kernel@vger.kernel.org List ; Zong Li
> ; Atish Patra ; Palmer
> Dabbelt ; paul.walms...@sifive.com; Nick Kossifidis
> ; linux-ri...@lists.infradead.org;
> marek.va...@gmail.com
> Subject: Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can
> parse.
> 
> On Tue, May 28, 2019 at 03:54:02AM +, Anup Patel wrote:
> > > From: Troy Benjegerdes 
> > > > On May 27, 2019, at 5:16 PM, Karsten Merker 
> > > wrote:
> > > >
> > > > On Mon, May 27, 2019 at 04:34:57PM +0200, Ard Biesheuvel wrote:
> > > >> On Fri, 24 May 2019 at 06:18, Atish Patra 
> wrote:
> > > >>> Currently, the last stage boot loaders such as U-Boot can accept
> > > >>> only uImage which is an unnecessary additional step in
> > > >>> automating boot process.
> > > >>>
> > > >>> Add an image header that boot loader understands and boot Linux
> > > >>> from flat Image directly.
> > > >>>
> > > >>> This header is based on ARM64 boot image header and provides an
> > > >>> opportunity to combine both ARM64 & RISC-V image headers in
> future.
> > > >>>
> > > >>> Also make sure that PE/COFF header can co-exist in the same
> > > >>> image so that EFI stub can be supported for RISC-V in future.
> > > >>> EFI specification needs PE/COFF image header in the beginning of
> > > >>> the kernel image in order to load it as an EFI application. In
> > > >>> order to support EFI stub, code0 should be replaced with "MZ"
> > > >>> magic string and res4(at offset 0x3c) should point to the rest
> > > >>> of the PE/COFF header (which will be added during EFI support).
> > > > [...]
> > > >>> Documentation/riscv/boot-image-header.txt | 50
> > > ++
> > > >>> arch/riscv/include/asm/image.h| 64
> +++
> > > >>> arch/riscv/kernel/head.S  | 32 
> > > >>> 3 files changed, 146 insertions(+) create mode 100644
> > > >>> Documentation/riscv/boot-image-header.txt
> > > >>> create mode 100644 arch/riscv/include/asm/image.h
> > > >>>
> > > >>> diff --git a/Documentation/riscv/boot-image-header.txt
> > > >>> b/Documentation/riscv/boot-image-header.txt
> > > >>> new file mode 100644
> > > >>> index ..68abc2353cec
> > > >>> --- /dev/null
> > > >>> +++ b/Documentation/riscv/boot-image-header.txt
> > > >>> @@ -0,0 +1,50 @@
> > > >>> +   Boot image header in RISC-V
> > > >>> + Linux
> > > >>> +
> > > >>> + =
> > > >>> +
> > > >>> +Author: Atish Patra  Date  : 20 May 2019
> > > >>> +
> > > >>> +This document only describes the boot image header details for
> > > >>> +RISC-V
> > > Linux.
> > > >>> +The complete booting guide will be available at
> > > Documentation/riscv/booting.txt.
> > > >>> +
> > > >>> +The following 64-byte header is present in decompressed Linux
> > > >>> +kernel
> > > image.
> > > >>> +
> > > >>> +   u32 code0;/* Executable code */
> > > >>> +   u32 code1;/* Executable code */
> > > >>
> > > >> Apologies for not mentioning this in my previous reply, but given
> > > >> that you already know that you will need to put the magic string
> > > >> MZ at offset 0x0, it makes more sense to not put any code there
> > > >> at all, but educate the bootloader that the first executable
> > > >> instruction is at offset 0x20, and put the spare fields right
> > > >> after it in case you ever need more than 2 slots. (On arm64, we
> > > >> were lucky to be able to find an opcode that happened to contain
> > > >> the MZ bit pattern and act almost like a NOP, but it seems silly
> > > >> to rely on that for R

RE: [v4 PATCH] RISC-V: Add an Image header that boot loader can parse.

2019-05-27 Thread Anup Patel


> -Original Message-
> From: Troy Benjegerdes 
> Sent: Tuesday, May 28, 2019 5:11 AM
> To: Karsten Merker 
> Cc: Ard Biesheuvel ; Albert Ou
> ; Jonathan Corbet ; Anup Patel
> ; Zong Li ; Atish Patra
> ; Nick Kossifidis ; Palmer Dabbelt
> ; paul.walms...@sifive.com; linux-
> ri...@lists.infradead.org; marek.va...@gmail.com
> Subject: Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can
> parse.
> 
> 
> 
> > On May 27, 2019, at 5:16 PM, Karsten Merker 
> wrote:
> >
> > On Mon, May 27, 2019 at 04:34:57PM +0200, Ard Biesheuvel wrote:
> >> On Fri, 24 May 2019 at 06:18, Atish Patra  wrote:
> >>> Currently, the last stage boot loaders such as U-Boot can accept
> >>> only uImage which is an unnecessary additional step in automating
> >>> boot process.
> >>>
> >>> Add an image header that boot loader understands and boot Linux from
> >>> flat Image directly.
> >>>
> >>> This header is based on ARM64 boot image header and provides an
> >>> opportunity to combine both ARM64 & RISC-V image headers in future.
> >>>
> >>> Also make sure that PE/COFF header can co-exist in the same image so
> >>> that EFI stub can be supported for RISC-V in future. EFI
> >>> specification needs PE/COFF image header in the beginning of the
> >>> kernel image in order to load it as an EFI application. In order to
> >>> support EFI stub, code0 should be replaced with "MZ" magic string
> >>> and res4(at offset 0x3c) should point to the rest of the PE/COFF
> >>> header (which will be added during EFI support).
> > [...]
> >>> Documentation/riscv/boot-image-header.txt | 50
> ++
> >>> arch/riscv/include/asm/image.h| 64 +++
> >>> arch/riscv/kernel/head.S  | 32 
> >>> 3 files changed, 146 insertions(+)
> >>> create mode 100644 Documentation/riscv/boot-image-header.txt
> >>> create mode 100644 arch/riscv/include/asm/image.h
> >>>
> >>> diff --git a/Documentation/riscv/boot-image-header.txt
> >>> b/Documentation/riscv/boot-image-header.txt
> >>> new file mode 100644
> >>> index ..68abc2353cec
> >>> --- /dev/null
> >>> +++ b/Documentation/riscv/boot-image-header.txt
> >>> @@ -0,0 +1,50 @@
> >>> +   Boot image header in RISC-V Linux
> >>> +
> >>> + =
> >>> +
> >>> +Author: Atish Patra  Date  : 20 May 2019
> >>> +
> >>> +This document only describes the boot image header details for RISC-V
> Linux.
> >>> +The complete booting guide will be available at
> Documentation/riscv/booting.txt.
> >>> +
> >>> +The following 64-byte header is present in decompressed Linux kernel
> image.
> >>> +
> >>> +   u32 code0;/* Executable code */
> >>> +   u32 code1;/* Executable code */
> >>
> >> Apologies for not mentioning this in my previous reply, but given
> >> that you already know that you will need to put the magic string MZ
> >> at offset 0x0, it makes more sense to not put any code there at all,
> >> but educate the bootloader that the first executable instruction is
> >> at offset 0x20, and put the spare fields right after it in case you
> >> ever need more than 2 slots. (On arm64, we were lucky to be able to
> >> find an opcode that happened to contain the MZ bit pattern and act
> >> almost like a NOP, but it seems silly to rely on that for RISC-V as
> >> well)
> >>
> >> So something like
> >>
> >> u16 pe_res1;  /* MZ for EFI bootable images, don't care otherwise */
> >> u8 magic[6];/* "RISCV\0"
> >>
> >> u64 text_offset;  /* Image load offset, little endian */
> >> u64 image_size;   /* Effective Image size, little endian */
> >> u64 flags;/* kernel flags, little endian */
> >>
> >> u32 code0;/* Executable code */
> >> u32 code1;/* Executable code */
> >>
> >> u64 reserved[2]; /* reserved for future use */
> >>
> >> u32 version;  /* Version of this header */
> >> u32 pe_res2; /* Reserved for PE COFF offset */
> >
> > Hello,
> >
> > wouldn&#x

Re: [v4 PATCH] RISC-V: Add an Image header that boot loader can parse.

2019-05-27 Thread Loys Ollivier
On Thu 23 May 2019 at 21:18, Atish Patra  wrote:

> Currently, the last stage boot loaders such as U-Boot can accept only
> uImage which is an unnecessary additional step in automating boot
> process.
>
> Add an image header that boot loader understands and boot Linux from
> flat Image directly.
>
> This header is based on ARM64 boot image header and provides an
> opportunity to combine both ARM64 & RISC-V image headers in future.
>
> Also make sure that PE/COFF header can co-exist in the same image so
> that EFI stub can be supported for RISC-V in future. EFI specification
> needs PE/COFF image header in the beginning of the kernel image in order
> to load it as an EFI application. In order to support EFI stub, code0
> should be replaced with "MZ" magic string and res4(at offset 0x3c)
> should point to the rest of the PE/COFF header (which will be added
> during EFI support).
>
> Tested on both QEMU and HiFive Unleashed using OpenSBI + U-Boot + Linux.

Thanks Atish, happy to have this support that makes the boot process
more straightforward.
Tested on HiFive Unleashed using OpenSBI + U-Boot v2019.07-rc2 + Linux.

>
> Signed-off-by: Atish Patra 
> Reviewed-by: Karsten Merker 
> Tested-by: Karsten Merker  (QEMU+OpenSBI+U-Boot)
Tested-by: Loys Ollivier