Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Andi Kleen wrote: >> >> your patch did not work. See the correction below. The mask should contain >> 1<<1 instead of 1. >> Model 10 is now also included. > > Ok thanks fixed. > For newsetup, did we agree to just go with model >= 6 or (model >= 6 && model <= 10)? Note that newsetup only does the MSR writes if the flags are missing, so my inclination is to leave out model <= 10. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Claas Langbehn wrote: > Hello Andi! >> Can someone please test if this patch works? > it applies cleanly to 2.6.22-rc1-mm1 > > Could you make it also enable C7 CMPXCHG8 (cx8)? > This is because I am getting this error (as written in a diffent posting > on this mailinglist) >> This kernel requires the following features not present on the CPU... >> 0:8 > > Is verify_cpu.S being executed before or after cpucheck.c? Neither (on i386.) cpucheck.c *replaces* verify_cpu.S. On x86-64, verify_cpu.S is still run after in some circumstances, because it's going to be harder to extricate some of the uses of verify_cpu.S. It's still the intention, however. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Christian Volkmann wrote: your patch did not work. See the correction below. The mask should contain 1<<1 instead of 1. Model 10 is now also included. I can confirm that it works now. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Christian Volkmann wrote: Hi Andi, your patch did not work. See the correction below. The mask should contain 1<<1 instead of 1. Model 10 is now also included. I add also a patch for setup.S. It does not print the CPUID message in case the CPUID is wrong, cause %ds was not set proper. Hello Christian, do you know if and how it's possible to enable NX_bit too? Claas - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
On Sat, May 19, 2007 at 01:47:44PM +0200, Andi Kleen wrote: > On Saturday 19 May 2007 08:02, Dave Jones wrote: > > On Sat, May 19, 2007 at 07:53:16AM +0200, Andi Kleen wrote: > > > This preserves the 6 <= model <= 9 logic of the C code; this means > > > if VIA ever brings out model >= 10 it hopefully sets this bit by > > > default. Dave, do you have any information to the contrary? > > > > Model 10 (Esther) has the same feature. > > Hmm nasty. Is it safe to assume that all VIA family == 6 will have that > MSR with the bit doing the same? I would think so yes. Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
On Saturday 19 May 2007 13:42, Christian Volkmann wrote: > Andi Kleen wrote: > > Can someone please test if this patch works? > > > > This preserves the 6 <= model <= 9 logic of the C code; this means > > if VIA ever brings out model >= 10 it hopefully sets this bit by default. > > Dave, do you have any information to the contrary? > > > > -Andi > > Hi Andi, > > your patch did not work. See the correction below. The mask should contain > 1<<1 instead of 1. > Model 10 is now also included. Ok thanks fixed. > I add also a patch for setup.S. It does not print the CPUID message in case > the CPUID is wrong, cause %ds was not set proper. I have this already as a separate patch with your name. -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
On Saturday 19 May 2007 08:02, Dave Jones wrote: > On Sat, May 19, 2007 at 07:53:16AM +0200, Andi Kleen wrote: > > This preserves the 6 <= model <= 9 logic of the C code; this means > > if VIA ever brings out model >= 10 it hopefully sets this bit by > > default. Dave, do you have any information to the contrary? > > Model 10 (Esther) has the same feature. Hmm nasty. Is it safe to assume that all VIA family == 6 will have that MSR with the bit doing the same? Perhaps we need some Centaur contact for guidance on this. Do you have a current one? -Andi (who failed even to find current datasheets on the VIA website) - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Andi Kleen wrote: > Can someone please test if this patch works? > > This preserves the 6 <= model <= 9 logic of the C code; this means > if VIA ever brings out model >= 10 it hopefully sets this bit by default. > Dave, do you have any information to the contrary? > > -Andi > Hi Andi, your patch did not work. See the correction below. The mask should contain 1<<1 instead of 1. Model 10 is now also included. I add also a patch for setup.S. It does not print the CPUID message in case the CPUID is wrong, cause %ds was not set proper. Best regards, Christian Index: linux/arch/i386/kernel/verify_cpu.S === --- linux.orig/arch/i386/kernel/verify_cpu.S +++ linux/arch/i386/kernel/verify_cpu.S @@ -2,6 +2,7 @@ This runs in 16bit mode so that the caller can still use the BIOS to output errors on the screen */ #include +#include verify_cpu: pushfl # Save caller passed flags @@ -45,6 +46,28 @@ cmpl$0x1,%eax jb bad # no cpuid 1 +#if REQUIRED_MASK1 & NEED_CMPXCHG64 + /* Some VIA C3s need magic MSRs to enable CX64. Do this here */ + cmpl$0x746e6543,%ebx# Cent + jne 1f + cmpl$0x48727561,%edx# aurH + jne 1f + cmpl$0x736c7561,%ecx# auls + jne 1f + movl$1,%eax # check model + cpuid + shr $4,%eax + andl$0xf,%eax # get model + cmpl$6,%eax + jb 1f + cmpl$10,%eax # newer vias hopefully don't require + ja 1f # this anymore + movl$MSR_VIA_FCR,%ecx + rdmsr + orl $((1<<1)|(1<<7)),%eax # enable CMPXCHG64 and PGE + wrmsr +1: +#endif movl$0x1,%eax # Does the cpu have what it takes cpuid Index: linux/arch/i386/boot/verify_cpu.S === --- linux.orig/arch/i386/boot/setup.S +++ linux/arch/i386/boot/setup.S @@ -310,12 +310,15 @@ call verify_cpu testl %eax,%eax jz cpu_ok +# missed before: set ds + pushw %cs # CPU too old or CPUID function bits are wrong. + popw%ds # die. lea cpu_panic_mess,%si callprtstr 1: jmp 1b cpu_panic_mess: - .asciz "PANIC: CPU too old for this kernel." +.asciz "PANIC: CPU too old for this kernel or CPUID function bits are wrong." #include "../kernel/verify_cpu.S" - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Christian Volkmann wrote: Christian wrote: Hmm, I really think so...: May I brought up a wrong reason with the command cmpxchg64. But disabling CONFIG_X86_CMPXCHG64 helps. Hi, I found some time to investigate. My resume is: - kernel/verify_cpu.S causes the stop at boot time Cause the required flag for CMPXCHG8B is not set. - boot/setup.S did not print "PANIC: CPU too old for this kernel" ( not visible, also the message did not match ) - VIA C3_2: CMPXCHG8B should work always. Via C3 EBGA Datasheet R1.90 page 30 (3-4) But the bit is not set cause of some early Win NT bugs. - X86_CMPXCHG64 can be set and used. Just verify_cpu.S requires a change to ignore the missing indicator at boot time. My suggestion for the fix is: - kernel/verify_cpu.S should be more tolerant if CONFIG_MVIAC3_2 is set ( see patch below ) - boot/setup.S should be fixed to print out a proper error message ( see below ) - X86_CMPXCHG64 patch(earlier mail in thread ) should not be used. - Important: somebody to check other CPU types if the same behavior happens. I applied the patch on rc2, changed 'if CONFIG_MVIAC3_2' in if CONFIG_MVIAC7' and build a working VIA C7 kernel. -- Hans - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
Hello Andi! Can someone please test if this patch works? it applies cleanly to 2.6.22-rc1-mm1 Could you make it also enable C7 CMPXCHG8 (cx8)? This is because I am getting this error (as written in a diffent posting on this mailinglist) > This kernel requires the following features not present on the CPU... > 0:8 Is verify_cpu.S being executed before or after cpucheck.c? claas - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
On Sat, May 19, 2007 at 07:53:16AM +0200, Andi Kleen wrote: > This preserves the 6 <= model <= 9 logic of the C code; this means > if VIA ever brings out model >= 10 it hopefully sets this bit by default. > Dave, do you have any information to the contrary? Model 10 (Esther) has the same feature. Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II
On Thursday 17 May 2007 02:42, Dave Jones wrote: > On Thu, May 17, 2007 at 02:09:16AM +0200, Christian wrote: > > my small VIA C3_2 box does not boot with 2.6.22-rc1. > > It even does not uncompress the kernel. > > > > The configuration as M386 M486 works. But M586 + MVIAC3_2 > > does not work. > > > > solution for me, cahnge arch/i386/Kconfig.cpu > > > > --- arch/i386/Kconfig.cpu.before 2007-05-17 01:38:26.0 +0200 > > +++ arch/i386/Kconfig.cpu 2007-05-17 00:54:52.0 +0200 > > @@ -299,5 +299,5 @@ > > > > config X86_CMPXCHG64 > > bool > > - depends on !M386 && !M486 > > + depends on !M386 && !M486 && !MVIAC3_2 > > default y > > > > > > The related #ifdef is in ./include/asm-i386/cmpxchg.h > > May be cmpxchg8b is not supported by VIAC3_2 ? > > > > May be some other non Intel/AMD need to be excluded from X86_CMPXCHG64 ? > > May be the generic option CONFIG_X86_GENERIC need to switch this off > > also ? > > The C3s all have cx8, but it needs to be enabled in an MSR first. > (See arch/i386/kernel/cpu/centaur.c , search for CX8) > > Did we add code that uses cmpxchg8b before identify_cpu() gets run ? > I've not been paying attention to .22rc (busy trying to beat .21 into shape > for F7) so I may have missed something obvious. Andi? Can someone please test if this patch works? This preserves the 6 <= model <= 9 logic of the C code; this means if VIA ever brings out model >= 10 it hopefully sets this bit by default. Dave, do you have any information to the contrary? -Andi Index: linux/arch/i386/kernel/verify_cpu.S === --- linux.orig/arch/i386/kernel/verify_cpu.S +++ linux/arch/i386/kernel/verify_cpu.S @@ -2,6 +2,7 @@ This runs in 16bit mode so that the caller can still use the BIOS to output errors on the screen */ #include +#include verify_cpu: pushfl # Save caller passed flags @@ -45,6 +46,28 @@ verify_cpu: cmpl$0x1,%eax jb bad # no cpuid 1 +#if REQUIRED_MASK1 & NEED_CMPXCHG64 + /* Some VIA C3s need magic MSRs to enable CX64. Do this here */ + cmpl$0x746e6543,%ebx# Cent + jne 1f + cmpl$0x48727561,%edx# aurH + jne 1f + cmpl$0x736c7561,%ecx# auls + jne 1f + movl$1,%eax # check model + cpuid + shr $4,%eax + andl$0xf,%eax # get model + cmpl$6,%eax + jb 1f + cmpl$9,%eax # newer vias hopefully don't require + ja 1f # this anymore + movl$MSR_VIA_FCR,%ecx + rdmsr + orl $(1|(1<<7)),%eax# enable CMPXCHG64 and PGE + wrmsr +1: +#endif movl$0x1,%eax # Does the cpu have what it takes cpuid -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Andi Kleen wrote: >> >> The C3s all have cx8, but it needs to be enabled in an MSR first. >> (See arch/i386/kernel/cpu/centaur.c , search for CX8) > > Sigh. I wonder what genius at VIA came up with that setup. > It's very simple, actually. We had to do something similar at Transmeta, because Windows NT 4 was very fond of assuming that certain features meant certain *other* features were enabled, or would just plain crash if it saw a combination that confused it. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Dave Jones wrote:
> On Thu, May 17, 2007 at 11:28:01PM +0200, Christian Volkmann wrote:
> Though, I've *never* seen or even heard of someone with one of those CPUs,
> so whether we need to care is questionable. The mp6 did actually make it
> to manufacture aparently, but I don't think anyone actually bought one.
> http://en.wikipedia.org/wiki/Rise_Technology for a pic of this mythical beast.
>
> Dave
>
> My VIA C7 has the same problem, boots on 486 but not on C3-2 or C7
>
> --
> Hans
I suppose VIA C7 is another candidate for verify_cpu.S
Maybe something like this in assembler might be useful:
if ( ! Intel && ! AMD )
{
andl$~NEED_CMPXCHG64,%edx
}
This would not really harm anything but avoid this problem.
But I just don't know x86 to do this proper.
Christian
-
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Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thu, May 17, 2007 at 11:28:01PM +0200, Christian Volkmann wrote: > - Important: somebody to check other CPU types if the same behavior happens. arch/i386/kernel/cpu/rise.c Though, I've *never* seen or even heard of someone with one of those CPUs, so whether we need to care is questionable. The mp6 did actually make it to manufacture aparently, but I don't think anyone actually bought one. http://en.wikipedia.org/wiki/Rise_Technology for a pic of this mythical beast. Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Christian wrote: Hmm, I really think so...: > > May I brought up a wrong reason with the command cmpxchg64. > But disabling CONFIG_X86_CMPXCHG64 helps. > Hi, I found some time to investigate. My resume is: - kernel/verify_cpu.S causes the stop at boot time Cause the required flag for CMPXCHG8B is not set. - boot/setup.S did not print "PANIC: CPU too old for this kernel" ( not visible, also the message did not match ) - VIA C3_2: CMPXCHG8B should work always. Via C3 EBGA Datasheet R1.90 page 30 (3-4) But the bit is not set cause of some early Win NT bugs. - X86_CMPXCHG64 can be set and used. Just verify_cpu.S requires a change to ignore the missing indicator at boot time. My suggestion for the fix is: - kernel/verify_cpu.S should be more tolerant if CONFIG_MVIAC3_2 is set ( see patch below ) - boot/setup.S should be fixed to print out a proper error message ( see below ) - X86_CMPXCHG64 patch(earlier mail in thread ) should not be used. - Important: somebody to check other CPU types if the same behavior happens. - middle term solution already planed: introduce arch/i386/boot/cpucheck.c To be done by somebody with more detail knowledge than me: (never did x86 assembler before) - I add "# missed before: set ds" => somebody should check if I am right with the way to set. => seems to be a generic error in setup.S not to set "ds" for error messages. - other X86-CPU than AMD (?) or Intel => correct verify_cpu.S or set bits if required. Best regards, Christian --- arch/i386/kernel/verify_cpu.S 2007-05-17 05:17:40.0 +0200 +++ arch/i386/kernel/verify_cpu.S 2007-05-17 23:14:18.266679323 +0200 @@ -54,6 +54,12 @@ andl$REQUIRED_MASK1,%edx xorl$REQUIRED_MASK1,%edx +/* VIAC3 does not report the existing CMPXCHG64 by default. So do not go to bad for CMPXCHG64 for this */ +/* via C3 EBGA datasheet R1.9 tells the command works also without shown bit. */ +#if CONFIG_MVIAC3_2 + andl$~NEED_CMPXCHG64,%edx +#endif + jnz bad #endif /* REQUIRED_MASK1 */ --- arch/i386/boot/setup.S 2007-05-17 21:53:08.009226208 +0200 +++ arch/i386/boot/setup.S 2007-05-17 23:12:36.815989168 +0200 @@ -310,12 +310,15 @@ call verify_cpu testl %eax,%eax jz cpu_ok + # missed before: set ds + movw%cs, %ax# aka SETUPSEG + movw%ax, %ds lea cpu_panic_mess,%si callprtstr 1: jmp 1b cpu_panic_mess: - .asciz "PANIC: CPU too old for this kernel." + .asciz "PANIC: CPU too old for this kernel or CPUID function bits are wrong." #include "../kernel/verify_cpu.S" - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thu, May 17, 2007 at 01:51:34PM +0200, Andi Kleen wrote: > > The C3s all have cx8, but it needs to be enabled in an MSR first. > > (See arch/i386/kernel/cpu/centaur.c , search for CX8) > > Sigh. I wonder what genius at VIA came up with that setup. It was due to some incompatibility with some older Windows variants iirc. > > Did we add code that uses cmpxchg8b before identify_cpu() gets run ? > > I've not been paying attention to .22rc (busy trying to beat .21 into shape > > for F7) so I may have missed something obvious. Andi? > > That would be a bit complicated in pure asm code. > It's probably best to just not require it as in Christian's patch above. > Without SMP support it is not particularly needed anyways; a irq disabling > emulation should work. *nod* Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thursday 17 May 2007 02:42, Dave Jones wrote: > On Thu, May 17, 2007 at 02:09:16AM +0200, Christian wrote: > > my small VIA C3_2 box does not boot with 2.6.22-rc1. > > It even does not uncompress the kernel. > > > > The configuration as M386 M486 works. But M586 + MVIAC3_2 > > does not work. > > > > solution for me, cahnge arch/i386/Kconfig.cpu > > > > --- arch/i386/Kconfig.cpu.before 2007-05-17 01:38:26.0 +0200 > > +++ arch/i386/Kconfig.cpu 2007-05-17 00:54:52.0 +0200 > > @@ -299,5 +299,5 @@ > > > > config X86_CMPXCHG64 > > bool > > - depends on !M386 && !M486 > > + depends on !M386 && !M486 && !MVIAC3_2 > > default y > > > > > > The related #ifdef is in ./include/asm-i386/cmpxchg.h > > May be cmpxchg8b is not supported by VIAC3_2 ? > > > > May be some other non Intel/AMD need to be excluded from X86_CMPXCHG64 ? > > May be the generic option CONFIG_X86_GENERIC need to switch this off > > also ? > > The C3s all have cx8, but it needs to be enabled in an MSR first. > (See arch/i386/kernel/cpu/centaur.c , search for CX8) Sigh. I wonder what genius at VIA came up with that setup. > Did we add code that uses cmpxchg8b before identify_cpu() gets run ? > I've not been paying attention to .22rc (busy trying to beat .21 into shape > for F7) so I may have missed something obvious. Andi? That would be a bit complicated in pure asm code. It's probably best to just not require it as in Christian's patch above. Without SMP support it is not particularly needed anyways; a irq disabling emulation should work. -Andi - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Christian wrote: Hi, my small VIA C3_2 box does not boot with 2.6.22-rc1. It even does not uncompress the kernel. The configuration as M386 M486 works. But M586 + MVIAC3_2 does not work. My VIA C7 has the same problem, boots on 486 but not on C3-2 or C7 -- Hans - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
> > May be some other non Intel/AMD need to be excluded from X86_CMPXCHG64 ? > > May be the generic option CONFIG_X86_GENERIC need to switch this off also ? > > The C3s all have cx8, but it needs to be enabled in an MSR first. > (See arch/i386/kernel/cpu/centaur.c , search for CX8) And on the resume path from S2RAM... - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Dave Jones wrote: > > agreed, though we'll still need something for .22 (I'm assuming your rework > isn't intended for .22) > My suggestion would be to take out the CPU verification code for .22 and merge the rewrite in .23. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Wed, May 16, 2007 at 08:16:11PM -0700, Linus Torvalds wrote: > > > On Wed, 16 May 2007, H. Peter Anvin wrote: > > > > It gets turned on by the code in arch/i386/kernel/cpu. It's just that > > the new code that Andi added runs during setup, i.e. in real mode, so > > *way* earlier than that. > > Ahh. Do we really need it that early? > > Now, it's easy enough to just turn off CONFIG_X86_CMPXCHG64 (it really > should be "8B" instead of "64", but that's another issue) for those > things, and nobody should really care, but still, maybe we could re-do the > early bits to be more polite to those VIA CPU's? > > I thought the cmpxchg8b stuff was just used to page table setup. Do those > things even _support_ PAE? newer models do, yes. Even NX. In fact, primarily for NX. I've not heard of anyone running >4GB with a Nehemiah. Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Wed, May 16, 2007 at 09:51:36PM -0700, H. Peter Anvin wrote: > Linus Torvalds wrote: > > > > On Wed, 16 May 2007, H. Peter Anvin wrote: > >> It gets turned on by the code in arch/i386/kernel/cpu. It's just that > >> the new code that Andi added runs during setup, i.e. in real mode, so > >> *way* earlier than that. > > > > Ahh. Do we really need it that early? > > The reason to do it early is so that we can still get a message out if > the CPU doesn't have the necessary features. This is generic code and > not specific to CX8. > > Since I'm rewriting the setup code in C, I have added code to enable > features on VIA and Transmeta CPUs (there was already code in there to > enable features on AMD; Intel isn't known to hide any features other > than PAE on 400 MHz FSB Pentium-M.) > > I think the early feature detection makes good sense. It's a heckuva > lot nicer to get a message on your screen saying that you can't boot > this kernel on this CPU than a crash, or an early_printk which may never > actually get to you. agreed, though we'll still need something for .22 (I'm assuming your rework isn't intended for .22) Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Linus Torvalds wrote: > > On Wed, 16 May 2007, H. Peter Anvin wrote: >> It gets turned on by the code in arch/i386/kernel/cpu. It's just that >> the new code that Andi added runs during setup, i.e. in real mode, so >> *way* earlier than that. > > Ahh. Do we really need it that early? The reason to do it early is so that we can still get a message out if the CPU doesn't have the necessary features. This is generic code and not specific to CX8. Since I'm rewriting the setup code in C, I have added code to enable features on VIA and Transmeta CPUs (there was already code in there to enable features on AMD; Intel isn't known to hide any features other than PAE on 400 MHz FSB Pentium-M.) I think the early feature detection makes good sense. It's a heckuva lot nicer to get a message on your screen saying that you can't boot this kernel on this CPU than a crash, or an early_printk which may never actually get to you. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Wed, 16 May 2007, H. Peter Anvin wrote: > > It gets turned on by the code in arch/i386/kernel/cpu. It's just that > the new code that Andi added runs during setup, i.e. in real mode, so > *way* earlier than that. Ahh. Do we really need it that early? Now, it's easy enough to just turn off CONFIG_X86_CMPXCHG64 (it really should be "8B" instead of "64", but that's another issue) for those things, and nobody should really care, but still, maybe we could re-do the early bits to be more polite to those VIA CPU's? I thought the cmpxchg8b stuff was just used to page table setup. Do those things even _support_ PAE? What else uses it? Early setup in real mode? What am I missing? My grep powers are waning.. Linus - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Linus Torvalds wrote: > > On Thu, 17 May 2007, Christian wrote: > >> Linus Torvalds wrote: >>> Can you check? The Nehemian (C3-2) should be model 9 or greater. >> Yes, it's a Nehemiah > > Ok. If so, we should blacklist both MCYRIXIII and MVIAC3_2, I suspect. > >> lola:~ # cat /proc/cpuinfo >> flags : fpu vme de pse tsc msr cx8 sep mtrr pge cmov pat mmx fxsr >> sse rng rng_en ace ace_en > > However, it does seem to *claim* to support "cx8" aka cmpxchg8b. What's up > with that? It gets turned on by the code in arch/i386/kernel/cpu. It's just that the new code that Andi added runs during setup, i.e. in real mode, so *way* earlier than that. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thu, 17 May 2007, Christian wrote: > Linus Torvalds wrote: > > Can you check? The Nehemian (C3-2) should be model 9 or greater. > > Yes, it's a Nehemiah Ok. If so, we should blacklist both MCYRIXIII and MVIAC3_2, I suspect. > lola:~ # cat /proc/cpuinfo > flags : fpu vme de pse tsc msr cx8 sep mtrr pge cmov pat mmx fxsr > sse rng rng_en ace ace_en However, it does seem to *claim* to support "cx8" aka cmpxchg8b. What's up with that? Linus - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
H. Peter Anvin wrote: > > Andi added code to verify that we can actually execute on the processor > before protected mode (so we can still get a message out through the > BIOS.) That code presumably doesn't know of the MSR that needs to be > touched. > > That code is in assembly in Andi's version, my rewritten version has it > in C. I should add this code. > The newsetup tree now has code to unmask features on VIA and Transmeta (as well as AMD, which was already in there): http://git.kernel.org/?p=linux/kernel/git/hpa/linux-2.6-newsetup.git;a=commitdiff;h=c9cf55604433b386d0b499ed7bed654fd01c3be2 -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Dave Jones wrote: > The C3s all have cx8, but it needs to be enabled in an MSR first. > (See arch/i386/kernel/cpu/centaur.c , search for CX8) > > Did we add code that uses cmpxchg8b before identify_cpu() gets run ? > I've not been paying attention to .22rc (busy trying to beat .21 into shape > for F7) > so I may have missed something obvious. Andi? > > Dave > May I brought up a wrong reason with the command cmpxchg64. But disabling CONFIG_X86_CMPXCHG64 helps. The via C3 EBGA datasheet R1.9 tells me this command works always: >The CMPXCHG8B instruction is provided and always enabled, however, it appears >disabled in the corresponding >CPUID function bit 0 to avoid a bug in an early version of Windows NT. >However, this default can be changed >via a bit in the FCR MSR. Hmm, I should be able to add a few small "here I am" to the my local boot code with a little hint. Anyway I will try tomorrow to find this on my own. printfs for debugging are more friendly than assembler. H. Peter Anvin wrote: > Andi added code to verify that we can actually execute on the processor > before protected mode (so we can still get a message out through the > BIOS.) That code presumably doesn't know of the MSR that needs to be > touched. Best regards, Christian - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Linus Torvalds wrote: > Can you check? The Nehemian (C3-2) should be model 9 or greater. Yes, it's a Nehemiah lola:~ # cat /proc/cpuinfo processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 9 model name : VIA Nehemiah stepping: 8 cpu MHz : 998.732 cache size : 64 KB fdiv_bug: no hlt_bug : no f00f_bug: no coma_bug: no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr cx8 sep mtrr pge cmov pat mmx fxsr sse rng rng_en ace ace_en bogomips: 1999.51 clflush size: 32 - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
Dave Jones wrote: > > The C3s all have cx8, but it needs to be enabled in an MSR first. > (See arch/i386/kernel/cpu/centaur.c , search for CX8) > > Did we add code that uses cmpxchg8b before identify_cpu() gets run ? > I've not been paying attention to .22rc (busy trying to beat .21 into shape > for F7) > so I may have missed something obvious. Andi? > Andi added code to verify that we can actually execute on the processor before protected mode (so we can still get a message out through the BIOS.) That code presumably doesn't know of the MSR that needs to be touched. That code is in assembly in Andi's version, my rewritten version has it in C. I should add this code. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thu, 17 May 2007, Christian wrote: > > my small VIA C3_2 box does not boot with 2.6.22-rc1. > It even does not uncompress the kernel. > > The configuration as M386 M486 works. But M586 + MVIAC3_2 > does not work. Ahh, from the EPIA HOWTO: 13.2. Is the C3 Pentium compatible? Yes. But Samuel 2, Ezra, Ezra T C3 processors have a problem with the cmpxchg8b (i.e. CMOV) opcode. Nehemiah and Antaur processors are not affected. However, that would imply that you don't have a VIA C3-2 (Nehamiah) at all, but the older original CyrixIII/VIA C3. Can you check? The Nehemian (C3-2) should be model 9 or greater. So afaik, you should use MCYRIXIII, and make _that_ be the one that disables the use of the cmpxchg8b instruction. Can you please verify? Linus - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64
On Thu, May 17, 2007 at 02:09:16AM +0200, Christian wrote: > my small VIA C3_2 box does not boot with 2.6.22-rc1. > It even does not uncompress the kernel. > > The configuration as M386 M486 works. But M586 + MVIAC3_2 > does not work. > > solution for me, cahnge arch/i386/Kconfig.cpu > > --- arch/i386/Kconfig.cpu.before 2007-05-17 01:38:26.0 +0200 > +++ arch/i386/Kconfig.cpu 2007-05-17 00:54:52.0 +0200 > @@ -299,5 +299,5 @@ > > config X86_CMPXCHG64 > bool > - depends on !M386 && !M486 > + depends on !M386 && !M486 && !MVIAC3_2 > default y > > > The related #ifdef is in ./include/asm-i386/cmpxchg.h > May be cmpxchg8b is not supported by VIAC3_2 ? > > May be some other non Intel/AMD need to be excluded from X86_CMPXCHG64 ? > May be the generic option CONFIG_X86_GENERIC need to switch this off also ? The C3s all have cx8, but it needs to be enabled in an MSR first. (See arch/i386/kernel/cpu/centaur.c , search for CX8) Did we add code that uses cmpxchg8b before identify_cpu() gets run ? I've not been paying attention to .22rc (busy trying to beat .21 into shape for F7) so I may have missed something obvious. Andi? Dave -- http://www.codemonkey.org.uk - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
