Re: [PATCH 04/13] dt-bindings: mfd: stm32-timers: remove #address/size cells from required properties
On Thu, 15 Apr 2021 12:10:28 +0200, Alexandre Torgue wrote: > address-cells and size-cells can't be declared as "required" properties > as they are not needed if subnodes don't have a "reg" entry. > > Signed-off-by: Alexandre Torgue > Acked-by: Rob Herring
[tip: timers/core] posix-timers: Preserve return value in clock_adjtime32()
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 2d036dfa5f10df9782f5278fc591d79d283c1fad
Gitweb:
https://git.kernel.org/tip/2d036dfa5f10df9782f5278fc591d79d283c1fad
Author:Chen Jun
AuthorDate:Wed, 14 Apr 2021 03:04:49
Committer: Thomas Gleixner
CommitterDate: Sat, 17 Apr 2021 14:55:06 +02:00
posix-timers: Preserve return value in clock_adjtime32()
The return value on success (>= 0) is overwritten by the return value of
put_old_timex32(). That works correct in the fault case, but is wrong for
the success case where put_old_timex32() returns 0.
Just check the return value of put_old_timex32() and return -EFAULT in case
it is not zero.
[ tglx: Massage changelog ]
Fixes: 3a4d44b61625 ("ntp: Move adjtimex related compat syscalls to native
counterparts")
Signed-off-by: Chen Jun
Signed-off-by: Thomas Gleixner
Reviewed-by: Richard Cochran
Cc: sta...@vger.kernel.org
Link: https://lore.kernel.org/r/20210414030449.90692-1-chenjun...@huawei.com
---
kernel/time/posix-timers.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/time/posix-timers.c b/kernel/time/posix-timers.c
index bf540f5..dd5697d 100644
--- a/kernel/time/posix-timers.c
+++ b/kernel/time/posix-timers.c
@@ -1191,8 +1191,8 @@ SYSCALL_DEFINE2(clock_adjtime32, clockid_t, which_clock,
err = do_clock_adjtime(which_clock, );
- if (err >= 0)
- err = put_old_timex32(utp, );
+ if (err >= 0 && put_old_timex32(utp, ))
+ return -EFAULT;
return err;
}
[tip: timers/core] tick/broadcast: Allow late registered device to enter oneshot mode
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 9c336c9935cff267470bb3aaa85c66fac194b650
Gitweb:
https://git.kernel.org/tip/9c336c9935cff267470bb3aaa85c66fac194b650
Author:Jindong Yue
AuthorDate:Wed, 31 Mar 2021 16:33:18 +08:00
Committer: Thomas Gleixner
CommitterDate: Fri, 16 Apr 2021 21:03:50 +02:00
tick/broadcast: Allow late registered device to enter oneshot mode
The broadcast device is switched to oneshot mode when the system switches
to oneshot mode. If a broadcast clock event device is registered after the
system switched to oneshot mode, it will stay in periodic mode forever.
Ensure that a late registered device which is selected as broadcast device
is initialized in oneshot mode when the system already uses oneshot mode.
[ tglx: Massage changelog ]
Signed-off-by: Jindong Yue
Signed-off-by: Thomas Gleixner
Link: https://lore.kernel.org/r/20210331083318.21794-1-jindong@nxp.com
---
kernel/time/tick-broadcast.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c
index 6ec7855..a440552 100644
--- a/kernel/time/tick-broadcast.c
+++ b/kernel/time/tick-broadcast.c
@@ -107,6 +107,19 @@ void tick_install_broadcast_device(struct
clock_event_device *dev)
tick_broadcast_device.evtdev = dev;
if (!cpumask_empty(tick_broadcast_mask))
tick_broadcast_start_periodic(dev);
+
+ if (!(dev->features & CLOCK_EVT_FEAT_ONESHOT))
+ return;
+
+ /*
+* If the system already runs in oneshot mode, switch the newly
+* registered broadcast device to oneshot mode explicitly.
+*/
+ if (tick_broadcast_oneshot_active()) {
+ tick_broadcast_switch_to_oneshot();
+ return;
+ }
+
/*
* Inform all cpus about this. We might be in a situation
* where we did not switch to oneshot mode because the per cpu
@@ -115,8 +128,7 @@ void tick_install_broadcast_device(struct
clock_event_device *dev)
* notification the systems stays stuck in periodic mode
* forever.
*/
- if (dev->features & CLOCK_EVT_FEAT_ONESHOT)
- tick_clock_notify();
+ tick_clock_notify();
}
/*
[tip: timers/core] tick: Use tick_check_replacement() instead of open coding it
The following commit has been merged into the timers/core branch of tip: Commit-ID: d7840aaadd6e84915866a8f0dab586f6107dadf1 Gitweb: https://git.kernel.org/tip/d7840aaadd6e84915866a8f0dab586f6107dadf1 Author:Wang Wensheng AuthorDate:Fri, 26 Mar 2021 02:23:28 Committer: Thomas Gleixner CommitterDate: Fri, 16 Apr 2021 21:03:50 +02:00 tick: Use tick_check_replacement() instead of open coding it The function tick_check_replacement() is the combination of tick_check_percpu() and tick_check_preferred(), but tick_check_new_device() has the same logic open coded. Use the helper to simplify the code. [ tglx: Massage changelog ] Signed-off-by: Wang Wensheng Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20210326022328.3266-1-wangwenshe...@huawei.com --- kernel/time/tick-common.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c index 9d3a225..e15bc0e 100644 --- a/kernel/time/tick-common.c +++ b/kernel/time/tick-common.c @@ -348,12 +348,7 @@ void tick_check_new_device(struct clock_event_device *newdev) td = _cpu(tick_cpu_device, cpu); curdev = td->evtdev; - /* cpu local device ? */ - if (!tick_check_percpu(curdev, newdev, cpu)) - goto out_bc; - - /* Preference decision */ - if (!tick_check_preferred(curdev, newdev)) + if (!tick_check_replacement(curdev, newdev)) goto out_bc; if (!try_module_get(newdev->owner))
[tip: timers/core] time/timecounter: Mark 1st argument of timecounter_cyc2time() as const
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 07ff4aed015c564d03fd518d2fb54e5e6948903c
Gitweb:
https://git.kernel.org/tip/07ff4aed015c564d03fd518d2fb54e5e6948903c
Author:Marc Kleine-Budde
AuthorDate:Wed, 03 Mar 2021 11:35:44 +01:00
Committer: Thomas Gleixner
CommitterDate: Fri, 16 Apr 2021 21:03:50 +02:00
time/timecounter: Mark 1st argument of timecounter_cyc2time() as const
The timecounter is not modified in this function. Mark it as const.
Signed-off-by: Marc Kleine-Budde
Signed-off-by: Thomas Gleixner
Link: https://lore.kernel.org/r/20210303103544.994855-1-...@pengutronix.de
---
include/linux/timecounter.h | 2 +-
kernel/time/timecounter.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/timecounter.h b/include/linux/timecounter.h
index 754b74a..c6540ce 100644
--- a/include/linux/timecounter.h
+++ b/include/linux/timecounter.h
@@ -124,7 +124,7 @@ extern u64 timecounter_read(struct timecounter *tc);
* This allows conversion of cycle counter values which were generated
* in the past.
*/
-extern u64 timecounter_cyc2time(struct timecounter *tc,
+extern u64 timecounter_cyc2time(const struct timecounter *tc,
u64 cycle_tstamp);
#endif
diff --git a/kernel/time/timecounter.c b/kernel/time/timecounter.c
index 85b98e7..e628528 100644
--- a/kernel/time/timecounter.c
+++ b/kernel/time/timecounter.c
@@ -76,7 +76,7 @@ static u64 cc_cyc2ns_backwards(const struct cyclecounter *cc,
return ns;
}
-u64 timecounter_cyc2time(struct timecounter *tc,
+u64 timecounter_cyc2time(const struct timecounter *tc,
u64 cycle_tstamp)
{
u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask;
Re: [Linux-stm32] [PATCH 04/13] dt-bindings: mfd: stm32-timers: remove #address/size cells from required properties
On 4/15/21 12:10 PM, Alexandre Torgue wrote: > address-cells and size-cells can't be declared as "required" properties > as they are not needed if subnodes don't have a "reg" entry. > > Signed-off-by: Alexandre Torgue > > diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > index 0f16c8864a87..dace35362a7a 100644 > --- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml > +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml Hi Alexandre, Not sure if this matters: patches 3 and 4 could be swapped in the series. Apart from that: Reviewed-by: Fabrice Gasnier Thanks, Fabrice > @@ -119,8 +119,6 @@ patternProperties: >- compatible > > required: > - - "#address-cells" > - - "#size-cells" >- compatible >- reg >- clocks >
[PATCH 04/13] dt-bindings: mfd: stm32-timers: remove #address/size cells from required properties
address-cells and size-cells can't be declared as "required" properties as they are not needed if subnodes don't have a "reg" entry. Signed-off-by: Alexandre Torgue diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml index 0f16c8864a87..dace35362a7a 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml @@ -119,8 +119,6 @@ patternProperties: - compatible required: - - "#address-cells" - - "#size-cells" - compatible - reg - clocks -- 2.17.1
Re: [PATCH 2/5] srcu: Initialize SRCU after timers
On Fri, Apr 09, 2021 at 12:38:59AM +0200, Frederic Weisbecker wrote:
> Once srcu_init() is called, the SRCU core is free to queue delayed
> workqueues, which rely on timers. However init_timers() is called
> several steps after rcu_init(). Any call_srcu() in-between would finish
> its course inside a dangerously uninitialized timer core.
>
> Make sure we stay in early SRCU mode until everything is well settled.
>
> Signed-off-by: Frederic Weisbecker
> Cc: Uladzislau Rezki
> Cc: Boqun Feng
> Cc: Lai Jiangshan
> Cc: Neeraj Upadhyay
> Cc: Josh Triplett
> Cc: Joel Fernandes
Good catches! Apparently not so many people are using SRCU that early
in boot, but good to get it working. I queued this patch and the
preceding one (1/5).
Thanx, Paul
> ---
> include/linux/srcu.h | 6 ++
> init/main.c | 2 ++
> kernel/rcu/rcu.h | 6 --
> kernel/rcu/srcutree.c | 5 +
> kernel/rcu/tiny.c | 1 -
> kernel/rcu/tree.c | 1 -
> 6 files changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/include/linux/srcu.h b/include/linux/srcu.h
> index a0895bbf71ce..e6011a9975af 100644
> --- a/include/linux/srcu.h
> +++ b/include/linux/srcu.h
> @@ -64,6 +64,12 @@ unsigned long get_state_synchronize_srcu(struct
> srcu_struct *ssp);
> unsigned long start_poll_synchronize_srcu(struct srcu_struct *ssp);
> bool poll_state_synchronize_srcu(struct srcu_struct *ssp, unsigned long
> cookie);
>
> +#ifdef CONFIG_SRCU
> +void srcu_init(void);
> +#else /* #ifdef CONFIG_SRCU */
> +static inline void srcu_init(void) { }
> +#endif /* #else #ifdef CONFIG_SRCU */
> +
> #ifdef CONFIG_DEBUG_LOCK_ALLOC
>
> /**
> diff --git a/init/main.c b/init/main.c
> index 53b278845b88..1bc5cc9e52ef 100644
> --- a/init/main.c
> +++ b/init/main.c
> @@ -42,6 +42,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -956,6 +957,7 @@ asmlinkage __visible void __init __no_sanitize_address
> start_kernel(void)
> tick_init();
> rcu_init_nohz();
> init_timers();
> + srcu_init();
> hrtimers_init();
> softirq_init();
> timekeeping_init();
> diff --git a/kernel/rcu/rcu.h b/kernel/rcu/rcu.h
> index d64b842f4078..b3af34068051 100644
> --- a/kernel/rcu/rcu.h
> +++ b/kernel/rcu/rcu.h
> @@ -422,12 +422,6 @@ do {
> \
>
> #endif /* #if defined(CONFIG_SRCU) || !defined(CONFIG_TINY_RCU) */
>
> -#ifdef CONFIG_SRCU
> -void srcu_init(void);
> -#else /* #ifdef CONFIG_SRCU */
> -static inline void srcu_init(void) { }
> -#endif /* #else #ifdef CONFIG_SRCU */
> -
> #ifdef CONFIG_TINY_RCU
> /* Tiny RCU doesn't expedite, as its purpose in life is instead to be tiny.
> */
> static inline bool rcu_gp_is_normal(void) { return true; }
> diff --git a/kernel/rcu/srcutree.c b/kernel/rcu/srcutree.c
> index 10e681ea7051..108f9ca06047 100644
> --- a/kernel/rcu/srcutree.c
> +++ b/kernel/rcu/srcutree.c
> @@ -1384,6 +1384,11 @@ void __init srcu_init(void)
> {
> struct srcu_struct *ssp;
>
> + /*
> + * Once that is set, call_srcu() can follow the normal path and
> + * queue delayed work. This must follow RCU workqueues creation
> + * and timers initialization.
> + */
> srcu_init_done = true;
> while (!list_empty(_boot_list)) {
> ssp = list_first_entry(_boot_list, struct srcu_struct,
> diff --git a/kernel/rcu/tiny.c b/kernel/rcu/tiny.c
> index c8a029fbb114..340b3f8b090d 100644
> --- a/kernel/rcu/tiny.c
> +++ b/kernel/rcu/tiny.c
> @@ -221,5 +221,4 @@ void __init rcu_init(void)
> {
> open_softirq(RCU_SOFTIRQ, rcu_process_callbacks);
> rcu_early_boot_tests();
> - srcu_init();
> }
> diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
> index 5c214705c33f..740f5cd34459 100644
> --- a/kernel/rcu/tree.c
> +++ b/kernel/rcu/tree.c
> @@ -4714,7 +4714,6 @@ void __init rcu_init(void)
> WARN_ON(!rcu_gp_wq);
> rcu_par_gp_wq = alloc_workqueue("rcu_par_gp", WQ_MEM_RECLAIM, 0);
> WARN_ON(!rcu_par_gp_wq);
> - srcu_init();
>
> /* Fill in default value for rcutree.qovld boot parameter. */
> /* -After- the rcu_node ->lock fields are initialized! */
> --
> 2.25.1
>
[tip: timers/core] dt-bindings: timer: ingenic: Add compatible strings for JZ4760(B)
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 507d8c5a418a5d413bf9751d4ff94b259e947736
Gitweb:
https://git.kernel.org/tip/507d8c5a418a5d413bf9751d4ff94b259e947736
Author:Paul Cercueil
AuthorDate:Mon, 08 Mar 2021 21:23:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:23:22 +02:00
dt-bindings: timer: ingenic: Add compatible strings for JZ4760(B)
Add compatible strings to support the system timer, clocksource, OST,
watchdog and PWM blocks of the JZ4760 and JZ4760B SoCs.
Newer SoCs which behave like the JZ4760 or JZ4760B now see their
compatible string require a fallback compatible string that corresponds
to one of these two SoCs.
Signed-off-by: Paul Cercueil
Reviewed-by: Rob Herring
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210308212302.10288-1-p...@crapouillou.net
---
Documentation/devicetree/bindings/timer/ingenic,tcu.yaml | 30 +--
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
index 024bcad..8165df4 100644
--- a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
+++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
@@ -20,6 +20,8 @@ select:
enum:
- ingenic,jz4740-tcu
- ingenic,jz4725b-tcu
+ - ingenic,jz4760-tcu
+ - ingenic,jz4760b-tcu
- ingenic,jz4770-tcu
- ingenic,jz4780-tcu
- ingenic,x1000-tcu
@@ -52,12 +54,15 @@ properties:
- enum:
- ingenic,jz4740-tcu
- ingenic,jz4725b-tcu
- - ingenic,jz4770-tcu
+ - ingenic,jz4760-tcu
- ingenic,x1000-tcu
- const: simple-mfd
- items:
- - const: ingenic,jz4780-tcu
- - const: ingenic,jz4770-tcu
+ - enum:
+ - ingenic,jz4780-tcu
+ - ingenic,jz4770-tcu
+ - ingenic,jz4760b-tcu
+ - const: ingenic,jz4760-tcu
- const: simple-mfd
reg:
@@ -118,6 +123,8 @@ patternProperties:
- items:
- enum:
- ingenic,jz4770-watchdog
+ - ingenic,jz4760b-watchdog
+ - ingenic,jz4760-watchdog
- ingenic,jz4725b-watchdog
- const: ingenic,jz4740-watchdog
@@ -147,6 +154,8 @@ patternProperties:
- ingenic,jz4725b-pwm
- items:
- enum:
+ - ingenic,jz4760-pwm
+ - ingenic,jz4760b-pwm
- ingenic,jz4770-pwm
- ingenic,jz4780-pwm
- const: ingenic,jz4740-pwm
@@ -183,10 +192,15 @@ patternProperties:
oneOf:
- enum:
- ingenic,jz4725b-ost
- - ingenic,jz4770-ost
+ - ingenic,jz4760b-ost
- items:
- - const: ingenic,jz4780-ost
- - const: ingenic,jz4770-ost
+ - const: ingenic,jz4760-ost
+ - const: ingenic,jz4725b-ost
+ - items:
+ - enum:
+ - ingenic,jz4780-ost
+ - ingenic,jz4770-ost
+ - const: ingenic,jz4760b-ost
reg:
maxItems: 1
@@ -226,7 +240,7 @@ examples:
#include
#include
tcu: timer@10002000 {
- compatible = "ingenic,jz4770-tcu", "simple-mfd";
+ compatible = "ingenic,jz4770-tcu", "ingenic,jz4760-tcu", "simple-mfd";
reg = <0x10002000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@@ -272,7 +286,7 @@ examples:
};
ost: timer@e0 {
-compatible = "ingenic,jz4770-ost";
+compatible = "ingenic,jz4770-ost", "ingenic,jz4760b-ost";
reg = <0xe0 0x20>;
clocks = < TCU_CLK_OST>;
[tip: timers/core] dt-bindings: timer: renesas,tmu: Document missing Gen3 SoCs
The following commit has been merged into the timers/core branch of tip: Commit-ID: c4d814416fe3f5eb27438209a83582d7508ba80a Gitweb: https://git.kernel.org/tip/c4d814416fe3f5eb27438209a83582d7508ba80a Author:Niklas Söderlund AuthorDate:Thu, 11 Feb 2021 15:31:02 +01:00 Committer: Daniel Lezcano CommitterDate: Thu, 08 Apr 2021 13:23:21 +02:00 dt-bindings: timer: renesas,tmu: Document missing Gen3 SoCs Add missing bindings for Gen3 SoCs. Signed-off-by: Niklas Söderlund Reviewed-by: Rob Herring Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210211143102.350719-1-niklas.soderlund+rene...@ragnatech.se --- Documentation/devicetree/bindings/timer/renesas,tmu.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml index c541887..f0f0f12 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml @@ -28,8 +28,14 @@ properties: - renesas,tmu-r8a774e1 # RZ/G2H - renesas,tmu-r8a7778 # R-Car M1A - renesas,tmu-r8a7779 # R-Car H1 + - renesas,tmu-r8a7795 # R-Car H3 + - renesas,tmu-r8a7796 # R-Car M3-W + - renesas,tmu-r8a77961 # R-Car M3-W+ + - renesas,tmu-r8a77965 # R-Car M3-N - renesas,tmu-r8a77970 # R-Car V3M - renesas,tmu-r8a77980 # R-Car V3H + - renesas,tmu-r8a77990 # R-Car E3 + - renesas,tmu-r8a77995 # R-Car D3 - const: renesas,tmu reg:
[tip: timers/core] clocksource/drivers/ingenic: Add support for the JZ4760
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8a3f717f35a3e9a28a935f8e4459c72ba00e90ca
Gitweb:
https://git.kernel.org/tip/8a3f717f35a3e9a28a935f8e4459c72ba00e90ca
Author:Paul Cercueil
AuthorDate:Mon, 08 Mar 2021 21:23:01
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:23:22 +02:00
clocksource/drivers/ingenic: Add support for the JZ4760
Add support for the TCU (Timer/Counter Unit) of the JZ4760 and JZ4760B
SoCs.
Signed-off-by: Paul Cercueil
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210308212302.10288-2-p...@crapouillou.net
---
drivers/clocksource/ingenic-timer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clocksource/ingenic-timer.c
b/drivers/clocksource/ingenic-timer.c
index 905fd6b..24ed0f1 100644
--- a/drivers/clocksource/ingenic-timer.c
+++ b/drivers/clocksource/ingenic-timer.c
@@ -264,6 +264,7 @@ static const struct ingenic_soc_info jz4725b_soc_info = {
static const struct of_device_id ingenic_tcu_of_match[] = {
{ .compatible = "ingenic,jz4740-tcu", .data = _soc_info, },
{ .compatible = "ingenic,jz4725b-tcu", .data = _soc_info, },
+ { .compatible = "ingenic,jz4760-tcu", .data = _soc_info, },
{ .compatible = "ingenic,jz4770-tcu", .data = _soc_info, },
{ .compatible = "ingenic,x1000-tcu", .data = _soc_info, },
{ /* sentinel */ }
@@ -358,6 +359,7 @@ err_free_ingenic_tcu:
TIMER_OF_DECLARE(jz4740_tcu_intc, "ingenic,jz4740-tcu", ingenic_tcu_init);
TIMER_OF_DECLARE(jz4725b_tcu_intc, "ingenic,jz4725b-tcu", ingenic_tcu_init);
+TIMER_OF_DECLARE(jz4760_tcu_intc, "ingenic,jz4760-tcu", ingenic_tcu_init);
TIMER_OF_DECLARE(jz4770_tcu_intc, "ingenic,jz4770-tcu", ingenic_tcu_init);
TIMER_OF_DECLARE(x1000_tcu_intc, "ingenic,x1000-tcu", ingenic_tcu_init);
[tip: timers/core] clocksource/drivers/ingenic-ost: Add support for the JZ4760B
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 352408aff91d06fd2f0e35d52079bd0cd70cd29e
Gitweb:
https://git.kernel.org/tip/352408aff91d06fd2f0e35d52079bd0cd70cd29e
Author:Paul Cercueil
AuthorDate:Mon, 08 Mar 2021 21:23:02
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:23:23 +02:00
clocksource/drivers/ingenic-ost: Add support for the JZ4760B
The OST in the JZ4760B SoC works exactly the same as in the JZ4770. But
since the JZ4760B is older, its Device Tree string does not fall back to
the JZ4770 one; so add support for the JZ4760B compatible string here.
Signed-off-by: Paul Cercueil
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210308212302.10288-3-p...@crapouillou.net
---
drivers/clocksource/ingenic-ost.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/ingenic-ost.c
b/drivers/clocksource/ingenic-ost.c
index 029efc2..d2d6646 100644
--- a/drivers/clocksource/ingenic-ost.c
+++ b/drivers/clocksource/ingenic-ost.c
@@ -167,13 +167,14 @@ static const struct ingenic_ost_soc_info
jz4725b_ost_soc_info = {
.is64bit = false,
};
-static const struct ingenic_ost_soc_info jz4770_ost_soc_info = {
+static const struct ingenic_ost_soc_info jz4760b_ost_soc_info = {
.is64bit = true,
};
static const struct of_device_id ingenic_ost_of_match[] = {
{ .compatible = "ingenic,jz4725b-ost", .data = _ost_soc_info, },
- { .compatible = "ingenic,jz4770-ost", .data = _ost_soc_info, },
+ { .compatible = "ingenic,jz4760b-ost", .data = _ost_soc_info, },
+ { .compatible = "ingenic,jz4770-ost", .data = _ost_soc_info, },
{ }
};
[tip: timers/core] dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support
The following commit has been merged into the timers/core branch of tip: Commit-ID: fe8324f37cfebf72e2669e97b9d76ea9794d2972 Gitweb: https://git.kernel.org/tip/fe8324f37cfebf72e2669e97b9d76ea9794d2972 Author:Wolfram Sang AuthorDate:Thu, 11 Mar 2021 10:09:18 +01:00 Committer: Daniel Lezcano CommitterDate: Thu, 08 Apr 2021 13:23:23 +02:00 dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210311090918.2197-1-wsa+rene...@sang-engineering.com --- Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml index 428db3a..363ec28 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml @@ -79,6 +79,7 @@ properties: - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3 - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3 + - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2 - items: @@ -94,6 +95,7 @@ properties: - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3 - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3 + - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2 reg:
[tip: timers/core] clocksource/drivers/pistachio: Fix trivial typo
The following commit has been merged into the timers/core branch of tip:
Commit-ID: a47d7ef4550d08fb428ea4c3f1a9c71674212208
Gitweb:
https://git.kernel.org/tip/a47d7ef4550d08fb428ea4c3f1a9c71674212208
Author:Drew Fustini
AuthorDate:Fri, 05 Mar 2021 01:03:17 -08:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:24:15 +02:00
clocksource/drivers/pistachio: Fix trivial typo
Fix trivial typo, rename local variable from 'overflw' to 'overflow' in
pistachio_clocksource_read_cycles().
Reported-by: Gustavo A. R. Silva
Signed-off-by: Drew Fustini
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210305090315.384547-1-d...@beagleboard.org
---
drivers/clocksource/timer-pistachio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/timer-pistachio.c
b/drivers/clocksource/timer-pistachio.c
index a2dd85d..6f37181 100644
--- a/drivers/clocksource/timer-pistachio.c
+++ b/drivers/clocksource/timer-pistachio.c
@@ -71,7 +71,7 @@ static u64 notrace
pistachio_clocksource_read_cycles(struct clocksource *cs)
{
struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs);
- u32 counter, overflw;
+ u32 counter, overflow;
unsigned long flags;
/*
@@ -80,7 +80,7 @@ pistachio_clocksource_read_cycles(struct clocksource *cs)
*/
raw_spin_lock_irqsave(>lock, flags);
- overflw = gpt_readl(pcs->base, TIMER_CURRENT_OVERFLOW_VALUE, 0);
+ overflow = gpt_readl(pcs->base, TIMER_CURRENT_OVERFLOW_VALUE, 0);
counter = gpt_readl(pcs->base, TIMER_CURRENT_VALUE, 0);
raw_spin_unlock_irqrestore(>lock, flags);
[tip: timers/core] clocksource/drivers/timer-ti-dm: Add missing set_state_oneshot_stopped
The following commit has been merged into the timers/core branch of tip:
Commit-ID: ac4daf737674b4d29e19b7c300caff3bcf7160d8
Gitweb:
https://git.kernel.org/tip/ac4daf737674b4d29e19b7c300caff3bcf7160d8
Author:Tony Lindgren
AuthorDate:Thu, 04 Mar 2021 09:21:35 +02:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:23:47 +02:00
clocksource/drivers/timer-ti-dm: Add missing set_state_oneshot_stopped
To avoid spurious timer interrupts when KTIME_MAX is used, we need to
configure set_state_oneshot_stopped(). Although implementing this is
optional, it still affects things like power management for the extra
timer interrupt.
For more information, please see commit 8fff52fd5093 ("clockevents:
Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state") and commit cf8c5009ee37
("clockevents/drivers/arm_arch_timer: Implement
->set_state_oneshot_stopped()").
Fixes: 52762fbd1c47 ("clocksource/drivers/timer-ti-dm: Add clockevent and
clocksource support")
Signed-off-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210304072135.52712-4-t...@atomide.com
---
drivers/clocksource/timer-ti-dm-systimer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c
b/drivers/clocksource/timer-ti-dm-systimer.c
index 3a65434..186a599 100644
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -554,6 +554,7 @@ static int __init dmtimer_clockevent_init(struct
device_node *np)
dev->set_state_shutdown = dmtimer_clockevent_shutdown;
dev->set_state_periodic = dmtimer_set_periodic;
dev->set_state_oneshot = dmtimer_clockevent_shutdown;
+ dev->set_state_oneshot_stopped = dmtimer_clockevent_shutdown;
dev->tick_resume = dmtimer_clockevent_shutdown;
dev->cpumask = cpu_possible_mask;
[tip: timers/core] clocksource/drivers/timer-ti-dm: Fix posted mode status check order
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 212709926c5493a566ca4086ad4f4b0d4e66b553
Gitweb:
https://git.kernel.org/tip/212709926c5493a566ca4086ad4f4b0d4e66b553
Author:Tony Lindgren
AuthorDate:Thu, 04 Mar 2021 09:21:33 +02:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:23:41 +02:00
clocksource/drivers/timer-ti-dm: Fix posted mode status check order
When the timer is configured in posted mode, we need to check the write-
posted status register (TWPS) before writing to the register.
We now check TWPS after the write starting with commit 52762fbd1c47
("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource
support").
For example, in the TRM for am571x the following is documented in chapter
"22.2.4.13.1.1 Write Posting Synchronization Mode":
"For each register, a status bit is provided in the timer write-posted
status (TWPS) register. In this mode, it is mandatory that software check
this status bit before any write access. If a write is attempted to a
register with a previous access pending, the previous access is discarded
without notice."
The regression happened when I updated the code to use standard read/write
accessors for the driver instead of using __omap_dm_timer_load_start().
We have__omap_dm_timer_load_start() check the TWPS status correctly using
__omap_dm_timer_write().
Fixes: 52762fbd1c47 ("clocksource/drivers/timer-ti-dm: Add clockevent and
clocksource support")
Signed-off-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210304072135.52712-2-t...@atomide.com
---
drivers/clocksource/timer-ti-dm-systimer.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c
b/drivers/clocksource/timer-ti-dm-systimer.c
index 614c838..3a65434 100644
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -449,13 +449,13 @@ static int dmtimer_set_next_event(unsigned long cycles,
struct dmtimer_systimer *t = >t;
void __iomem *pend = t->base + t->pend;
- writel_relaxed(0x - cycles, t->base + t->counter);
while (readl_relaxed(pend) & WP_TCRR)
cpu_relax();
+ writel_relaxed(0x - cycles, t->base + t->counter);
- writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl);
while (readl_relaxed(pend) & WP_TCLR)
cpu_relax();
+ writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl);
return 0;
}
@@ -490,18 +490,18 @@ static int dmtimer_set_periodic(struct clock_event_device
*evt)
dmtimer_clockevent_shutdown(evt);
/* Looks like we need to first set the load value separately */
- writel_relaxed(clkevt->period, t->base + t->load);
while (readl_relaxed(pend) & WP_TLDR)
cpu_relax();
+ writel_relaxed(clkevt->period, t->base + t->load);
- writel_relaxed(clkevt->period, t->base + t->counter);
while (readl_relaxed(pend) & WP_TCRR)
cpu_relax();
+ writel_relaxed(clkevt->period, t->base + t->counter);
- writel_relaxed(OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
- t->base + t->ctrl);
while (readl_relaxed(pend) & WP_TCLR)
cpu_relax();
+ writel_relaxed(OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
+ t->base + t->ctrl);
return 0;
}
[tip: timers/core] dt-bindings: timer: renesas,cmt: Document R8A77961
The following commit has been merged into the timers/core branch of tip: Commit-ID: 446e1a943554e07a4e6431fff6dd06c0f130895a Gitweb: https://git.kernel.org/tip/446e1a943554e07a4e6431fff6dd06c0f130895a Author:Niklas Söderlund AuthorDate:Thu, 11 Feb 2021 15:33:44 +01:00 Committer: Daniel Lezcano CommitterDate: Thu, 08 Apr 2021 13:23:24 +02:00 dt-bindings: timer: renesas,cmt: Document R8A77961 Add missing bindings for M3-W+. Signed-off-by: Niklas Söderlund Reviewed-by: Rob Herring Reviewed-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210211143344.352588-1-niklas.soderlund+rene...@ragnatech.se --- Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml index 363ec28..53dd6d9 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml @@ -74,6 +74,7 @@ properties: - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W + - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+ - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H @@ -90,6 +91,7 @@ properties: - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W + - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+ - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
[tip: timers/core] clocksource/drivers/timer-ti-dm: Prepare to handle dra7 timer wrap issue
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 3efe7a878a11c13b5297057bfc1e5639ce1241ce
Gitweb:
https://git.kernel.org/tip/3efe7a878a11c13b5297057bfc1e5639ce1241ce
Author:Tony Lindgren
AuthorDate:Tue, 23 Mar 2021 09:43:25 +02:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 16:15:54 +02:00
clocksource/drivers/timer-ti-dm: Prepare to handle dra7 timer wrap issue
There is a timer wrap issue on dra7 for the ARM architected timer.
In a typical clock configuration the timer fails to wrap after 388 days.
To work around the issue, we need to use timer-ti-dm timers instead.
Let's prepare for adding support for percpu timers by adding a common
dmtimer_clkevt_init_common() and call it from dmtimer_clockevent_init().
This patch makes no intentional functional changes.
Signed-off-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210323074326.28302-2-t...@atomide.com
---
drivers/clocksource/timer-ti-dm-systimer.c | 66 +
1 file changed, 43 insertions(+), 23 deletions(-)
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c
b/drivers/clocksource/timer-ti-dm-systimer.c
index 186a599..3308031 100644
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -530,17 +530,17 @@ static void omap_clockevent_unidle(struct
clock_event_device *evt)
writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup);
}
-static int __init dmtimer_clockevent_init(struct device_node *np)
+static int __init dmtimer_clkevt_init_common(struct dmtimer_clockevent *clkevt,
+struct device_node *np,
+unsigned int features,
+const struct cpumask *cpumask,
+const char *name,
+int rating)
{
- struct dmtimer_clockevent *clkevt;
struct clock_event_device *dev;
struct dmtimer_systimer *t;
int error;
- clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL);
- if (!clkevt)
- return -ENOMEM;
-
t = >t;
dev = >dev;
@@ -548,25 +548,23 @@ static int __init dmtimer_clockevent_init(struct
device_node *np)
* We mostly use cpuidle_coupled with ARM local timers for runtime,
* so there's probably no use for CLOCK_EVT_FEAT_DYNIRQ here.
*/
- dev->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
- dev->rating = 300;
+ dev->features = features;
+ dev->rating = rating;
dev->set_next_event = dmtimer_set_next_event;
dev->set_state_shutdown = dmtimer_clockevent_shutdown;
dev->set_state_periodic = dmtimer_set_periodic;
dev->set_state_oneshot = dmtimer_clockevent_shutdown;
dev->set_state_oneshot_stopped = dmtimer_clockevent_shutdown;
dev->tick_resume = dmtimer_clockevent_shutdown;
- dev->cpumask = cpu_possible_mask;
+ dev->cpumask = cpumask;
dev->irq = irq_of_parse_and_map(np, 0);
- if (!dev->irq) {
- error = -ENXIO;
- goto err_out_free;
- }
+ if (!dev->irq)
+ return -ENXIO;
error = dmtimer_systimer_setup(np, >t);
if (error)
- goto err_out_free;
+ return error;
clkevt->period = 0x - DIV_ROUND_CLOSEST(t->rate, HZ);
@@ -578,32 +576,54 @@ static int __init dmtimer_clockevent_init(struct
device_node *np)
writel_relaxed(OMAP_TIMER_CTRL_POSTED, t->base + t->ifctrl);
error = request_irq(dev->irq, dmtimer_clockevent_interrupt,
- IRQF_TIMER, "clockevent", clkevt);
+ IRQF_TIMER, name, clkevt);
if (error)
goto err_out_unmap;
writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena);
writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup);
- pr_info("TI gptimer clockevent: %s%lu Hz at %pOF\n",
- of_find_property(np, "ti,timer-alwon", NULL) ?
+ pr_info("TI gptimer %s: %s%lu Hz at %pOF\n",
+ name, of_find_property(np, "ti,timer-alwon", NULL) ?
"always-on " : "", t->rate, np->parent);
- clockevents_config_and_register(dev, t->rate,
+ return 0;
+
+err_out_unmap:
+ iounmap(t->base);
+
+ return error;
+}
+
+static int __init dmtimer_clockevent_init(struct device_node *np)
+{
+ struct dmtimer_clockevent *clkevt;
+ int error;
+
+ clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL);
+ if (!clkevt)
+ return -ENOMEM;
+
+ error = dmti
[tip: timers/core] clocksource/drivers/ingenic_ost: Fix return value check in ingenic_ost_probe()
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 2a65f7e2772613debd03fa2492e76a635aa04545
Gitweb:
https://git.kernel.org/tip/2a65f7e2772613debd03fa2492e76a635aa04545
Author:Wei Yongjun
AuthorDate:Mon, 08 Mar 2021 12:30:31
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:24:15 +02:00
clocksource/drivers/ingenic_ost: Fix return value check in ingenic_ost_probe()
In case of error, the function device_node_to_regmap() returns
ERR_PTR() and never returns NULL. The NULL test in the return
value check should be replaced with IS_ERR().
Fixes: ca7b72b5a5f2 ("clocksource: Add driver for the Ingenic JZ47xx OST")
Reported-by: Hulk Robot
Signed-off-by: Wei Yongjun
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210308123031.2285083-1-weiyongj...@huawei.com
---
drivers/clocksource/ingenic-ost.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/ingenic-ost.c
b/drivers/clocksource/ingenic-ost.c
index d2d6646..06d2575 100644
--- a/drivers/clocksource/ingenic-ost.c
+++ b/drivers/clocksource/ingenic-ost.c
@@ -88,9 +88,9 @@ static int __init ingenic_ost_probe(struct platform_device
*pdev)
return PTR_ERR(ost->regs);
map = device_node_to_regmap(dev->parent->of_node);
- if (!map) {
+ if (IS_ERR(map)) {
dev_err(dev, "regmap not found");
- return -EINVAL;
+ return PTR_ERR(map);
}
ost->clk = devm_clk_get(dev, "ost");
[tip: timers/core] clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 25de4ce5ed02994aea8bc111d133308f6fd62566
Gitweb:
https://git.kernel.org/tip/25de4ce5ed02994aea8bc111d133308f6fd62566
Author:Tony Lindgren
AuthorDate:Tue, 23 Mar 2021 09:43:26 +02:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 16:41:18 +02:00
clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940
There is a timer wrap issue on dra7 for the ARM architected timer.
In a typical clock configuration the timer fails to wrap after 388 days.
To work around the issue, we need to use timer-ti-dm percpu timers instead.
Let's configure dmtimer3 and 4 as percpu timers by default, and warn about
the issue if the dtb is not configured properly.
Let's do this as a single patch so it can be backported to v5.8 and later
kernels easily. Note that this patch depends on earlier timer-ti-dm
systimer posted mode fixes, and a preparatory clockevent patch
"clocksource/drivers/timer-ti-dm: Prepare to handle dra7 timer wrap issue".
For more information, please see the errata for "AM572x Sitara Processors
Silicon Revisions 1.1, 2.0":
https://www.ti.com/lit/er/sprz429m/sprz429m.pdf
The concept is based on earlier reference patches done by Tero Kristo and
Keerthy.
Cc: Keerthy
Cc: Tero Kristo
Signed-off-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210323074326.28302-3-t...@atomide.com
---
arch/arm/boot/dts/dra7-l4.dtsi | 4 +-
arch/arm/boot/dts/dra7.dtsi| 20 ++-
drivers/clocksource/timer-ti-dm-systimer.c | 76 +-
include/linux/cpuhotplug.h | 1 +-
4 files changed, 99 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
index 3bf90d9..a294a02 100644
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -1168,7 +1168,7 @@
};
};
- target-module@34000 { /* 0x48034000, ap 7
46.0 */
+ timer3_target: target-module@34000 {/* 0x48034000, ap 7
46.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
reg = <0x34000 0x4>,
<0x34010 0x4>;
@@ -1195,7 +1195,7 @@
};
};
- target-module@36000 { /* 0x48036000, ap 9
4e.0 */
+ timer4_target: target-module@36000 {/* 0x48036000, ap 9
4e.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
reg = <0x36000 0x4>,
<0x36010 0x4>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index ce11947..53d6878 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -46,6 +46,7 @@
timer {
compatible = "arm,armv7-timer";
+ status = "disabled";/* See ARM architected timer wrap
erratum i940 */
interrupts = ,
,
,
@@ -1241,3 +1242,22 @@
assigned-clock-parents = <_32k_ck>;
};
};
+
+/* Local timers, see ARM architected timer wrap erratum i940 */
+_target {
+ ti,no-reset-on-init;
+ ti,no-idle;
+ timer@0 {
+ assigned-clocks = <_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>;
+ assigned-clock-parents = <_sys_clk_div>;
+ };
+};
+
+_target {
+ ti,no-reset-on-init;
+ ti,no-idle;
+ timer@0 {
+ assigned-clocks = <_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>;
+ assigned-clock-parents = <_sys_clk_div>;
+ };
+};
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c
b/drivers/clocksource/timer-ti-dm-systimer.c
index 3308031..b6f9796 100644
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -2,6 +2,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -630,6 +631,78 @@ err_out_free:
return error;
}
+/* Dmtimer as percpu timer. See dra7 ARM architected timer wrap erratum i940 */
+static DEFINE_PER_CPU(struct dmtimer_clockevent, dmtimer_percpu_timer);
+
+static int __init dmtimer_percpu_timer_init(struct device_node *np, int cpu)
+{
+ struct dmtimer_clockevent *clkevt;
+ int error;
+
+ if (!cpu_possible(cpu))
+ return -EINVAL;
+
+ if (!of_property_read_bool(np->parent, "ti,no-reset-on-init") ||
+ !of_property_read_bool(np->parent, "ti,no-idle"))
+ pr_warn("Incomplete dtb for percpu dmtimer %pOF\n", np->parent);
+
+ clkevt = per_cpu_ptr(_per
[tip: timers/core] clocksource/drivers/dw_apb_timer_of: Add handling for potential memory leak
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 397dc6f7ca3c858dc95800f299357311ccf679e6
Gitweb:
https://git.kernel.org/tip/397dc6f7ca3c858dc95800f299357311ccf679e6
Author:Dinh Nguyen
AuthorDate:Mon, 22 Mar 2021 07:18:44 -05:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:24:53 +02:00
clocksource/drivers/dw_apb_timer_of: Add handling for potential memory leak
Add calls to disable the clock and unmap the timer base address in case
of any failures.
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Dinh Nguyen
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210322121844.2271041-1-dingu...@kernel.org
---
drivers/clocksource/dw_apb_timer_of.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/dw_apb_timer_of.c
b/drivers/clocksource/dw_apb_timer_of.c
index 2b2c3b5..3819ef5 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -52,18 +52,34 @@ static int __init timer_get_base_and_rate(struct
device_node *np,
return 0;
timer_clk = of_clk_get_by_name(np, "timer");
- if (IS_ERR(timer_clk))
- return PTR_ERR(timer_clk);
+ if (IS_ERR(timer_clk)) {
+ ret = PTR_ERR(timer_clk);
+ goto out_pclk_disable;
+ }
ret = clk_prepare_enable(timer_clk);
if (ret)
- return ret;
+ goto out_timer_clk_put;
*rate = clk_get_rate(timer_clk);
- if (!(*rate))
- return -EINVAL;
+ if (!(*rate)) {
+ ret = -EINVAL;
+ goto out_timer_clk_disable;
+ }
return 0;
+
+out_timer_clk_disable:
+ clk_disable_unprepare(timer_clk);
+out_timer_clk_put:
+ clk_put(timer_clk);
+out_pclk_disable:
+ if (!IS_ERR(pclk)) {
+ clk_disable_unprepare(pclk);
+ clk_put(pclk);
+ }
+ iounmap(*base);
+ return ret;
}
static int __init add_clockevent(struct device_node *event_timer)
[tip: timers/core] clocksource/drivers/npcm: Add support for WPCM450
The following commit has been merged into the timers/core branch of tip: Commit-ID: 690daddcb60246d8a510aaad7b954bcc53eba17e Gitweb: https://git.kernel.org/tip/690daddcb60246d8a510aaad7b954bcc53eba17e Author:Jonathan Neuschäfer AuthorDate:Sat, 20 Mar 2021 19:16:06 +01:00 Committer: Daniel Lezcano CommitterDate: Thu, 08 Apr 2021 13:24:16 +02:00 clocksource/drivers/npcm: Add support for WPCM450 Add a compatible string for WPCM450, which has essentially the same timer controller. Signed-off-by: Jonathan Neuschäfer Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210320181610.680870-11-j.neuschae...@gmx.net --- drivers/clocksource/timer-npcm7xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c index 9780ffd..a00520c 100644 --- a/drivers/clocksource/timer-npcm7xx.c +++ b/drivers/clocksource/timer-npcm7xx.c @@ -208,5 +208,6 @@ static int __init npcm7xx_timer_init(struct device_node *np) return 0; } +TIMER_OF_DECLARE(wpcm450, "nuvoton,wpcm450-timer", npcm7xx_timer_init); TIMER_OF_DECLARE(npcm7xx, "nuvoton,npcm750-timer", npcm7xx_timer_init);
[tip: timers/core] clocksource/drivers/sh_cmt: Don't use CMTOUT_IE with R-Car Gen2/3
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 68c70aae06e9660473a00fd7d68e0b53f4d7b6f4
Gitweb:
https://git.kernel.org/tip/68c70aae06e9660473a00fd7d68e0b53f4d7b6f4
Author:Wolfram Sang
AuthorDate:Tue, 09 Mar 2021 10:44:48 +01:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 13:24:16 +02:00
clocksource/drivers/sh_cmt: Don't use CMTOUT_IE with R-Car Gen2/3
CMTOUT_IE is only supported for older SoCs. Newer SoCs shall not set
this bit. So, add a version check.
Reported-by: Phong Hoang
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Niklas Söderlund
Signed-off-by: Wolfram Sang
Signed-off-by: Daniel Lezcano
Link:
https://lore.kernel.org/r/20210309094448.31823-1-wsa+rene...@sang-engineering.com
---
drivers/clocksource/sh_cmt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index c98f885..d7ed99f 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -339,8 +339,9 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch)
sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE |
SH_CMT16_CMCSR_CKS512);
} else {
- sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM |
- SH_CMT32_CMCSR_CMTOUT_IE |
+ u32 cmtout = ch->cmt->info->model <= SH_CMT_48BIT ?
+ SH_CMT32_CMCSR_CMTOUT_IE : 0;
+ sh_cmt_write_cmcsr(ch, cmtout | SH_CMT32_CMCSR_CMM |
SH_CMT32_CMCSR_CMR_IRQ |
SH_CMT32_CMCSR_CKS_RCLK8);
}
[tip: timers/core] dt-bindings: timer: nuvoton,npcm7xx: Add wpcm450-timer
The following commit has been merged into the timers/core branch of tip: Commit-ID: 8120891105ba32b45bc35f7dc07e6d87a8314556 Gitweb: https://git.kernel.org/tip/8120891105ba32b45bc35f7dc07e6d87a8314556 Author:Jonathan Neuschäfer AuthorDate:Sat, 20 Mar 2021 19:16:01 +01:00 Committer: Daniel Lezcano CommitterDate: Thu, 08 Apr 2021 16:41:20 +02:00 dt-bindings: timer: nuvoton,npcm7xx: Add wpcm450-timer Add a compatible string for WPCM450, which has essentially the same timer controller. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210320181610.680870-6-j.neuschae...@gmx.net --- Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt index 97258f1..ac3a5e8 100644 --- a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt +++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt @@ -4,7 +4,8 @@ Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit timer counters. Required properties: -- compatible : "nuvoton,npcm750-timer" for Poleg NPCM750. +- compatible : "nuvoton,npcm750-timer" for Poleg NPCM750, or +"nuvoton,wpcm450-timer" for Hermon WPCM450. - reg : Offset and length of the register set for the device. - interrupts : Contain the timer interrupt of timer 0. - clocks : phandle of timer reference clock (usually a 25 MHz clock).
[tip: timers/core] clocksource/drivers/arm_arch_timer: Add __ro_after_init and __init
The following commit has been merged into the timers/core branch of tip:
Commit-ID: e2bf384d4329bb478ad003eae1ab644756a42266
Gitweb:
https://git.kernel.org/tip/e2bf384d4329bb478ad003eae1ab644756a42266
Author:Jisheng Zhang
AuthorDate:Tue, 30 Mar 2021 14:04:44 +08:00
Committer: Daniel Lezcano
CommitterDate: Thu, 08 Apr 2021 16:41:19 +02:00
clocksource/drivers/arm_arch_timer: Add __ro_after_init and __init
Some functions are not needed after booting, so mark them as __init
to move them to the .init section.
Some global variables are never modified after init, so can be
__ro_after_init.
Signed-off-by: Jisheng Zhang
Acked-by: Marc Zyngier
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210330140444.4fb2a7cb@xhacker.debian
---
drivers/clocksource/arm_arch_timer.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c
b/drivers/clocksource/arm_arch_timer.c
index d017782..1b88596 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -51,7 +51,7 @@
static unsigned arch_timers_present __initdata;
-static void __iomem *arch_counter_base;
+static void __iomem *arch_counter_base __ro_after_init;
struct arch_timer {
void __iomem *base;
@@ -60,15 +60,16 @@ struct arch_timer {
#define to_arch_timer(e) container_of(e, struct arch_timer, evt)
-static u32 arch_timer_rate;
-static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
+static u32 arch_timer_rate __ro_after_init;
+u32 arch_timer_rate1 __ro_after_init;
+static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI] __ro_after_init;
static struct clock_event_device __percpu *arch_timer_evt;
-static enum arch_timer_ppi_nr arch_timer_uses_ppi = ARCH_TIMER_VIRT_PPI;
-static bool arch_timer_c3stop;
-static bool arch_timer_mem_use_virtual;
-static bool arch_counter_suspend_stop;
+static enum arch_timer_ppi_nr arch_timer_uses_ppi __ro_after_init =
ARCH_TIMER_VIRT_PPI;
+static bool arch_timer_c3stop __ro_after_init;
+static bool arch_timer_mem_use_virtual __ro_after_init;
+static bool arch_counter_suspend_stop __ro_after_init;
#ifdef CONFIG_GENERIC_GETTIMEOFDAY
static enum vdso_clock_mode vdso_default = VDSO_CLOCKMODE_ARCHTIMER;
#else
@@ -76,7 +77,7 @@ static enum vdso_clock_mode vdso_default =
VDSO_CLOCKMODE_NONE;
#endif /* CONFIG_GENERIC_GETTIMEOFDAY */
static cpumask_t evtstrm_available = CPU_MASK_NONE;
-static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
+static bool evtstrm_enable __ro_after_init =
IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
static int __init early_evtstrm_cfg(char *buf)
{
@@ -176,7 +177,7 @@ static notrace u64 arch_counter_get_cntvct(void)
* to exist on arm64. arm doesn't use this before DT is probed so even
* if we don't have the cp15 accessors we won't have a problem.
*/
-u64 (*arch_timer_read_counter)(void) = arch_counter_get_cntvct;
+u64 (*arch_timer_read_counter)(void) __ro_after_init = arch_counter_get_cntvct;
EXPORT_SYMBOL_GPL(arch_timer_read_counter);
static u64 arch_counter_read(struct clocksource *cs)
@@ -925,7 +926,7 @@ static int validate_timer_rate(void)
* rate was probed first, and don't verify that others match. If the first node
* probed has a clock-frequency property, this overrides the HW register.
*/
-static void arch_timer_of_configure_rate(u32 rate, struct device_node *np)
+static void __init arch_timer_of_configure_rate(u32 rate, struct device_node
*np)
{
/* Who has more than one independent system counter? */
if (arch_timer_rate)
@@ -939,7 +940,7 @@ static void arch_timer_of_configure_rate(u32 rate, struct
device_node *np)
pr_warn("frequency not available\n");
}
-static void arch_timer_banner(unsigned type)
+static void __init arch_timer_banner(unsigned type)
{
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
type & ARCH_TIMER_TYPE_CP15 ? "cp15" : "",
[PATCH 2/5] srcu: Initialize SRCU after timers
Once srcu_init() is called, the SRCU core is free to queue delayed
workqueues, which rely on timers. However init_timers() is called
several steps after rcu_init(). Any call_srcu() in-between would finish
its course inside a dangerously uninitialized timer core.
Make sure we stay in early SRCU mode until everything is well settled.
Signed-off-by: Frederic Weisbecker
Cc: Uladzislau Rezki
Cc: Boqun Feng
Cc: Lai Jiangshan
Cc: Neeraj Upadhyay
Cc: Josh Triplett
Cc: Joel Fernandes
---
include/linux/srcu.h | 6 ++
init/main.c | 2 ++
kernel/rcu/rcu.h | 6 --
kernel/rcu/srcutree.c | 5 +
kernel/rcu/tiny.c | 1 -
kernel/rcu/tree.c | 1 -
6 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/include/linux/srcu.h b/include/linux/srcu.h
index a0895bbf71ce..e6011a9975af 100644
--- a/include/linux/srcu.h
+++ b/include/linux/srcu.h
@@ -64,6 +64,12 @@ unsigned long get_state_synchronize_srcu(struct srcu_struct
*ssp);
unsigned long start_poll_synchronize_srcu(struct srcu_struct *ssp);
bool poll_state_synchronize_srcu(struct srcu_struct *ssp, unsigned long
cookie);
+#ifdef CONFIG_SRCU
+void srcu_init(void);
+#else /* #ifdef CONFIG_SRCU */
+static inline void srcu_init(void) { }
+#endif /* #else #ifdef CONFIG_SRCU */
+
#ifdef CONFIG_DEBUG_LOCK_ALLOC
/**
diff --git a/init/main.c b/init/main.c
index 53b278845b88..1bc5cc9e52ef 100644
--- a/init/main.c
+++ b/init/main.c
@@ -42,6 +42,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -956,6 +957,7 @@ asmlinkage __visible void __init __no_sanitize_address
start_kernel(void)
tick_init();
rcu_init_nohz();
init_timers();
+ srcu_init();
hrtimers_init();
softirq_init();
timekeeping_init();
diff --git a/kernel/rcu/rcu.h b/kernel/rcu/rcu.h
index d64b842f4078..b3af34068051 100644
--- a/kernel/rcu/rcu.h
+++ b/kernel/rcu/rcu.h
@@ -422,12 +422,6 @@ do {
\
#endif /* #if defined(CONFIG_SRCU) || !defined(CONFIG_TINY_RCU) */
-#ifdef CONFIG_SRCU
-void srcu_init(void);
-#else /* #ifdef CONFIG_SRCU */
-static inline void srcu_init(void) { }
-#endif /* #else #ifdef CONFIG_SRCU */
-
#ifdef CONFIG_TINY_RCU
/* Tiny RCU doesn't expedite, as its purpose in life is instead to be tiny. */
static inline bool rcu_gp_is_normal(void) { return true; }
diff --git a/kernel/rcu/srcutree.c b/kernel/rcu/srcutree.c
index 10e681ea7051..108f9ca06047 100644
--- a/kernel/rcu/srcutree.c
+++ b/kernel/rcu/srcutree.c
@@ -1384,6 +1384,11 @@ void __init srcu_init(void)
{
struct srcu_struct *ssp;
+ /*
+* Once that is set, call_srcu() can follow the normal path and
+* queue delayed work. This must follow RCU workqueues creation
+* and timers initialization.
+*/
srcu_init_done = true;
while (!list_empty(_boot_list)) {
ssp = list_first_entry(_boot_list, struct srcu_struct,
diff --git a/kernel/rcu/tiny.c b/kernel/rcu/tiny.c
index c8a029fbb114..340b3f8b090d 100644
--- a/kernel/rcu/tiny.c
+++ b/kernel/rcu/tiny.c
@@ -221,5 +221,4 @@ void __init rcu_init(void)
{
open_softirq(RCU_SOFTIRQ, rcu_process_callbacks);
rcu_early_boot_tests();
- srcu_init();
}
diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
index 5c214705c33f..740f5cd34459 100644
--- a/kernel/rcu/tree.c
+++ b/kernel/rcu/tree.c
@@ -4714,7 +4714,6 @@ void __init rcu_init(void)
WARN_ON(!rcu_gp_wq);
rcu_par_gp_wq = alloc_workqueue("rcu_par_gp", WQ_MEM_RECLAIM, 0);
WARN_ON(!rcu_par_gp_wq);
- srcu_init();
/* Fill in default value for rcutree.qovld boot parameter. */
/* -After- the rcu_node ->lock fields are initialized! */
--
2.25.1
[tip: timers/core] timekeeping: Allow runtime PM from change_clocksource()
The following commit has been merged into the timers/core branch of tip:
Commit-ID: d4c7c28806616809e3baa0b7cd8c665516b2726d
Gitweb:
https://git.kernel.org/tip/d4c7c28806616809e3baa0b7cd8c665516b2726d
Author:Niklas Söderlund
AuthorDate:Thu, 11 Feb 2021 14:43:18 +01:00
Committer: Thomas Gleixner
CommitterDate: Mon, 29 Mar 2021 16:41:59 +02:00
timekeeping: Allow runtime PM from change_clocksource()
The struct clocksource callbacks enable() and disable() are described as a
way to allow clock sources to enter a power save mode. See commit
4614e6adafa2 ("clocksource: add enable() and disable() callbacks")
But using runtime PM from these callbacks triggers a cyclic lockdep warning when
switching clock source using change_clocksource().
# echo e60f.timer >
/sys/devices/system/clocksource/clocksource0/current_clocksource
==
WARNING: possible circular locking dependency detected
--
migration/0/11 is trying to acquire lock:
403ed220 (>power.lock){-...}-{2:2}, at:
__pm_runtime_resume+0x40/0x74
but task is already holding lock:
8000113c8f88 (tk_core.seq.seqcount){}-{0:0}, at:
multi_cpu_stop+0xa4/0x190
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #2 (tk_core.seq.seqcount){}-{0:0}:
ktime_get+0x28/0xa0
hrtimer_start_range_ns+0x210/0x2dc
generic_sched_clock_init+0x70/0x88
sched_clock_init+0x40/0x64
start_kernel+0x494/0x524
-> #1 (hrtimer_bases.lock){-.-.}-{2:2}:
hrtimer_start_range_ns+0x68/0x2dc
rpm_suspend+0x308/0x5dc
rpm_idle+0xc4/0x2a4
pm_runtime_work+0x98/0xc0
process_one_work+0x294/0x6f0
worker_thread+0x70/0x45c
kthread+0x154/0x160
ret_from_fork+0x10/0x20
-> #0 (>power.lock){-...}-{2:2}:
_raw_spin_lock_irqsave+0x7c/0xc4
__pm_runtime_resume+0x40/0x74
sh_cmt_start+0x1c4/0x260
sh_cmt_clocksource_enable+0x28/0x50
change_clocksource+0x9c/0x160
multi_cpu_stop+0xa4/0x190
cpu_stopper_thread+0x90/0x154
smpboot_thread_fn+0x244/0x270
kthread+0x154/0x160
ret_from_fork+0x10/0x20
other info that might help us debug this:
Chain exists of:
>power.lock --> hrtimer_bases.lock --> tk_core.seq.seqcount
Possible unsafe locking scenario:
CPU0CPU1
lock(tk_core.seq.seqcount);
lock(hrtimer_bases.lock);
lock(tk_core.seq.seqcount);
lock(>power.lock);
*** DEADLOCK ***
2 locks held by migration/0/11:
#0: 8000113c9278 (timekeeper_lock){-.-.}-{2:2}, at:
change_clocksource+0x2c/0x160
#1: 8000113c8f88 (tk_core.seq.seqcount){}-{0:0}, at:
multi_cpu_stop+0xa4/0x190
Rework change_clocksource() so it enables the new clocksource and disables
the old clocksource outside of the timekeeper_lock and seqcount write held
region. There is no requirement that these callbacks are invoked from the
lock held region.
Signed-off-by: Niklas Söderlund
Signed-off-by: Thomas Gleixner
Tested-by: Wolfram Sang
Link:
https://lore.kernel.org/r/20210211134318.323910-1-niklas.soderlund+rene...@ragnatech.se
---
kernel/time/timekeeping.c | 36 +++-
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 77bafd8..81fe2a3 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -1427,35 +1427,45 @@ static void __timekeeping_set_tai_offset(struct
timekeeper *tk, s32 tai_offset)
static int change_clocksource(void *data)
{
struct timekeeper *tk = _core.timekeeper;
- struct clocksource *new, *old;
+ struct clocksource *new, *old = NULL;
unsigned long flags;
+ bool change = false;
new = (struct clocksource *) data;
- raw_spin_lock_irqsave(_lock, flags);
- write_seqcount_begin(_core.seq);
-
- timekeeping_forward_now(tk);
/*
* If the cs is in module, get a module reference. Succeeds
* for built-in code (owner == NULL) as well.
*/
if (try_module_get(new->owner)) {
- if (!new->enable || new->enable(new) == 0) {
- old = tk->tkr_mono.clock;
- tk_setup_internals(tk, new);
- if (old->disable)
- old->disable(old);
- module_put(old->owner);
- } else {
+ if (!new->enable || new->enable(new) == 0)
+ change = true;
Re: [PATCH v2 2/5] dt-bindings: timer: Add compatibles for sun50i timers
On Sun, 21 Mar 2021 23:47:04 -0500, Samuel Holland wrote: > The sun50i SoCs contain timer blocks which are useful as broadcast > clockevent sources. They each have 2 interrupts, matching the A23 > variant, so add the new compatible strings with the A23 compatible > as a fallback. > > Acked-by: Maxime Ripard > Signed-off-by: Samuel Holland > --- > .../timer/allwinner,sun4i-a10-timer.yaml| 17 - > 1 file changed, 12 insertions(+), 5 deletions(-) > Reviewed-by: Rob Herring
Re: [PATCH] selftests/timers: remove unneeded semicolon
On 3/9/21 12:49 AM, Jiapeng Chong wrote: Fix the following coccicheck warnings: ./tools/testing/selftests/timers/nanosleep.c:75:2-3: Unneeded semicolon Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/nanosleep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/nanosleep.c b/tools/testing/selftests/timers/nanosleep.c index 71b5441..433a096 100644 --- a/tools/testing/selftests/timers/nanosleep.c +++ b/tools/testing/selftests/timers/nanosleep.c @@ -72,7 +72,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } Can you send one single patch for all these timers fixes. All of these patches have the same subject line and it is becoming hard to tell them apart. thanks, -- Shuah
Re: [PATCH] selftests/timers: Fix spelling mistake "clocksourc" -> "clocksource"
On 3/15/21 12:41 PM, John Stultz wrote: On Mon, Mar 15, 2021 at 5:33 AM Colin King wrote: From: Colin Ian King There is a spelling mistake in a comment. Fix it. Signed-off-by: Colin Ian King Akcde-yb: John Stultz I kid, I kid! My apologies and thanks! Acked-by: John Stultz Thank you both. Applied now for 5.13-rc1 thanks, -- Shuah
Re: [PATCH] mfd: stm32-timers: avoid clearing auto reload register
On Wed, 03 Mar 2021, Fabrice Gasnier wrote:
> The ARR register is cleared unconditionally upon probing, after the maximum
> value has been read. This initial condition is rather not intuitive, when
> considering the counter child driver. It rather expects the maximum value
> by default:
> - The counter interface shows a zero value by default for 'ceiling'
> attribute.
> - Enabling the counter without any prior configuration makes it doesn't
> count.
>
> The reset value of ARR register is the maximum. So Choice here
> is to backup it, and restore it then, instead of clearing its value.
> It also fixes the initial condition seen by the counter driver.
>
> Fixes: d0f949e220fd ("mfd: Add STM32 Timers driver")
>
> Signed-off-by: Fabrice Gasnier
> ---
> drivers/mfd/stm32-timers.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
[tip: timers/core] timekeeping, clocksource: Fix various typos in comments
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 4bf07f6562a01a488877e05267808da7147f44a5
Gitweb:
https://git.kernel.org/tip/4bf07f6562a01a488877e05267808da7147f44a5
Author:Ingo Molnar
AuthorDate:Mon, 22 Mar 2021 22:39:03 +01:00
Committer: Ingo Molnar
CommitterDate: Mon, 22 Mar 2021 23:06:48 +01:00
timekeeping, clocksource: Fix various typos in comments
Fix ~56 single-word typos in timekeeping & clocksource code comments.
Signed-off-by: Ingo Molnar
Cc: Thomas Gleixner
Cc: John Stultz
Cc: Stephen Boyd
Cc: Daniel Lezcano
Cc: linux-kernel@vger.kernel.org
---
drivers/clocksource/clksrc-dbx500-prcmu.c | 8 ++---
drivers/clocksource/dw_apb_timer_of.c | 2 +-
drivers/clocksource/hyperv_timer.c | 2 +-
drivers/clocksource/timer-atmel-tcb.c | 4 +--
drivers/clocksource/timer-fsl-ftm.c | 2 +-
drivers/clocksource/timer-microchip-pit64b.c| 2 +-
drivers/clocksource/timer-of.c | 4 +--
drivers/clocksource/timer-ti-dm-systimer.c | 2 +-
drivers/clocksource/timer-vf-pit.c | 2 +-
include/linux/clocksource.h | 2 +-
include/linux/timex.h | 2 +-
kernel/time/alarmtimer.c| 6 ++--
kernel/time/clocksource.c | 4 +--
kernel/time/hrtimer.c | 18 ++--
kernel/time/jiffies.c | 2 +-
kernel/time/ntp.c | 2 +-
kernel/time/posix-cpu-timers.c | 6 ++--
kernel/time/tick-broadcast-hrtimer.c| 2 +-
kernel/time/tick-broadcast.c| 4 +--
kernel/time/tick-oneshot.c | 2 +-
kernel/time/tick-sched.c| 2 +-
kernel/time/tick-sched.h| 2 +-
kernel/time/time.c | 2 +-
kernel/time/timekeeping.c | 10 +++
kernel/time/timer.c | 4 +--
kernel/time/vsyscall.c | 2 +-
tools/testing/selftests/timers/clocksource-switch.c | 4 +--
tools/testing/selftests/timers/leap-a-day.c | 2 +-
tools/testing/selftests/timers/leapcrash.c | 4 +--
tools/testing/selftests/timers/threadtest.c | 2 +-
30 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c
b/drivers/clocksource/clksrc-dbx500-prcmu.c
index 996900d..2fc93e4 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -18,7 +18,7 @@
#define RATE_32K 32768
-#define TIMER_MODE_CONTINOUS 0x1
+#define TIMER_MODE_CONTINUOUS 0x1
#define TIMER_DOWNCOUNT_VAL0x
#define PRCMU_TIMER_REF0
@@ -55,13 +55,13 @@ static int __init clksrc_dbx500_prcmu_init(struct
device_node *node)
/*
* The A9 sub system expects the timer to be configured as
-* a continous looping timer.
+* a continuous looping timer.
* The PRCMU should configure it but if it for some reason
* don't we do it here.
*/
if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
- TIMER_MODE_CONTINOUS) {
- writel(TIMER_MODE_CONTINOUS,
+ TIMER_MODE_CONTINUOUS) {
+ writel(TIMER_MODE_CONTINUOUS,
clksrc_dbx500_timer_base + PRCMU_TIMER_MODE);
writel(TIMER_DOWNCOUNT_VAL,
clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
diff --git a/drivers/clocksource/dw_apb_timer_of.c
b/drivers/clocksource/dw_apb_timer_of.c
index 42e7e43..2b2c3b5 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -38,7 +38,7 @@ static int __init timer_get_base_and_rate(struct device_node
*np,
}
/*
-* Not all implementations use a periphal clock, so don't panic
+* Not all implementations use a peripheral clock, so don't panic
* if it's not present
*/
pclk = of_clk_get_by_name(np, "pclk");
diff --git a/drivers/clocksource/hyperv_timer.c
b/drivers/clocksource/hyperv_timer.c
index 269a691..a02b0a2 100644
--- a/drivers/clocksource/hyperv_timer.c
+++ b/drivers/clocksource/hyperv_timer.c
@@ -457,7 +457,7 @@ void __init hv_init_clocksource(void)
{
/*
* Try to set up the TSC page clocksource. If it succeeds, we're
-* done. Otherwise, set up the MSR clocksoruce. At least one of
+* done. Otherwise, set up the MSR clocksource. At least one of
* these will always be available except on very old versions of
* Hyper-V on x86. In that case we won't have a Hyper-V
* clocksource, but Linux
Re: [PATCH] mfd: stm32-timers: avoid clearing auto reload register
On Mon, 22 Mar 2021, Fabrice Gasnier wrote:
> On 3/3/21 6:51 PM, Fabrice Gasnier wrote:
> > The ARR register is cleared unconditionally upon probing, after the maximum
> > value has been read. This initial condition is rather not intuitive, when
> > considering the counter child driver. It rather expects the maximum value
> > by default:
> > - The counter interface shows a zero value by default for 'ceiling'
> > attribute.
> > - Enabling the counter without any prior configuration makes it doesn't
> > count.
> >
> > The reset value of ARR register is the maximum. So Choice here
> > is to backup it, and restore it then, instead of clearing its value.
> > It also fixes the initial condition seen by the counter driver.
> >
> > Fixes: d0f949e220fd ("mfd: Add STM32 Timers driver")
> >
> > Signed-off-by: Fabrice Gasnier
> > ---
> > drivers/mfd/stm32-timers.c | 7 ++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
>
> Hi,
>
> It's just a gentle reminder to review this patch.
Looks like this was either dropped, or didn't make it into my queue.
It's on the list now, I will deal with it soon.
> > diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
> > index add6033..44ed2fc 100644
> > --- a/drivers/mfd/stm32-timers.c
> > +++ b/drivers/mfd/stm32-timers.c
> > @@ -158,13 +158,18 @@ static const struct regmap_config
> > stm32_timers_regmap_cfg = {
> >
> > static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
> > {
> > + u32 arr;
> > +
> > + /* Backup ARR to restore it after getting the maximum value */
> > + regmap_read(ddata->regmap, TIM_ARR, );
> > +
> > /*
> > * Only the available bits will be written so when readback
> > * we get the maximum value of auto reload register
> > */
> > regmap_write(ddata->regmap, TIM_ARR, ~0L);
> > regmap_read(ddata->regmap, TIM_ARR, >max_arr);
> > - regmap_write(ddata->regmap, TIM_ARR, 0x0);
> > + regmap_write(ddata->regmap, TIM_ARR, arr);
> > }
> >
> > static int stm32_timers_dma_probe(struct device *dev,
> >
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
Re: [PATCH] mfd: stm32-timers: avoid clearing auto reload register
On 3/3/21 6:51 PM, Fabrice Gasnier wrote:
> The ARR register is cleared unconditionally upon probing, after the maximum
> value has been read. This initial condition is rather not intuitive, when
> considering the counter child driver. It rather expects the maximum value
> by default:
> - The counter interface shows a zero value by default for 'ceiling'
> attribute.
> - Enabling the counter without any prior configuration makes it doesn't
> count.
>
> The reset value of ARR register is the maximum. So Choice here
> is to backup it, and restore it then, instead of clearing its value.
> It also fixes the initial condition seen by the counter driver.
>
> Fixes: d0f949e220fd ("mfd: Add STM32 Timers driver")
>
> Signed-off-by: Fabrice Gasnier
> ---
> drivers/mfd/stm32-timers.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
Hi,
It's just a gentle reminder to review this patch.
Best Regards,
Fabrice
>
> diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
> index add6033..44ed2fc 100644
> --- a/drivers/mfd/stm32-timers.c
> +++ b/drivers/mfd/stm32-timers.c
> @@ -158,13 +158,18 @@ static const struct regmap_config
> stm32_timers_regmap_cfg = {
>
> static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
> {
> + u32 arr;
> +
> + /* Backup ARR to restore it after getting the maximum value */
> + regmap_read(ddata->regmap, TIM_ARR, );
> +
> /*
>* Only the available bits will be written so when readback
>* we get the maximum value of auto reload register
>*/
> regmap_write(ddata->regmap, TIM_ARR, ~0L);
> regmap_read(ddata->regmap, TIM_ARR, >max_arr);
> - regmap_write(ddata->regmap, TIM_ARR, 0x0);
> + regmap_write(ddata->regmap, TIM_ARR, arr);
> }
>
> static int stm32_timers_dma_probe(struct device *dev,
>
[PATCH v2 2/5] dt-bindings: timer: Add compatibles for sun50i timers
The sun50i SoCs contain timer blocks which are useful as broadcast clockevent sources. They each have 2 interrupts, matching the A23 variant, so add the new compatible strings with the A23 compatible as a fallback. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- .../timer/allwinner,sun4i-a10-timer.yaml| 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml index 3462598e609d..53fd24bdc34e 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml @@ -12,11 +12,18 @@ maintainers: properties: compatible: -enum: - - allwinner,sun4i-a10-timer - - allwinner,sun8i-a23-timer - - allwinner,sun8i-v3s-timer - - allwinner,suniv-f1c100s-timer +oneOf: + - enum: + - allwinner,sun4i-a10-timer + - allwinner,sun8i-a23-timer + - allwinner,sun8i-v3s-timer + - allwinner,suniv-f1c100s-timer + - items: + - enum: + - allwinner,sun50i-a64-timer + - allwinner,sun50i-h6-timer + - allwinner,sun50i-h616-timer + - const: allwinner,sun8i-a23-timer reg: maxItems: 1 -- 2.26.2
[tip: timers/core] time/debug: Remove dentry pointer for debugfs
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 44511ab344c755d1f216bf421e92fbc2777e87fe
Gitweb:
https://git.kernel.org/tip/44511ab344c755d1f216bf421e92fbc2777e87fe
Author:Greg Kroah-Hartman
AuthorDate:Tue, 16 Feb 2021 16:50:20 +01:00
Committer: Thomas Gleixner
CommitterDate: Thu, 18 Mar 2021 11:20:26 +01:00
time/debug: Remove dentry pointer for debugfs
There is no need to keep the dentry pointer around for the created
debugfs file, as it is only needed when removing it from the system.
When it is to be removed, ask debugfs itself for the pointer, to save on
storage and make things a bit simpler.
Signed-off-by: Greg Kroah-Hartman
Signed-off-by: Thomas Gleixner
Link:
https://lore.kernel.org/r/20210216155020.1012407-1-gre...@linuxfoundation.org
---
kernel/time/test_udelay.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/kernel/time/test_udelay.c b/kernel/time/test_udelay.c
index 77c6300..13b11eb 100644
--- a/kernel/time/test_udelay.c
+++ b/kernel/time/test_udelay.c
@@ -21,7 +21,6 @@
#define DEBUGFS_FILENAME "udelay_test"
static DEFINE_MUTEX(udelay_test_lock);
-static struct dentry *udelay_test_debugfs_file;
static int udelay_test_usecs;
static int udelay_test_iterations = DEFAULT_ITERATIONS;
@@ -138,8 +137,8 @@ static const struct file_operations udelay_test_debugfs_ops
= {
static int __init udelay_test_init(void)
{
mutex_lock(_test_lock);
- udelay_test_debugfs_file = debugfs_create_file(DEBUGFS_FILENAME,
- S_IRUSR, NULL, NULL, _test_debugfs_ops);
+ debugfs_create_file(DEBUGFS_FILENAME, S_IRUSR, NULL, NULL,
+ _test_debugfs_ops);
mutex_unlock(_test_lock);
return 0;
@@ -150,7 +149,7 @@ module_init(udelay_test_init);
static void __exit udelay_test_exit(void)
{
mutex_lock(_test_lock);
- debugfs_remove(udelay_test_debugfs_file);
+ debugfs_remove(debugfs_lookup(DEBUGFS_FILENAME, NULL));
mutex_unlock(_test_lock);
}
Re: [PATCH] selftests: timers: remove unneeded semicolon
On Mon, Mar 15, 2021 at 1:08 AM Jiapeng Chong wrote: > > Fix the following coccicheck warnings: > > ./tools/testing/selftests/timers/inconsistency-check.c:75:2-3: Unneeded > semicolon. > > Reported-by: Abaci Robot > Signed-off-by: Jiapeng Chong No objection here. Thanks for sending this along. Acked-by: John Stultz thanks -john
Re: [PATCH] selftests/timers: Fix spelling mistake "clocksourc" -> "clocksource"
On Mon, Mar 15, 2021 at 5:33 AM Colin King wrote: > > From: Colin Ian King > > There is a spelling mistake in a comment. Fix it. > > Signed-off-by: Colin Ian King Akcde-yb: John Stultz I kid, I kid! My apologies and thanks! Acked-by: John Stultz
[PATCH] selftests/timers: Fix spelling mistake "clocksourc" -> "clocksource"
From: Colin Ian King There is a spelling mistake in a comment. Fix it. Signed-off-by: Colin Ian King --- tools/testing/selftests/timers/clocksource-switch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/clocksource-switch.c b/tools/testing/selftests/timers/clocksource-switch.c index bfc974b4572d..2d66abd877e6 100644 --- a/tools/testing/selftests/timers/clocksource-switch.c +++ b/tools/testing/selftests/timers/clocksource-switch.c @@ -3,7 +3,7 @@ * (C) Copyright IBM 2012 * Licensed under the GPLv2 * - * NOTE: This is a meta-test which quickly changes the clocksourc and + * NOTE: This is a meta-test which quickly changes the clocksource and * then uses other tests to detect problems. Thus this test requires * that the inconsistency-check and nanosleep tests be present in the * same directory it is run from. -- 2.30.2
Re: [PATCH 2/5] dt-bindings: timer: Add compatibles for sun50i timers
On Sun, Mar 14, 2021 at 11:32:47PM -0500, Samuel Holland wrote: > The sun50i SoCs contain timer blocks which are useful as broadcast > clockevent sources. They each have 2 interrupts, matching the A23 > variant, so add the new compatible strings with the A23 compatible > as a fallback. > > Signed-off-by: Samuel Holland Acked-by: Maxime Ripard Thanks! Maxime signature.asc Description: PGP signature
[PATCH] selftests: timers: remove unneeded semicolon
Fix the following coccicheck warnings: ./tools/testing/selftests/timers/inconsistency-check.c:75:2-3: Unneeded semicolon. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/inconsistency-check.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/inconsistency-check.c b/tools/testing/selftests/timers/inconsistency-check.c index 022d3ff..e6756d9 100644 --- a/tools/testing/selftests/timers/inconsistency-check.c +++ b/tools/testing/selftests/timers/inconsistency-check.c @@ -72,7 +72,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } -- 1.8.3.1
[PATCH 2/5] dt-bindings: timer: Add compatibles for sun50i timers
The sun50i SoCs contain timer blocks which are useful as broadcast clockevent sources. They each have 2 interrupts, matching the A23 variant, so add the new compatible strings with the A23 compatible as a fallback. Signed-off-by: Samuel Holland --- .../timer/allwinner,sun4i-a10-timer.yaml| 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml index 3462598e609d..53fd24bdc34e 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml @@ -12,11 +12,18 @@ maintainers: properties: compatible: -enum: - - allwinner,sun4i-a10-timer - - allwinner,sun8i-a23-timer - - allwinner,sun8i-v3s-timer - - allwinner,suniv-f1c100s-timer +oneOf: + - enum: + - allwinner,sun4i-a10-timer + - allwinner,sun8i-a23-timer + - allwinner,sun8i-v3s-timer + - allwinner,suniv-f1c100s-timer + - items: + - enum: + - allwinner,sun50i-a64-timer + - allwinner,sun50i-h6-timer + - allwinner,sun50i-h616-timer + - const: allwinner,sun8i-a23-timer reg: maxItems: 1 -- 2.26.2
Re: [GIT pull] timers/urgent for v5.12-rc3
The pull request you sent on Sun, 14 Mar 2021 15:40:00 -: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > timers-urgent-2021-03-14 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/802b31c0dd7f44c9ab44d39c6c4af22d958ad803 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[GIT pull] timers/urgent for v5.12-rc3
Linus,
please pull the latest timers/urgent branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-urgent-2021-03-14
up to: 46eb1701c046: hrtimer: Update softirq_expires_next correctly after
__hrtimer_get_next_event()
A single fix in for hrtimers to prevent an interrupt storm caused by the
lack of reevaluation of the timers which expire in softirq context under
certain circumstances, e.g. when the clock was set.
Thanks,
tglx
-->
Anna-Maria Behnsen (1):
hrtimer: Update softirq_expires_next correctly after
__hrtimer_get_next_event()
kernel/time/hrtimer.c | 60 +--
1 file changed, 39 insertions(+), 21 deletions(-)
diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
index 743c852e10f2..788b9d137de4 100644
--- a/kernel/time/hrtimer.c
+++ b/kernel/time/hrtimer.c
@@ -546,8 +546,11 @@ static ktime_t __hrtimer_next_event_base(struct
hrtimer_cpu_base *cpu_base,
}
/*
- * Recomputes cpu_base::*next_timer and returns the earliest expires_next but
- * does not set cpu_base::*expires_next, that is done by hrtimer_reprogram.
+ * Recomputes cpu_base::*next_timer and returns the earliest expires_next
+ * but does not set cpu_base::*expires_next, that is done by
+ * hrtimer[_force]_reprogram and hrtimer_interrupt only. When updating
+ * cpu_base::*expires_next right away, reprogramming logic would no longer
+ * work.
*
* When a softirq is pending, we can ignore the HRTIMER_ACTIVE_SOFT bases,
* those timers will get run whenever the softirq gets handled, at the end of
@@ -588,6 +591,37 @@ __hrtimer_get_next_event(struct hrtimer_cpu_base
*cpu_base, unsigned int active_
return expires_next;
}
+static ktime_t hrtimer_update_next_event(struct hrtimer_cpu_base *cpu_base)
+{
+ ktime_t expires_next, soft = KTIME_MAX;
+
+ /*
+* If the soft interrupt has already been activated, ignore the
+* soft bases. They will be handled in the already raised soft
+* interrupt.
+*/
+ if (!cpu_base->softirq_activated) {
+ soft = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_SOFT);
+ /*
+* Update the soft expiry time. clock_settime() might have
+* affected it.
+*/
+ cpu_base->softirq_expires_next = soft;
+ }
+
+ expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_HARD);
+ /*
+* If a softirq timer is expiring first, update cpu_base->next_timer
+* and program the hardware with the soft expiry time.
+*/
+ if (expires_next > soft) {
+ cpu_base->next_timer = cpu_base->softirq_next_timer;
+ expires_next = soft;
+ }
+
+ return expires_next;
+}
+
static inline ktime_t hrtimer_update_base(struct hrtimer_cpu_base *base)
{
ktime_t *offs_real = >clock_base[HRTIMER_BASE_REALTIME].offset;
@@ -628,23 +662,7 @@ hrtimer_force_reprogram(struct hrtimer_cpu_base *cpu_base,
int skip_equal)
{
ktime_t expires_next;
- /*
-* Find the current next expiration time.
-*/
- expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_ALL);
-
- if (cpu_base->next_timer && cpu_base->next_timer->is_soft) {
- /*
-* When the softirq is activated, hrtimer has to be
-* programmed with the first hard hrtimer because soft
-* timer interrupt could occur too late.
-*/
- if (cpu_base->softirq_activated)
- expires_next = __hrtimer_get_next_event(cpu_base,
-
HRTIMER_ACTIVE_HARD);
- else
- cpu_base->softirq_expires_next = expires_next;
- }
+ expires_next = hrtimer_update_next_event(cpu_base);
if (skip_equal && expires_next == cpu_base->expires_next)
return;
@@ -1644,8 +1662,8 @@ void hrtimer_interrupt(struct clock_event_device *dev)
__hrtimer_run_queues(cpu_base, now, flags, HRTIMER_ACTIVE_HARD);
- /* Reevaluate the clock bases for the next expiry */
- expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_ALL);
+ /* Reevaluate the clock bases for the [soft] next expiry */
+ expires_next = hrtimer_update_next_event(cpu_base);
/*
* Store the new expiry value so the migration code can verify
* against it.
[PATCH] selftests/timers: remove unneeded semicolon
Fix the following coccicheck warnings: ./tools/testing/selftests/timers/nanosleep.c:75:2-3: Unneeded semicolon Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/nanosleep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/nanosleep.c b/tools/testing/selftests/timers/nanosleep.c index 71b5441..433a096 100644 --- a/tools/testing/selftests/timers/nanosleep.c +++ b/tools/testing/selftests/timers/nanosleep.c @@ -72,7 +72,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } -- 1.8.3.1
[tip: timers/urgent] hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 46eb1701c046cc18c032fa68f3c8ccbf24483ee4
Gitweb:
https://git.kernel.org/tip/46eb1701c046cc18c032fa68f3c8ccbf24483ee4
Author:Anna-Maria Behnsen
AuthorDate:Tue, 23 Feb 2021 17:02:40 +01:00
Committer: Ingo Molnar
CommitterDate: Mon, 08 Mar 2021 09:37:01 +01:00
hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
hrtimer_force_reprogram() and hrtimer_interrupt() invokes
__hrtimer_get_next_event() to find the earliest expiry time of hrtimer
bases. __hrtimer_get_next_event() does not update
cpu_base::[softirq_]_expires_next to preserve reprogramming logic. That
needs to be done at the callsites.
hrtimer_force_reprogram() updates cpu_base::softirq_expires_next only when
the first expiring timer is a softirq timer and the soft interrupt is not
activated. That's wrong because cpu_base::softirq_expires_next is left
stale when the first expiring timer of all bases is a timer which expires
in hard interrupt context. hrtimer_interrupt() does never update
cpu_base::softirq_expires_next which is wrong too.
That becomes a problem when clock_settime() sets CLOCK_REALTIME forward and
the first soft expiring timer is in the CLOCK_REALTIME_SOFT base. Setting
CLOCK_REALTIME forward moves the clock MONOTONIC based expiry time of that
timer before the stale cpu_base::softirq_expires_next.
cpu_base::softirq_expires_next is cached to make the check for raising the
soft interrupt fast. In the above case the soft interrupt won't be raised
until clock monotonic reaches the stale cpu_base::softirq_expires_next
value. That's incorrect, but what's worse it that if the softirq timer
becomes the first expiring timer of all clock bases after the hard expiry
timer has been handled the reprogramming of the clockevent from
hrtimer_interrupt() will result in an interrupt storm. That happens because
the reprogramming does not use cpu_base::softirq_expires_next, it uses
__hrtimer_get_next_event() which returns the actual expiry time. Once clock
MONOTONIC reaches cpu_base::softirq_expires_next the soft interrupt is
raised and the storm subsides.
Change the logic in hrtimer_force_reprogram() to evaluate the soft and hard
bases seperately, update softirq_expires_next and handle the case when a
soft expiring timer is the first of all bases by comparing the expiry times
and updating the required cpu base fields. Split this functionality into a
separate function to be able to use it in hrtimer_interrupt() as well
without copy paste.
Fixes: 5da70160462e ("hrtimer: Implement support for softirq based hrtimers")
Reported-by: Mikael Beckius
Suggested-by: Thomas Gleixner
Tested-by: Mikael Beckius
Signed-off-by: Anna-Maria Behnsen
Signed-off-by: Thomas Gleixner
Signed-off-by: Ingo Molnar
Link: https://lore.kernel.org/r/20210223160240.27518-1-anna-ma...@linutronix.de
---
kernel/time/hrtimer.c | 60 +++---
1 file changed, 39 insertions(+), 21 deletions(-)
diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
index 743c852..788b9d1 100644
--- a/kernel/time/hrtimer.c
+++ b/kernel/time/hrtimer.c
@@ -546,8 +546,11 @@ static ktime_t __hrtimer_next_event_base(struct
hrtimer_cpu_base *cpu_base,
}
/*
- * Recomputes cpu_base::*next_timer and returns the earliest expires_next but
- * does not set cpu_base::*expires_next, that is done by hrtimer_reprogram.
+ * Recomputes cpu_base::*next_timer and returns the earliest expires_next
+ * but does not set cpu_base::*expires_next, that is done by
+ * hrtimer[_force]_reprogram and hrtimer_interrupt only. When updating
+ * cpu_base::*expires_next right away, reprogramming logic would no longer
+ * work.
*
* When a softirq is pending, we can ignore the HRTIMER_ACTIVE_SOFT bases,
* those timers will get run whenever the softirq gets handled, at the end of
@@ -588,6 +591,37 @@ __hrtimer_get_next_event(struct hrtimer_cpu_base
*cpu_base, unsigned int active_
return expires_next;
}
+static ktime_t hrtimer_update_next_event(struct hrtimer_cpu_base *cpu_base)
+{
+ ktime_t expires_next, soft = KTIME_MAX;
+
+ /*
+* If the soft interrupt has already been activated, ignore the
+* soft bases. They will be handled in the already raised soft
+* interrupt.
+*/
+ if (!cpu_base->softirq_activated) {
+ soft = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_SOFT);
+ /*
+* Update the soft expiry time. clock_settime() might have
+* affected it.
+*/
+ cpu_base->softirq_expires_next = soft;
+ }
+
+ expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_HARD);
+ /*
+* If a softirq timer is expiring first, update cpu_base->next_timer
+* and program the hardware with the soft expiry time.
+*/
+ if (
[tip: timers/urgent] hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: eca8f0c80a005aea84df507a446fc0154fc55a32
Gitweb:
https://git.kernel.org/tip/eca8f0c80a005aea84df507a446fc0154fc55a32
Author:Anna-Maria Behnsen
AuthorDate:Tue, 23 Feb 2021 17:02:40 +01:00
Committer: Ingo Molnar
CommitterDate: Sat, 06 Mar 2021 12:53:47 +01:00
hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
hrtimer_force_reprogram() and hrtimer_interrupt() invokes
__hrtimer_get_next_event() to find the earliest expiry time of hrtimer
bases. __hrtimer_get_next_event() does not update
cpu_base::[softirq_]_expires_next to preserve reprogramming logic. That
needs to be done at the callsites.
hrtimer_force_reprogram() updates cpu_base::softirq_expires_next only when
the first expiring timer is a softirq timer and the soft interrupt is not
activated. That's wrong because cpu_base::softirq_expires_next is left
stale when the first expiring timer of all bases is a timer which expires
in hard interrupt context. hrtimer_interrupt() does never update
cpu_base::softirq_expires_next which is wrong too.
That becomes a problem when clock_settime() sets CLOCK_REALTIME forward and
the first soft expiring timer is in the CLOCK_REALTIME_SOFT base. Setting
CLOCK_REALTIME forward moves the clock MONOTONIC based expiry time of that
timer before the stale cpu_base::softirq_expires_next.
cpu_base::softirq_expires_next is cached to make the check for raising the
soft interrupt fast. In the above case the soft interrupt won't be raised
until clock monotonic reaches the stale cpu_base::softirq_expires_next
value. That's incorrect, but what's worse it that if the softirq timer
becomes the first expiring timer of all clock bases after the hard expiry
timer has been handled the reprogramming of the clockevent from
hrtimer_interrupt() will result in an interrupt storm. That happens because
the reprogramming does not use cpu_base::softirq_expires_next, it uses
__hrtimer_get_next_event() which returns the actual expiry time. Once clock
MONOTONIC reaches cpu_base::softirq_expires_next the soft interrupt is
raised and the storm subsides.
Change the logic in hrtimer_force_reprogram() to evaluate the soft and hard
bases seperately, update softirq_expires_next and handle the case when a
soft expiring timer is the first of all bases by comparing the expiry times
and updating the required cpu base fields. Split this functionality into a
separate function to be able to use it in hrtimer_interrupt() as well
without copy paste.
Fixes: da70160462e ("hrtimer: Implement support for softirq based hrtimers")
Reported-by: Mikael Beckius
Suggested-by: Thomas Gleixner
Tested-by: Mikael Beckius
Signed-off-by: Anna-Maria Behnsen
Signed-off-by: Thomas Gleixner
Signed-off-by: Ingo Molnar
Link: https://lore.kernel.org/r/20210223160240.27518-1-anna-ma...@linutronix.de
---
kernel/time/hrtimer.c | 60 +++---
1 file changed, 39 insertions(+), 21 deletions(-)
diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
index 743c852..788b9d1 100644
--- a/kernel/time/hrtimer.c
+++ b/kernel/time/hrtimer.c
@@ -546,8 +546,11 @@ static ktime_t __hrtimer_next_event_base(struct
hrtimer_cpu_base *cpu_base,
}
/*
- * Recomputes cpu_base::*next_timer and returns the earliest expires_next but
- * does not set cpu_base::*expires_next, that is done by hrtimer_reprogram.
+ * Recomputes cpu_base::*next_timer and returns the earliest expires_next
+ * but does not set cpu_base::*expires_next, that is done by
+ * hrtimer[_force]_reprogram and hrtimer_interrupt only. When updating
+ * cpu_base::*expires_next right away, reprogramming logic would no longer
+ * work.
*
* When a softirq is pending, we can ignore the HRTIMER_ACTIVE_SOFT bases,
* those timers will get run whenever the softirq gets handled, at the end of
@@ -588,6 +591,37 @@ __hrtimer_get_next_event(struct hrtimer_cpu_base
*cpu_base, unsigned int active_
return expires_next;
}
+static ktime_t hrtimer_update_next_event(struct hrtimer_cpu_base *cpu_base)
+{
+ ktime_t expires_next, soft = KTIME_MAX;
+
+ /*
+* If the soft interrupt has already been activated, ignore the
+* soft bases. They will be handled in the already raised soft
+* interrupt.
+*/
+ if (!cpu_base->softirq_activated) {
+ soft = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_SOFT);
+ /*
+* Update the soft expiry time. clock_settime() might have
+* affected it.
+*/
+ cpu_base->softirq_expires_next = soft;
+ }
+
+ expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_HARD);
+ /*
+* If a softirq timer is expiring first, update cpu_base->next_timer
+* and program the hardware with the soft expiry time.
+*/
+ if (
[PATCH] selftests: timers: set-timer-lat: remove unneeded semicolon
Fix the following coccicheck warnings: ./tools/testing/selftests/timers/set-timer-lat.c:83:2-3: Unneeded semicolon. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/set-timer-lat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/set-timer-lat.c b/tools/testing/selftests/timers/set-timer-lat.c index 50da454..d60bbca 100644 --- a/tools/testing/selftests/timers/set-timer-lat.c +++ b/tools/testing/selftests/timers/set-timer-lat.c @@ -80,7 +80,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } -- 1.8.3.1
Re: [PATCH] mfd: stm32-timers: avoid clearing auto reload register
On Wed, Mar 03, 2021 at 06:51:35PM +0100, Fabrice Gasnier wrote:
> The ARR register is cleared unconditionally upon probing, after the maximum
> value has been read. This initial condition is rather not intuitive, when
> considering the counter child driver. It rather expects the maximum value
> by default:
> - The counter interface shows a zero value by default for 'ceiling'
> attribute.
> - Enabling the counter without any prior configuration makes it doesn't
> count.
>
> The reset value of ARR register is the maximum. So Choice here
> is to backup it, and restore it then, instead of clearing its value.
> It also fixes the initial condition seen by the counter driver.
>
> Fixes: d0f949e220fd ("mfd: Add STM32 Timers driver")
>
> Signed-off-by: Fabrice Gasnier
Acked-by: William Breathitt Gray
> ---
> drivers/mfd/stm32-timers.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
> index add6033..44ed2fc 100644
> --- a/drivers/mfd/stm32-timers.c
> +++ b/drivers/mfd/stm32-timers.c
> @@ -158,13 +158,18 @@ static const struct regmap_config
> stm32_timers_regmap_cfg = {
>
> static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
> {
> + u32 arr;
> +
> + /* Backup ARR to restore it after getting the maximum value */
> + regmap_read(ddata->regmap, TIM_ARR, );
> +
> /*
>* Only the available bits will be written so when readback
>* we get the maximum value of auto reload register
>*/
> regmap_write(ddata->regmap, TIM_ARR, ~0L);
> regmap_read(ddata->regmap, TIM_ARR, >max_arr);
> - regmap_write(ddata->regmap, TIM_ARR, 0x0);
> + regmap_write(ddata->regmap, TIM_ARR, arr);
> }
>
> static int stm32_timers_dma_probe(struct device *dev,
> --
> 2.7.4
>
signature.asc
Description: PGP signature
[PATCH] mfd: stm32-timers: avoid clearing auto reload register
The ARR register is cleared unconditionally upon probing, after the maximum
value has been read. This initial condition is rather not intuitive, when
considering the counter child driver. It rather expects the maximum value
by default:
- The counter interface shows a zero value by default for 'ceiling'
attribute.
- Enabling the counter without any prior configuration makes it doesn't
count.
The reset value of ARR register is the maximum. So Choice here
is to backup it, and restore it then, instead of clearing its value.
It also fixes the initial condition seen by the counter driver.
Fixes: d0f949e220fd ("mfd: Add STM32 Timers driver")
Signed-off-by: Fabrice Gasnier
---
drivers/mfd/stm32-timers.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
index add6033..44ed2fc 100644
--- a/drivers/mfd/stm32-timers.c
+++ b/drivers/mfd/stm32-timers.c
@@ -158,13 +158,18 @@ static const struct regmap_config stm32_timers_regmap_cfg
= {
static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
{
+ u32 arr;
+
+ /* Backup ARR to restore it after getting the maximum value */
+ regmap_read(ddata->regmap, TIM_ARR, );
+
/*
* Only the available bits will be written so when readback
* we get the maximum value of auto reload register
*/
regmap_write(ddata->regmap, TIM_ARR, ~0L);
regmap_read(ddata->regmap, TIM_ARR, >max_arr);
- regmap_write(ddata->regmap, TIM_ARR, 0x0);
+ regmap_write(ddata->regmap, TIM_ARR, arr);
}
static int stm32_timers_dma_probe(struct device *dev,
--
2.7.4
RE: Upper bound mode for kernel timers
From: Josh Poimboeuf
> Sent: 02 March 2021 00:11
>
> We had a report of a regression in the TCP keepalive timer. The user
> had a 3600s keepalive timer for preventing firewall disconnects (on a
> 3650s interval). They observed keepalive timers coming in up to four
> minutes late, causing unexpected disconnects.
>
> The regression was observed to have come from the timer wheel rewrite
> from almost five years ago:
>
> 500462a9de65 ("timers: Switch to a non-cascading wheel")
>
> As you mentioned, with a HZ of 1000, the granularity for a one-hour
> timer is four minutes, which matches the seen behavior.
That seems horribly broken - if technically valid.
Reading the big comment even the 32sec for the next finer 'wheel'
seems a little coarse for a 1h timer.
The second finer wheel has 4sec resolution - which is probably reasonable.
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT,
UK
Registration No: 1397386 (Wales)
[PATCH 12/44] tty: 8250, cleanup em485 timers
Initialize the variables directly by initializers in definitions. This
is expected/usual for these kind of callback.
Signed-off-by: Jiri Slaby
---
drivers/tty/serial/8250/8250_port.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_port.c
b/drivers/tty/serial/8250/8250_port.c
index 167c1e3e53bc..9019f8f626bb 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1466,13 +1466,11 @@ EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
{
- struct uart_8250_em485 *em485;
- struct uart_8250_port *p;
+ struct uart_8250_em485 *em485 = container_of(t, struct uart_8250_em485,
+ stop_tx_timer);
+ struct uart_8250_port *p = em485->port;
unsigned long flags;
- em485 = container_of(t, struct uart_8250_em485, stop_tx_timer);
- p = em485->port;
-
serial8250_rpm_get(p);
spin_lock_irqsave(>port.lock, flags);
if (em485->active_timer == >stop_tx_timer) {
@@ -1482,6 +1480,7 @@ static enum hrtimer_restart
serial8250_em485_handle_stop_tx(struct hrtimer *t)
}
spin_unlock_irqrestore(>port.lock, flags);
serial8250_rpm_put(p);
+
return HRTIMER_NORESTART;
}
@@ -1629,19 +1628,18 @@ static inline void start_tx_rs485(struct uart_port
*port)
static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t)
{
- struct uart_8250_em485 *em485;
- struct uart_8250_port *p;
+ struct uart_8250_em485 *em485 = container_of(t, struct uart_8250_em485,
+ start_tx_timer);
+ struct uart_8250_port *p = em485->port;
unsigned long flags;
- em485 = container_of(t, struct uart_8250_em485, start_tx_timer);
- p = em485->port;
-
spin_lock_irqsave(>port.lock, flags);
if (em485->active_timer == >start_tx_timer) {
__start_tx(>port);
em485->active_timer = NULL;
}
spin_unlock_irqrestore(>port.lock, flags);
+
return HRTIMER_NORESTART;
}
--
2.30.1
Upper bound mode for kernel timers
Hi Thomas,
As discussed on IRC:
We had a report of a regression in the TCP keepalive timer. The user
had a 3600s keepalive timer for preventing firewall disconnects (on a
3650s interval). They observed keepalive timers coming in up to four
minutes late, causing unexpected disconnects.
The regression was observed to have come from the timer wheel rewrite
from almost five years ago:
500462a9de65 ("timers: Switch to a non-cascading wheel")
As you mentioned, with a HZ of 1000, the granularity for a one-hour
timer is four minutes, which matches the seen behavior.
To "fix" it, the user can just lower the timeout value by four minutes,
but that's a workaround, because the keepalive timer isn't working as
advertised.
One potential fix would be an "upper bound mode" in the timer, i.e. give
the user a way to specify that the given 'expires' value is an upper
bound rather than a lower bound.
As you graciously offered, if you or Anna-Maria can implement that new
interface, we (Artem or I) can write up a patch to use it for the
keepalive timer.
--
Josh
[tip: timers/urgent] hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 05f7fcc675f50001a30b8938c05d11ca9f599f8c
Gitweb:
https://git.kernel.org/tip/05f7fcc675f50001a30b8938c05d11ca9f599f8c
Author:Anna-Maria Behnsen
AuthorDate:Tue, 23 Feb 2021 17:02:40 +01:00
Committer: Thomas Gleixner
CommitterDate: Mon, 01 Mar 2021 10:17:56 +01:00
hrtimer: Update softirq_expires_next correctly after __hrtimer_get_next_event()
hrtimer_force_reprogram() and hrtimer_interrupt() invokes
__hrtimer_get_next_event() to find the earliest expiry time of hrtimer
bases. __hrtimer_get_next_event() does not update
cpu_base::[softirq_]_expires_next to preserve reprogramming logic. That
needs to be done at the callsites.
hrtimer_force_reprogram() updates cpu_base::softirq_expires_next only when
the first expiring timer is a softirq timer and the soft interrupt is not
activated. That's wrong because cpu_base::softirq_expires_next is left
stale when the first expiring timer of all bases is a timer which expires
in hard interrupt context. hrtimer_interrupt() does never update
cpu_base::softirq_expires_next which is wrong too.
That becomes a problem when clock_settime() sets CLOCK_REALTIME forward and
the first soft expiring timer is in the CLOCK_REALTIME_SOFT base. Setting
CLOCK_REALTIME forward moves the clock MONOTONIC based expiry time of that
timer before the stale cpu_base::softirq_expires_next.
cpu_base::softirq_expires_next is cached to make the check for raising the
soft interrupt fast. In the above case the soft interrupt won't be raised
until clock monotonic reaches the stale cpu_base::softirq_expires_next
value. That's incorrect, but what's worse it that if the softirq timer
becomes the first expiring timer of all clock bases after the hard expiry
timer has been handled the reprogramming of the clockevent from
hrtimer_interrupt() will result in an interrupt storm. That happens because
the reprogramming does not use cpu_base::softirq_expires_next, it uses
__hrtimer_get_next_event() which returns the actual expiry time. Once clock
MONOTONIC reaches cpu_base::softirq_expires_next the soft interrupt is
raised and the storm subsides.
Change the logic in hrtimer_force_reprogram() to evaluate the soft and hard
bases seperately, update softirq_expires_next and handle the case when a
soft expiring timer is the first of all bases by comparing the expiry times
and updating the required cpu base fields. Split this functionality into a
separate function to be able to use it in hrtimer_interrupt() as well
without copy paste.
Fixes: da70160462e ("hrtimer: Implement support for softirq based hrtimers")
Reported-by: Mikael Beckius
Suggested-by: Thomas Gleixner
Signed-off-by: Anna-Maria Behnsen
Tested-by: Mikael Beckius
Signed-off-by: Thomas Gleixner
Link: https://lore.kernel.org/r/20210223160240.27518-1-anna-ma...@linutronix.de
---
kernel/time/hrtimer.c | 60 +++---
1 file changed, 39 insertions(+), 21 deletions(-)
diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
index 743c852..788b9d1 100644
--- a/kernel/time/hrtimer.c
+++ b/kernel/time/hrtimer.c
@@ -546,8 +546,11 @@ static ktime_t __hrtimer_next_event_base(struct
hrtimer_cpu_base *cpu_base,
}
/*
- * Recomputes cpu_base::*next_timer and returns the earliest expires_next but
- * does not set cpu_base::*expires_next, that is done by hrtimer_reprogram.
+ * Recomputes cpu_base::*next_timer and returns the earliest expires_next
+ * but does not set cpu_base::*expires_next, that is done by
+ * hrtimer[_force]_reprogram and hrtimer_interrupt only. When updating
+ * cpu_base::*expires_next right away, reprogramming logic would no longer
+ * work.
*
* When a softirq is pending, we can ignore the HRTIMER_ACTIVE_SOFT bases,
* those timers will get run whenever the softirq gets handled, at the end of
@@ -588,6 +591,37 @@ __hrtimer_get_next_event(struct hrtimer_cpu_base
*cpu_base, unsigned int active_
return expires_next;
}
+static ktime_t hrtimer_update_next_event(struct hrtimer_cpu_base *cpu_base)
+{
+ ktime_t expires_next, soft = KTIME_MAX;
+
+ /*
+* If the soft interrupt has already been activated, ignore the
+* soft bases. They will be handled in the already raised soft
+* interrupt.
+*/
+ if (!cpu_base->softirq_activated) {
+ soft = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_SOFT);
+ /*
+* Update the soft expiry time. clock_settime() might have
+* affected it.
+*/
+ cpu_base->softirq_expires_next = soft;
+ }
+
+ expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_HARD);
+ /*
+* If a softirq timer is expiring first, update cpu_base->next_timer
+* and program the hardware with the soft expiry time.
+*/
+ if (expires_next > soft) {
+
[PATCH] selftests/timers: remove unneeded semicolon
Fix the following coccicheck warnings: ./tools/testing/selftests/timers/nsleep-lat.c:75:2-3: Unneeded semicolon. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/nsleep-lat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/nsleep-lat.c b/tools/testing/selftests/timers/nsleep-lat.c index eb3e79e..a7ca982 100644 --- a/tools/testing/selftests/timers/nsleep-lat.c +++ b/tools/testing/selftests/timers/nsleep-lat.c @@ -72,7 +72,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } -- 1.8.3.1
[PATCH] selftests: timers: remove unneeded semicolon
Fix the following coccicheck warnings: ./tools/testing/selftests/timers/alarmtimer-suspend.c:82:2-3: Unneeded semicolon. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- tools/testing/selftests/timers/alarmtimer-suspend.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/timers/alarmtimer-suspend.c b/tools/testing/selftests/timers/alarmtimer-suspend.c index 4da09db..54da4b08 100644 --- a/tools/testing/selftests/timers/alarmtimer-suspend.c +++ b/tools/testing/selftests/timers/alarmtimer-suspend.c @@ -79,7 +79,7 @@ char *clockstring(int clockid) return "CLOCK_BOOTTIME_ALARM"; case CLOCK_TAI: return "CLOCK_TAI"; - }; + } return "UNKNOWN_CLOCKID"; } -- 1.8.3.1
[PATCH 13/13] rcu/nocb: Unify timers
Now that nocb_timer and nocb_bypass_timer have become very similar,
merge them together. A new RCU_NOCB_WAKE_BYPASS wake level is introduced.
As a result, timers perform all kinds of deferred wake ups but other
deferred wakeup callsites only handle non-bypass wakeups in order not
to wake up rcuo too early.
The timer also performs the full barrier all the time to order
timer_pending() and callback enqueue although the path performing
RCU_NOCB_WAKE_FORCE that makes use of it is debatable. It should also
test against the rdp leader instead of the current rdp.
The permanent full barrier shouldn't bring visible overhead since the
timers almost never fire.
Signed-off-by: Frederic Weisbecker
Cc: Josh Triplett
Cc: Lai Jiangshan
Cc: Joel Fernandes
Cc: Neeraj Upadhyay
Cc: Boqun Feng
---
include/trace/events/rcu.h | 1 +
kernel/rcu/tree.h | 6 +--
kernel/rcu/tree_plugin.h | 92 --
3 files changed, 43 insertions(+), 56 deletions(-)
diff --git a/include/trace/events/rcu.h b/include/trace/events/rcu.h
index 5fc29400e1a2..c16cb7d78f51 100644
--- a/include/trace/events/rcu.h
+++ b/include/trace/events/rcu.h
@@ -278,6 +278,7 @@ TRACE_EVENT_RCU(rcu_exp_funnel_lock,
* "WakeNot": Don't wake rcuo kthread.
* "WakeNotPoll": Don't wake rcuo kthread because it is polling.
* "WakeOvfIsDeferred": Wake rcuo kthread later, CB list is huge.
+ * "WakeBypassIsDeferred": Wake rcuo kthread later, bypass list is contended.
* "WokeEmpty": rcuo CB kthread woke to find empty list.
*/
TRACE_EVENT_RCU(rcu_nocb_wake,
diff --git a/kernel/rcu/tree.h b/kernel/rcu/tree.h
index 2510e86265c1..9a16487edfca 100644
--- a/kernel/rcu/tree.h
+++ b/kernel/rcu/tree.h
@@ -218,7 +218,6 @@ struct rcu_data {
/* The following fields are used by GP kthread, hence own cacheline. */
raw_spinlock_t nocb_gp_lock cacheline_internodealigned_in_smp;
- struct timer_list nocb_bypass_timer; /* Force nocb_bypass flush. */
u8 nocb_gp_sleep; /* Is the nocb GP thread asleep? */
u8 nocb_gp_bypass; /* Found a bypass on last scan? */
u8 nocb_gp_gp; /* GP to wait for on last scan? */
@@ -258,8 +257,9 @@ struct rcu_data {
/* Values for nocb_defer_wakeup field in struct rcu_data. */
#define RCU_NOCB_WAKE_NOT 0
-#define RCU_NOCB_WAKE 1
-#define RCU_NOCB_WAKE_FORCE2
+#define RCU_NOCB_WAKE_BYPASS 1
+#define RCU_NOCB_WAKE 2
+#define RCU_NOCB_WAKE_FORCE3
#define RCU_JIFFIES_TILL_FORCE_QS (1 + (HZ > 250) + (HZ > 500))
/* For jiffies_till_first_fqs and */
diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h
index e0420e3b30e6..6bf35a1fe68e 100644
--- a/kernel/rcu/tree_plugin.h
+++ b/kernel/rcu/tree_plugin.h
@@ -1711,8 +1711,6 @@ static bool __wake_nocb_gp(struct rcu_data *rdp_gp,
del_timer(_gp->nocb_timer);
}
- del_timer(_gp->nocb_bypass_timer);
-
if (force || READ_ONCE(rdp_gp->nocb_gp_sleep)) {
WRITE_ONCE(rdp_gp->nocb_gp_sleep, false);
needwake = true;
@@ -1750,10 +1748,19 @@ static void wake_nocb_gp_defer(struct rcu_data *rdp,
int waketype,
raw_spin_lock_irqsave(_gp->nocb_gp_lock, flags);
- if (rdp_gp->nocb_defer_wakeup == RCU_NOCB_WAKE_NOT)
- mod_timer(_gp->nocb_timer, jiffies + 1);
- if (rdp_gp->nocb_defer_wakeup < waketype)
+ /*
+* Bypass wakeup overrides previous deferments. In case
+* of callback storm, no need to wake up too early.
+*/
+ if (waketype == RCU_NOCB_WAKE_BYPASS) {
+ mod_timer(_gp->nocb_timer, jiffies + 2);
WRITE_ONCE(rdp_gp->nocb_defer_wakeup, waketype);
+ } else {
+ if (rdp_gp->nocb_defer_wakeup < RCU_NOCB_WAKE)
+ mod_timer(_gp->nocb_timer, jiffies + 1);
+ if (rdp_gp->nocb_defer_wakeup < waketype)
+ WRITE_ONCE(rdp_gp->nocb_defer_wakeup, waketype);
+ }
raw_spin_unlock_irqrestore(_gp->nocb_gp_lock, flags);
@@ -2005,7 +2012,7 @@ static void __call_rcu_nocb_wake(struct rcu_data *rdp,
bool was_alldone,
smp_mb(); /* Enqueue before timer_pending(). */
if ((rdp->nocb_cb_sleep ||
!rcu_segcblist_ready_cbs(>cblist)) &&
- !timer_pending(>nocb_bypass_timer)) {
+ !timer_pending(>nocb_timer)) {
rcu_nocb_unlock_irqrestore(rdp, flags);
wake_nocb_gp_defer(rdp, RCU_NOCB_WAKE_FORCE,
TPS("WakeOvfIsDeferred"));
@@ -2020,19 +2027,6 @@ static void __call_rcu_nocb_wake(struct rcu_data *rdp,
bool was_alldone,
return;
}
-/* Wake up th
Re: [GIT pull] timers/urgent for v5.12
The pull request you sent on Mon, 22 Feb 2021 19:18:58 -: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > timers-urgent-2021-02-22 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/4aa364443d023fab08c9dd4fe6785e8b73f6eaeb Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[GIT pull] timers/urgent for v5.12
Linus,
please pull the latest timers/urgent branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-urgent-2021-02-22
up to: 8acb54abc1db: Merge tag 'timers-v5.11-rc5' of
https://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
A small set of clockevent fixes which fell through the cracks
before the 5.11 release:
- Ensure a clock is enabled on sh_cmt
- Trivial compile fail and compile warning fixes
Thanks,
tglx
-->
Arnd Bergmann (1):
clocksource/drivers/ixp4xx: Select TIMER_OF when needed
Geert Uytterhoeven (1):
clocksource/drivers/sh_cmt: Make sure channel clock supply is enabled
Tom Rix (1):
clocksource/drivers/mxs_timer: Add missing semicolon when DEBUG is defined
arch/arm/mach-ixp4xx/Kconfig| 1 -
drivers/clocksource/Kconfig | 1 +
drivers/clocksource/mxs_timer.c | 5 +
drivers/clocksource/sh_cmt.c| 16 +---
4 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index f7211b57b1e7..165c184801e1 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -13,7 +13,6 @@ config MACH_IXP4XX_OF
select I2C
select I2C_IOP3XX
select PCI
- select TIMER_OF
select USE_OF
help
Say 'Y' here to support Device Tree-based IXP4xx platforms.
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 14c7c4712478..66be9ea69e33 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -79,6 +79,7 @@ config IXP4XX_TIMER
bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST
depends on HAS_IOMEM
select CLKSRC_MMIO
+ select TIMER_OF if OF
help
Enables support for the Intel XScale IXP4xx SoC timer.
diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c
index bc96a4cbf26c..e52e12d27d2a 100644
--- a/drivers/clocksource/mxs_timer.c
+++ b/drivers/clocksource/mxs_timer.c
@@ -131,10 +131,7 @@ static void mxs_irq_clear(char *state)
/* Clear pending interrupt */
timrot_irq_acknowledge();
-
-#ifdef DEBUG
- pr_info("%s: changing mode to %s\n", __func__, state)
-#endif /* DEBUG */
+ pr_debug("%s: changing mode to %s\n", __func__, state);
}
static int mxs_shutdown(struct clock_event_device *evt)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index e258230d432c..c98f8851fd68 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -235,6 +235,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
#define CMCNT 1 /* channel register */
#define CMCOR 2 /* channel register */
+#define CMCLKE 0x1000 /* CLK Enable Register (R-Car Gen2) */
+
static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
{
if (ch->iostart)
@@ -853,6 +855,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
unsigned int index,
unsigned int hwidx, bool clockevent,
bool clocksource, struct sh_cmt_device *cmt)
{
+ u32 value;
int ret;
/* Skip unused channels. */
@@ -882,6 +885,11 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
unsigned int index,
ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
ch->ioctrl = ch->iostart + 0x10;
ch->timer_bit = 0;
+
+ /* Enable the clock supply to the channel */
+ value = ioread32(cmt->mapbase + CMCLKE);
+ value |= BIT(hwidx);
+ iowrite32(value, cmt->mapbase + CMCLKE);
break;
}
@@ -1014,12 +1022,10 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt,
struct platform_device *pdev)
else
cmt->rate = clk_get_rate(cmt->clk) / 8;
- clk_disable(cmt->clk);
-
/* Map the memory resource(s). */
ret = sh_cmt_map_memory(cmt);
if (ret < 0)
- goto err_clk_unprepare;
+ goto err_clk_disable;
/* Allocate and setup the channels. */
cmt->num_channels = hweight8(cmt->hw_channels);
@@ -1047,6 +1053,8 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct
platform_device *pdev)
mask &= ~(1 << hwidx);
}
+ clk_disable(cmt->clk);
+
platform_set_drvdata(pdev, cmt);
return 0;
@@ -1054,6 +1062,8 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct
platform_device *pdev)
err_unmap:
kfree(cmt->channels);
iounmap(cmt->mapbase);
+err_clk_disable:
+ clk_disable(cmt->clk);
err_clk_unprepare:
clk_unprepare(cmt->clk);
err_clk_put:
[tip: timers/urgent] clocksource/drivers/sh_cmt: Make sure channel clock supply is enabled
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 2a97d55333e4299f32c98cca6dc5c4db1c5855fc
Gitweb:
https://git.kernel.org/tip/2a97d55333e4299f32c98cca6dc5c4db1c5855fc
Author:Geert Uytterhoeven
AuthorDate:Thu, 10 Dec 2020 20:46:48 +01:00
Committer: Daniel Lezcano
CommitterDate: Mon, 18 Jan 2021 16:20:37 +01:00
clocksource/drivers/sh_cmt: Make sure channel clock supply is enabled
The Renesas Compare Match Timer 0 and 1 (CMT0/1) variants have a
register to control the clock supply to the individual channels.
Currently the driver does not touch this register, and relies on the
documented initial value, which has the clock supply enabled for all
channels present.
However, when Linux starts on the APE6-EVM development board, only the
clock supply to the first CMT1 channel is enabled. Hence the first
channel (used as a clockevent) works, while the second channel (used as
a clocksource) does not. Note that the default system clocksource is
the Cortex-A15 architectured timer, and the user needs to manually
switch to the CMT1 clocksource to trigger the broken behavior.
Fix this by removing the fragile dependency on implicit reset and/or
boot loader state, and by enabling the clock supply explicitly for all
channels used instead. This requires postponing the clk_disable() call,
else the timer's registers cannot be accessed in sh_cmt_setup_channel().
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Niklas Söderlund
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20201210194648.2901899-1-geert+rene...@glider.be
---
drivers/clocksource/sh_cmt.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index e258230..c98f885 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -235,6 +235,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
#define CMCNT 1 /* channel register */
#define CMCOR 2 /* channel register */
+#define CMCLKE 0x1000 /* CLK Enable Register (R-Car Gen2) */
+
static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
{
if (ch->iostart)
@@ -853,6 +855,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
unsigned int index,
unsigned int hwidx, bool clockevent,
bool clocksource, struct sh_cmt_device *cmt)
{
+ u32 value;
int ret;
/* Skip unused channels. */
@@ -882,6 +885,11 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
unsigned int index,
ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
ch->ioctrl = ch->iostart + 0x10;
ch->timer_bit = 0;
+
+ /* Enable the clock supply to the channel */
+ value = ioread32(cmt->mapbase + CMCLKE);
+ value |= BIT(hwidx);
+ iowrite32(value, cmt->mapbase + CMCLKE);
break;
}
@@ -1014,12 +1022,10 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt,
struct platform_device *pdev)
else
cmt->rate = clk_get_rate(cmt->clk) / 8;
- clk_disable(cmt->clk);
-
/* Map the memory resource(s). */
ret = sh_cmt_map_memory(cmt);
if (ret < 0)
- goto err_clk_unprepare;
+ goto err_clk_disable;
/* Allocate and setup the channels. */
cmt->num_channels = hweight8(cmt->hw_channels);
@@ -1047,6 +1053,8 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct
platform_device *pdev)
mask &= ~(1 << hwidx);
}
+ clk_disable(cmt->clk);
+
platform_set_drvdata(pdev, cmt);
return 0;
@@ -1054,6 +1062,8 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct
platform_device *pdev)
err_unmap:
kfree(cmt->channels);
iounmap(cmt->mapbase);
+err_clk_disable:
+ clk_disable(cmt->clk);
err_clk_unprepare:
clk_unprepare(cmt->clk);
err_clk_put:
[tip: timers/urgent] clocksource/drivers/ixp4xx: Select TIMER_OF when needed
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 7a3b8758bd6e45f7b671723b5c9fa2b69d0787ae
Gitweb:
https://git.kernel.org/tip/7a3b8758bd6e45f7b671723b5c9fa2b69d0787ae
Author:Arnd Bergmann
AuthorDate:Sun, 03 Jan 2021 14:59:24 +01:00
Committer: Daniel Lezcano
CommitterDate: Mon, 18 Jan 2021 16:20:15 +01:00
clocksource/drivers/ixp4xx: Select TIMER_OF when needed
Compile-testing the ixp4xx timer with CONFIG_OF enabled but
CONFIG_TIMER_OF disabled leads to a harmless warning:
arm-linux-gnueabi-ld: warning: orphan section `__timer_of_table' from
`drivers/clocksource/timer-ixp4xx.o' being placed in section `__timer_of_table'
Move the select statement from the platform code into the driver
so it always gets enabled in configurations that rely on it.
Fixes: 40df14cc5cc0 ("clocksource/drivers/ixp4xx: Add OF initialization
support")
Signed-off-by: Arnd Bergmann
Reviewed-by: Linus Walleij
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210103135955.3808976-1-a...@kernel.org
---
arch/arm/mach-ixp4xx/Kconfig | 1 -
drivers/clocksource/Kconfig | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index f7211b5..165c184 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -13,7 +13,6 @@ config MACH_IXP4XX_OF
select I2C
select I2C_IOP3XX
select PCI
- select TIMER_OF
select USE_OF
help
Say 'Y' here to support Device Tree-based IXP4xx platforms.
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 14c7c47..66be9ea 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -79,6 +79,7 @@ config IXP4XX_TIMER
bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST
depends on HAS_IOMEM
select CLKSRC_MMIO
+ select TIMER_OF if OF
help
Enables support for the Intel XScale IXP4xx SoC timer.
[tip: timers/urgent] Merge tag 'timers-v5.11-rc5' of https://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
The following commit has been merged into the timers/urgent branch of tip: Commit-ID: 8acb54abc1db4e1e3913359e4108e04e88ce4d92 Gitweb: https://git.kernel.org/tip/8acb54abc1db4e1e3913359e4108e04e88ce4d92 Author:Thomas Gleixner AuthorDate:Mon, 22 Feb 2021 10:59:13 +01:00 Committer: Thomas Gleixner CommitterDate: Mon, 22 Feb 2021 10:59:13 +01:00 Merge tag 'timers-v5.11-rc5' of https://git.linaro.org/people/daniel.lezcano/linux into timers/urgent Pull clockevent fixes from Daniel Lezcano - Fix harmless warning with the ixp4xx when the TIMER_OF option is not selected (Arnd Bergmann) - Make sure channel clock supply is enabled on sh_cmt (Geert Uytterhoeven) - Fix compilation error when DEBUG is defined with the mxs_timer (Tom Rix) Link: https://lore.kernel.org/r/ae3bcda6-5180-639d-6246-d2dfd271c...@linaro.org ---
[tip: timers/urgent] clocksource/drivers/mxs_timer: Add missing semicolon when DEBUG is defined
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 7da390694afbaed8e0f05717a541dfaf1077ba51
Gitweb:
https://git.kernel.org/tip/7da390694afbaed8e0f05717a541dfaf1077ba51
Author:Tom Rix
AuthorDate:Mon, 18 Jan 2021 13:19:55 -08:00
Committer: Daniel Lezcano
CommitterDate: Mon, 18 Jan 2021 22:28:59 +01:00
clocksource/drivers/mxs_timer: Add missing semicolon when DEBUG is defined
When DEBUG is defined this error occurs
drivers/clocksource/mxs_timer.c:138:1: error:
expected ‘;’ before ‘}’ token
The preceding statement needs a semicolon.
Replace pr_info() with pr_debug() and remove the unneeded ifdef.
Fixes: eb8703e2ef7c ("clockevents/drivers/mxs: Migrate to new 'set-state'
interface")
Signed-off-by: Tom Rix
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210118211955.763609-1-t...@redhat.com
---
drivers/clocksource/mxs_timer.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c
index bc96a4c..e52e12d 100644
--- a/drivers/clocksource/mxs_timer.c
+++ b/drivers/clocksource/mxs_timer.c
@@ -131,10 +131,7 @@ static void mxs_irq_clear(char *state)
/* Clear pending interrupt */
timrot_irq_acknowledge();
-
-#ifdef DEBUG
- pr_info("%s: changing mode to %s\n", __func__, state)
-#endif /* DEBUG */
+ pr_debug("%s: changing mode to %s\n", __func__, state);
}
static int mxs_shutdown(struct clock_event_device *evt)
Re: [GIT pull] timers/core for 5.12
The pull request you sent on Mon, 15 Feb 2021 19:39:49 -: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > timers-core-2021-02-15 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/3f6ec19f2d05d800bbc42d95dece433da7697864 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[PATCH] selftests: timers: set-timer-lat: remove unneeded semicolon
Eliminate the following coccicheck warning:
./tools/testing/selftests/timers/set-timer-lat.c:83:2-3: Unneeded
semicolon
./tools/testing/selftests/timers/nsleep-lat.c:75:2-3: Unneeded semicolon
./tools/testing/selftests/timers/nanosleep.c:75:2-3: Unneeded semicolon
./tools/testing/selftests/timers/inconsistency-check.c:75:2-3: Unneeded
semicolon
./tools/testing/selftests/timers/alarmtimer-suspend.c:82:2-3: Unneeded
semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
tools/testing/selftests/timers/alarmtimer-suspend.c | 2 +-
tools/testing/selftests/timers/inconsistency-check.c | 2 +-
tools/testing/selftests/timers/nanosleep.c | 2 +-
tools/testing/selftests/timers/nsleep-lat.c | 2 +-
tools/testing/selftests/timers/set-timer-lat.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tools/testing/selftests/timers/alarmtimer-suspend.c
b/tools/testing/selftests/timers/alarmtimer-suspend.c
index 4da09db..54da4b08 100644
--- a/tools/testing/selftests/timers/alarmtimer-suspend.c
+++ b/tools/testing/selftests/timers/alarmtimer-suspend.c
@@ -79,7 +79,7 @@ char *clockstring(int clockid)
return "CLOCK_BOOTTIME_ALARM";
case CLOCK_TAI:
return "CLOCK_TAI";
- };
+ }
return "UNKNOWN_CLOCKID";
}
diff --git a/tools/testing/selftests/timers/inconsistency-check.c
b/tools/testing/selftests/timers/inconsistency-check.c
index 022d3ff..e6756d9 100644
--- a/tools/testing/selftests/timers/inconsistency-check.c
+++ b/tools/testing/selftests/timers/inconsistency-check.c
@@ -72,7 +72,7 @@ char *clockstring(int clockid)
return "CLOCK_BOOTTIME_ALARM";
case CLOCK_TAI:
return "CLOCK_TAI";
- };
+ }
return "UNKNOWN_CLOCKID";
}
diff --git a/tools/testing/selftests/timers/nanosleep.c
b/tools/testing/selftests/timers/nanosleep.c
index 71b5441..433a096 100644
--- a/tools/testing/selftests/timers/nanosleep.c
+++ b/tools/testing/selftests/timers/nanosleep.c
@@ -72,7 +72,7 @@ char *clockstring(int clockid)
return "CLOCK_BOOTTIME_ALARM";
case CLOCK_TAI:
return "CLOCK_TAI";
- };
+ }
return "UNKNOWN_CLOCKID";
}
diff --git a/tools/testing/selftests/timers/nsleep-lat.c
b/tools/testing/selftests/timers/nsleep-lat.c
index eb3e79e..a7ca982 100644
--- a/tools/testing/selftests/timers/nsleep-lat.c
+++ b/tools/testing/selftests/timers/nsleep-lat.c
@@ -72,7 +72,7 @@ char *clockstring(int clockid)
return "CLOCK_BOOTTIME_ALARM";
case CLOCK_TAI:
return "CLOCK_TAI";
- };
+ }
return "UNKNOWN_CLOCKID";
}
diff --git a/tools/testing/selftests/timers/set-timer-lat.c
b/tools/testing/selftests/timers/set-timer-lat.c
index 50da454..d60bbca 100644
--- a/tools/testing/selftests/timers/set-timer-lat.c
+++ b/tools/testing/selftests/timers/set-timer-lat.c
@@ -80,7 +80,7 @@ char *clockstring(int clockid)
return "CLOCK_BOOTTIME_ALARM";
case CLOCK_TAI:
return "CLOCK_TAI";
- };
+ }
return "UNKNOWN_CLOCKID";
}
--
1.8.3.1
[GIT pull] timers/core for 5.12
Linus,
please pull the latest timers/core branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-core-2021-02-15
up to: 11db5710d4a9: Merge tag 'timers-v5.12-rc1' of
https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Time and timer updates:
- Instead of new drivers remove tango, sirf, u300 and atlas drivers
- Add suspend/resume support for microchip pit64b
- The usual fixes, improvements and cleanups here and there
Thanks,
tglx
-->
Alexandre Belloni (1):
alarmtimer: Update kerneldoc
Alexey Dobriyan (1):
timens: Delete no-op time_ns_init()
Arnd Bergmann (4):
clocksource/drivers/u300: Remove the u300 driver
clocksource/drivers/tango: Remove tango driver
clocksource/drivers/atlas: Remove sirf atlas driver
clocksource/drivers/prima: Remove sirf prima driver
Bartosz Golaszewski (1):
clocksource/drivers/davinci: Move pr_fmt() before the includes
Claudiu Beznea (1):
clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume
Jonathan Neuschäfer (1):
dt-bindings: timer: nuvoton: Clarify that interrupt of timer 0 should be
specified
Uwe Kleine-König (1):
clocksource/drivers/efm32: Drop unused timer code
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 3 +-
.../bindings/timer/stericsson-u300-apptimer.txt| 18 -
drivers/clocksource/Kconfig| 36 --
drivers/clocksource/Makefile | 5 -
drivers/clocksource/timer-atlas7.c | 281 -
drivers/clocksource/timer-davinci.c| 5 +-
drivers/clocksource/timer-efm32.c | 278 -
drivers/clocksource/timer-microchip-pit64b.c | 86 +++-
drivers/clocksource/timer-prima2.c | 242 ---
drivers/clocksource/timer-tango-xtal.c | 57 ---
drivers/clocksource/timer-u300.c | 457 -
kernel/time/alarmtimer.c | 8 +-
kernel/time/namespace.c| 6 -
13 files changed, 81 insertions(+), 1401 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
delete mode 100644 drivers/clocksource/timer-atlas7.c
delete mode 100644 drivers/clocksource/timer-efm32.c
delete mode 100644 drivers/clocksource/timer-prima2.c
delete mode 100644 drivers/clocksource/timer-tango-xtal.c
delete mode 100644 drivers/clocksource/timer-u300.c
diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
index ea22dfe485be..97258f1a1505 100644
--- a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
@@ -6,8 +6,7 @@ timer counters.
Required properties:
- compatible : "nuvoton,npcm750-timer" for Poleg NPCM750.
- reg : Offset and length of the register set for the device.
-- interrupts : Contain the timer interrupt with flags for
-falling edge.
+- interrupts : Contain the timer interrupt of timer 0.
- clocks : phandle of timer reference clock (usually a 25 MHz clock).
Example:
diff --git
a/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
b/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
deleted file mode 100644
index 9499bc8ee9e3..
--- a/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-ST-Ericsson U300 apptimer
-
-Required properties:
-
-- compatible : should be "stericsson,u300-apptimer"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : A list of 4 interrupts; one for each subtimer. These
- are, in order: OS (operating system), DD (device driver) both
- adopted for EPOC/Symbian with two specific IRQs for these tasks,
- then GP1 and GP2, which are general-purpose timers.
-
-Example:
-
-timer {
- compatible = "stericsson,u300-apptimer";
- reg = <0xc0014000 0x1000>;
- interrupts = <24 25 26 27>;
-};
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 14c7c4712478..d184000eb09e 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -197,12 +197,6 @@ config CLPS711X_TIMER
help
Enables support for the Cirrus Logic PS711 timer.
-config ATLAS7_TIMER
- bool "Atlas7 timer driver" if COMPILE_TEST
- select CLKSRC_MMIO
- help
- Enables support for the Atlas7 timer.
-
config MXS_TIMER
bool "MXS timer driver" if COMPILE_TEST
select CLKSRC_MMIO
@@ -210,19 +204,6 @@ config MXS_TIMER
help
Enables support for the MXS timer.
-config PRIMA2_TIMER
- bool "Prima2 timer driver"
[tip: timers/core] clocksource/drivers/tango: Remove tango driver
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8fdb44176928fb3ef3e10d97eaf1aed82c90bd58
Gitweb:
https://git.kernel.org/tip/8fdb44176928fb3ef3e10d97eaf1aed82c90bd58
Author:Arnd Bergmann
AuthorDate:Wed, 20 Jan 2021 14:15:57 +01:00
Committer: Daniel Lezcano
CommitterDate: Wed, 03 Feb 2021 09:11:35 +01:00
clocksource/drivers/tango: Remove tango driver
The tango platform is getting removed, so the driver is no
longer needed.
Cc: Marc Gonzalez
Cc: Mans Rullgard
Signed-off-by: Arnd Bergmann
Acked-by: Mans Rullgard
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210120131559.1971359-3-a...@kernel.org
---
drivers/clocksource/Kconfig| 8 +
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-tango-xtal.c | 57 +-
3 files changed, 66 deletions(-)
delete mode 100644 drivers/clocksource/timer-tango-xtal.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index b26bb9e..b5250e4 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -551,14 +551,6 @@ config CLKSRC_MIPS_GIC
select CLOCKSOURCE_WATCHDOG
select TIMER_OF
-config CLKSRC_TANGO_XTAL
- bool "Clocksource for Tango SoC" if COMPILE_TEST
- depends on ARM
- select TIMER_OF
- select CLKSRC_MMIO
- help
- This enables the clocksource for Tango SoC.
-
config CLKSRC_PXA
bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
depends on HAS_IOMEM
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index ce8a3c0..1b05f03 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -71,7 +71,6 @@ obj-$(CONFIG_KEYSTONE_TIMER) += timer-keystone.o
obj-$(CONFIG_INTEGRATOR_AP_TIMER) += timer-integrator-ap.o
obj-$(CONFIG_CLKSRC_VERSATILE) += timer-versatile.o
obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
-obj-$(CONFIG_CLKSRC_TANGO_XTAL)+= timer-tango-xtal.o
obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o
obj-$(CONFIG_CLKSRC_IMX_TPM) += timer-imx-tpm.o
obj-$(CONFIG_TIMER_IMX_SYS_CTR)+= timer-imx-sysctr.o
diff --git a/drivers/clocksource/timer-tango-xtal.c
b/drivers/clocksource/timer-tango-xtal.c
deleted file mode 100644
index 3f94e45..000
--- a/drivers/clocksource/timer-tango-xtal.c
+++ /dev/null
@@ -1,57 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-static void __iomem *xtal_in_cnt;
-static struct delay_timer delay_timer;
-
-static unsigned long notrace read_xtal_counter(void)
-{
- return readl_relaxed(xtal_in_cnt);
-}
-
-static u64 notrace read_sched_clock(void)
-{
- return read_xtal_counter();
-}
-
-static int __init tango_clocksource_init(struct device_node *np)
-{
- struct clk *clk;
- int xtal_freq, ret;
-
- xtal_in_cnt = of_iomap(np, 0);
- if (xtal_in_cnt == NULL) {
- pr_err("%pOF: invalid address\n", np);
- return -ENXIO;
- }
-
- clk = of_clk_get(np, 0);
- if (IS_ERR(clk)) {
- pr_err("%pOF: invalid clock\n", np);
- return PTR_ERR(clk);
- }
-
- xtal_freq = clk_get_rate(clk);
- delay_timer.freq = xtal_freq;
- delay_timer.read_current_timer = read_xtal_counter;
-
- ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350,
- 32, clocksource_mmio_readl_up);
- if (ret) {
- pr_err("%pOF: registration failed\n", np);
- return ret;
- }
-
- sched_clock_register(read_sched_clock, 32, xtal_freq);
- register_current_timer_delay(_timer);
-
- return 0;
-}
-
-TIMER_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init);
[tip: timers/core] clocksource/drivers/davinci: Move pr_fmt() before the includes
The following commit has been merged into the timers/core branch of tip: Commit-ID: 98509310e490bf3de13c96fbbbca8ef4af9db010 Gitweb: https://git.kernel.org/tip/98509310e490bf3de13c96fbbbca8ef4af9db010 Author:Bartosz Golaszewski AuthorDate:Mon, 11 Jan 2021 15:08:14 +01:00 Committer: Daniel Lezcano CommitterDate: Mon, 18 Jan 2021 16:31:39 +01:00 clocksource/drivers/davinci: Move pr_fmt() before the includes We no longer need to undef pr_fmt if we define our own before including any headers. Signed-off-by: Bartosz Golaszewski Acked-by: David Lechner Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/2021040814.3668-1-b...@bgdev.pl --- drivers/clocksource/timer-davinci.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/timer-davinci.c b/drivers/clocksource/timer-davinci.c index bb4eee3..9996c05 100644 --- a/drivers/clocksource/timer-davinci.c +++ b/drivers/clocksource/timer-davinci.c @@ -7,6 +7,8 @@ * (with tiny parts adopted from code by Kevin Hilman ) */ +#define pr_fmt(fmt) "%s: " fmt, __func__ + #include #include #include @@ -17,9 +19,6 @@ #include -#undef pr_fmt -#define pr_fmt(fmt) "%s: " fmt, __func__ - #define DAVINCI_TIMER_REG_TIM120x10 #define DAVINCI_TIMER_REG_TIM340x14 #define DAVINCI_TIMER_REG_PRD120x18
[tip: timers/core] dt-bindings: timer: nuvoton: Clarify that interrupt of timer 0 should be specified
The following commit has been merged into the timers/core branch of tip: Commit-ID: e1922b5da0e6869f1850c4447bed0b9cb1cf5034 Gitweb: https://git.kernel.org/tip/e1922b5da0e6869f1850c4447bed0b9cb1cf5034 Author:Jonathan Neuschäfer AuthorDate:Fri, 08 Jan 2021 17:30:04 +01:00 Committer: Daniel Lezcano CommitterDate: Mon, 18 Jan 2021 16:33:51 +01:00 dt-bindings: timer: nuvoton: Clarify that interrupt of timer 0 should be specified The NPCM750 Timer/Watchdog Controller has multiple interrupt lines, connected to multiple timers. The driver uses timer 0 for timer interrupts, so the interrupt line corresponding to timer 0 should be specified in DT. I removed the mention of "flags for falling edge", because the timer controller uses high-level interrupts rather than falling-edge interrupts, and whether flags should be specified is up the interrupt controller's DT binding. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210108163004.492649-1-j.neuschae...@gmx.net --- Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt index ea22dfe..97258f1 100644 --- a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt +++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt @@ -6,8 +6,7 @@ timer counters. Required properties: - compatible : "nuvoton,npcm750-timer" for Poleg NPCM750. - reg : Offset and length of the register set for the device. -- interrupts : Contain the timer interrupt with flags for -falling edge. +- interrupts : Contain the timer interrupt of timer 0. - clocks : phandle of timer reference clock (usually a 25 MHz clock). Example:
[tip: timers/core] Merge tag 'timers-v5.12-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
The following commit has been merged into the timers/core branch of tip: Commit-ID: 11db5710d4a954148e00e376f04ba91a498a20dd Gitweb: https://git.kernel.org/tip/11db5710d4a954148e00e376f04ba91a498a20dd Author:Thomas Gleixner AuthorDate:Wed, 10 Feb 2021 11:02:20 +01:00 Committer: Thomas Gleixner CommitterDate: Wed, 10 Feb 2021 11:02:20 +01:00 Merge tag 'timers-v5.12-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clocksource/events updates from Daniel Lezcano: - Drop dead code on efm32 (Uwe Kleine-König) - Move pr_fmt() before the includes on davinci driver (Bartosz Golaszewski) - Clarified timer interrupt must be specified on nuvoton DT bindings (Jonathan Neuschäfer) - Remove tango, sirf, u300 and atlas timer drivers (Arnd Bergman) - Add suspend/resume on pit64b (Claudiu Beznea) Link: https://lore.kernel.org/r/3747fbde-134f-5e1d-47d5-8776c1a52...@linaro.org ---
[tip: timers/core] clocksource/drivers/atlas: Remove sirf atlas driver
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 446262b27285e86bfc078d5602d7e047a351d536
Gitweb:
https://git.kernel.org/tip/446262b27285e86bfc078d5602d7e047a351d536
Author:Arnd Bergmann
AuthorDate:Wed, 20 Jan 2021 14:15:58 +01:00
Committer: Daniel Lezcano
CommitterDate: Wed, 03 Feb 2021 09:12:28 +01:00
clocksource/drivers/atlas: Remove sirf atlas driver
The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.
Cc: Barry Song
Signed-off-by: Arnd Bergmann
Acked-by: Barry Song
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210120131559.1971359-4-a...@kernel.org
---
drivers/clocksource/Kconfig| 6 +-
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-atlas7.c | 281 +
3 files changed, 288 deletions(-)
delete mode 100644 drivers/clocksource/timer-atlas7.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index b5250e4..4a17957 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -197,12 +197,6 @@ config CLPS711X_TIMER
help
Enables support for the Cirrus Logic PS711 timer.
-config ATLAS7_TIMER
- bool "Atlas7 timer driver" if COMPILE_TEST
- select CLKSRC_MMIO
- help
- Enables support for the Atlas7 timer.
-
config MXS_TIMER
bool "MXS timer driver" if COMPILE_TEST
select CLKSRC_MMIO
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 1b05f03..8c4ab8c 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -30,7 +30,6 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER) += timer-armada-370-xp.o
obj-$(CONFIG_ORION_TIMER) += timer-orion.o
obj-$(CONFIG_BCM2835_TIMER)+= bcm2835_timer.o
obj-$(CONFIG_CLPS711X_TIMER) += clps711x-timer.o
-obj-$(CONFIG_ATLAS7_TIMER) += timer-atlas7.o
obj-$(CONFIG_MXS_TIMER)+= mxs_timer.o
obj-$(CONFIG_CLKSRC_PXA) += timer-pxa.o
obj-$(CONFIG_PRIMA2_TIMER) += timer-prima2.o
diff --git a/drivers/clocksource/timer-atlas7.c
b/drivers/clocksource/timer-atlas7.c
deleted file mode 100644
index c21c91c..000
--- a/drivers/clocksource/timer-atlas7.c
+++ /dev/null
@@ -1,281 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * System timer for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#define SIRFSOC_TIMER_32COUNTER_0_CTRL 0x
-#define SIRFSOC_TIMER_32COUNTER_1_CTRL 0x0004
-#define SIRFSOC_TIMER_MATCH_0 0x0018
-#define SIRFSOC_TIMER_MATCH_1 0x001c
-#define SIRFSOC_TIMER_COUNTER_00x0048
-#define SIRFSOC_TIMER_COUNTER_10x004c
-#define SIRFSOC_TIMER_INTR_STATUS 0x0060
-#define SIRFSOC_TIMER_WATCHDOG_EN 0x0064
-#define SIRFSOC_TIMER_64COUNTER_CTRL 0x0068
-#define SIRFSOC_TIMER_64COUNTER_LO 0x006c
-#define SIRFSOC_TIMER_64COUNTER_HI 0x0070
-#define SIRFSOC_TIMER_64COUNTER_LOAD_LO0x0074
-#define SIRFSOC_TIMER_64COUNTER_LOAD_HI0x0078
-#define SIRFSOC_TIMER_64COUNTER_RLATCHED_LO0x007c
-#define SIRFSOC_TIMER_64COUNTER_RLATCHED_HI0x0080
-
-#define SIRFSOC_TIMER_REG_CNT 6
-
-static unsigned long atlas7_timer_rate;
-
-static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
- SIRFSOC_TIMER_WATCHDOG_EN,
- SIRFSOC_TIMER_32COUNTER_0_CTRL,
- SIRFSOC_TIMER_32COUNTER_1_CTRL,
- SIRFSOC_TIMER_64COUNTER_CTRL,
- SIRFSOC_TIMER_64COUNTER_RLATCHED_LO,
- SIRFSOC_TIMER_64COUNTER_RLATCHED_HI,
-};
-
-static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
-
-static void __iomem *sirfsoc_timer_base;
-
-/* disable count and interrupt */
-static inline void sirfsoc_timer_count_disable(int idx)
-{
- writel_relaxed(readl_relaxed(sirfsoc_timer_base +
SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) & ~0x7,
- sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx);
-}
-
-/* enable count and interrupt */
-static inline void sirfsoc_timer_count_enable(int idx)
-{
- writel_relaxed(readl_relaxed(sirfsoc_timer_base +
SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx) | 0x3,
- sirfsoc_timer_base + SIRFSOC_TIMER_32COUNTER_0_CTRL + 4 * idx);
-}
-
-/* timer interrupt handler */
-static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *ce = dev_id;
- int cpu = smp_processor_id();
-
- /* clear timer interrupt */
- writel_relaxed(BIT(cpu), sirfsoc_timer_base +
S
[tip: timers/core] clocksource/drivers/prima: Remove sirf prima driver
The following commit has been merged into the timers/core branch of tip:
Commit-ID: a8d80235808c8359b614412da76dc10518ea9090
Gitweb:
https://git.kernel.org/tip/a8d80235808c8359b614412da76dc10518ea9090
Author:Arnd Bergmann
AuthorDate:Wed, 20 Jan 2021 14:15:59 +01:00
Committer: Daniel Lezcano
CommitterDate: Wed, 03 Feb 2021 09:13:46 +01:00
clocksource/drivers/prima: Remove sirf prima driver
The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.
Cc: Barry Song
Signed-off-by: Arnd Bergmann
Acked-by: Barry Song
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210120131559.1971359-5-a...@kernel.org
---
drivers/clocksource/Kconfig| 6 +-
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-prima2.c | 242 +
3 files changed, 249 deletions(-)
delete mode 100644 drivers/clocksource/timer-prima2.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 4a17957..05f6d60 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -204,12 +204,6 @@ config MXS_TIMER
help
Enables support for the MXS timer.
-config PRIMA2_TIMER
- bool "Prima2 timer driver" if COMPILE_TEST
- select CLKSRC_MMIO
- help
- Enables support for the Prima2 timer.
-
config NSPIRE_TIMER
bool "NSpire timer driver" if COMPILE_TEST
select CLKSRC_MMIO
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 8c4ab8c..c17ee32 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_BCM2835_TIMER) += bcm2835_timer.o
obj-$(CONFIG_CLPS711X_TIMER) += clps711x-timer.o
obj-$(CONFIG_MXS_TIMER)+= mxs_timer.o
obj-$(CONFIG_CLKSRC_PXA) += timer-pxa.o
-obj-$(CONFIG_PRIMA2_TIMER) += timer-prima2.o
obj-$(CONFIG_SUN4I_TIMER) += timer-sun4i.o
obj-$(CONFIG_SUN5I_HSTIMER)+= timer-sun5i.o
obj-$(CONFIG_MESON6_TIMER) += timer-meson6.o
diff --git a/drivers/clocksource/timer-prima2.c
b/drivers/clocksource/timer-prima2.c
deleted file mode 100644
index c5d4693..000
--- a/drivers/clocksource/timer-prima2.c
+++ /dev/null
@@ -1,242 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * System timer for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#define PRIMA2_CLOCK_FREQ 100
-
-#define SIRFSOC_TIMER_COUNTER_LO 0x
-#define SIRFSOC_TIMER_COUNTER_HI 0x0004
-#define SIRFSOC_TIMER_MATCH_0 0x0008
-#define SIRFSOC_TIMER_MATCH_1 0x000C
-#define SIRFSOC_TIMER_MATCH_2 0x0010
-#define SIRFSOC_TIMER_MATCH_3 0x0014
-#define SIRFSOC_TIMER_MATCH_4 0x0018
-#define SIRFSOC_TIMER_MATCH_5 0x001C
-#define SIRFSOC_TIMER_STATUS 0x0020
-#define SIRFSOC_TIMER_INT_EN 0x0024
-#define SIRFSOC_TIMER_WATCHDOG_EN 0x0028
-#define SIRFSOC_TIMER_DIV 0x002C
-#define SIRFSOC_TIMER_LATCH0x0030
-#define SIRFSOC_TIMER_LATCHED_LO 0x0034
-#define SIRFSOC_TIMER_LATCHED_HI 0x0038
-
-#define SIRFSOC_TIMER_WDT_INDEX5
-
-#define SIRFSOC_TIMER_LATCH_BIT BIT(0)
-
-#define SIRFSOC_TIMER_REG_CNT 11
-
-static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
- SIRFSOC_TIMER_MATCH_0, SIRFSOC_TIMER_MATCH_1, SIRFSOC_TIMER_MATCH_2,
- SIRFSOC_TIMER_MATCH_3, SIRFSOC_TIMER_MATCH_4, SIRFSOC_TIMER_MATCH_5,
- SIRFSOC_TIMER_INT_EN, SIRFSOC_TIMER_WATCHDOG_EN, SIRFSOC_TIMER_DIV,
- SIRFSOC_TIMER_LATCHED_LO, SIRFSOC_TIMER_LATCHED_HI,
-};
-
-static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
-
-static void __iomem *sirfsoc_timer_base;
-
-/* timer0 interrupt handler */
-static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *ce = dev_id;
-
- WARN_ON(!(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_STATUS) &
- BIT(0)));
-
- /* clear timer0 interrupt */
- writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
-
- ce->event_handler(ce);
-
- return IRQ_HANDLED;
-}
-
-/* read 64-bit timer counter */
-static u64 notrace sirfsoc_timer_read(struct clocksource *cs)
-{
- u64 cycles;
-
- /* latch the 64-bit timer counter */
- writel_relaxed(SIRFSOC_TIMER_LATCH_BIT,
- sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
- cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI);
- cycles = (cycles << 32) |
- readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
-
- return cycles;
-}
-
-static int sirfsoc_timer_set_next_event(unsigned long delta,
-
[tip: timers/core] clocksource/drivers/efm32: Drop unused timer code
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 523d83ef0979a9d0c8340913b40b696cb4f2f050
Gitweb:
https://git.kernel.org/tip/523d83ef0979a9d0c8340913b40b696cb4f2f050
Author:Uwe Kleine-König
AuthorDate:Fri, 15 Jan 2021 16:51:26 +01:00
Committer: Daniel Lezcano
CommitterDate: Mon, 18 Jan 2021 16:29:54 +01:00
clocksource/drivers/efm32: Drop unused timer code
Support for this machine was just removed, so drop the now unused timer
code, too.
Signed-off-by: Uwe Kleine-König
Signed-off-by: Daniel Lezcano
Link:
https://lore.kernel.org/r/20210115155130.185010-4-u.kleine-koe...@pengutronix.de
---
drivers/clocksource/Kconfig | 9 +-
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-efm32.c | 278 +-
3 files changed, 288 deletions(-)
delete mode 100644 drivers/clocksource/timer-efm32.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 9f00b83..6bf89e2 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -242,15 +242,6 @@ config INTEGRATOR_AP_TIMER
help
Enables support for the Integrator-AP timer.
-config CLKSRC_EFM32
- bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
- depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
- select CLKSRC_MMIO
- default ARCH_EFM32
- help
- Support to use the timers of EFM32 SoCs as clock source and clock
- event device.
-
config CLKSRC_LPC32XX
bool "Clocksource for LPC32XX" if COMPILE_TEST
depends on HAS_IOMEM
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 3c75cbb..0817338 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -43,7 +43,6 @@ obj-$(CONFIG_VT8500_TIMER)+= timer-vt8500.o
obj-$(CONFIG_NSPIRE_TIMER) += timer-zevio.o
obj-$(CONFIG_BCM_KONA_TIMER) += bcm_kona_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER)+= timer-cadence-ttc.o
-obj-$(CONFIG_CLKSRC_EFM32) += timer-efm32.o
obj-$(CONFIG_CLKSRC_STM32) += timer-stm32.o
obj-$(CONFIG_CLKSRC_STM32_LP) += timer-stm32-lp.o
obj-$(CONFIG_CLKSRC_EXYNOS_MCT)+= exynos_mct.o
diff --git a/drivers/clocksource/timer-efm32.c
b/drivers/clocksource/timer-efm32.c
deleted file mode 100644
index 441a4b9..000
--- a/drivers/clocksource/timer-efm32.c
+++ /dev/null
@@ -1,278 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2013 Pengutronix
- * Uwe Kleine-Koenig
- */
-
-#define pr_fmt(fmt)KBUILD_MODNAME ": " fmt
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#define TIMERn_CTRL0x00
-#define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24)
-#define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10)
-#define TIMERn_CTRL_CLKSEL(val)(((val) & 0x3) << 16)
-#define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0)
-#define TIMERn_CTRL_OSMEN 0x0010
-#define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0)
-#define TIMERn_CTRL_MODE_UPTIMERn_CTRL_MODE(0)
-#define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1)
-
-#define TIMERn_CMD 0x04
-#define TIMERn_CMD_START 0x0001
-#define TIMERn_CMD_STOP0x0002
-
-#define TIMERn_IEN 0x0c
-#define TIMERn_IF 0x10
-#define TIMERn_IFS 0x14
-#define TIMERn_IFC 0x18
-#define TIMERn_IRQ_UF 0x0002
-
-#define TIMERn_TOP 0x1c
-#define TIMERn_CNT 0x24
-
-struct efm32_clock_event_ddata {
- struct clock_event_device evtdev;
- void __iomem *base;
- unsigned periodic_top;
-};
-
-static int efm32_clock_event_shutdown(struct clock_event_device *evtdev)
-{
- struct efm32_clock_event_ddata *ddata =
- container_of(evtdev, struct efm32_clock_event_ddata, evtdev);
-
- writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
- return 0;
-}
-
-static int efm32_clock_event_set_oneshot(struct clock_event_device *evtdev)
-{
- struct efm32_clock_event_ddata *ddata =
- container_of(evtdev, struct efm32_clock_event_ddata, evtdev);
-
- writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
- writel_relaxed(TIMERn_CTRL_PRESC_1024 |
- TIMERn_CTRL_CLKSEL_PRESCHFPERCLK |
- TIMERn_CTRL_OSMEN |
- TIMERn_CTRL_MODE_DOWN,
- ddata->base + TIMERn_CTRL);
- return 0;
-}
-
-static int efm32_clock_event_set_periodic(struct clock_event_device *evtdev)
-{
- struct efm32_clock_event_ddata
[tip: timers/core] clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume
The following commit has been merged into the timers/core branch of tip:
Commit-ID: e85c1d21b16b278f50d191155bc674633270e9c6
Gitweb:
https://git.kernel.org/tip/e85c1d21b16b278f50d191155bc674633270e9c6
Author:Claudiu Beznea
AuthorDate:Tue, 19 Jan 2021 14:59:25 +02:00
Committer: Daniel Lezcano
CommitterDate: Wed, 03 Feb 2021 09:36:50 +01:00
clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume
Add suspend/resume support for clocksource timer.
Signed-off-by: Claudiu Beznea
Signed-off-by: Daniel Lezcano
Link:
https://lore.kernel.org/r/1611061165-30180-1-git-send-email-claudiu.bez...@microchip.com
---
drivers/clocksource/timer-microchip-pit64b.c | 86 +++
1 file changed, 71 insertions(+), 15 deletions(-)
diff --git a/drivers/clocksource/timer-microchip-pit64b.c
b/drivers/clocksource/timer-microchip-pit64b.c
index 59e11ca..ab623b2 100644
--- a/drivers/clocksource/timer-microchip-pit64b.c
+++ b/drivers/clocksource/timer-microchip-pit64b.c
@@ -71,10 +71,24 @@ struct mchp_pit64b_clkevt {
struct clock_event_device clkevt;
};
-#define to_mchp_pit64b_timer(x) \
+#define clkevt_to_mchp_pit64b_timer(x) \
((struct mchp_pit64b_timer *)container_of(x,\
struct mchp_pit64b_clkevt, clkevt))
+/**
+ * mchp_pit64b_clksrc - PIT64B clocksource data structure
+ * @timer: PIT64B timer
+ * @clksrc: clocksource
+ */
+struct mchp_pit64b_clksrc {
+ struct mchp_pit64b_timertimer;
+ struct clocksource clksrc;
+};
+
+#define clksrc_to_mchp_pit64b_timer(x) \
+ ((struct mchp_pit64b_timer *)container_of(x,\
+ struct mchp_pit64b_clksrc, clksrc))
+
/* Base address for clocksource timer. */
static void __iomem *mchp_pit64b_cs_base;
/* Default cycles for clockevent timer. */
@@ -116,6 +130,36 @@ static inline void mchp_pit64b_reset(struct
mchp_pit64b_timer *timer,
writel_relaxed(MCHP_PIT64B_CR_START, timer->base + MCHP_PIT64B_CR);
}
+static void mchp_pit64b_suspend(struct mchp_pit64b_timer *timer)
+{
+ writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
+ if (timer->mode & MCHP_PIT64B_MR_SGCLK)
+ clk_disable_unprepare(timer->gclk);
+ clk_disable_unprepare(timer->pclk);
+}
+
+static void mchp_pit64b_resume(struct mchp_pit64b_timer *timer)
+{
+ clk_prepare_enable(timer->pclk);
+ if (timer->mode & MCHP_PIT64B_MR_SGCLK)
+ clk_prepare_enable(timer->gclk);
+}
+
+static void mchp_pit64b_clksrc_suspend(struct clocksource *cs)
+{
+ struct mchp_pit64b_timer *timer = clksrc_to_mchp_pit64b_timer(cs);
+
+ mchp_pit64b_suspend(timer);
+}
+
+static void mchp_pit64b_clksrc_resume(struct clocksource *cs)
+{
+ struct mchp_pit64b_timer *timer = clksrc_to_mchp_pit64b_timer(cs);
+
+ mchp_pit64b_resume(timer);
+ mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);
+}
+
static u64 mchp_pit64b_clksrc_read(struct clocksource *cs)
{
return mchp_pit64b_cnt_read(mchp_pit64b_cs_base);
@@ -128,7 +172,7 @@ static u64 mchp_pit64b_sched_read_clk(void)
static int mchp_pit64b_clkevt_shutdown(struct clock_event_device *cedev)
{
- struct mchp_pit64b_timer *timer = to_mchp_pit64b_timer(cedev);
+ struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
@@ -137,7 +181,7 @@ static int mchp_pit64b_clkevt_shutdown(struct
clock_event_device *cedev)
static int mchp_pit64b_clkevt_set_periodic(struct clock_event_device *cedev)
{
- struct mchp_pit64b_timer *timer = to_mchp_pit64b_timer(cedev);
+ struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
mchp_pit64b_reset(timer, mchp_pit64b_ce_cycles, MCHP_PIT64B_MR_CONT,
MCHP_PIT64B_IER_PERIOD);
@@ -148,7 +192,7 @@ static int mchp_pit64b_clkevt_set_periodic(struct
clock_event_device *cedev)
static int mchp_pit64b_clkevt_set_next_event(unsigned long evt,
struct clock_event_device *cedev)
{
- struct mchp_pit64b_timer *timer = to_mchp_pit64b_timer(cedev);
+ struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
mchp_pit64b_reset(timer, evt, MCHP_PIT64B_MR_ONE_SHOT,
MCHP_PIT64B_IER_PERIOD);
@@ -158,21 +202,16 @@ static int mchp_pit64b_clkevt_set_next_event(unsigned
long evt,
static void mchp_pit64b_clkevt_suspend(struct clock_event_device *cedev)
{
- struct mchp_pit64b_timer *timer = to_mchp_pit64b_timer(cedev);
+ struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
- writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
- if (timer->mode & MCHP_PIT64B_MR_SGCLK)
- clk_disable_unprepare(timer->gclk);
- clk_disable_unprepare
[tip: timers/core] clocksource/drivers/u300: Remove the u300 driver
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 33105406764f7f13c5e7279826f77342c82c41b5
Gitweb:
https://git.kernel.org/tip/33105406764f7f13c5e7279826f77342c82c41b5
Author:Arnd Bergmann
AuthorDate:Wed, 20 Jan 2021 14:15:56 +01:00
Committer: Daniel Lezcano
CommitterDate: Wed, 03 Feb 2021 09:10:24 +01:00
clocksource/drivers/u300: Remove the u300 driver
The ST-Ericsson U300 platform is getting removed, so this driver is no
longer needed.
Cc: Linus Walleij
Signed-off-by: Arnd Bergmann
Reviewed-by: Linus Walleij
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20210120131559.1971359-2-a...@kernel.org
---
Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt | 18 +---
drivers/clocksource/Kconfig | 7 +-
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-u300.c | 457
+--
4 files changed, 483 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
delete mode 100644 drivers/clocksource/timer-u300.c
diff --git
a/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
b/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
deleted file mode 100644
index 9499bc8..000
--- a/Documentation/devicetree/bindings/timer/stericsson-u300-apptimer.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-ST-Ericsson U300 apptimer
-
-Required properties:
-
-- compatible : should be "stericsson,u300-apptimer"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : A list of 4 interrupts; one for each subtimer. These
- are, in order: OS (operating system), DD (device driver) both
- adopted for EPOC/Symbian with two specific IRQs for these tasks,
- then GP1 and GP2, which are general-purpose timers.
-
-Example:
-
-timer {
- compatible = "stericsson,u300-apptimer";
- reg = <0xc0014000 0x1000>;
- interrupts = <24 25 26 27>;
-};
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 6bf89e2..b26bb9e 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -216,13 +216,6 @@ config PRIMA2_TIMER
help
Enables support for the Prima2 timer.
-config U300_TIMER
- bool "U300 timer driver" if COMPILE_TEST
- depends on ARM
- select CLKSRC_MMIO
- help
- Enables support for the U300 timer.
-
config NSPIRE_TIMER
bool "NSpire timer driver" if COMPILE_TEST
select CLKSRC_MMIO
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 0817338..ce8a3c0 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -34,7 +34,6 @@ obj-$(CONFIG_ATLAS7_TIMER)+= timer-atlas7.o
obj-$(CONFIG_MXS_TIMER)+= mxs_timer.o
obj-$(CONFIG_CLKSRC_PXA) += timer-pxa.o
obj-$(CONFIG_PRIMA2_TIMER) += timer-prima2.o
-obj-$(CONFIG_U300_TIMER) += timer-u300.o
obj-$(CONFIG_SUN4I_TIMER) += timer-sun4i.o
obj-$(CONFIG_SUN5I_HSTIMER)+= timer-sun5i.o
obj-$(CONFIG_MESON6_TIMER) += timer-meson6.o
diff --git a/drivers/clocksource/timer-u300.c b/drivers/clocksource/timer-u300.c
deleted file mode 100644
index 37cba8d..000
--- a/drivers/clocksource/timer-u300.c
+++ /dev/null
@@ -1,457 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * Timer COH 901 328, runs the OS timer interrupt.
- * Author: Linus Walleij
- */
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-/* Generic stuff */
-#include
-#include
-
-/*
- * APP side special timer registers
- * This timer contains four timers which can fire an interrupt each.
- * OS (operating system) timer @ 32768 Hz
- * DD (device driver) timer @ 1 kHz
- * GP1 (general purpose 1) timer @ 1MHz
- * GP2 (general purpose 2) timer @ 1MHz
- */
-
-/* Reset OS Timer 32bit (-/W) */
-#define U300_TIMER_APP_ROST(0x)
-#define U300_TIMER_APP_ROST_TIMER_RESET
(0x)
-/* Enable OS Timer 32bit (-/W) */
-#define U300_TIMER_APP_EOST(0x0004)
-#define U300_TIMER_APP_EOST_TIMER_ENABLE (0x)
-/* Disable OS Timer 32bit (-/W) */
-#define U300_TIMER_APP_DOST(0x0008)
-#define U300_TIMER_APP_DOST_TIMER_DISABLE (0x)
-/* OS Timer Mode Register 32bit (-/W) */
-#define U300_TIMER_APP_SOSTM (0x000c)
-#define U300_TIMER_APP_SOSTM_MODE_CONTINUOUS (0x)
-#define U300_TIMER_APP_SOSTM_MODE_ONE_SHOT
[tip: timers/urgent] hrtimer: Update softirq_expires_next correctly in hrtimer_force_reprogram()
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 0fcc7c20d2e2a65fb5b80d42841084e8509d085d
Gitweb:
https://git.kernel.org/tip/0fcc7c20d2e2a65fb5b80d42841084e8509d085d
Author:Mikael Beckius
AuthorDate:Thu, 28 Jan 2021 15:02:08 +01:00
Committer: Thomas Gleixner
CommitterDate: Tue, 09 Feb 2021 16:18:42 +01:00
hrtimer: Update softirq_expires_next correctly in hrtimer_force_reprogram()
hrtimer_force_reprogram() invokes __hrtimer_get_next_event() to find the
earliest expiry time of all hrtimer bases. __hrtimer_get_next_event() does
not update cpu_base::[softirq_]_expires_next. That needs to be done at the
callsites.
hrtimer_force_reprogram() updates cpu_base::softirq_expires_next only when
the first expiring timer is a softirq timer and the soft interrupt is not
activated. That's wrong because cpu_base::softirq_expires_next is left
stale when the first expiring timer of all bases is a timer which expires
in hard interrupt context.
That becomes a problem when clock_settime() sets CLOCK_REALTIME forward and
the first soft expiring timer is in the CLOCK_REALTIME_SOFT base. Setting
CLOCK_REALTIME forward moves the clock MONOTONIC based expiry time of that
timer before the stale cpu_base::softirq_expires_next.
cpu_base::softirq_expires_next is cached to make the check for raising the
soft interrupt fast. In the above case the soft interrupt won't be raised
until clock monotonic reaches the stale cpu_base::softirq_expires_next
value. That's incorrect, but what's worse it that if the softirq timer
becomes the first expiring timer of all clock bases after the hard expiry
timer has been handled the reprogramming of the clockevent from
hrtimer_interrupt() will result in an interrupt storm. That happens because
the reprogramming does not use cpu_base::softirq_expires_next, it uses
__hrtimer_get_next_event() which returns the actual expiry time. Once clock
MONOTONIC reaches cpu_base::softirq_expires_next the soft interrupt is
raised and the storm subsides.
Change the logic in hrtimer_force_reprogram() to evaluate the soft and hard
bases seperately, update softirq_expires_next and handle the case when a
soft expiring timer is the first of all bases by comparing the expiry times
and updating the required cpu base fields.
[ tglx: Modified it to avoid the double evaluation ]
Fixes:5da70160462e ("hrtimer: Implement support for softirq based hrtimers")
Signed-off-by: Mikael Beckius
Signed-off-by: Thomas Gleixner
Cc: sta...@vger.kernel.org
Link:
https://lore.kernel.org/r/20210128140208.30264-1-mikael.beck...@windriver.com
---
kernel/time/hrtimer.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/kernel/time/hrtimer.c b/kernel/time/hrtimer.c
index 743c852..88a0145 100644
--- a/kernel/time/hrtimer.c
+++ b/kernel/time/hrtimer.c
@@ -626,24 +626,30 @@ static inline int hrtimer_hres_active(void)
static void
hrtimer_force_reprogram(struct hrtimer_cpu_base *cpu_base, int skip_equal)
{
- ktime_t expires_next;
+ ktime_t expires_next, soft = KTIME_MAX;
/*
-* Find the current next expiration time.
+* If the soft interrupt has already been activated, ignore the
+* soft bases. They will be handled in the already raised soft
+* interrupt.
*/
- expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_ALL);
-
- if (cpu_base->next_timer && cpu_base->next_timer->is_soft) {
+ if (!cpu_base->softirq_activated) {
+ soft = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_SOFT);
/*
-* When the softirq is activated, hrtimer has to be
-* programmed with the first hard hrtimer because soft
-* timer interrupt could occur too late.
+* Update the soft expiry time. clock_settime() might have
+* affected it.
*/
- if (cpu_base->softirq_activated)
- expires_next = __hrtimer_get_next_event(cpu_base,
-
HRTIMER_ACTIVE_HARD);
- else
- cpu_base->softirq_expires_next = expires_next;
+ cpu_base->softirq_expires_next = soft;
+ }
+
+ expires_next = __hrtimer_get_next_event(cpu_base, HRTIMER_ACTIVE_HARD);
+ /*
+* If a softirq timer is expiring first, update cpu_base->next_timer
+* and program the hardware with the soft expiry time.
+*/
+ if (expires_next > soft) {
+ cpu_base->next_timer = cpu_base->softirq_next_timer;
+ expires_next = soft;
}
if (skip_equal && expires_next == cpu_base->expires_next)
Re: [GIT PULL] timers/urgent for v5.11-rc7
The pull request you sent on Sun, 7 Feb 2021 11:56:58 +0100: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > tags/timers_urgent_for_v5.11_rc7 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/814daadbf09a364ec22f5aba769e01d8fa339c31 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[GIT PULL] timers/urgent for v5.11-rc7
Hi Linus, please pull two more timers-related fixes for v5.11. Thx. --- The following changes since commit 211e5db19d15a721b2953ea54b8f26c2963720eb: rtc: mc146818: Detect and handle broken RTCs (2021-01-27 09:36:22 +0100) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/timers_urgent_for_v5.11_rc7 for you to fetch changes up to 24c242ec7abb3d21fa0b1da6bb251521dc1717b5: ntp: Use freezable workqueue for RTC synchronization (2021-02-05 18:03:13 +0100) - Use a freezable workqueue for RTC sync because the sync can happen at any time and trigger suspend assertion checks in the i2c subsystem. - Correct a previous RTC validation change to check only bit 6 in register D because some Intel machines use bits 0-5. Geert Uytterhoeven (1): ntp: Use freezable workqueue for RTC synchronization Thomas Gleixner (1): rtc: mc146818: Dont test for bit 0-5 in Register D drivers/rtc/rtc-cmos.c | 4 ++-- drivers/rtc/rtc-mc146818-lib.c | 4 ++-- kernel/time/ntp.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) -- Regards/Gruss, Boris. SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg
[tip: timers/core] timens: Delete no-op time_ns_init()
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 174bcc691f44fdd05046c694fc650933819f72c7
Gitweb:
https://git.kernel.org/tip/174bcc691f44fdd05046c694fc650933819f72c7
Author:Alexey Dobriyan
AuthorDate:Tue, 29 Dec 2020 00:54:02 +03:00
Committer: Thomas Gleixner
CommitterDate: Fri, 05 Feb 2021 19:32:09 +01:00
timens: Delete no-op time_ns_init()
Signed-off-by: Alexey Dobriyan
Signed-off-by: Thomas Gleixner
Acked-by: Andrei Vagin
Link: https://lore.kernel.org/r/20201228215402.GA572900@localhost.localdomain
---
kernel/time/namespace.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/kernel/time/namespace.c b/kernel/time/namespace.c
index 6ca625f..12eab0d 100644
--- a/kernel/time/namespace.c
+++ b/kernel/time/namespace.c
@@ -465,9 +465,3 @@ struct time_namespace init_time_ns = {
.ns.ops = _operations,
.frozen_offsets = true,
};
-
-static int __init time_ns_init(void)
-{
- return 0;
-}
-subsys_initcall(time_ns_init);
[tip: timers/core] alarmtimer: Update kerneldoc
The following commit has been merged into the timers/core branch of tip: Commit-ID: b5c28ea601b801d0ecd5ec703b8d54f77bfe5365 Gitweb: https://git.kernel.org/tip/b5c28ea601b801d0ecd5ec703b8d54f77bfe5365 Author:Alexandre Belloni AuthorDate:Tue, 02 Feb 2021 02:34:57 +01:00 Committer: Thomas Gleixner CommitterDate: Fri, 05 Feb 2021 19:26:41 +01:00 alarmtimer: Update kerneldoc Update kerneldoc comments to reflect the actual arguments and return values of the documented functions. Signed-off-by: Alexandre Belloni Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20210202013457.3482388-1-alexandre.bell...@bootlin.com --- kernel/time/alarmtimer.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index f4ace1b..98d7a15 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c @@ -527,8 +527,11 @@ static enum alarmtimer_type clock2alarm(clockid_t clockid) /** * alarm_handle_timer - Callback for posix timers * @alarm: alarm that fired + * @now: time at the timer expiration * * Posix timer callback for expired alarm timers. + * + * Return: whether the timer is to be restarted */ static enum alarmtimer_restart alarm_handle_timer(struct alarm *alarm, ktime_t now) @@ -715,8 +718,11 @@ static int alarm_timer_create(struct k_itimer *new_timer) /** * alarmtimer_nsleep_wakeup - Wakeup function for alarm_timer_nsleep * @alarm: ptr to alarm that fired + * @now: time at the timer expiration * * Wakes up the task that set the alarmtimer + * + * Return: ALARMTIMER_NORESTART */ static enum alarmtimer_restart alarmtimer_nsleep_wakeup(struct alarm *alarm, ktime_t now) @@ -733,6 +739,7 @@ static enum alarmtimer_restart alarmtimer_nsleep_wakeup(struct alarm *alarm, * alarmtimer_do_nsleep - Internal alarmtimer nsleep implementation * @alarm: ptr to alarmtimer * @absexp: absolute expiration time + * @type: alarm type (BOOTTIME/REALTIME). * * Sets the alarm timer and sleeps until it is fired or interrupted. */ @@ -806,7 +813,6 @@ static long __sched alarm_timer_nsleep_restart(struct restart_block *restart) * @which_clock: clockid * @flags: determins abstime or relative * @tsreq: requested sleep time (abs or rel) - * @rmtp: remaining sleep time saved * * Handles clock_nanosleep calls against _ALARM clockids */
[tip: timers/urgent] ntp: Use freezable workqueue for RTC synchronization
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 24c242ec7abb3d21fa0b1da6bb251521dc1717b5
Gitweb:
https://git.kernel.org/tip/24c242ec7abb3d21fa0b1da6bb251521dc1717b5
Author:Geert Uytterhoeven
AuthorDate:Mon, 25 Jan 2021 15:30:39 +01:00
Committer: Thomas Gleixner
CommitterDate: Fri, 05 Feb 2021 18:03:13 +01:00
ntp: Use freezable workqueue for RTC synchronization
The bug fixed by commit e3fab2f3de081e98 ("ntp: Fix RTC synchronization on
32-bit platforms") revealed an underlying issue: RTC synchronization may
happen anytime, even while the system is partially suspended.
On systems where the RTC is connected to an I2C bus, the I2C bus controller
may already or still be suspended, triggering a WARNING during suspend or
resume from s2ram:
WARNING: CPU: 0 PID: 124 at drivers/i2c/i2c-core.h:54
__i2c_transfer+0x634/0x680
i2c i2c-6: Transfer while suspended
[...]
Workqueue: events_power_efficient sync_hw_clock
[...]
(__i2c_transfer)
(i2c_transfer)
(regmap_i2c_read)
...
(da9063_rtc_set_time)
(rtc_set_time)
(sync_hw_clock)
(process_one_work)
Fix this race condition by using the freezable instead of the normal
power-efficient workqueue.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Thomas Gleixner
Acked-by: Rafael J. Wysocki
Link: https://lore.kernel.org/r/20210125143039.1051912-1-geert+rene...@glider.be
---
kernel/time/ntp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index 87389b9..5247afd 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -502,7 +502,7 @@ static struct hrtimer sync_hrtimer;
static enum hrtimer_restart sync_timer_callback(struct hrtimer *timer)
{
- queue_work(system_power_efficient_wq, _work);
+ queue_work(system_freezable_power_efficient_wq, _work);
return HRTIMER_NORESTART;
}
@@ -668,7 +668,7 @@ void ntp_notify_cmos_timer(void)
* just a pointless work scheduled.
*/
if (ntp_synced() && !hrtimer_is_queued(_hrtimer))
- queue_work(system_power_efficient_wq, _work);
+ queue_work(system_freezable_power_efficient_wq, _work);
}
static void __init ntp_init_cmos_sync(void)
[tip: timers/urgent] rtc: mc146818: Dont test for bit 0-5 in Register D
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: ebb22a05943666155e6da04407cc6e913974c78c
Gitweb:
https://git.kernel.org/tip/ebb22a05943666155e6da04407cc6e913974c78c
Author:Thomas Gleixner
AuthorDate:Mon, 01 Feb 2021 20:24:17 +01:00
Committer: Thomas Gleixner
CommitterDate: Tue, 02 Feb 2021 20:35:02 +01:00
rtc: mc146818: Dont test for bit 0-5 in Register D
The recent change to validate the RTC turned out to be overly tight.
While it cures the problem on the reporters machine it breaks machines
with Intel chipsets which use bit 0-5 of the D register. So check only
for bit 6 being 0 which is the case on these Intel machines as well.
Fixes: 211e5db19d15 ("rtc: mc146818: Detect and handle broken RTCs")
Reported-by: Serge Belyshev
Reported-by: Dirk Gouders
Reported-by: Borislav Petkov
Signed-off-by: Thomas Gleixner
Tested-by: Dirk Gouders
Tested-by: Len Brown
Tested-by: Borislav Petkov
Acked-by: Alexandre Belloni
Link: https://lore.kernel.org/r/87zh0nbnha@nanos.tec.linutronix.de
---
drivers/rtc/rtc-cmos.c | 4 ++--
drivers/rtc/rtc-mc146818-lib.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 68a9ac6..a701dae 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -805,8 +805,8 @@ cmos_do_probe(struct device *dev, struct resource *ports,
int rtc_irq)
spin_lock_irq(_lock);
- /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
- if ((CMOS_READ(RTC_VALID) & 0x7f) != 0) {
+ /* Ensure that the RTC is accessible. Bit 6 must be 0! */
+ if ((CMOS_READ(RTC_VALID) & 0x40) != 0) {
spin_unlock_irq(_lock);
dev_warn(dev, "not accessible\n");
retval = -ENXIO;
diff --git a/drivers/rtc/rtc-mc146818-lib.c b/drivers/rtc/rtc-mc146818-lib.c
index f83c138..dcfaf09 100644
--- a/drivers/rtc/rtc-mc146818-lib.c
+++ b/drivers/rtc/rtc-mc146818-lib.c
@@ -21,8 +21,8 @@ unsigned int mc146818_get_time(struct rtc_time *time)
again:
spin_lock_irqsave(_lock, flags);
- /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
- if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x7f) != 0)) {
+ /* Ensure that the RTC is accessible. Bit 6 must be 0! */
+ if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x40) != 0)) {
spin_unlock_irqrestore(_lock, flags);
memset(time, 0xff, sizeof(*time));
return 0;
Re: [GIT pull] timers/urgent for v5.11-rc6
On Sun, Jan 31, 2021 at 2:40 AM Thomas Gleixner wrote: > > please pull the latest timers/urgent branch from: > >git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > timers-urgent-2021-01-31 Manual pr-tracker-bot says thanks again. Linus
[GIT pull] timers/urgent for v5.11-rc6
Linus,
please pull the latest timers/urgent branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-urgent-2021-01-31
up to: 211e5db19d15: rtc: mc146818: Detect and handle broken RTCs
A fix for handling advertised, but non-existent 146818 RTCs correctly. With
the recent UIP handling changes the time readout of non-existent RTCs hangs
forever as the read returns always 0xFF which means the UIP bit is
set. Sanity check the RTC before registering by checking the RTC_VALID
register for correctness.
Thanks,
tglx
-->
Thomas Gleixner (1):
rtc: mc146818: Detect and handle broken RTCs
drivers/rtc/rtc-cmos.c | 8
drivers/rtc/rtc-mc146818-lib.c | 7 +++
2 files changed, 15 insertions(+)
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 51e80bc70d42..68a9ac6f2fe1 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -805,6 +805,14 @@ cmos_do_probe(struct device *dev, struct resource *ports,
int rtc_irq)
spin_lock_irq(_lock);
+ /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
+ if ((CMOS_READ(RTC_VALID) & 0x7f) != 0) {
+ spin_unlock_irq(_lock);
+ dev_warn(dev, "not accessible\n");
+ retval = -ENXIO;
+ goto cleanup1;
+ }
+
if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
/* force periodic irq to CMOS reset default of 1024Hz;
*
diff --git a/drivers/rtc/rtc-mc146818-lib.c b/drivers/rtc/rtc-mc146818-lib.c
index 972a5b9a629d..f83c13818af3 100644
--- a/drivers/rtc/rtc-mc146818-lib.c
+++ b/drivers/rtc/rtc-mc146818-lib.c
@@ -21,6 +21,13 @@ unsigned int mc146818_get_time(struct rtc_time *time)
again:
spin_lock_irqsave(_lock, flags);
+ /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
+ if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x7f) != 0)) {
+ spin_unlock_irqrestore(_lock, flags);
+ memset(time, 0xff, sizeof(*time));
+ return 0;
+ }
+
/*
* Check whether there is an update in progress during which the
* readout is unspecified. The maximum update time is ~2ms. Poll
[PATCH 16/16] rcu/nocb: Unify timers
Now that nocb_timer and nocb_bypass_timer have become very similar,
merge them together. A new RCU_NOCB_WAKE_BYPASS wake level is introduced.
As a result, timers perform all kinds of deferred wake ups but other
deferred wakeup callsites only handle non-bypass wakeups in order not
to wake up rcuo too early.
The timer also performs the full barrier all the time to order
timer_pending() and callback enqueue although the path performing
RCU_NOCB_WAKE_FORCE that makes use of it is debatable. It should also
test against the rdp leader instead of the current rdp.
The permanent full barrier shouldn't bring visible overhead since the
timers almost never fire.
Signed-off-by: Frederic Weisbecker
Cc: Josh Triplett
Cc: Lai Jiangshan
Cc: Joel Fernandes
Cc: Neeraj Upadhyay
Cc: Boqun Feng
---
include/trace/events/rcu.h | 1 +
kernel/rcu/tree.h | 6 +--
kernel/rcu/tree_plugin.h | 88 --
3 files changed, 42 insertions(+), 53 deletions(-)
diff --git a/include/trace/events/rcu.h b/include/trace/events/rcu.h
index 5fc29400e1a2..c16cb7d78f51 100644
--- a/include/trace/events/rcu.h
+++ b/include/trace/events/rcu.h
@@ -278,6 +278,7 @@ TRACE_EVENT_RCU(rcu_exp_funnel_lock,
* "WakeNot": Don't wake rcuo kthread.
* "WakeNotPoll": Don't wake rcuo kthread because it is polling.
* "WakeOvfIsDeferred": Wake rcuo kthread later, CB list is huge.
+ * "WakeBypassIsDeferred": Wake rcuo kthread later, bypass list is contended.
* "WokeEmpty": rcuo CB kthread woke to find empty list.
*/
TRACE_EVENT_RCU(rcu_nocb_wake,
diff --git a/kernel/rcu/tree.h b/kernel/rcu/tree.h
index 2510e86265c1..9a16487edfca 100644
--- a/kernel/rcu/tree.h
+++ b/kernel/rcu/tree.h
@@ -218,7 +218,6 @@ struct rcu_data {
/* The following fields are used by GP kthread, hence own cacheline. */
raw_spinlock_t nocb_gp_lock cacheline_internodealigned_in_smp;
- struct timer_list nocb_bypass_timer; /* Force nocb_bypass flush. */
u8 nocb_gp_sleep; /* Is the nocb GP thread asleep? */
u8 nocb_gp_bypass; /* Found a bypass on last scan? */
u8 nocb_gp_gp; /* GP to wait for on last scan? */
@@ -258,8 +257,9 @@ struct rcu_data {
/* Values for nocb_defer_wakeup field in struct rcu_data. */
#define RCU_NOCB_WAKE_NOT 0
-#define RCU_NOCB_WAKE 1
-#define RCU_NOCB_WAKE_FORCE2
+#define RCU_NOCB_WAKE_BYPASS 1
+#define RCU_NOCB_WAKE 2
+#define RCU_NOCB_WAKE_FORCE3
#define RCU_JIFFIES_TILL_FORCE_QS (1 + (HZ > 250) + (HZ > 500))
/* For jiffies_till_first_fqs and */
diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h
index 162dda3714f1..516bacbea7b9 100644
--- a/kernel/rcu/tree_plugin.h
+++ b/kernel/rcu/tree_plugin.h
@@ -1703,7 +1703,6 @@ static bool __wake_nocb_gp(struct rcu_data *rdp_gp,
rdp_gp->nocb_defer_wakeup = RCU_NOCB_WAKE_NOT;
del_timer(_gp->nocb_timer);
- del_timer(_gp->nocb_bypass_timer);
if (force || READ_ONCE(rdp_gp->nocb_gp_sleep)) {
WRITE_ONCE(rdp_gp->nocb_gp_sleep, false);
@@ -1742,10 +1741,19 @@ static void wake_nocb_gp_defer(struct rcu_data *rdp,
int waketype,
raw_spin_lock_irqsave(_gp->nocb_gp_lock, flags);
- if (rdp_gp->nocb_defer_wakeup == RCU_NOCB_WAKE_NOT)
- mod_timer(_gp->nocb_timer, jiffies + 1);
- if (rdp_gp->nocb_defer_wakeup < waketype)
+ /*
+* Bypass wakeup overrides previous deferments. In case
+* of callback storm, no need to wake up too early.
+*/
+ if (waketype == RCU_NOCB_WAKE_BYPASS) {
+ mod_timer(_gp->nocb_timer, jiffies + 2);
WRITE_ONCE(rdp_gp->nocb_defer_wakeup, waketype);
+ } else {
+ if (rdp_gp->nocb_defer_wakeup < RCU_NOCB_WAKE)
+ mod_timer(_gp->nocb_timer, jiffies + 1);
+ if (rdp_gp->nocb_defer_wakeup < waketype)
+ WRITE_ONCE(rdp_gp->nocb_defer_wakeup, waketype);
+ }
raw_spin_unlock_irqrestore(_gp->nocb_gp_lock, flags);
@@ -1997,7 +2005,7 @@ static void __call_rcu_nocb_wake(struct rcu_data *rdp,
bool was_alldone,
smp_mb(); /* Enqueue before timer_pending(). */
if ((rdp->nocb_cb_sleep ||
!rcu_segcblist_ready_cbs(>cblist)) &&
- !timer_pending(>nocb_bypass_timer)) {
+ !timer_pending(>nocb_timer)) {
rcu_nocb_unlock_irqrestore(rdp, flags);
wake_nocb_gp_defer(rdp, RCU_NOCB_WAKE_FORCE,
TPS("WakeOvfIsDeferred"));
@@ -2012,19 +2020,6 @@ static void __call_rcu_nocb_wake(struct rcu_data *rdp,
bool was_alldone,
return;
}
-/* Wake up
[tip: timers/urgent] rtc: mc146818: Detect and handle broken RTCs
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: 211e5db19d15a721b2953ea54b8f26c2963720eb
Gitweb:
https://git.kernel.org/tip/211e5db19d15a721b2953ea54b8f26c2963720eb
Author:Thomas Gleixner
AuthorDate:Tue, 26 Jan 2021 18:02:11 +01:00
Committer: Thomas Gleixner
CommitterDate: Wed, 27 Jan 2021 09:36:22 +01:00
rtc: mc146818: Detect and handle broken RTCs
The recent fix for handling the UIP bit unearthed another issue in the RTC
code. If the RTC is advertised but the readout is straight 0xFF because
it's not available, the old code just proceeded with crappy values, but the
new code hangs because it waits for the UIP bit to become low.
Add a sanity check in the RTC CMOS probe function which reads the RTC_VALID
register (Register D) which should have bit 0-6 cleared. If that's not the
case then fail to register the CMOS.
Add the same check to mc146818_get_time(), warn once when the condition
is true and invalidate the rtc_time data.
Reported-by: Mickaël Salaün
Signed-off-by: Thomas Gleixner
Tested-by: Mickaël Salaün
Acked-by: Alexandre Belloni
Link: https://lore.kernel.org/r/87tur3fx7w@nanos.tec.linutronix.de
---
drivers/rtc/rtc-cmos.c | 8
drivers/rtc/rtc-mc146818-lib.c | 7 +++
2 files changed, 15 insertions(+)
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 51e80bc..68a9ac6 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -805,6 +805,14 @@ cmos_do_probe(struct device *dev, struct resource *ports,
int rtc_irq)
spin_lock_irq(_lock);
+ /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
+ if ((CMOS_READ(RTC_VALID) & 0x7f) != 0) {
+ spin_unlock_irq(_lock);
+ dev_warn(dev, "not accessible\n");
+ retval = -ENXIO;
+ goto cleanup1;
+ }
+
if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
/* force periodic irq to CMOS reset default of 1024Hz;
*
diff --git a/drivers/rtc/rtc-mc146818-lib.c b/drivers/rtc/rtc-mc146818-lib.c
index 972a5b9..f83c138 100644
--- a/drivers/rtc/rtc-mc146818-lib.c
+++ b/drivers/rtc/rtc-mc146818-lib.c
@@ -21,6 +21,13 @@ unsigned int mc146818_get_time(struct rtc_time *time)
again:
spin_lock_irqsave(_lock, flags);
+ /* Ensure that the RTC is accessible. Bit 0-6 must be 0! */
+ if (WARN_ON_ONCE((CMOS_READ(RTC_VALID) & 0x7f) != 0)) {
+ spin_unlock_irqrestore(_lock, flags);
+ memset(time, 0xff, sizeof(*time));
+ return 0;
+ }
+
/*
* Check whether there is an update in progress during which the
* readout is unspecified. The maximum update time is ~2ms. Poll
Re: [GIT PULL] timers/urgent for v5.11-rc5
The pull request you sent on Sun, 24 Jan 2021 12:11:26 +0100: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > tags/timers_urgent_for_v5.11_rc5 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/025929f46813c572d4ef0b379c704bf664e8a7a3 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[GIT PULL] timers/urgent for v5.11-rc5
Hi Linus, please pull two urgent fixes to the timers machinery, for v5.11. Thx. --- The following changes since commit 7c53f6b671f4aba70ff15e1b05148b10d58c2837: Linux 5.11-rc3 (2021-01-10 14:34:50 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/timers_urgent_for_v5.11_rc5 for you to fetch changes up to e3fab2f3de081e98c50b7b4ace1b040161d95310: ntp: Fix RTC synchronization on 32-bit platforms (2021-01-12 21:13:01 +0100) - Fix an integer overflow in the NTP RTC synchronization which lead to latter happening every 2 seconds instead of the intended every 11 minutes. - Get rid of now unused get_seconds(). Chunguang Xu (1): timekeeping: Remove unused get_seconds() Geert Uytterhoeven (1): ntp: Fix RTC synchronization on 32-bit platforms include/linux/ktime.h | 1 - include/linux/timekeeping32.h | 14 -- kernel/time/ntp.c | 4 ++-- kernel/time/timekeeping.c | 3 +-- 4 files changed, 3 insertions(+), 19 deletions(-) delete mode 100644 include/linux/timekeeping32.h -- Regards/Gruss, Boris. SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg
[tip: timers/urgent] timekeeping: Remove unused get_seconds()
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: aba428a0c612bb259891307da12e22efd0fab14c
Gitweb:
https://git.kernel.org/tip/aba428a0c612bb259891307da12e22efd0fab14c
Author:Chunguang Xu
AuthorDate:Tue, 01 Dec 2020 17:52:31 +08:00
Committer: Thomas Gleixner
CommitterDate: Tue, 12 Jan 2021 21:13:01 +01:00
timekeeping: Remove unused get_seconds()
The get_seconds() cleanup seems to have been completed, now it is
time to delete the legacy interface to avoid misuse later.
Signed-off-by: Chunguang Xu
Signed-off-by: Thomas Gleixner
Link:
https://lore.kernel.org/r/1606816351-26900-1-git-send-email-broo...@tencent.com
---
include/linux/ktime.h | 1 -
include/linux/timekeeping32.h | 14 --
kernel/time/timekeeping.c | 3 +--
3 files changed, 1 insertion(+), 17 deletions(-)
delete mode 100644 include/linux/timekeeping32.h
diff --git a/include/linux/ktime.h b/include/linux/ktime.h
index a12b552..73f20de 100644
--- a/include/linux/ktime.h
+++ b/include/linux/ktime.h
@@ -230,6 +230,5 @@ static inline ktime_t ms_to_ktime(u64 ms)
}
# include
-# include
#endif
diff --git a/include/linux/timekeeping32.h b/include/linux/timekeeping32.h
deleted file mode 100644
index 266017f..000
--- a/include/linux/timekeeping32.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef _LINUX_TIMEKEEPING32_H
-#define _LINUX_TIMEKEEPING32_H
-/*
- * These interfaces are all based on the old timespec type
- * and should get replaced with the timespec64 based versions
- * over time so we can remove the file here.
- */
-
-static inline unsigned long get_seconds(void)
-{
- return ktime_get_real_seconds();
-}
-
-#endif
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index a45cedd..6aee576 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -991,8 +991,7 @@ EXPORT_SYMBOL_GPL(ktime_get_seconds);
/**
* ktime_get_real_seconds - Get the seconds portion of CLOCK_REALTIME
*
- * Returns the wall clock seconds since 1970. This replaces the
- * get_seconds() interface which is not y2038 safe on 32bit systems.
+ * Returns the wall clock seconds since 1970.
*
* For 64bit systems the fast access to tk->xtime_sec is preserved. On
* 32bit systems the access must be protected with the sequence
[tip: timers/urgent] ntp: Fix RTC synchronization on 32-bit platforms
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: e3fab2f3de081e98c50b7b4ace1b040161d95310
Gitweb:
https://git.kernel.org/tip/e3fab2f3de081e98c50b7b4ace1b040161d95310
Author:Geert Uytterhoeven
AuthorDate:Mon, 11 Jan 2021 11:39:56 +01:00
Committer: Thomas Gleixner
CommitterDate: Tue, 12 Jan 2021 21:13:01 +01:00
ntp: Fix RTC synchronization on 32-bit platforms
Due to an integer overflow, RTC synchronization now happens every 2s
instead of the intended 11 minutes. Fix this by forcing 64-bit
arithmetic for the sync period calculation.
Annotate the other place which multiplies seconds for consistency as well.
Fixes: c9e6189fb03123a7 ("ntp: Make the RTC synchronization more reliable")
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Thomas Gleixner
Link: https://lore.kernel.org/r/2021003956.290378-1-geert+rene...@glider.be
---
kernel/time/ntp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index 7404d38..87389b9 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -498,7 +498,7 @@ out:
static void sync_hw_clock(struct work_struct *work);
static DECLARE_WORK(sync_work, sync_hw_clock);
static struct hrtimer sync_hrtimer;
-#define SYNC_PERIOD_NS (11UL * 60 * NSEC_PER_SEC)
+#define SYNC_PERIOD_NS (11ULL * 60 * NSEC_PER_SEC)
static enum hrtimer_restart sync_timer_callback(struct hrtimer *timer)
{
@@ -512,7 +512,7 @@ static void sched_sync_hw_clock(unsigned long offset_nsec,
bool retry)
ktime_t exp = ktime_set(ktime_get_real_seconds(), 0);
if (retry)
- exp = ktime_add_ns(exp, 2 * NSEC_PER_SEC - offset_nsec);
+ exp = ktime_add_ns(exp, 2ULL * NSEC_PER_SEC - offset_nsec);
else
exp = ktime_add_ns(exp, SYNC_PERIOD_NS - offset_nsec);
[tip: timers/urgent] timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill"
The following commit has been merged into the timers/urgent branch of tip: Commit-ID: f6f5cd840ae782680c5e94048c72420e4e6857f9 Gitweb: https://git.kernel.org/tip/f6f5cd840ae782680c5e94048c72420e4e6857f9 Author:Colin Ian King AuthorDate:Thu, 17 Dec 2020 17:17:05 Committer: Thomas Gleixner CommitterDate: Fri, 18 Dec 2020 23:15:00 +01:00 timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill" There is a spelling mistake in the Kconfig help text. Fix it. Signed-off-by: Colin Ian King Signed-off-by: Thomas Gleixner Acked-by: Linus Walleij Link: https://lore.kernel.org/r/20201217171705.57586-1-colin.k...@canonical.com --- kernel/time/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig index a09b1d6..64051f4 100644 --- a/kernel/time/Kconfig +++ b/kernel/time/Kconfig @@ -141,7 +141,7 @@ config CONTEXT_TRACKING_FORCE dynticks working. This option stands for testing when an arch implements the - context tracking backend but doesn't yet fullfill all the + context tracking backend but doesn't yet fulfill all the requirements to make the full dynticks feature working. Without the full dynticks, there is no way to test the support for context tracking and the subsystems that rely on it: RCU
[tip: timers/urgent] tick: Remove pointless cpu valid check in hotplug code
The following commit has been merged into the timers/urgent branch of tip:
Commit-ID: f12ad423c4af877b2e4b5a80928b95195fccab04
Gitweb:
https://git.kernel.org/tip/f12ad423c4af877b2e4b5a80928b95195fccab04
Author:Thomas Gleixner
AuthorDate:Sun, 06 Dec 2020 22:12:54 +01:00
Committer: Thomas Gleixner
CommitterDate: Wed, 16 Dec 2020 11:26:27 +01:00
tick: Remove pointless cpu valid check in hotplug code
tick_handover_do_timer() which is invoked when a CPU is unplugged has a
check for cpumask_first(cpu_online_mask) when it tries to hand over the
tick update duty.
Checking the result of cpumask_first() there is pointless because if the
online mask is empty at this point, then this would be the last CPU in the
system going offline, which is impossible. There is always at least one CPU
remaining. If online mask would be really empty then the timer duty would
be the least of the resulting problems.
Remove the well meant check simply because it is pointless and confusing.
Signed-off-by: Thomas Gleixner
Reviewed-by: Frederic Weisbecker
Link: https://lore.kernel.org/r/20201206212002.582579...@linutronix.de
---
kernel/time/tick-common.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c
index a03764d..9d3a225 100644
--- a/kernel/time/tick-common.c
+++ b/kernel/time/tick-common.c
@@ -407,17 +407,13 @@ EXPORT_SYMBOL_GPL(tick_broadcast_oneshot_control);
/*
* Transfer the do_timer job away from a dying cpu.
*
- * Called with interrupts disabled. Not locking required. If
+ * Called with interrupts disabled. No locking required. If
* tick_do_timer_cpu is owned by this cpu, nothing can change it.
*/
void tick_handover_do_timer(void)
{
- if (tick_do_timer_cpu == smp_processor_id()) {
- int cpu = cpumask_first(cpu_online_mask);
-
- tick_do_timer_cpu = (cpu < nr_cpu_ids) ? cpu :
- TICK_DO_TIMER_NONE;
- }
+ if (tick_do_timer_cpu == smp_processor_id())
+ tick_do_timer_cpu = cpumask_first(cpu_online_mask);
}
/*
[tip: timers/urgent] tick/sched: Remove bogus boot "safety" check
The following commit has been merged into the timers/urgent branch of tip: Commit-ID: ba8ea8e7dd6e1662e34e730eadfc52aa6816f9dd Gitweb: https://git.kernel.org/tip/ba8ea8e7dd6e1662e34e730eadfc52aa6816f9dd Author:Thomas Gleixner AuthorDate:Sun, 06 Dec 2020 22:12:55 +01:00 Committer: Thomas Gleixner CommitterDate: Wed, 16 Dec 2020 11:26:27 +01:00 tick/sched: Remove bogus boot "safety" check can_stop_idle_tick() checks whether the do_timer() duty has been taken over by a CPU on boot. That's silly because the boot CPU always takes over with the initial clockevent device. But even if no CPU would have installed a clockevent and taken over the duty then the question whether the tick on the current CPU can be stopped or not is moot. In that case the current CPU would have no clockevent either, so there would be nothing to keep ticking. Remove it. Signed-off-by: Thomas Gleixner Acked-by: Frederic Weisbecker Link: https://lore.kernel.org/r/20201206212002.725238...@linutronix.de --- kernel/time/tick-sched.c | 7 --- 1 file changed, 7 deletions(-) diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c index a9e6893..5fbc748 100644 --- a/kernel/time/tick-sched.c +++ b/kernel/time/tick-sched.c @@ -991,13 +991,6 @@ static bool can_stop_idle_tick(int cpu, struct tick_sched *ts) */ if (tick_do_timer_cpu == cpu) return false; - /* -* Boot safety: make sure the timekeeping duty has been -* assigned before entering dyntick-idle mode, -* tick_do_timer_cpu is TICK_DO_TIMER_BOOT -*/ - if (unlikely(tick_do_timer_cpu == TICK_DO_TIMER_BOOT)) - return false; /* Should not happen for nohz-full */ if (WARN_ON_ONCE(tick_do_timer_cpu == TICK_DO_TIMER_NONE))
Re: [GIT pull] timers/core for v5.11-rc1
The pull request you sent on Mon, 14 Dec 2020 20:22:19 -: > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > timers-core-2020-12-14 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/533369b145d8d1bc44b8ed7f0dd0ecffb16384cc Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
[GIT pull] timers/core for v5.11-rc1
Linus,
please pull the latest timers/core branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-core-2020-12-14
up to: 3cabca87b329: ntp: Fix prototype in the !CONFIG_GENERIC_CMOS_UPDATE case
timers and timekeeping updates:
Core:
- Robustness improvements for the NOHZ tick management
- Fixes and consolidation of the NTP/RTC synchronization code
- Small fixes and improvements in various places
- A set of function documentation udpates and fixes
Drivers:
- Cleanups and improvements in various clocksoure/event drivers
- Removal of the EZChip NPS clocksource driver as the platfrom support
was removed from ARC
- The usual set of new device tree binding and json conversions
- The RTC driver which have been acked by the RTC maintainer:
- Fix a long standing bug in the MC146818 library code which can cause
reading garbage during the RTC internal update.
- The changes related to the NTP/RTC consolidation work.
Thanks,
tglx
-->
Alex Shi (6):
time: Add missing colons for parameter documentation of time64_to_tm()
timekeeping: Remove static functions from kernel-doc markup
timekeeping: Add missing parameter documentation for
update_fast_timekeeper()
timekeeping: Add missing parameter docs for
pvclock_gtod_[un]register_notifier()
timekeeping: Fix parameter docs of read_persistent_wall_and_boot_offset()
timekeeping: Address parameter documentation issues for various functions
Daniel Lezcano (1):
clocksource/drivers/ingenic: Fix section mismatch
Davidlohr Bueso (1):
timekeeping: Convert jiffies_seq to seqcount_raw_spinlock_t
Dinh Nguyen (1):
clocksource/drivers/dw_apb_timer_of: Add error handling if no clock
available
Geert Uytterhoeven (1):
dt-bindings: timer: renesas: tmu: Convert to json-schema
Helge Deller (1):
timer_list: Use printk format instead of open-coded symbol lookup
Ingo Molnar (1):
ntp: Fix prototype in the !CONFIG_GENERIC_CMOS_UPDATE case
Kefeng Wang (5):
clocksource/drivers/sp804: Make some symbol static
clocksource/drivers/sp804: Use clk_prepare_enable and
clk_disable_unprepare
clocksource/drivers/sp804: Correct clk_get_rate handle
clocksource/drivers/sp804: Use pr_fmt
clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI
Keqian Zhu (2):
clocksource/drivers/arm_arch_timer: Use stable count reader in erratum sne
clocksource/drivers/arm_arch_timer: Correct fault programming of
CNTKCTL_EL1.EVNTI
Marian-Cristian Rotariu (1):
dt-bindings: timer: renesas: tmu: Document r8a774e1 bindings
Mauro Carvalho Chehab (1):
hrtimer: Fix kernel-doc markups
Niklas Söderlund (1):
clocksource/drivers/sh_cmt: Fix potential deadlock when calling runtime PM
Sebastian Andrzej Siewior (1):
timers: Don't block on ->expiry_lock for TIMER_IRQSAFE timers
Thomas Gleixner (16):
timekeeping: Fix up function documentation for the NMI safe accessors
timers: Make run_local_timers() static
tick/broadcast: Serialize access to tick_next_period
tick: Document protections for tick related data
tick/sched: Use tick_next_period for lockless quick check
tick/sched: Optimize tick_do_update_jiffies64() further
tick: Get rid of tick_period
rtc: mc146818: Prevent reading garbage
rtc: mc146818: Reduce spinlock section in mc146818_set_time()
rtc: cmos: Make rtc_cmos sync offset correct
rtc: core: Make the sync offset default more realistic
ntp: Make the RTC synchronization more reliable
ntp, rtc: Move rtc_set_ntp_time() to ntp code
ntp: Make the RTC sync offset less obscure
ntp: Consolidate the RTC update implementation
tick/sched: Make jiffies update quick check more robust
Vineet Gupta (1):
clocksource/drivers/nps: Remove EZChip NPS clocksource driver
Yang Yingliang (1):
clocksource/drivers/orion: Add missing clk_disable_unprepare() on error
path
Yu Kuai (1):
clocksource/drivers/cadence_ttc: Fix memory leak in ttc_setup_clockevent()
Yunfeng Ye (2):
tick/sched: Reduce seqcount held scope in tick_do_update_jiffies64()
tick/sched: Release seqcount before invoking calc_load_global()
Zhen Lei (1):
clocksource/drivers/sp804: Add static for functions such as
sp804_clockevents_init()
周琰杰 (Zhou Yanjie) (1):
dt-bindings: timer: Add new OST support for the upcoming new driver.
.../devicetree/bindings/timer/renesas,tmu.txt | 49
.../devicetree/bindings/timer/renesas,tmu.yaml | 99 +++
drivers/clocksource/Kconfig| 12 +-
drivers/clocksource/Makefile | 1 -
drivers/clocksource/arm_arch_timer.c | 27 +-
drivers/clocksource/dw_apb_timer_of.c | 57 +++--
drivers/clocksource/ingenic-timer.c| 2 +-
drivers/clocksource/sh
[tip: timers/core] ntp: Fix prototype in the !CONFIG_GENERIC_CMOS_UPDATE case
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 3cabca87b329cbcbdf295be0094adbd72c7b1f67
Gitweb:
https://git.kernel.org/tip/3cabca87b329cbcbdf295be0094adbd72c7b1f67
Author:Ingo Molnar
AuthorDate:Sat, 12 Dec 2020 18:29:20 +01:00
Committer: Ingo Molnar
CommitterDate: Sun, 13 Dec 2020 10:16:31 +01:00
ntp: Fix prototype in the !CONFIG_GENERIC_CMOS_UPDATE case
In the !CONFIG_GENERIC_CMOS_UPDATE case the update_persistent_clock64() function
gets defined as a stub in ntp.c - make the prototype in
conditional on CONFIG_GENERIC_CMOS_UPDATE as well.
Fixes: 76e87d96b30b5 ("ntp: Consolidate the RTC update implementation")
Signed-off-by: Ingo Molnar
Acked-by: Thomas Gleixner
---
include/linux/timekeeping.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/timekeeping.h b/include/linux/timekeeping.h
index 7f7e4a3..929d3f3 100644
--- a/include/linux/timekeeping.h
+++ b/include/linux/timekeeping.h
@@ -303,6 +303,8 @@ extern int persistent_clock_is_local;
extern void read_persistent_clock64(struct timespec64 *ts);
void read_persistent_wall_and_boot_offset(struct timespec64 *wall_clock,
struct timespec64 *boot_offset);
+#ifdef CONFIG_GENERIC_CMOS_UPDATE
extern int update_persistent_clock64(struct timespec64 now);
+#endif
#endif
[tip: timers/core] ntp: Fix build error
The following commit has been merged into the timers/core branch of tip: Commit-ID: a3356a079da268cd35460d9bfe052c74383e179b Gitweb: https://git.kernel.org/tip/a3356a079da268cd35460d9bfe052c74383e179b Author:Ingo Molnar AuthorDate:Sat, 12 Dec 2020 18:29:20 +01:00 Committer: Ingo Molnar CommitterDate: Sat, 12 Dec 2020 18:35:12 +01:00 ntp: Fix build error Signed-off-by: Ingo Molnar --- include/linux/timekeeping.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/timekeeping.h b/include/linux/timekeeping.h index 7f7e4a3..929d3f3 100644 --- a/include/linux/timekeeping.h +++ b/include/linux/timekeeping.h @@ -303,6 +303,8 @@ extern int persistent_clock_is_local; extern void read_persistent_clock64(struct timespec64 *ts); void read_persistent_wall_and_boot_offset(struct timespec64 *wall_clock, struct timespec64 *boot_offset); +#ifdef CONFIG_GENERIC_CMOS_UPDATE extern int update_persistent_clock64(struct timespec64 now); +#endif #endif
[tip: timers/core] clocksource/drivers/arm_arch_timer: Use stable count reader in erratum sne
The following commit has been merged into the timers/core branch of tip:
Commit-ID: d8cc3905b8073c7cfbff94af889fa8dc71f21dd5
Gitweb:
https://git.kernel.org/tip/d8cc3905b8073c7cfbff94af889fa8dc71f21dd5
Author:Keqian Zhu
AuthorDate:Fri, 04 Dec 2020 15:31:25 +08:00
Committer: Daniel Lezcano
CommitterDate: Sat, 05 Dec 2020 19:33:55 +01:00
clocksource/drivers/arm_arch_timer: Use stable count reader in erratum sne
In commit 0ea415390cd3 ("clocksource/arm_arch_timer: Use arch_timer_read_counter
to access stable counters"), we separate stable and normal count reader to omit
unnecessary overhead on systems that have no timer erratum.
However, in erratum_set_next_event_tval_generic(), count reader becomes normal
reader. This converts it to stable reader.
Fixes: 0ea415390cd3 ("clocksource/arm_arch_timer: Use arch_timer_read_counter
to access stable counters")
Acked-by: Marc Zyngier
Signed-off-by: Keqian Zhu
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20201204073126.6920-2-zhukeqi...@huawei.com
---
drivers/clocksource/arm_arch_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c
b/drivers/clocksource/arm_arch_timer.c
index 6c3e841..777d38c 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -396,10 +396,10 @@ static void erratum_set_next_event_tval_generic(const int
access, unsigned long
ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
if (access == ARCH_TIMER_PHYS_ACCESS) {
- cval = evt + arch_counter_get_cntpct();
+ cval = evt + arch_counter_get_cntpct_stable();
write_sysreg(cval, cntp_cval_el0);
} else {
- cval = evt + arch_counter_get_cntvct();
+ cval = evt + arch_counter_get_cntvct_stable();
write_sysreg(cval, cntv_cval_el0);
}
[tip: timers/core] clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 5d9814df0aec56a638bbf20795abb4cfaf3cd331
Gitweb:
https://git.kernel.org/tip/5d9814df0aec56a638bbf20795abb4cfaf3cd331
Author:Dinh Nguyen
AuthorDate:Sat, 05 Dec 2020 04:52:23 -06:00
Committer: Daniel Lezcano
CommitterDate: Sat, 05 Dec 2020 19:33:55 +01:00
clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
commit ("b0fc70ce1f02 arm64: berlin: Select DW_APB_TIMER_OF") added the
support for the dw_apb_timer into the arm64 defconfig. However, for some
platforms like the Intel Stratix10 and Agilex, the clock manager doesn't
get loaded until after the timer driver get loaded. Thus, the driver hits
the panic "No clock nor clock-frequency property for" because it cannot
properly get the clock.
This patch adds the error handling needed for the timer driver so that
the kernel can continue booting instead of just hitting the panic.
Signed-off-by: Dinh Nguyen
Signed-off-by: Daniel Lezcano
Link: https://lore.kernel.org/r/20201205105223.208604-1-dingu...@kernel.org
---
drivers/clocksource/dw_apb_timer_of.c | 57 +-
1 file changed, 39 insertions(+), 18 deletions(-)
diff --git a/drivers/clocksource/dw_apb_timer_of.c
b/drivers/clocksource/dw_apb_timer_of.c
index ab3ddeb..42e7e43 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -14,12 +14,13 @@
#include
#include
-static void __init timer_get_base_and_rate(struct device_node *np,
+static int __init timer_get_base_and_rate(struct device_node *np,
void __iomem **base, u32 *rate)
{
struct clk *timer_clk;
struct clk *pclk;
struct reset_control *rstc;
+ int ret;
*base = of_iomap(np, 0);
@@ -46,55 +47,67 @@ static void __init timer_get_base_and_rate(struct
device_node *np,
pr_warn("pclk for %pOFn is present, but could not be
activated\n",
np);
+ if (!of_property_read_u32(np, "clock-freq", rate) &&
+ !of_property_read_u32(np, "clock-frequency", rate))
+ return 0;
+
timer_clk = of_clk_get_by_name(np, "timer");
if (IS_ERR(timer_clk))
- goto try_clock_freq;
+ return PTR_ERR(timer_clk);
- if (!clk_prepare_enable(timer_clk)) {
- *rate = clk_get_rate(timer_clk);
- return;
- }
+ ret = clk_prepare_enable(timer_clk);
+ if (ret)
+ return ret;
+
+ *rate = clk_get_rate(timer_clk);
+ if (!(*rate))
+ return -EINVAL;
-try_clock_freq:
- if (of_property_read_u32(np, "clock-freq", rate) &&
- of_property_read_u32(np, "clock-frequency", rate))
- panic("No clock nor clock-frequency property for %pOFn", np);
+ return 0;
}
-static void __init add_clockevent(struct device_node *event_timer)
+static int __init add_clockevent(struct device_node *event_timer)
{
void __iomem *iobase;
struct dw_apb_clock_event_device *ced;
u32 irq, rate;
+ int ret = 0;
irq = irq_of_parse_and_map(event_timer, 0);
if (irq == 0)
panic("No IRQ for clock event timer");
- timer_get_base_and_rate(event_timer, , );
+ ret = timer_get_base_and_rate(event_timer, , );
+ if (ret)
+ return ret;
ced = dw_apb_clockevent_init(-1, event_timer->name, 300, iobase, irq,
rate);
if (!ced)
- panic("Unable to initialise clockevent device");
+ return -EINVAL;
dw_apb_clockevent_register(ced);
+
+ return 0;
}
static void __iomem *sched_io_base;
static u32 sched_rate;
-static void __init add_clocksource(struct device_node *source_timer)
+static int __init add_clocksource(struct device_node *source_timer)
{
void __iomem *iobase;
struct dw_apb_clocksource *cs;
u32 rate;
+ int ret;
- timer_get_base_and_rate(source_timer, , );
+ ret = timer_get_base_and_rate(source_timer, , );
+ if (ret)
+ return ret;
cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
if (!cs)
- panic("Unable to initialise clocksource device");
+ return -EINVAL;
dw_apb_clocksource_start(cs);
dw_apb_clocksource_register(cs);
@@ -106,6 +119,8 @@ static void __init add_clocksource(struct device_node
*source_timer)
*/
sched_io_base = iobase + 0x04;
sched_rate = rate;
+
+ return 0;
}
static u64 notrace read_sched_clock(void)
@@ -146,10 +161,14 @@ static struct delay_timer dw_apb_delay_timer = {
static int num_
[tip: timers/core] clocksource/drivers/sh_cmt: Fix potential deadlock when calling runtime PM
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8ae954caf49ac403c177d117fb8e05cbc866aa3c
Gitweb:
https://git.kernel.org/tip/8ae954caf49ac403c177d117fb8e05cbc866aa3c
Author:Niklas Söderlund
AuthorDate:Sat, 05 Dec 2020 03:19:20 +01:00
Committer: Daniel Lezcano
CommitterDate: Mon, 07 Dec 2020 20:10:05 +01:00
clocksource/drivers/sh_cmt: Fix potential deadlock when calling runtime PM
The ch->lock is used to protect the whole enable() and read() of
sh_cmt's implementation of struct clocksource. The enable()
implementation calls pm_runtime_get_sync() which may result in the clock
source to be read() triggering a cyclic lockdep warning for the
ch->lock.
The sh_cmt driver implement its own balancing of calls to
sh_cmt_{enable,disable}() with flags in sh_cmt_{start,stop}(). It does
this to deal with that start and stop are shared between the clock
source and clock event providers. While this could be improved on
verifying corner cases based on any substantial rework on all devices
this driver supports might prove hard.
As a first step separate the PM handling for clock event and clock
source. Always put/get the device when enabling/disabling the clock
source but keep the clock event logic unchanged. This allows the sh_cmt
implementation of struct clocksource to call PM without holding the
ch->lock and avoiding the deadlock.
Triggering and log of the deadlock warning,
# echo e60f.timer >
/sys/devices/system/clocksource/clocksource0/current_clocksource
[ 46.948370] ==
[ 46.954730] WARNING: possible circular locking dependency detected
[ 46.961094] 5.10.0-rc6-arm64-renesas-1-g0e5fd7414e8b #36 Not tainted
[ 46.967985] --
[ 46.974342] migration/0/11 is trying to acquire lock:
[ 46.979543] 403ed220 (>power.lock){-...}-{2:2}, at:
__pm_runtime_resume+0x40/0x74
[ 46.988445]
[ 46.988445] but task is already holding lock:
[ 46.994441] 40ad0298 (>lock){}-{2:2}, at:
sh_cmt_start+0x28/0x210
[ 47.002173]
[ 47.002173] which lock already depends on the new lock.
[ 47.002173]
[ 47.010573]
[ 47.010573] the existing dependency chain (in reverse order) is:
[ 47.018262]
[ 47.018262] -> #3 (>lock){}-{2:2}:
[ 47.024033]lock_acquire.part.0+0x120/0x330
[ 47.028970]lock_acquire+0x64/0x80
[ 47.033105]_raw_spin_lock_irqsave+0x7c/0xc4
[ 47.038130]sh_cmt_start+0x28/0x210
[ 47.042352]sh_cmt_clocksource_enable+0x28/0x50
[ 47.047644]change_clocksource+0x9c/0x160
[ 47.052402]multi_cpu_stop+0xa4/0x190
[ 47.056799]cpu_stopper_thread+0x90/0x154
[ 47.061557]smpboot_thread_fn+0x244/0x270
[ 47.066310]kthread+0x154/0x160
[ 47.070175]ret_from_fork+0x10/0x20
[ 47.074390]
[ 47.074390] -> #2 (tk_core.seq.seqcount){}-{0:0}:
[ 47.081136]lock_acquire.part.0+0x120/0x330
[ 47.086070]lock_acquire+0x64/0x80
[ 47.090203]seqcount_lockdep_reader_access.constprop.0+0x74/0x100
[ 47.097096]ktime_get+0x28/0xa0
[ 47.100960]hrtimer_start_range_ns+0x210/0x2dc
[ 47.106164]generic_sched_clock_init+0x70/0x88
[ 47.111364]sched_clock_init+0x40/0x64
[ 47.115853]start_kernel+0x494/0x524
[ 47.120156]
[ 47.120156] -> #1 (hrtimer_bases.lock){-.-.}-{2:2}:
[ 47.126721]lock_acquire.part.0+0x120/0x330
[ 47.136042]lock_acquire+0x64/0x80
[ 47.144461]_raw_spin_lock_irqsave+0x7c/0xc4
[ 47.153721]hrtimer_start_range_ns+0x68/0x2dc
[ 47.163054]rpm_suspend+0x308/0x5dc
[ 47.171473]rpm_idle+0xc4/0x2a4
[ 47.179550]pm_runtime_work+0x98/0xc0
[ 47.188209]process_one_work+0x294/0x6f0
[ 47.197142]worker_thread+0x70/0x45c
[ 47.205661]kthread+0x154/0x160
[ 47.213673]ret_from_fork+0x10/0x20
[ 47.221957]
[ 47.221957] -> #0 (>power.lock){-...}-{2:2}:
[ 47.236292]check_noncircular+0x128/0x140
[ 47.244907]__lock_acquire+0x13b0/0x204c
[ 47.253332]lock_acquire.part.0+0x120/0x330
[ 47.262033]lock_acquire+0x64/0x80
[ 47.269826]_raw_spin_lock_irqsave+0x7c/0xc4
[ 47.278430]__pm_runtime_resume+0x40/0x74
[ 47.286758]sh_cmt_start+0x84/0x210
[ 47.294537]sh_cmt_clocksource_enable+0x28/0x50
[ 47.303449]change_clocksource+0x9c/0x160
[ 47.311783]multi_cpu_stop+0xa4/0x190
[ 47.319720]cpu_stopper_thread+0x90/0x154
[ 47.328022]smpboot_thread_fn+0x244/0x270
[ 47.336298]kthread+0x154/0x160
[ 47.343708]ret_from_fork+0x10/0x20
[ 47.351445]
[ 47.351445]
