[rcu:dev.2021.03.15a] BUILD SUCCESS 7c9e50cc94bafe0ddfa28bb96b009f24c17ad149

[kernel test robot]

tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
dev.2021.03.15a
branch HEAD: 7c9e50cc94bafe0ddfa28bb96b009f24c17ad149  fixup! torture: Add 
prototype kvm-remote.sh script

elapsed time: 726m

configs tested: 143
configs skipped: 2

The following configs have been built successfully.
More configs may be tested in the coming days.

gcc tested configs:
arm defconfig
arm64allyesconfig
arm64   defconfig
arm  allyesconfig
arm  allmodconfig
x86_64   allyesconfig
riscvallmodconfig
riscvallyesconfig
i386 allyesconfig
arc  axs101_defconfig
sh  defconfig
ia64generic_defconfig
m68kmvme147_defconfig
riscvnommu_k210_defconfig
arc defconfig
h8300h8300h-sim_defconfig
powerpc tqm8560_defconfig
mipsnlm_xlp_defconfig
mips loongson1b_defconfig
m68km5407c3_defconfig
sh   se7712_defconfig
m68k   m5275evb_defconfig
arm   sunxi_defconfig
ia64 allmodconfig
s390  debug_defconfig
mips bigsur_defconfig
powerpc wii_defconfig
sh  sh7785lcr_32bit_defconfig
armmps2_defconfig
powerpc linkstation_defconfig
xtensa  audio_kc705_defconfig
mipsvocore2_defconfig
powerpcge_imp3a_defconfig
arm  exynos_defconfig
powerpc tqm8548_defconfig
arm at91_dt_defconfig
sh  r7780mp_defconfig
powerpc  ppc6xx_defconfig
mips  rb532_defconfig
openrisc simple_smp_defconfig
riscv  rv32_defconfig
sh  urquell_defconfig
armmvebu_v5_defconfig
mips   capcella_defconfig
powerpc mpc834x_mds_defconfig
mips decstation_r4k_defconfig
sh  lboxre2_defconfig
armvt8500_v6_v7_defconfig
powerpc   maple_defconfig
powerpcadder875_defconfig
sh  kfr2r09_defconfig
arm lpc32xx_defconfig
s390 alldefconfig
xtensa virt_defconfig
powerpc mpc832x_rdb_defconfig
csky alldefconfig
sh   sh7724_generic_defconfig
mipsmalta_qemu_32r6_defconfig
sh   se7721_defconfig
sh magicpanelr2_defconfig
powerpcamigaone_defconfig
arm   milbeaut_m10v_defconfig
powerpc  makalu_defconfig
powerpc  mpc885_ads_defconfig
m68km5307c3_defconfig
armshmobile_defconfig
mips  pic32mzda_defconfig
m68k   m5249evb_defconfig
um i386_defconfig
arm  pxa3xx_defconfig
m68k   m5208evb_defconfig
m68k   bvme6000_defconfig
powerpc kmeter1_defconfig
shedosk7760_defconfig
mipsar7_defconfig
sh espt_defconfig
ia64 alldefconfig
powerpc  tqm8xx_defconfig
arm socfpga_defconfig
mips  ath79_defconfig
xtensa  cadence_csp_defconfig
ia64defconfig
ia64 allyesconfig
m68k allmodconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
arc  allyesconfig
nds32 allnoconfig
nds32   defconfig
nios2allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
sh   allmodconfig
parisc  defconfig
s390 allyesconfig
s390 allmodconfig
parisc

linux-next: Tree for Mar 19

[Stephen Rothwell]

Hi all,

Warning: Some of the branches in linux-next may still based on v5.12-rc1,
so please be careful if you are trying to bisect a bug.

News: if your -next included tree is based on Linus' tree tag
v5.12-rc1{,-dontuse} (or somewhere between v5.11 and that tag), please
consider rebasing it onto v5.12-rc2. Also, please check any branches
merged into your branch.

Changes since 20210318:

The net-next tree gained a conflict against the net tree.

The amdgpu tree gained a build failure so I used the version from
next-20210318.

The security tree gained a conflict against the ext3 tree.

The rcu tree lost its build failure.

The akpm-current tree still had its build failure for which I applied
a hack.

The akpm tree gained a conflict against the security tre.

Non-merge commits (relative to Linus' tree): 5051
 4781 files changed, 329814 insertions(+), 90904 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log
files in the Next directory.  Between each merge, the tree was built
with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a
multi_v7_defconfig for arm and a native build of tools/perf. After
the final fixups (if any), I do an x86_64 modules_install followed by
builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit),
ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc
and sparc64 defconfig and htmldocs. And finally, a simple boot test
of the powerpc pseries_le_defconfig kernel in qemu (with and without
kvm enabled).

Below is a summary of the state of the merge.

I am currently merging 334 trees (counting Linus' and 87 trees of bug
fix patches pending for the current merge release).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwell

$ git checkout master
$ git reset --hard stable
Merging origin/master (81aa0968b7ea Merge tag 'for-5.12-rc3-tag' of 
git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux)
Merging fixes/fixes (e71ba9452f0b Linux 5.11-rc2)
Merging kbuild-current/fixes (bcbcf50f5218 kbuild: fix ld-version.sh to not be 
affected by locale)
Merging arc-current/for-curr (7c53f6b671f4 Linux 5.11-rc3)
Merging arm-current/fixes (a38fd8748464 Linux 5.12-rc2)
Merging arm64-fixes/for-next/fixes (0710442a88d1 arm64: csum: cast to the 
proper type)
Merging arm-soc-fixes/arm/fixes (090e502e4e63 Merge tag 
'socfpga_dts_fix_for_v5.12' of 
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes)
Merging drivers-memory-fixes/fixes (a38fd8748464 Linux 5.12-rc2)
Merging m68k-current/for-linus (a65a802aadba m68k: Fix virt_addr_valid() W=1 
compiler warnings)
Merging powerpc-fixes/fixes (cc7a0bb058b8 PCI: rpadlpar: Fix potential drc_name 
corruption in store functions)
Merging s390-fixes/fixes (0b13525c20fe s390/pci: fix leak of PCI device 
structure)
Merging sparc/master (05a59d79793d Merge 
git://git.kernel.org:/pub/scm/linux/kernel/git/netdev/net)
Merging fscrypt-current/for-stable (d19d8d345eec fscrypt: fix inline encryption 
not used on new files)
Merging net/master (600cc3c9c62d net: marvell: Remove reference to 
CONFIG_MV64X60)
CONFLICT (content): Merge conflict in drivers/net/can/usb/peak_usb/pcan_usb_fd.c
Merging bpf/master (eddbe8e65214 selftest/bpf: Add a test to check trampoline 
freeing logic.)
Merging ipsec/master (9ab1265d5231 xfrm: Use actual socket sk instead of skb 
socket for xfrm_output_resume)
CONFLICT (content): Merge conflict in net/ipv6/ip6_vti.c
CONFLICT (content): Merge conflict in net/ipv4/ip_vti.c
Merging netfilter/master (b58f33d49e42 netfilter: ctnetlink: fix dump of the 
expect mask attribute)
Merging ipvs/master (b58f33d49e42 netfilter: ctnetlink: fix dump of the expect 
mask attribute)
Merging wireless-drivers/master (05a59d79793d Merge 
git://git.kernel.org:/pub/scm/linux/kernel/git/netdev/net)
Merging mac80211/master (e65eaded4cc4 Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf)
Merging rdma-fixes/for-rc (22053df0a364 RDMA/mlx5: Fix typo in destroy_mkey 
inbox)
Merging sound-current/for-linus (50b1affc891c ALSA: usb-audio: Fix 
unintentional sign extens

Re: [PATCH v2 1/2] optee: fix tee out of memory failure seen during kexec reboot

[Jens Wiklander]

On Tue, Mar 16, 2021 at 2:21 PM Allen Pais  wrote:
>
>
>
> >>
> >> [0.368428] tee_bnxt_fw optee-clnt0: tee_shm_alloc failed
> >> [0.368461] tee_bnxt_fw: probe of optee-clnt0 failed with error -22
> >>
> >> tee_shm_release() is not invoked on dma shm buffer.
> >>
> >> Implement .shutdown() method to handle the release of the buffers
> >> correctly.
> >>
> >> More info:
> >> https://github.com/OP-TEE/optee_os/issues/3637
> >>
> >> Signed-off-by: Allen Pais 
> >> ---
> >>   drivers/tee/optee/core.c | 20 
> >>   1 file changed, 20 insertions(+)
> >
> > This looks good to me. Do you have a practical way of testing this on
> > QEMU for instance?
> >
>
> Jens,
>
>I could not reproduce nor create a setup using QEMU, I could only
> do it on a real h/w.
>
>I have extensively tested the fix and I don't see any issues.

I did a few test runs too, seems OK.

Thanks,
Jens

[PATCH v3 1/2] perf stat: Align CSV output for summary mode

[Jin Yao]

perf-stat has supported the summary mode. But the summary
lines break the CSV output so it's hard for scripts to parse
the result.

Before:

  # perf stat -x, -I1000 --interval-count 1 --summary
   1.001323097,8013.48,msec,cpu-clock,8013483384,100.00,8.013,CPUs utilized
   1.001323097,270,,context-switches,8013513297,100.00,0.034,K/sec
   1.001323097,13,,cpu-migrations,8013530032,100.00,0.002,K/sec
   1.001323097,184,,page-faults,8013546992,100.00,0.023,K/sec
   1.001323097,20574191,,cycles,8013551506,100.00,0.003,GHz
   1.001323097,10562267,,instructions,8013564958,100.00,0.51,insn per cycle
   1.001323097,2019244,,branches,8013575673,100.00,0.252,M/sec
   1.001323097,106152,,branch-misses,8013585776,100.00,5.26,of all branches
  8013.48,msec,cpu-clock,8013483384,100.00,7.984,CPUs utilized
  270,,context-switches,8013513297,100.00,0.034,K/sec
  13,,cpu-migrations,8013530032,100.00,0.002,K/sec
  184,,page-faults,8013546992,100.00,0.023,K/sec
  20574191,,cycles,8013551506,100.00,0.003,GHz
  10562267,,instructions,8013564958,100.00,0.51,insn per cycle
  2019244,,branches,8013575673,100.00,0.252,M/sec
  106152,,branch-misses,8013585776,100.00,5.26,of all branches

The summary line loses the timestamp column, which breaks the
CVS output.

We add a column at the original 'timestamp' position and it just says
'summary' for the summary line.

After:

  # perf stat -x, -I1000 --interval-count 1 --summary
   1.001196053,8012.72,msec,cpu-clock,8012722903,100.00,8.013,CPUs utilized
   1.001196053,218,,context-switches,8012753271,100.00,0.027,K/sec
   1.001196053,9,,cpu-migrations,8012769767,100.00,0.001,K/sec
   1.001196053,0,,page-faults,8012786257,100.00,0.000,K/sec
   1.001196053,15004518,,cycles,8012790637,100.00,0.002,GHz
   1.001196053,7954691,,instructions,8012804027,100.00,0.53,insn per cycle
   1.001196053,1590259,,branches,8012814766,100.00,0.198,M/sec
   1.001196053,82601,,branch-misses,8012824365,100.00,5.19,of all branches
   summary,8012.72,msec,cpu-clock,8012722903,100.00,7.986,CPUs utilized
   summary,218,,context-switches,8012753271,100.00,0.027,K/sec
   summary,9,,cpu-migrations,8012769767,100.00,0.001,K/sec
   summary,0,,page-faults,8012786257,100.00,0.000,K/sec
   summary,15004518,,cycles,8012790637,100.00,0.002,GHz
   summary,7954691,,instructions,8012804027,100.00,0.53,insn per cycle
   summary,1590259,,branches,8012814766,100.00,0.198,M/sec
   summary,82601,,branch-misses,8012824365,100.00,5.19,of all branches

Now it's easy for script to analyse the summary lines.

Of course, we also consider not to break possible existing scripts which
have fixed the broken CVS format, we provide a optiton '--no-cvs-summary'
to keep original output.

  # perf stat -x, -I1000 --interval-count 1 --summary --no-cvs-summary
   1.001213261,8012.67,msec,cpu-clock,8012672327,100.00,8.013,CPUs utilized
   1.001213261,197,,context-switches,8012703742,100.00,24.586,/sec
   1.001213261,9,,cpu-migrations,8012720902,100.00,1.123,/sec
   1.001213261,644,,page-faults,8012738266,100.00,80.373,/sec
   1.001213261,18350698,,cycles,8012744109,100.00,0.002,GHz
   1.001213261,12745021,,instructions,8012759001,100.00,0.69,insn per cycle
   1.001213261,2458033,,branches,8012770864,100.00,306.768,K/sec
   1.001213261,102107,,branch-misses,8012781751,100.00,4.15,of all branches
  8012.67,msec,cpu-clock,8012672327,100.00,7.985,CPUs utilized
  197,,context-switches,8012703742,100.00,24.586,/sec
  9,,cpu-migrations,8012720902,100.00,1.123,/sec
  644,,page-faults,8012738266,100.00,80.373,/sec
  18350698,,cycles,8012744109,100.00,0.002,GHz
  12745021,,instructions,8012759001,100.00,0.69,insn per cycle
  2458033,,branches,8012770864,100.00,306.768,K/sec
  102107,,branch-misses,8012781751,100.00,4.15,of all branches

This option can be enabled in perf config by setting the variable
'stat.no-cvs-summary'.

  # perf config stat.no-cvs-summary=true

  # perf config -l
  stat.no-cvs-summary=true

  # perf stat -x, -I1000 --interval-count 1 --summary
   1.001330198,8013.28,msec,cpu-clock,8013279201,100.00,8.013,CPUs utilized
   1.001330198,205,,context-switches,8013308394,100.00,25.583,/sec
   1.001330198,10,,cpu-migrations,8013324681,100.00,1.248,/sec
   1.001330198,0,,page-faults,8013340926,100.00,0.000,/sec
   1.001330198,8027742,,cycles,8013344503,100.00,0.001,GHz
   1.001330198,2871717,,instructions,8013356501,100.00,0.36,insn per cycle
   1.001330198,553564,,branches,8013366204,100.00,69.081,K/sec
   1.001330198,54021,,branch-misses,8013375952,100.00,9.76,of all branches
  8013.28,msec,cpu-clock,8013279201,100.00,7.985,CPUs utilized
  205,,context-switches,8013308394,100.00,25.583,/sec
  10,,cpu-migrations,8013324681,100.00,1.248,/sec
  0,,page-faults,8013340926,100.00,0.000,/sec
  8027742,,cycles,8013344503,100.00,0.001,GHz
  2871717,,instructions,80

[PATCH v3 2/2] perf test: Add CVS summary test

[Jin Yao]

The patch "perf stat: Align CSV output for summary mode" aligned
CVS output and added "summary" to the first column of summary
lines.

Now we check if the "summary" string is added to the CVS output.

If we set '--no-cvs-summary' option, the "summary" string would
not be added, also check with this case.

Signed-off-by: Jin Yao 
---
 v3:
   - New in v3.
 
 tools/perf/tests/shell/stat+cvs_summary.sh | 31 ++
 1 file changed, 31 insertions(+)
 create mode 100755 tools/perf/tests/shell/stat+cvs_summary.sh

diff --git a/tools/perf/tests/shell/stat+cvs_summary.sh 
b/tools/perf/tests/shell/stat+cvs_summary.sh
new file mode 100755
index ..dd14f2ce7f6b
--- /dev/null
+++ b/tools/perf/tests/shell/stat+cvs_summary.sh
@@ -0,0 +1,31 @@
+#!/bin/sh
+# perf stat cvs summary test
+# SPDX-License-Identifier: GPL-2.0
+
+set -e
+
+#
+# 1.001364330 9224197  cycles 8012885033 100.00
+# summary 9224197  cycles 8012885033 100.00
+#
+perf stat -e cycles  -x' ' -I1000 --interval-count 1 --summary 2>&1 | \
+grep -e summary | \
+while read summary num event run pct
+do
+   if [ $summary != "summary" ]; then
+   exit 1
+   fi
+done
+
+#
+# 1.001360298 9148534  cycles 8012853854 100.00
+#9148534  cycles 8012853854 100.00
+#
+perf stat -e cycles  -x' ' -I1000 --interval-count 1 --summary 
--no-cvs-summary 2>&1 | \
+grep -e summary | \
+while read num event run pct
+do
+   exit 1
+done
+
+exit 0
-- 
2.17.1

RE: [PATCH 04/11] i2c: imx-lpi2c: manage irq resource request/release in runtime pm

[Clark Wang]

> -Original Message-
> From: Aisheng Dong 
> Sent: Friday, March 19, 2021 12:54
> To: Clark Wang ; shawn...@kernel.org;
> s.ha...@pengutronix.de
> Cc: ker...@pengutronix.de; feste...@gmail.com; dl-linux-imx  i...@nxp.com>; sumit.sem...@linaro.org; christian.koe...@amd.com;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org
> Subject: RE: [PATCH 04/11] i2c: imx-lpi2c: manage irq resource
> request/release in runtime pm
> 
> > From: Clark Wang 
> > Sent: Wednesday, March 17, 2021 2:54 PM
> >
> > Manage irq resource request/release in runtime pm to save irq domain's
> > power.
> >
> > Signed-off-by: Frank Li 
> > Signed-off-by: Fugang Duan 
> > Reviewed-by: Frank Li 
> > ---
> >  drivers/i2c/busses/i2c-imx-lpi2c.c | 26 ++
> >  1 file changed, 14 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > index 664fcc0dba51..e718bb6b2387 100644
> > --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > @@ -94,6 +94,7 @@ enum lpi2c_imx_pincfg {
> >
> >  struct lpi2c_imx_struct {
> > struct i2c_adapter  adapter;
> > +   int irq;
> > struct clk  *clk_per;
> > struct clk  *clk_ipg;
> > void __iomem*base;
> > @@ -543,7 +544,7 @@ static int lpi2c_imx_probe(struct platform_device
> > *pdev)  {
> > struct lpi2c_imx_struct *lpi2c_imx;
> > unsigned int temp;
> > -   int irq, ret;
> > +   int ret;
> >
> > lpi2c_imx = devm_kzalloc(&pdev->dev, sizeof(*lpi2c_imx),
> GFP_KERNEL);
> > if (!lpi2c_imx)
> > @@ -553,9 +554,9 @@ static int lpi2c_imx_probe(struct platform_device
> > *pdev)
> > if (IS_ERR(lpi2c_imx->base))
> > return PTR_ERR(lpi2c_imx->base);
> >
> > -   irq = platform_get_irq(pdev, 0);
> > -   if (irq < 0)
> > -   return irq;
> > +   lpi2c_imx->irq = platform_get_irq(pdev, 0);
> > +   if (lpi2c_imx->irq < 0)
> > +   return lpi2c_imx->irq;
> >
> > lpi2c_imx->adapter.owner= THIS_MODULE;
> > lpi2c_imx->adapter.algo = &lpi2c_imx_algo;
> > @@ -581,14 +582,6 @@ static int lpi2c_imx_probe(struct platform_device
> > *pdev)
> > if (ret)
> > lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ;
> >
> > -   ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr,
> > -  IRQF_NO_SUSPEND,
> > -  pdev->name, lpi2c_imx);
> > -   if (ret) {
> > -   dev_err(&pdev->dev, "can't claim irq %d\n", irq);
> > -   return ret;
> > -   }
> > -
> > i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
> > platform_set_drvdata(pdev, lpi2c_imx);
> >
> > @@ -640,6 +633,7 @@ static int __maybe_unused
> > lpi2c_runtime_suspend(struct device *dev)  {
> > struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
> >
> > +   devm_free_irq(dev, lpi2c_imx->irq, lpi2c_imx);
> > clk_disable_unprepare(lpi2c_imx->clk_ipg);
> > clk_disable_unprepare(lpi2c_imx->clk_per);
> > pinctrl_pm_select_idle_state(dev);
> > @@ -665,6 +659,14 @@ static int __maybe_unused
> > lpi2c_runtime_resume(struct device *dev)
> > dev_err(dev, "can't enable I2C ipg clock, ret=%d\n", ret);
> > }
> >
> > +   ret = devm_request_irq(dev, lpi2c_imx->irq, lpi2c_imx_isr,
> 
> I guess unnecessary to use devm in rpm

devm_request_irq() will use device resource management.
Other resource like clk and struct space are all managed by devres.
Maybe we can still use devm_ to let devres manage irq here?

Thanks.

Best Regards,
Clark Wang


> 
> > +  IRQF_NO_SUSPEND,
> > +  dev_name(dev), lpi2c_imx);
> > +   if (ret) {
> > +   dev_err(dev, "can't claim irq %d\n", lpi2c_imx->irq);
> > +   return ret;
> > +   }
> > +
> > return ret;
> >  }
> >
> > --
> > 2.25.1



smime.p7s
Description: S/MIME cryptographic signature

INTRODUCTION

[Mr Ali Musa.]

Dear Friend,

 How are you today, Please accept my sincere apologies if my email
does not meet your business or personal ethics, I really like to have
a good relationship with you, and I have a special reason why I
decided to contact you because of the urgency of my situation here.I
came across your e-mail contact prior to a private search while in
need of your assistance.

INTRODUCTION: Am Mr Ali Musa a Banker and in one way or the other was
hoping you will cooperate with me as a partner in a project of
transferring an abandoned fund of a late customer of the bank worth of

$18,000,000 (Eighteen Million Dollars US).

This will be disbursed or shared between the both of us in these
percentages, 55% for me and 45% for you. Contact me immediately if
that is alright with you so that we can enter in agreement before we
start

processing for the transfer of the funds. If you are satisfied with
this proposal, please provide the below details for the Mutual
Confidentiality Agreement:

1. Full Name and Address

2. Occupation and Country of Origin

3. Telephone Number

4. A scan copy of your identification

I wait for your response so that we can commence on this transaction
as soon as possible.

Regards,
Mr Ali Musa.

include/linux/unaligned/be_byteshift.h:46:19: error: redefinition of 'get_unaligned_be32'

[kernel test robot]

Hi Linus,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   8b12a62a4e3ed4ae99c715034f557eb391d6b196
commit: de8860b1ed4701ea7e6f760f02d79ca6a3b656a1 iio: magnetometer: Add driver 
for Yamaha YAS530
date:   10 weeks ago
config: m68k-randconfig-s032-20210318 (attached as .config)
compiler: m68k-linux-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-277-gc089cd2d-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=de8860b1ed4701ea7e6f760f02d79ca6a3b656a1
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout de8860b1ed4701ea7e6f760f02d79ca6a3b656a1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=m68k 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from include/linux/build_bug.h:5,
from include/linux/bitfield.h:10,
from drivers/iio/magnetometer/yamaha-yas530.c:22:
   include/linux/scatterlist.h: In function 'sg_set_buf':
   arch/m68k/include/asm/page_no.h:33:50: warning: ordered comparison of 
pointer with null pointer [-Wextra]
  33 | #define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void 
*)PAGE_OFFSET) && \
 |  ^~
   include/linux/compiler.h:78:42: note: in definition of macro 'unlikely'
  78 | # define unlikely(x) __builtin_expect(!!(x), 0)
 |  ^
   include/linux/scatterlist.h:137:2: note: in expansion of macro 'BUG_ON'
 137 |  BUG_ON(!virt_addr_valid(buf));
 |  ^~
   include/linux/scatterlist.h:137:10: note: in expansion of macro 
'virt_addr_valid'
 137 |  BUG_ON(!virt_addr_valid(buf));
 |  ^~~
   In file included from drivers/iio/magnetometer/yamaha-yas530.c:35:
   include/linux/unaligned/be_byteshift.h: At top level:
   include/linux/unaligned/be_byteshift.h:41:19: error: redefinition of 
'get_unaligned_be16'
  41 | static inline u16 get_unaligned_be16(const void *p)
 |   ^~
   In file included from arch/m68k/include/asm/unaligned.h:18,
from include/asm-generic/uaccess.h:13,
from arch/m68k/include/asm/uaccess.h:394,
from include/linux/uaccess.h:11,
from include/linux/sched/task.h:11,
from include/linux/sched/signal.h:9,
from include/linux/rcuwait.h:6,
from include/linux/percpu-rwsem.h:7,
from include/linux/fs.h:33,
from include/linux/cgroup.h:17,
from include/linux/memcontrol.h:13,
from include/linux/swap.h:9,
from include/linux/suspend.h:5,
from include/linux/regulator/consumer.h:35,
from drivers/iio/magnetometer/yamaha-yas530.c:33:
   include/linux/unaligned/access_ok.h:23:28: note: previous definition of 
'get_unaligned_be16' was here
  23 | static __always_inline u16 get_unaligned_be16(const void *p)
 |^~
   In file included from drivers/iio/magnetometer/yamaha-yas530.c:35:
>> include/linux/unaligned/be_byteshift.h:46:19: error: redefinition of 
>> 'get_unaligned_be32'
  46 | static inline u32 get_unaligned_be32(const void *p)
 |   ^~
   In file included from arch/m68k/include/asm/unaligned.h:18,
from include/asm-generic/uaccess.h:13,
from arch/m68k/include/asm/uaccess.h:394,
from include/linux/uaccess.h:11,
from include/linux/sched/task.h:11,
from include/linux/sched/signal.h:9,
from include/linux/rcuwait.h:6,
from include/linux/percpu-rwsem.h:7,
from include/linux/fs.h:33,
from include/linux/cgroup.h:17,
from include/linux/memcontrol.h:13,
from include/linux/swap.h:9,
from include/linux/suspend.h:5,
from include/linux/regulator/consumer.h:35,
from drivers/iio/magnetometer/yamaha-yas530.c:33:
   include/linux/unaligned/access_ok.h:28:28: note: previous definition of 
'get_unaligned_be32' was here
  28 | static __always_inline u32 get_unaligned_be32(const void *p

RE: [PATCH 05/11] i2c: imx-lpi2c: add debug message when i2c peripheral clk doesn't work

[Clark Wang]

> -Original Message-
> From: Aisheng Dong 
> Sent: Friday, March 19, 2021 12:57
> To: Clark Wang ; shawn...@kernel.org;
> s.ha...@pengutronix.de
> Cc: ker...@pengutronix.de; feste...@gmail.com; dl-linux-imx  i...@nxp.com>; sumit.sem...@linaro.org; christian.koe...@amd.com;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org
> Subject: RE: [PATCH 05/11] i2c: imx-lpi2c: add debug message when i2c
> peripheral clk doesn't work
> 
> > From: Clark Wang 
> > Sent: Wednesday, March 17, 2021 2:54 PM
> >
> > add debug message when i2c peripheral clk rate is 0, then directly
> > return -EINVAL.
> >
> > Signed-off-by: Gao Pan 
> > Reviewed-by: Andy Duan 
> 
> Drop old review when patch is changed
> 
> > ---
> >  drivers/i2c/busses/i2c-imx-lpi2c.c | 7 ++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > index e718bb6b2387..8f9dd3dd2951 100644
> > --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > @@ -209,7 +209,12 @@ static int lpi2c_imx_config(struct
> > lpi2c_imx_struct
> > *lpi2c_imx)
> >
> > lpi2c_imx_set_mode(lpi2c_imx);
> >
> > -   clk_rate = clk_get_rate(lpi2c_imx->clk);
> 
> I guess the kernel can't compile right before this patch because lpi2c_imx-
> >clk was Removed In former patch You need double check not break bisect

Oh, sorry, I miss this clk definition here.
I will fix this in V2.

> 
> > +   clk_rate = clk_get_rate(lpi2c_imx->clk_per);
> > +   if (!clk_rate) {
> > +   dev_dbg(&lpi2c_imx->adapter.dev, "clk_per rate is 0\n");
> 
> s/dev_dbg/dev_err

Will change to dev_err.
Thanks.


Best Regards,
Clark Wang
> 
> > +   return -EINVAL;
> > +   }
> > +
> > if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
> > filt = 0;
> > else
> > --
> > 2.25.1



smime.p7s
Description: S/MIME cryptographic signature

[PATCH RESEND] scsi: ufs: Remove unnecessary null checks in ufshcd_find_max_sup_active_icc_level()

[Yue Hu]

From: Yue Hu 

Since vcc/vccq/vccq2 have already been null checked before using.

Signed-off-by: Yue Hu 
---
 drivers/scsi/ufs/ufshcd.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 7b3267e..f941bc3 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -7145,19 +7145,19 @@ static u32 ufshcd_find_max_sup_active_icc_level(struct 
ufs_hba *hba,
goto out;
}
 
-   if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
+   if (hba->vreg_info.vcc->max_uA)
icc_level = ufshcd_get_max_icc_level(
hba->vreg_info.vcc->max_uA,
POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
&desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
 
-   if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
+   if (hba->vreg_info.vccq->max_uA)
icc_level = ufshcd_get_max_icc_level(
hba->vreg_info.vccq->max_uA,
icc_level,
&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
 
-   if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
+   if (hba->vreg_info.vccq2->max_uA)
icc_level = ufshcd_get_max_icc_level(
hba->vreg_info.vccq2->max_uA,
icc_level,
-- 
1.9.1

RE: [PATCH] exfat: improve write performance when dirsync enabled

[Namjae Jeon]

> > Degradation of write speed caused by frequent disk access for cluster
> > bitmap update on every cluster allocation could be improved by
> > selective syncing bitmap buffer. Change to flush bitmap buffer only
> > for the directory related operations.
> >
> > Signed-off-by: Hyeongseok Kim 
> 
> Looks good.
> Thanks for your work.
> 
> Acked-by: Sungjong Seo 
Applied. Thanks!

Re: [PATCH] Insert SFENCE.VMA in function set_pte_at for RISCV

[Alex Ghiti]

Le 3/17/21 à 10:10 PM, Jiuyang Liu a écrit :

Thanks for the review!

I see, after skimming related codes, and implementation of other architecture,
I also agree this method is too heavy to implement. And there is a potential
bug, that my patch may introduce two SFENCE.VMA in the related codes:
flush at set_pte_at and also flush in the upper level of the calling stack.

My two cents is that the original description in spec is a little
misleading to the
software side, spec requires each set_pte inserting SFENCE.VMA together,
while the kernel chooses to maintain set_pte and flush_tlb separately.

So I think I should add a patch to fix my bug specifically, and
provide this trunk
as an inline function to flush tlb after modification to a pte.


if (pte_present(pteval)) {
 if (pte_leaf(pteval)) {
 local_flush_tlb_page(addr);
 } else {
 if (pte_global(pteval))
 local_flush_tlb_all();
 else
 local_flush_tlb_asid();

}
}


My next patch will become two patches:
1. add flush_tlb related codes according to spec(also flush global tlb
via sbi call if G bit is on)
2. add a bug fix for my stack by adding flush in the flush_cache_vmap.

Does this approach sound reasonable?


Ok for me, please take a look at flush_cache_vunmap too as I think we 
need to do the same thing here.


Thanks,

Alex



Regards,
Jiuyang

On Tue, 16 Mar 2021 at 09:17 PM Palmer Dabbelt  wrote:

We're trying to avoid this sort of thing, instead relying on the generic kernel
functionality to batch up page table modifications before we issue the fences.
If you're seeing some specific issue then I'd be happy to try and sort out a
fix for it, but this is a bit heavy-handed to use as anything but a last
resort.

On Tue, Mar 16, 2021 at 10:03 PM Andrew Waterman
 wrote:


On Tue, Mar 16, 2021 at 5:05 AM Alex Ghiti  wrote:


Le 3/16/21 à 4:40 AM, Anup Patel a écrit :

On Tue, Mar 16, 2021 at 1:59 PM Andrew Waterman
 wrote:


On Tue, Mar 16, 2021 at 12:32 AM Anup Patel  wrote:


On Tue, Mar 16, 2021 at 12:27 PM Jiuyang Liu  wrote:



As per my understanding, we don't need to explicitly invalidate local TLB
in set_pte() or set_pet_at() because generic Linux page table management
(/mm/*) will call the appropriate flush_tlb_xyz() function after page
table updates.


I witnessed this bug in our micro-architecture: set_pte instruction is
still in the store buffer, no functions are inserting SFENCE.VMA in
the stack below, so TLB cannot witness this modification.
Here is my call stack:
set_pte
set_pte_at
map_vm_area
__vmalloc_area_node
__vmalloc_node_range
__vmalloc_node
__vmalloc_node_flags
vzalloc
n_tty_open



I don't find this call stack, what I find is (the other way around):

n_tty_open
vzalloc
__vmalloc_node
__vmalloc_node_range
__vmalloc_area_node
map_kernel_range
-> map_kernel_range_noflush
 flush_cache_vmap

Which leads to the fact that we don't have flush_cache_vmap callback
implemented: shouldn't we add the sfence.vma here ? Powerpc does
something similar with "ptesync" (see below) instruction that seems to
do the same as sfence.vma.


I was thinking the same thing, but I hadn't yet wrapped my head around
the fact that most architectures don't have something similar.  I'm OK
with following PPC's lead if it appears to be a correct bug fix :)




ptesync: "The ptesync instruction after the Store instruction ensures
that all searches of the Page Table that are performed after the ptesync
instruction completes will use the value stored"


I think this is an architecture specific code, so /mm/* should
not be modified.
And spec requires SFENCE.VMA to be inserted on each modification to
TLB. So I added code here.


The generic linux/mm/* already calls the appropriate tlb_flush_xyz()
function defined in arch/riscv/include/asm/tlbflush.h

Better to have a write-barrier in set_pte().




Also, just local TLB flush is generally not sufficient because
a lot of page tables will be used across on multiple HARTs.


Yes, this is the biggest issue, in RISC-V Volume 2, Privileged Spec v.
20190608 page 67 gave a solution:


This is not an issue with RISC-V privilege spec rather it is more about
placing RISC-V fences at right locations.


Consequently, other harts must be notified separately when the
memory-management data structures have been modified. One approach is
to use
1) a local data fence to ensure local writes are visible globally,
then 2) an interprocessor interrupt to the other thread,
then 3) a local SFENCE.VMA in the interrupt handler of the remote thread,
and finally 4) signal back to originating thread that operation is
complete. This is, of course, the RISC-V analog to a TLB shootdown.


I would suggest trying approach#1.

You can include "asm/barrier.h" here and use wmb() or __smp_wmb()
in-place of local TLB flush.


wmb() doesn't suffice to order older stores before younger page-table
walks, so that might hide the problem without a

[PATCH] mm: page_alloc: fix memcg accounting leak in speculative cache lookup

[Johannes Weiner]

When the freeing of a higher-order page block (non-compound) races
with a speculative page cache lookup, __free_pages() needs to leave
the first order-0 page in the chunk to the lookup but free the buddy
pages that the lookup doesn't know about separately.

However, if such a higher-order page is charged to a memcg (e.g. !vmap
kernel stack)), only the first page of the block has page->memcg
set. That means we'll uncharge only one order-0 page from the entire
block, and leak the remainder.

Add a split_page_memcg() to __free_pages() right before it starts
taking the higher-order page apart and freeing its individual
constituent pages. This ensures all of them will have the memcg
linkage set up for correct uncharging. Also update the comments a bit
to clarify what exactly is happening to the page during that race.

This bug is old and has its roots in the speculative page cache patch
and adding cgroup accounting of kernel pages. There are no known user
reports. A backport to stable is therefor not warranted.

Reported-by: Matthew Wilcox 
Signed-off-by: Johannes Weiner 
---
 mm/page_alloc.c | 33 +++--
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index c53fe4fa10bf..f4bd56656402 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -5112,10 +5112,9 @@ static inline void free_the_page(struct page *page, 
unsigned int order)
  * the allocation, so it is easy to leak memory.  Freeing more memory
  * than was allocated will probably emit a warning.
  *
- * If the last reference to this page is speculative, it will be released
- * by put_page() which only frees the first page of a non-compound
- * allocation.  To prevent the remaining pages from being leaked, we free
- * the subsequent pages here.  If you want to use the page's reference
+ * This function isn't a put_page(). Don't let the put_page_testzero()
+ * fool you, it's only to deal with speculative cache references. It
+ * WILL free pages directly. If you want to use the page's reference
  * count to decide when to free the allocation, you should allocate a
  * compound page, and use put_page() instead of __free_pages().
  *
@@ -5124,11 +5123,33 @@ static inline void free_the_page(struct page *page, 
unsigned int order)
  */
 void __free_pages(struct page *page, unsigned int order)
 {
-   if (put_page_testzero(page))
+   /*
+* Drop the base reference from __alloc_pages and free. In
+* case there is an outstanding speculative reference, from
+* e.g. the page cache, it will put and free the page later.
+*/
+   if (likely(put_page_testzero(page))) {
free_the_page(page, order);
-   else if (!PageHead(page))
+   return;
+   }
+
+   /*
+* The speculative reference will put and free the page.
+*
+* However, if the speculation was into a higher-order page
+* chunk that isn't marked compound, the other side will know
+* nothing about our buddy pages and only free the order-0
+* page at the start of our chunk! We must split off and free
+* the buddy pages here.
+*
+* The buddy pages aren't individually refcounted, so they
+* can't have any pending speculative references themselves.
+*/
+   if (!PageHead(page) && order > 0) {
+   split_page_memcg(page, 1 << order);
while (order-- > 0)
free_the_page(page + (1 << order), order);
+   }
 }
 EXPORT_SYMBOL(__free_pages);
 
-- 
2.30.1

Clang: powerpc: kvm/book3s_hv_nested.c:264:6: error: stack frame size of 2480 bytes in function 'kvmhv_enter_nested_guest'

[Naresh Kamboju]

Linux mainline master build breaks for powerpc defconfig.
There are multiple errors / warnings with clang-12 and clang-11 and 10.
 - powerpc (defconfig) with clang-12
 - powerpc (defconfig) with clang-11
 - powerpc (defconfig) with clang-10

The following build errors / warnings triggered with clang-12.
make --silent --keep-going --jobs=8
O=/home/tuxbuild/.cache/tuxmake/builds/1/tmp LLVM=1 ARCH=powerpc
CROSS_COMPILE=powerpc64le-linux-gnu- 'HOSTCC=sccache clang'
'CC=sccache clang'
/builds/linux/arch/powerpc/kvm/book3s_hv_nested.c:264:6: error: stack
frame size of 2480 bytes in function 'kvmhv_enter_nested_guest'
[-Werror,-Wframe-larger-than=]
long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu)
 ^
1 error generated.
make[3]: *** [/builds/linux/scripts/Makefile.build:271:
arch/powerpc/kvm/book3s_hv_nested.o] Error 1

Reported-by: Naresh Kamboju 

The following build errors / warnings triggered with clang-10 and clang-11.
 - powerpc (defconfig) with clang-11
 - powerpc (defconfig) with clang-10
make --silent --keep-going --jobs=8
O=/home/tuxbuild/.cache/tuxmake/builds/1/tmp LLVM=1 ARCH=powerpc
CROSS_COMPILE=powerpc64le-linux-gnu- 'HOSTCC=sccache clang'
'CC=sccache clang'

/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/sigtramp.o: compiled for a little endian
system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/sigtramp.o
/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/gettimeofday.o: compiled for a little
endian system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/gettimeofday.o
/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/datapage.o: compiled for a little endian
system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/datapage.o
/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/cacheflush.o: compiled for a little endian
system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/cacheflush.o
/usr/bin/powerpc64le-linux-gnu-ld: arch/powerpc/kernel/vdso32/note.o:
compiled for a little endian system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/note.o
/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/getcpu.o: compiled for a little endian
system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/getcpu.o
/usr/bin/powerpc64le-linux-gnu-ld:
arch/powerpc/kernel/vdso32/vgettimeofday.o: compiled for a little
endian system and target is big endian
/usr/bin/powerpc64le-linux-gnu-ld: failed to merge target specific
data of file arch/powerpc/kernel/vdso32/vgettimeofday.o
clang: error: unable to execute command: Segmentation fault (core dumped)
clang: error: linker command failed due to signal (use -v to see invocation)
make[2]: *** [/builds/linux/arch/powerpc/kernel/vdso32/Makefile:51:
arch/powerpc/kernel/vdso32/vdso32.so.dbg] Error 254
make[2]: Target 'include/generated/vdso32-offsets.h' not remade
because of errors.

Reported-by: Naresh Kamboju 

build link,
https://gitlab.com/Linaro/lkft/mirrors/torvalds/linux-mainline/-/jobs/1110841371#L59

--
Linaro LKFT
https://lkft.linaro.org

Re: linux-next: manual merge of the net-next tree with the net tree

[Daniel Borkmann]

On 3/19/21 3:11 AM, Piotr Krysiuk wrote:

Hi Daniel,

On Fri, Mar 19, 2021 at 12:16 AM Stephen Rothwell 
wrote:


diff --cc kernel/bpf/verifier.c
index 44e4ec1640f1,f9096b049cd6..
--- a/kernel/bpf/verifier.c
+++ b/kernel/bpf/verifier.c
@@@ -5876,10 -6056,22 +6060,23 @@@ static int retrieve_ptr_limit(const str
 if (mask_to_left)
 *ptr_limit = MAX_BPF_STACK + off;
 else
  -  *ptr_limit = -off;
  -  return 0;
  +  *ptr_limit = -off - 1;
  +  return *ptr_limit >= max ? -ERANGE : 0;
+   case PTR_TO_MAP_KEY:
+   /* Currently, this code is not exercised as the only use
+* is bpf_for_each_map_elem() helper which requires
+* bpf_capble. The code has been tested manually for
+* future use.
+*/
+   if (mask_to_left) {
+   *ptr_limit = ptr_reg->umax_value + ptr_reg->off;
+   } else {
+   off = ptr_reg->smin_value + ptr_reg->off;
+   *ptr_limit = ptr_reg->map_ptr->key_size - off;
+   }
+   return 0;



PTR_TO_MAP_VALUE logic above looks like copy-paste of old PTR_TO_MAP_VALUE
code from before "bpf: Fix off-by-one for area size in creating mask to
left" and is apparently affected by the same off-by-one, except this time
on "key_size" area and not "value_size".

This needs to be fixed in the same way as we did with PTR_TO_MAP_VALUE.
What is the best way to proceed?


Hm, not sure why PTR_TO_MAP_KEY was added by 69c087ba6225 in the first place, I
presume noone expects this to be used from unprivileged as the comment says.
Resolution should be to remove the PTR_TO_MAP_KEY case entirely from that switch
until we have an actual user.

Thanks,
Daniel

RE: [PATCH 09/11] i2c: imx-lpi2c: fix i2c timing issue

[Clark Wang]

> -Original Message-
> From: Aisheng Dong 
> Sent: Friday, March 19, 2021 13:15
> To: Clark Wang ; shawn...@kernel.org;
> s.ha...@pengutronix.de
> Cc: ker...@pengutronix.de; feste...@gmail.com; dl-linux-imx  i...@nxp.com>; sumit.sem...@linaro.org; christian.koe...@amd.com;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org
> Subject: RE: [PATCH 09/11] i2c: imx-lpi2c: fix i2c timing issue
>
> > From: Clark Wang 
> > Sent: Wednesday, March 17, 2021 2:54 PM
> >
> > The clkhi and clklo ratio was not very precise before that can make
> > the time of START/STOP/HIGH LEVEL out of specification.
> >
> > Therefore, the calculation of these times has been modified in this patch.
> > At the same time, the mode rate definition of i2c is corrected.
> >
> > Reviewed-by: Fugang Duan 
> > Signed-off-by: Clark Wang 
> > ---
> >  drivers/i2c/busses/i2c-imx-lpi2c.c | 27 ++-
> >  1 file changed, 14 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > index 7216a393095d..5dbe85126f24 100644
> > --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > @@ -73,17 +73,17 @@
> >  #define MCFGR1_IGNACK  BIT(9)
> >  #define MRDR_RXEMPTY   BIT(14)
> >
> > -#define I2C_CLK_RATIO  2
> > +#define I2C_CLK_RATIO  24 / 59
>
> Where is this ratio coming from?
> Can you describe why use it in commit message?

This ratio is a value obtained after passing the test.
I2C's Tlow should longer than the spec.
For example, in FAST mode, Tlow should be longer than 1.3us.
The previous calculation violated the spec.
So I re-write the calculation of clk_cycle by referring the RM. Then test the 
ratio to let Tlow match the spec by catching the waveform.

Best Regards,
Clark Wang

>
> Regards
> Aisheng
>
> >  #define CHUNK_DATA 256
> >
> >  #define I2C_PM_TIMEOUT 1000 /* ms */
> >
> >  enum lpi2c_imx_mode {
> > -   STANDARD,   /* 100+Kbps */
> > -   FAST,   /* 400+Kbps */
> > -   FAST_PLUS,  /* 1.0+Mbps */
> > -   HS, /* 3.4+Mbps */
> > -   ULTRA_FAST, /* 5.0+Mbps */
> > +   STANDARD,   /* <=100Kbps */
> > +   FAST,   /* <=400Kbps */
> > +   FAST_PLUS,  /* <=1.0Mbps */
> > +   HS, /* <=3.4Mbps */
> > +   ULTRA_FAST, /* <=5.0Mbps */
> >  };
> >
> >  enum lpi2c_imx_pincfg {
> > @@ -156,13 +156,13 @@ static void lpi2c_imx_set_mode(struct
> > lpi2c_imx_struct *lpi2c_imx)
> > unsigned int bitrate = lpi2c_imx->bitrate;
> > enum lpi2c_imx_mode mode;
> >
> > -   if (bitrate < I2C_MAX_FAST_MODE_FREQ)
> > +   if (bitrate <= I2C_MAX_STANDARD_MODE_FREQ)
> > mode = STANDARD;
> > -   else if (bitrate < I2C_MAX_FAST_MODE_PLUS_FREQ)
> > +   else if (bitrate <= I2C_MAX_FAST_MODE_FREQ)
> > mode = FAST;
> > -   else if (bitrate < I2C_MAX_HIGH_SPEED_MODE_FREQ)
> > +   else if (bitrate <= I2C_MAX_FAST_MODE_PLUS_FREQ)
> > mode = FAST_PLUS;
> > -   else if (bitrate < I2C_MAX_ULTRA_FAST_MODE_FREQ)
> > +   else if (bitrate <= I2C_MAX_HIGH_SPEED_MODE_FREQ)
> > mode = HS;
> > else
> > mode = ULTRA_FAST;
> > @@ -209,7 +209,8 @@ static void lpi2c_imx_stop(struct lpi2c_imx_struct
> > *lpi2c_imx)
> > } while (1);
> >  }
> >
> > -/* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2
> > */
> > +/* CLKLO = (1 - I2C_CLK_RATIO) * clk_cycle, SETHOLD = CLKHI, DATAVD =
> > CLKHI/2
> > +   CLKHI = I2C_CLK_RATIO * clk_cycle */
> >  static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)  {
> > u8 prescale, filt, sethold, clkhi, clklo, datavd; @@ -232,8 +233,8
> > @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
> >
> > for (prescale = 0; prescale <= 7; prescale++) {
> > clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate)
> > -   - 3 - (filt >> 1);
> > -   clkhi = (clk_cycle + I2C_CLK_RATIO) / (I2C_CLK_RATIO + 1);
> > +   - (2 + filt) / (1 << prescale);
> > +   clkhi = clk_cycle * I2C_CLK_RATIO;
> > clklo = clk_cycle - clkhi;
> > if (clklo < 64)
> > break;
> > --
> > 2.25.1



smime.p7s
Description: S/MIME cryptographic signature

[PATCH v3 01/25] x86/cpufeatures: Make SGX_LC feature bit depend on SGX bit

[Kai Huang]

Move SGX_LC feature bit to CPUID dependency table to make clearing all
SGX feature bits easier. Also remove clear_sgx_caps() since it is just
a wrapper of setup_clear_cpu_cap(X86_FEATURE_SGX) now.

Suggested-by: Sean Christopherson 
Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Reviewed-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kernel/cpu/cpuid-deps.c |  1 +
 arch/x86/kernel/cpu/feat_ctl.c   | 12 +++-
 2 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c
index 42af31b64c2c..d40f8e0a54ce 100644
--- a/arch/x86/kernel/cpu/cpuid-deps.c
+++ b/arch/x86/kernel/cpu/cpuid-deps.c
@@ -72,6 +72,7 @@ static const struct cpuid_dep cpuid_deps[] = {
{ X86_FEATURE_AVX512_FP16,  X86_FEATURE_AVX512BW  },
{ X86_FEATURE_ENQCMD,   X86_FEATURE_XSAVES},
{ X86_FEATURE_PER_THREAD_MBA,   X86_FEATURE_MBA   },
+   { X86_FEATURE_SGX_LC,   X86_FEATURE_SGX   },
{}
 };
 
diff --git a/arch/x86/kernel/cpu/feat_ctl.c b/arch/x86/kernel/cpu/feat_ctl.c
index 3b1b01f2b248..27533a6e04fa 100644
--- a/arch/x86/kernel/cpu/feat_ctl.c
+++ b/arch/x86/kernel/cpu/feat_ctl.c
@@ -93,15 +93,9 @@ static void init_vmx_capabilities(struct cpuinfo_x86 *c)
 }
 #endif /* CONFIG_X86_VMX_FEATURE_NAMES */
 
-static void clear_sgx_caps(void)
-{
-   setup_clear_cpu_cap(X86_FEATURE_SGX);
-   setup_clear_cpu_cap(X86_FEATURE_SGX_LC);
-}
-
 static int __init nosgx(char *str)
 {
-   clear_sgx_caps();
+   setup_clear_cpu_cap(X86_FEATURE_SGX);
 
return 0;
 }
@@ -116,7 +110,7 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
 
if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr)) {
clear_cpu_cap(c, X86_FEATURE_VMX);
-   clear_sgx_caps();
+   clear_cpu_cap(c, X86_FEATURE_SGX);
return;
}
 
@@ -177,6 +171,6 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
!(msr & FEAT_CTL_SGX_LC_ENABLED) || !enable_sgx) {
if (enable_sgx)
pr_err_once("SGX disabled by BIOS\n");
-   clear_sgx_caps();
+   clear_cpu_cap(c, X86_FEATURE_SGX);
}
 }
-- 
2.30.2

[PATCH v3 02/25] x86/cpufeatures: Add SGX1 and SGX2 sub-features

[Kai Huang]

From: Sean Christopherson 

Add SGX1 and SGX2 feature flags, via CPUID.0x12.0x0.EAX, as scattered
features, since adding a new leaf for only two bits would be wasteful.
As part of virtualizing SGX, KVM will expose the SGX CPUID leafs to its
guest, and to do so correctly needs to query hardware and kernel support
for SGX1 and SGX2.

Suppress both SGX1 and SGX2 from /proc/cpuinfo. SGX1 basically means
SGX, and for SGX2 there is no concrete use case of using it in
/proc/cpuinfo.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/cpufeatures.h | 2 ++
 arch/x86/kernel/cpu/cpuid-deps.c   | 2 ++
 arch/x86/kernel/cpu/scattered.c| 2 ++
 3 files changed, 6 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h 
b/arch/x86/include/asm/cpufeatures.h
index cc96e26d69f7..1f918f5e0055 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -290,6 +290,8 @@
 #define X86_FEATURE_FENCE_SWAPGS_KERNEL(11*32+ 5) /* "" LFENCE in 
kernel entry SWAPGS path */
 #define X86_FEATURE_SPLIT_LOCK_DETECT  (11*32+ 6) /* #AC for split lock */
 #define X86_FEATURE_PER_THREAD_MBA (11*32+ 7) /* "" Per-thread Memory 
Bandwidth Allocation */
+#define X86_FEATURE_SGX1   (11*32+ 8) /* "" Basic SGX */
+#define X86_FEATURE_SGX2   (11*32+ 9) /* "" SGX Enclave Dynamic 
Memory Management (EDMM) */
 
 /* Intel-defined CPU features, CPUID level 0x0007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI   (12*32+ 4) /* AVX VNNI instructions */
diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c
index d40f8e0a54ce..defda61f372d 100644
--- a/arch/x86/kernel/cpu/cpuid-deps.c
+++ b/arch/x86/kernel/cpu/cpuid-deps.c
@@ -73,6 +73,8 @@ static const struct cpuid_dep cpuid_deps[] = {
{ X86_FEATURE_ENQCMD,   X86_FEATURE_XSAVES},
{ X86_FEATURE_PER_THREAD_MBA,   X86_FEATURE_MBA   },
{ X86_FEATURE_SGX_LC,   X86_FEATURE_SGX   },
+   { X86_FEATURE_SGX1, X86_FEATURE_SGX   },
+   { X86_FEATURE_SGX2, X86_FEATURE_SGX1  },
{}
 };
 
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 972ec3bfa9c0..21d1f062895a 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -36,6 +36,8 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_CDP_L2,   CPUID_ECX,  2, 0x0010, 2 },
{ X86_FEATURE_MBA,  CPUID_EBX,  3, 0x0010, 0 },
{ X86_FEATURE_PER_THREAD_MBA,   CPUID_ECX,  0, 0x0010, 3 },
+   { X86_FEATURE_SGX1, CPUID_EAX,  0, 0x0012, 0 },
+   { X86_FEATURE_SGX2, CPUID_EAX,  1, 0x0012, 0 },
{ X86_FEATURE_HW_PSTATE,CPUID_EDX,  7, 0x8007, 0 },
{ X86_FEATURE_CPB,  CPUID_EDX,  9, 0x8007, 0 },
{ X86_FEATURE_PROC_FEEDBACK,CPUID_EDX, 11, 0x8007, 0 },
-- 
2.30.2

[PATCH v3 03/25] x86/sgx: Wipe out EREMOVE from sgx_free_epc_page()

[Kai Huang]

EREMOVE takes a page and removes any association between that page and
an enclave.  It must be run on a page before it can be added into
another enclave.  Currently, EREMOVE is run as part of pages being freed
into the SGX page allocator.  It is not expected to fail.

KVM does not track how guest pages are used, which means that SGX
virtualization use of EREMOVE might fail.

Break out the EREMOVE call from the SGX page allocator.  This will allow
the SGX virtualization code to use the allocator directly.  (SGX/KVM
will also introduce a more permissive EREMOVE helper).

Implement original sgx_free_epc_page() as sgx_encl_free_epc_page() to be
more specific that it is used to free EPC page assigned to one enclave.
Explicitly give an message using WARN_ONCE() when EREMOVE fails, to call
out EPC page is leaked, and requires machine reboot to get leaked pages
back.

Replace sgx_free_epc_page() with sgx_encl_free_epc_page() in all call
sites.  No functional change is intended, except the new WARNING message
when EREMOVE fails.

Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
v2->v3:

 - Changed to replace all call sites of sgx_free_epc_page() with
   sgx_encl_free_epc_page() to make this patch have no functional change,
   except a WARN() upon EREMOVE failure requested by Dave.
 - Rebased to latest tip/x86/sgx to resolve merge conflict with Jarkko's NUMA
   allocation.
 - Removed Jarkko as author. Added Jarkko's Acked-by.

v1->v2:

 - Merge original WARN() and pr_err_once() into one single WARN(), suggested
   by Sean.

---
 arch/x86/kernel/cpu/sgx/encl.c  | 40 -
 arch/x86/kernel/cpu/sgx/encl.h  |  1 +
 arch/x86/kernel/cpu/sgx/ioctl.c |  6 ++---
 arch/x86/kernel/cpu/sgx/main.c  | 14 +---
 4 files changed, 44 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c
index 7449ef33f081..e0fb0f121616 100644
--- a/arch/x86/kernel/cpu/sgx/encl.c
+++ b/arch/x86/kernel/cpu/sgx/encl.c
@@ -78,7 +78,7 @@ static struct sgx_epc_page *sgx_encl_eldu(struct 
sgx_encl_page *encl_page,
 
ret = __sgx_encl_eldu(encl_page, epc_page, secs_page);
if (ret) {
-   sgx_free_epc_page(epc_page);
+   sgx_encl_free_epc_page(epc_page);
return ERR_PTR(ret);
}
 
@@ -404,7 +404,7 @@ void sgx_encl_release(struct kref *ref)
if (sgx_unmark_page_reclaimable(entry->epc_page))
continue;
 
-   sgx_free_epc_page(entry->epc_page);
+   sgx_encl_free_epc_page(entry->epc_page);
encl->secs_child_cnt--;
entry->epc_page = NULL;
}
@@ -415,7 +415,7 @@ void sgx_encl_release(struct kref *ref)
xa_destroy(&encl->page_array);
 
if (!encl->secs_child_cnt && encl->secs.epc_page) {
-   sgx_free_epc_page(encl->secs.epc_page);
+   sgx_encl_free_epc_page(encl->secs.epc_page);
encl->secs.epc_page = NULL;
}
 
@@ -423,7 +423,7 @@ void sgx_encl_release(struct kref *ref)
va_page = list_first_entry(&encl->va_pages, struct sgx_va_page,
   list);
list_del(&va_page->list);
-   sgx_free_epc_page(va_page->epc_page);
+   sgx_encl_free_epc_page(va_page->epc_page);
kfree(va_page);
}
 
@@ -686,7 +686,7 @@ struct sgx_epc_page *sgx_alloc_va_page(void)
ret = __epa(sgx_get_epc_virt_addr(epc_page));
if (ret) {
WARN_ONCE(1, "EPA returned %d (0x%x)", ret, ret);
-   sgx_free_epc_page(epc_page);
+   sgx_encl_free_epc_page(epc_page);
return ERR_PTR(-EFAULT);
}
 
@@ -735,3 +735,33 @@ bool sgx_va_page_full(struct sgx_va_page *va_page)
 
return slot == SGX_VA_SLOT_COUNT;
 }
+
+/**
+ * sgx_encl_free_epc_page - free EPC page assigned to an enclave
+ * @page:  EPC page to be freed
+ *
+ * Free EPC page assigned to an enclave.  It does EREMOVE for the page, and
+ * only upon success, it puts the page back to free page list.  Otherwise, it
+ * gives a WARNING to indicate page is leaked, and require reboot to retrieve
+ * leaked pages.
+ */
+void sgx_encl_free_epc_page(struct sgx_epc_page *page)
+{
+   int ret;
+
+   WARN_ON_ONCE(page->flags & SGX_EPC_PAGE_RECLAIMER_TRACKED);
+
+   /*
+* Give a message to remind EPC page is leaked when EREMOVE fails,
+* and requires machine reboot to get leaked pages back. This can
+* be improved in future by adding stats of leaked pages, etc.
+*/
+#define EREMOVE_ERROR_MESSAGE \
+   "EREMOVE returned %d (0x%x).  EPC page leaked.  Reboot required to 
retrieve leaked pages."
+   ret = __eremove(sgx_get_epc_virt_addr(page));
+   if (WARN_ONCE(ret, EREMOVE_ERROR_MESSAGE, ret, ret))
+   return;
+#undef EREMOVE_ERROR_MESSAG

[PATCH v3 04/25] x86/sgx: Add SGX_CHILD_PRESENT hardware error code

[Kai Huang]

From: Sean Christopherson 

SGX driver can accurately track how enclave pages are used.  This
enables SECS to be specifically targeted and EREMOVE'd only after all
child pages have been EREMOVE'd.  This ensures that SGX driver will
never encounter SGX_CHILD_PRESENT in normal operation.

Virtual EPC is different.  The host does not track how EPC pages are
used by the guest, so it cannot guarantee EREMOVE success.  It might,
for instance, encounter a SECS with a non-zero child count.

Add a definition of SGX_CHILD_PRESENT.  It will be used exclusively by
the SGX virtualization driver to handle recoverable EREMOVE errors when
saniziting EPC pages after they are freed.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/kernel/cpu/sgx/arch.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/sgx/arch.h b/arch/x86/kernel/cpu/sgx/arch.h
index dd7602c44c72..abf99bb71fdc 100644
--- a/arch/x86/kernel/cpu/sgx/arch.h
+++ b/arch/x86/kernel/cpu/sgx/arch.h
@@ -26,12 +26,14 @@
  * enum sgx_return_code - The return code type for ENCLS, ENCLU and ENCLV
  * %SGX_NOT_TRACKED:   Previous ETRACK's shootdown sequence has not
  * been completed yet.
+ * %SGX_CHILD_PRESENT  SECS has child pages present in the EPC.
  * %SGX_INVALID_EINITTOKEN:EINITTOKEN is invalid and enclave signer's
  * public key does not match IA32_SGXLEPUBKEYHASH.
  * %SGX_UNMASKED_EVENT:An unmasked event, e.g. INTR, was 
received
  */
 enum sgx_return_code {
SGX_NOT_TRACKED = 11,
+   SGX_CHILD_PRESENT   = 13,
SGX_INVALID_EINITTOKEN  = 16,
SGX_UNMASKED_EVENT  = 128,
 };
-- 
2.30.2

[PATCH v3 05/25] x86/sgx: Introduce virtual EPC for use by KVM guests

[Kai Huang]

From: Sean Christopherson 

Add a misc device /dev/sgx_vepc to allow userspace to allocate "raw" EPC
without an associated enclave.  The intended and only known use case for
raw EPC allocation is to expose EPC to a KVM guest, hence the 'vepc'
moniker, virt.{c,h} files and X86_SGX_KVM Kconfig.

SGX driver uses misc device /dev/sgx_enclave to support userspace to
create enclave.  Each file descriptor from opening /dev/sgx_enclave
represents an enclave.  Unlike SGX driver, KVM doesn't control how guest
uses EPC, therefore EPC allocated to KVM guest is not associated to an
enclave, and /dev/sgx_enclave is not suitable for allocating EPC for KVM
guest.

Having separate device nodes for SGX driver and KVM virtual EPC also
allows separate permission control for running host SGX enclaves and
KVM SGX guests.

To use /dev/sgx_vepc to allocate a virtual EPC instance with particular
size, the userspace hypervisor opens /dev/sgx_vepc, and uses mmap()
with the intended size to get an address range of virtual EPC.  Then
it may use the address range to create one KVM memory slot as virtual
EPC for guest.

Implement the "raw" EPC allocation in the x86 core-SGX subsystem via
/dev/sgx_vepc rather than in KVM. Doing so has two major advantages:

  - Does not require changes to KVM's uAPI, e.g. EPC gets handled as
just another memory backend for guests.

  - EPC management is wholly contained in the SGX subsystem, e.g. SGX
does not have to export any symbols, changes to reclaim flows don't
need to be routed through KVM, SGX's dirty laundry doesn't have to
get aired out for the world to see, and so on and so forth.

The virtual EPC pages allocated to guests are currently not reclaimable.
Reclaiming EPC page used by enclave requires a special reclaim mechanism
separate from normal page reclaim, and that mechanism is not supported
for virutal EPC pages.  Due to the complications of handling reclaim
conflicts between guest and host, reclaiming virtual EPC pages is
significantly more complex than basic support for SGX virtualization.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Co-developed-by: Kai Huang 
Signed-off-by: Kai Huang 
---
 arch/x86/Kconfig |  12 ++
 arch/x86/kernel/cpu/sgx/Makefile |   1 +
 arch/x86/kernel/cpu/sgx/sgx.h|   9 ++
 arch/x86/kernel/cpu/sgx/virt.c   | 260 +++
 4 files changed, 282 insertions(+)
 create mode 100644 arch/x86/kernel/cpu/sgx/virt.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 35391e94bd22..007912f67a06 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1942,6 +1942,18 @@ config X86_SGX
 
  If unsure, say N.
 
+config X86_SGX_KVM
+   bool "Software Guard eXtensions (SGX) Virtualization"
+   depends on X86_SGX && KVM_INTEL
+   help
+
+ Enables KVM guests to create SGX enclaves.
+
+ This includes support to expose "raw" unreclaimable enclave memory to
+ guests via a device node, e.g. /dev/sgx_vepc.
+
+ If unsure, say N.
+
 config EFI
bool "EFI runtime service support"
depends on ACPI
diff --git a/arch/x86/kernel/cpu/sgx/Makefile b/arch/x86/kernel/cpu/sgx/Makefile
index 91d3dc784a29..9c1656779b2a 100644
--- a/arch/x86/kernel/cpu/sgx/Makefile
+++ b/arch/x86/kernel/cpu/sgx/Makefile
@@ -3,3 +3,4 @@ obj-y += \
encl.o \
ioctl.o \
main.o
+obj-$(CONFIG_X86_SGX_KVM)  += virt.o
diff --git a/arch/x86/kernel/cpu/sgx/sgx.h b/arch/x86/kernel/cpu/sgx/sgx.h
index 653af8ca1a25..a3aa00cb1ac4 100644
--- a/arch/x86/kernel/cpu/sgx/sgx.h
+++ b/arch/x86/kernel/cpu/sgx/sgx.h
@@ -80,4 +80,13 @@ void sgx_mark_page_reclaimable(struct sgx_epc_page *page);
 int sgx_unmark_page_reclaimable(struct sgx_epc_page *page);
 struct sgx_epc_page *sgx_alloc_epc_page(void *owner, bool reclaim);
 
+#ifdef CONFIG_X86_SGX_KVM
+int __init sgx_vepc_init(void);
+#else
+static inline int __init sgx_vepc_init(void)
+{
+   return -ENODEV;
+}
+#endif
+
 #endif /* _X86_SGX_H */
diff --git a/arch/x86/kernel/cpu/sgx/virt.c b/arch/x86/kernel/cpu/sgx/virt.c
new file mode 100644
index ..29d8d28b4695
--- /dev/null
+++ b/arch/x86/kernel/cpu/sgx/virt.c
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device driver to expose SGX enclave memory to KVM guests.
+ *
+ * Copyright(c) 2021 Intel Corporation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "encls.h"
+#include "sgx.h"
+
+struct sgx_vepc {
+   struct xarray page_array;
+   struct mutex lock;
+};
+
+/*
+ * Temporary SECS pages that cannot be EREMOVE'd due to having child in other
+ * virtual EPC instances, and the lock to protect it.
+ */
+static struct mutex zombie_secs_pages_lock;
+static struct list_head zombie_secs_pages;
+
+static int __sgx_vepc_fault(struct sgx_vepc *vepc,
+   struct vm_area_struct *vma, unsigned long addr)
+{
+   struct sgx_epc_page *epc_page;
+   un

[PATCH v3 08/25] x86/sgx: Expose SGX architectural definitions to the kernel

[Kai Huang]

From: Sean Christopherson 

Expose SGX architectural structures, as KVM will use many of the
architectural constants and structs to virtualize SGX.

Name the new header file as asm/sgx.h, rather than asm/sgx_arch.h, to
have single header to provide SGX facilities to share with other kernel
componments. Also update MAINTAINERS to include asm/sgx.h.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Co-developed-by: Kai Huang 
Signed-off-by: Kai Huang 
---
v1->v3:
 - Added MAINTAINERS file update to include new asm/sgx.h
 - Changed 'line' to 'comment' in the comment pointed out by Sean.

---
 MAINTAINERS   |  1 +
 .../cpu/sgx/arch.h => include/asm/sgx.h}  | 20 ++-
 arch/x86/kernel/cpu/sgx/encl.c|  2 +-
 arch/x86/kernel/cpu/sgx/sgx.h |  2 +-
 tools/testing/selftests/sgx/defines.h |  2 +-
 5 files changed, 19 insertions(+), 8 deletions(-)
 rename arch/x86/{kernel/cpu/sgx/arch.h => include/asm/sgx.h} (95%)

diff --git a/MAINTAINERS b/MAINTAINERS
index aa84121c5611..0cb606aeba5e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9274,6 +9274,7 @@ Q:
https://patchwork.kernel.org/project/intel-sgx/list/
 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/sgx
 F: Documentation/x86/sgx.rst
 F: arch/x86/entry/vdso/vsgx.S
+F: arch/x86/include/asm/sgx.h
 F: arch/x86/include/uapi/asm/sgx.h
 F: arch/x86/kernel/cpu/sgx/*
 F: tools/testing/selftests/sgx/*
diff --git a/arch/x86/kernel/cpu/sgx/arch.h b/arch/x86/include/asm/sgx.h
similarity index 95%
rename from arch/x86/kernel/cpu/sgx/arch.h
rename to arch/x86/include/asm/sgx.h
index abf99bb71fdc..14bb5f7e221c 100644
--- a/arch/x86/kernel/cpu/sgx/arch.h
+++ b/arch/x86/include/asm/sgx.h
@@ -2,15 +2,20 @@
 /**
  * Copyright(c) 2016-20 Intel Corporation.
  *
- * Contains data structures defined by the SGX architecture.  Data structures
- * defined by the Linux software stack should not be placed here.
+ * Intel Software Guard Extensions (SGX) support.
  */
-#ifndef _ASM_X86_SGX_ARCH_H
-#define _ASM_X86_SGX_ARCH_H
+#ifndef _ASM_X86_SGX_H
+#define _ASM_X86_SGX_H
 
 #include 
 #include 
 
+/*
+ * This file contains both data structures defined by SGX architecture and 
Linux
+ * defined software data structures and functions.  The two should not be mixed
+ * together for better readibility.  The architectural definitions come first.
+ */
+
 /* The SGX specific CPUID function. */
 #define SGX_CPUID  0x12
 /* EPC enumeration. */
@@ -337,4 +342,9 @@ struct sgx_sigstruct {
 
 #define SGX_LAUNCH_TOKEN_SIZE 304
 
-#endif /* _ASM_X86_SGX_ARCH_H */
+/*
+ * Do not put any hardware-defined SGX structure representations below this
+ * comment!
+ */
+
+#endif /* _ASM_X86_SGX_H */
diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c
index e0fb0f121616..f78cf880c332 100644
--- a/arch/x86/kernel/cpu/sgx/encl.c
+++ b/arch/x86/kernel/cpu/sgx/encl.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include "arch.h"
+#include 
 #include "encl.h"
 #include "encls.h"
 #include "sgx.h"
diff --git a/arch/x86/kernel/cpu/sgx/sgx.h b/arch/x86/kernel/cpu/sgx/sgx.h
index a3aa00cb1ac4..5086b240d269 100644
--- a/arch/x86/kernel/cpu/sgx/sgx.h
+++ b/arch/x86/kernel/cpu/sgx/sgx.h
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include "arch.h"
+#include 
 
 #undef pr_fmt
 #define pr_fmt(fmt) "sgx: " fmt
diff --git a/tools/testing/selftests/sgx/defines.h 
b/tools/testing/selftests/sgx/defines.h
index 592c1ccf4576..0bd73428d2f3 100644
--- a/tools/testing/selftests/sgx/defines.h
+++ b/tools/testing/selftests/sgx/defines.h
@@ -14,7 +14,7 @@
 #define __aligned(x) __attribute__((__aligned__(x)))
 #define __packed __attribute__((packed))
 
-#include "../../../../arch/x86/kernel/cpu/sgx/arch.h"
+#include "../../../../arch/x86/include/asm/sgx.h"
 #include "../../../../arch/x86/include/asm/enclu.h"
 #include "../../../../arch/x86/include/uapi/asm/sgx.h"
 
-- 
2.30.2

[PATCH v3 07/25] x86/sgx: Initialize virtual EPC driver even when SGX driver is disabled

[Kai Huang]

Modify sgx_init() to always try to initialize the virtual EPC driver,
even if the SGX driver is disabled.  The SGX driver might be disabled
if SGX Launch Control is in locked mode, or not supported in the
hardware at all.  This allows (non-Linux) guests that support non-LC
configurations to use SGX.

Acked-by: Dave Hansen 
Reviewed-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kernel/cpu/sgx/main.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c
index 6a734f484aa7..b73114150ff8 100644
--- a/arch/x86/kernel/cpu/sgx/main.c
+++ b/arch/x86/kernel/cpu/sgx/main.c
@@ -743,7 +743,15 @@ static int __init sgx_init(void)
goto err_page_cache;
}
 
-   ret = sgx_drv_init();
+   /*
+* Always try to initialize the native *and* KVM drivers.
+* The KVM driver is less picky than the native one and
+* can function if the native one is not supported on the
+* current system or fails to initialize.
+*
+* Error out only if both fail to initialize.
+*/
+   ret = !!sgx_drv_init() & !!sgx_vepc_init();
if (ret)
goto err_kthread;
 
-- 
2.30.2

[PATCH v3 06/25] x86/cpu/intel: Allow SGX virtualization without Launch Control support

[Kai Huang]

From: Sean Christopherson 

The kernel will currently disable all SGX support if the hardware does
not support launch control.  Make it more permissive to allow SGX
virtualization on systems without Launch Control support.  This will
allow KVM to expose SGX to guests that have less-strict requirements on
the availability of flexible launch control.

Improve error message to distinguish between three cases.  There are two
cases where SGX support is completely disabled:
1) SGX has been disabled completely by the BIOS
2) SGX LC is locked by the BIOS.  Bare-metal support is disabled because
   of LC unavailability.  SGX virtualization is unavailable (because of
   Kconfig).
One where it is partially available:
3) SGX LC is locked by the BIOS.  Bare-metal support is disabled because
   of LC unavailability.  SGX virtualization is supported.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Co-developed-by: Kai Huang 
Signed-off-by: Kai Huang 
---
v2->v3:
 - Fix nit: s/Faunch/Launch.

---
 arch/x86/kernel/cpu/feat_ctl.c | 59 +-
 1 file changed, 44 insertions(+), 15 deletions(-)

diff --git a/arch/x86/kernel/cpu/feat_ctl.c b/arch/x86/kernel/cpu/feat_ctl.c
index 27533a6e04fa..da696eb4821a 100644
--- a/arch/x86/kernel/cpu/feat_ctl.c
+++ b/arch/x86/kernel/cpu/feat_ctl.c
@@ -104,8 +104,9 @@ early_param("nosgx", nosgx);
 
 void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
 {
+   bool enable_sgx_kvm = false, enable_sgx_driver = false;
bool tboot = tboot_enabled();
-   bool enable_sgx;
+   bool enable_vmx;
u64 msr;
 
if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr)) {
@@ -114,13 +115,19 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
return;
}
 
-   /*
-* Enable SGX if and only if the kernel supports SGX and Launch Control
-* is supported, i.e. disable SGX if the LE hash MSRs can't be written.
-*/
-   enable_sgx = cpu_has(c, X86_FEATURE_SGX) &&
-cpu_has(c, X86_FEATURE_SGX_LC) &&
-IS_ENABLED(CONFIG_X86_SGX);
+   enable_vmx = cpu_has(c, X86_FEATURE_VMX) &&
+IS_ENABLED(CONFIG_KVM_INTEL);
+
+   if (cpu_has(c, X86_FEATURE_SGX) && IS_ENABLED(CONFIG_X86_SGX)) {
+   /*
+* Separate out SGX driver enabling from KVM.  This allows KVM
+* guests to use SGX even if the kernel SGX driver refuses to
+* use it.  This happens if flexible Launch Control is not
+* available.
+*/
+   enable_sgx_driver = cpu_has(c, X86_FEATURE_SGX_LC);
+   enable_sgx_kvm = enable_vmx && IS_ENABLED(CONFIG_X86_SGX_KVM);
+   }
 
if (msr & FEAT_CTL_LOCKED)
goto update_caps;
@@ -136,15 +143,18 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
 * i.e. KVM is enabled, to avoid unnecessarily adding an attack vector
 * for the kernel, e.g. using VMX to hide malicious code.
 */
-   if (cpu_has(c, X86_FEATURE_VMX) && IS_ENABLED(CONFIG_KVM_INTEL)) {
+   if (enable_vmx) {
msr |= FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX;
 
if (tboot)
msr |= FEAT_CTL_VMX_ENABLED_INSIDE_SMX;
}
 
-   if (enable_sgx)
-   msr |= FEAT_CTL_SGX_ENABLED | FEAT_CTL_SGX_LC_ENABLED;
+   if (enable_sgx_kvm || enable_sgx_driver) {
+   msr |= FEAT_CTL_SGX_ENABLED;
+   if (enable_sgx_driver)
+   msr |= FEAT_CTL_SGX_LC_ENABLED;
+   }
 
wrmsrl(MSR_IA32_FEAT_CTL, msr);
 
@@ -167,10 +177,29 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
}
 
 update_sgx:
-   if (!(msr & FEAT_CTL_SGX_ENABLED) ||
-   !(msr & FEAT_CTL_SGX_LC_ENABLED) || !enable_sgx) {
-   if (enable_sgx)
-   pr_err_once("SGX disabled by BIOS\n");
+   if (!(msr & FEAT_CTL_SGX_ENABLED)) {
+   if (enable_sgx_kvm || enable_sgx_driver)
+   pr_err_once("SGX disabled by BIOS.\n");
clear_cpu_cap(c, X86_FEATURE_SGX);
+   return;
+   }
+
+   /*
+* VMX feature bit may be cleared due to being disabled in BIOS,
+* in which case SGX virtualization cannot be supported either.
+*/
+   if (!cpu_has(c, X86_FEATURE_VMX) && enable_sgx_kvm) {
+   pr_err_once("SGX virtualization disabled due to lack of 
VMX.\n");
+   enable_sgx_kvm = 0;
+   }
+
+   if (!(msr & FEAT_CTL_SGX_LC_ENABLED) && enable_sgx_driver) {
+   if (!enable_sgx_kvm) {
+   pr_err_once("SGX Launch Control is locked. Disable 
SGX.\n");
+   clear_cpu_cap(c, X86_FEATURE_SGX);
+   } else {
+   pr_err_once("SGX Launch Control is locked. Support SGX 
virtualization only.\n");
+   clear_cpu_cap(c, X86_FEATURE_SGX_LC);
+ 

[PATCH v3 12/25] x86/sgx: Add helper to update SGX_LEPUBKEYHASHn MSRs

[Kai Huang]

Add a helper to update SGX_LEPUBKEYHASHn MSRs.  SGX virtualization also
needs to update those MSRs based on guest's "virtual" SGX_LEPUBKEYHASHn
before EINIT from guest.

Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/kernel/cpu/sgx/ioctl.c |  5 ++---
 arch/x86/kernel/cpu/sgx/main.c  | 17 +
 arch/x86/kernel/cpu/sgx/sgx.h   |  2 ++
 3 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/sgx/ioctl.c b/arch/x86/kernel/cpu/sgx/ioctl.c
index dc18ced04ad8..2a0aed446d6c 100644
--- a/arch/x86/kernel/cpu/sgx/ioctl.c
+++ b/arch/x86/kernel/cpu/sgx/ioctl.c
@@ -495,7 +495,7 @@ static int sgx_encl_init(struct sgx_encl *encl, struct 
sgx_sigstruct *sigstruct,
 void *token)
 {
u64 mrsigner[4];
-   int i, j, k;
+   int i, j;
void *addr;
int ret;
 
@@ -544,8 +544,7 @@ static int sgx_encl_init(struct sgx_encl *encl, struct 
sgx_sigstruct *sigstruct,
 
preempt_disable();
 
-   for (k = 0; k < 4; k++)
-   wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + k, 
mrsigner[k]);
+   sgx_update_lepubkeyhash(mrsigner);
 
ret = __einit(sigstruct, token, addr);
 
diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c
index b73114150ff8..b95168427056 100644
--- a/arch/x86/kernel/cpu/sgx/main.c
+++ b/arch/x86/kernel/cpu/sgx/main.c
@@ -727,6 +727,23 @@ static bool __init sgx_page_cache_init(void)
return true;
 }
 
+
+/*
+ * Update the SGX_LEPUBKEYHASH MSRs to the values specified by caller.
+ * Bare-metal driver requires to update them to hash of enclave's signer
+ * before EINIT. KVM needs to update them to guest's virtual MSR values
+ * before doing EINIT from guest.
+ */
+void sgx_update_lepubkeyhash(u64 *lepubkeyhash)
+{
+   int i;
+
+   WARN_ON_ONCE(preemptible());
+
+   for (i = 0; i < 4; i++)
+   wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);
+}
+
 static int __init sgx_init(void)
 {
int ret;
diff --git a/arch/x86/kernel/cpu/sgx/sgx.h b/arch/x86/kernel/cpu/sgx/sgx.h
index 5086b240d269..f0f2a92bb8d0 100644
--- a/arch/x86/kernel/cpu/sgx/sgx.h
+++ b/arch/x86/kernel/cpu/sgx/sgx.h
@@ -89,4 +89,6 @@ static inline int __init sgx_vepc_init(void)
 }
 #endif
 
+void sgx_update_lepubkeyhash(u64 *lepubkeyhash);
+
 #endif /* _X86_SGX_H */
-- 
2.30.2

[PATCH v3 09/25] x86/sgx: Move ENCLS leaf definitions to sgx.h

[Kai Huang]

From: Sean Christopherson 

Move the ENCLS leaf definitions to sgx.h so that they can be used by
KVM.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/sgx.h  | 15 +++
 arch/x86/kernel/cpu/sgx/encls.h | 15 ---
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 14bb5f7e221c..34f44238d1d1 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -27,6 +27,21 @@
 /* The bitmask for the EPC section type. */
 #define SGX_CPUID_EPC_MASK GENMASK(3, 0)
 
+enum sgx_encls_function {
+   ECREATE = 0x00,
+   EADD= 0x01,
+   EINIT   = 0x02,
+   EREMOVE = 0x03,
+   EDGBRD  = 0x04,
+   EDGBWR  = 0x05,
+   EEXTEND = 0x06,
+   ELDU= 0x08,
+   EBLOCK  = 0x09,
+   EPA = 0x0A,
+   EWB = 0x0B,
+   ETRACK  = 0x0C,
+};
+
 /**
  * enum sgx_return_code - The return code type for ENCLS, ENCLU and ENCLV
  * %SGX_NOT_TRACKED:   Previous ETRACK's shootdown sequence has not
diff --git a/arch/x86/kernel/cpu/sgx/encls.h b/arch/x86/kernel/cpu/sgx/encls.h
index 443188fe7e70..be5c49689980 100644
--- a/arch/x86/kernel/cpu/sgx/encls.h
+++ b/arch/x86/kernel/cpu/sgx/encls.h
@@ -11,21 +11,6 @@
 #include 
 #include "sgx.h"
 
-enum sgx_encls_function {
-   ECREATE = 0x00,
-   EADD= 0x01,
-   EINIT   = 0x02,
-   EREMOVE = 0x03,
-   EDGBRD  = 0x04,
-   EDGBWR  = 0x05,
-   EEXTEND = 0x06,
-   ELDU= 0x08,
-   EBLOCK  = 0x09,
-   EPA = 0x0A,
-   EWB = 0x0B,
-   ETRACK  = 0x0C,
-};
-
 /**
  * ENCLS_FAULT_FLAG - flag signifying an ENCLS return code is a trapnr
  *
-- 
2.30.2

[PATCH v3 10/25] x86/sgx: Add SGX2 ENCLS leaf definitions (EAUG, EMODPR and EMODT)

[Kai Huang]

From: Sean Christopherson 

Define the ENCLS leafs that are available with SGX2, also referred to as
Enclave Dynamic Memory Management (EDMM).  The leafs will be used by KVM
to conditionally expose SGX2 capabilities to guests.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/sgx.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 34f44238d1d1..3b025afec0a7 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -40,6 +40,9 @@ enum sgx_encls_function {
EPA = 0x0A,
EWB = 0x0B,
ETRACK  = 0x0C,
+   EAUG= 0x0D,
+   EMODPR  = 0x0E,
+   EMODT   = 0x0F,
 };
 
 /**
-- 
2.30.2

[PATCH v3 14/25] x86/sgx: Move provisioning device creation out of SGX driver

[Kai Huang]

From: Sean Christopherson 

And extract sgx_set_attribute() out of sgx_ioc_enclave_provision() and
export it as symbol for KVM to use.

Provisioning key is sensitive. SGX driver only allows to create enclave
which can access provisioning key when enclave creator has permission to
open /dev/sgx_provision.  It should apply to VM as well, as provisioning
key is platform specific, thus unrestricted VM can also potentially
compromise provisioning key.

Move provisioning device creation out of sgx_drv_init() to sgx_init() as
preparation for adding SGX virtualization support, so that even SGX
driver is not enabled due to flexible launch control is not available,
SGX virtualization can still be enabled, and use it to restrict VM's
capability of being able to access provisioning key.

Signed-off-by: Sean Christopherson 
Reviewed-by: Jarkko Sakkinen 
Acked-by: Dave Hansen 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/sgx.h   |  3 ++
 arch/x86/kernel/cpu/sgx/driver.c | 17 --
 arch/x86/kernel/cpu/sgx/ioctl.c  | 16 ++---
 arch/x86/kernel/cpu/sgx/main.c   | 57 +++-
 4 files changed, 61 insertions(+), 32 deletions(-)

diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 954042e04102..a16e2c9154a3 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -372,4 +372,7 @@ int sgx_virt_einit(void __user *sigstruct, void __user 
*token,
   void __user *secs, u64 *lepubkeyhash, int *trapnr);
 #endif
 
+int sgx_set_attribute(unsigned long *allowed_attributes,
+ unsigned int attribute_fd);
+
 #endif /* _ASM_X86_SGX_H */
diff --git a/arch/x86/kernel/cpu/sgx/driver.c b/arch/x86/kernel/cpu/sgx/driver.c
index 8ce6d8371cfb..aa9b8b868867 100644
--- a/arch/x86/kernel/cpu/sgx/driver.c
+++ b/arch/x86/kernel/cpu/sgx/driver.c
@@ -136,10 +136,6 @@ static const struct file_operations sgx_encl_fops = {
.get_unmapped_area  = sgx_get_unmapped_area,
 };
 
-const struct file_operations sgx_provision_fops = {
-   .owner  = THIS_MODULE,
-};
-
 static struct miscdevice sgx_dev_enclave = {
.minor = MISC_DYNAMIC_MINOR,
.name = "sgx_enclave",
@@ -147,13 +143,6 @@ static struct miscdevice sgx_dev_enclave = {
.fops = &sgx_encl_fops,
 };
 
-static struct miscdevice sgx_dev_provision = {
-   .minor = MISC_DYNAMIC_MINOR,
-   .name = "sgx_provision",
-   .nodename = "sgx_provision",
-   .fops = &sgx_provision_fops,
-};
-
 int __init sgx_drv_init(void)
 {
unsigned int eax, ebx, ecx, edx;
@@ -187,11 +176,5 @@ int __init sgx_drv_init(void)
if (ret)
return ret;
 
-   ret = misc_register(&sgx_dev_provision);
-   if (ret) {
-   misc_deregister(&sgx_dev_enclave);
-   return ret;
-   }
-
return 0;
 }
diff --git a/arch/x86/kernel/cpu/sgx/ioctl.c b/arch/x86/kernel/cpu/sgx/ioctl.c
index 2a0aed446d6c..7f573e37f4d4 100644
--- a/arch/x86/kernel/cpu/sgx/ioctl.c
+++ b/arch/x86/kernel/cpu/sgx/ioctl.c
@@ -2,6 +2,7 @@
 /*  Copyright(c) 2016-20 Intel Corporation. */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -664,24 +665,11 @@ static long sgx_ioc_enclave_init(struct sgx_encl *encl, 
void __user *arg)
 static long sgx_ioc_enclave_provision(struct sgx_encl *encl, void __user *arg)
 {
struct sgx_enclave_provision params;
-   struct file *file;
 
if (copy_from_user(¶ms, arg, sizeof(params)))
return -EFAULT;
 
-   file = fget(params.fd);
-   if (!file)
-   return -EINVAL;
-
-   if (file->f_op != &sgx_provision_fops) {
-   fput(file);
-   return -EINVAL;
-   }
-
-   encl->attributes_mask |= SGX_ATTR_PROVISIONKEY;
-
-   fput(file);
-   return 0;
+   return sgx_set_attribute(&encl->attributes_mask, params.fd);
 }
 
 long sgx_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c
index b95168427056..7105e34da530 100644
--- a/arch/x86/kernel/cpu/sgx/main.c
+++ b/arch/x86/kernel/cpu/sgx/main.c
@@ -1,14 +1,17 @@
 // SPDX-License-Identifier: GPL-2.0
 /*  Copyright(c) 2016-20 Intel Corporation. */
 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include "driver.h"
 #include "encl.h"
 #include "encls.h"
@@ -744,6 +747,51 @@ void sgx_update_lepubkeyhash(u64 *lepubkeyhash)
wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);
 }
 
+const struct file_operations sgx_provision_fops = {
+   .owner  = THIS_MODULE,
+};
+
+static struct miscdevice sgx_dev_provision = {
+   .minor = MISC_DYNAMIC_MINOR,
+   .name = "sgx_provision",
+   .nodename = "sgx_provision",
+   .fops = &sgx_provision_fops,
+};
+
+/**
+ * sgx_set_attribute() - Update allowed attributes given file descriptor
+ * @allowed_attributes

[PATCH v3 11/25] x86/sgx: Add encls_faulted() helper

[Kai Huang]

From: Sean Christopherson 

Add a helper to extract the fault indicator from an encoded ENCLS return
value.  SGX virtualization will also need to detect ENCLS faults.

Signed-off-by: Sean Christopherson 
Acked-by: Dave Hansen 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/kernel/cpu/sgx/encls.h | 15 ++-
 arch/x86/kernel/cpu/sgx/ioctl.c |  2 +-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/sgx/encls.h b/arch/x86/kernel/cpu/sgx/encls.h
index be5c49689980..9b204843b78d 100644
--- a/arch/x86/kernel/cpu/sgx/encls.h
+++ b/arch/x86/kernel/cpu/sgx/encls.h
@@ -40,6 +40,19 @@
} while (0);  \
 }
 
+/*
+ * encls_faulted() - Check if an ENCLS leaf faulted given an error code
+ * @ret:   the return value of an ENCLS leaf function call
+ *
+ * Return:
+ * - true: ENCLS leaf faulted.
+ * - false:Otherwise.
+ */
+static inline bool encls_faulted(int ret)
+{
+   return ret & ENCLS_FAULT_FLAG;
+}
+
 /**
  * encls_failed() - Check if an ENCLS function failed
  * @ret:   the return value of an ENCLS function call
@@ -50,7 +63,7 @@
  */
 static inline bool encls_failed(int ret)
 {
-   if (ret & ENCLS_FAULT_FLAG)
+   if (encls_faulted(ret))
return ENCLS_TRAPNR(ret) != X86_TRAP_PF;
 
return !!ret;
diff --git a/arch/x86/kernel/cpu/sgx/ioctl.c b/arch/x86/kernel/cpu/sgx/ioctl.c
index 772b9c648cf1..dc18ced04ad8 100644
--- a/arch/x86/kernel/cpu/sgx/ioctl.c
+++ b/arch/x86/kernel/cpu/sgx/ioctl.c
@@ -568,7 +568,7 @@ static int sgx_encl_init(struct sgx_encl *encl, struct 
sgx_sigstruct *sigstruct,
}
}
 
-   if (ret & ENCLS_FAULT_FLAG) {
+   if (encls_faulted(ret)) {
if (encls_failed(ret))
ENCLS_WARN(ret, "EINIT");
 
-- 
2.30.2

[PATCH v3 13/25] x86/sgx: Add helpers to expose ECREATE and EINIT to KVM

[Kai Huang]

From: Sean Christopherson 

The host kernel must intercept ECREATE to impose policies on guests, and
intercept EINIT to be able to write guest's virtual SGX_LEPUBKEYHASH MSR
values to hardware before running guest's EINIT so it can run correctly
according to hardware behavior.

Provide wrappers around __ecreate() and __einit() to hide the ugliness
of overloading the ENCLS return value to encode multiple error formats
in a single int.  KVM will trap-and-execute ECREATE and EINIT as part
of SGX virtualization, and reflect ENCLS execution result to guest by
setting up guest's GPRs, or on an exception, injecting the correct fault
based on return value of __ecreate() and __einit().

Use host userspace addresses (provided by KVM based on guest physical
address of ENCLS parameters) to execute ENCLS/EINIT when possible.
Accesses to both EPC and memory originating from ENCLS are subject to
segmentation and paging mechanisms.  It's also possible to generate
kernel mappings for ENCLS parameters by resolving PFN but using
__uaccess_xx() is simpler.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
v2->v3:
 - Updated to use addr,size directly for access_ok()s.

---
 arch/x86/include/asm/sgx.h |   7 +++
 arch/x86/kernel/cpu/sgx/virt.c | 109 +
 2 files changed, 116 insertions(+)

diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 3b025afec0a7..954042e04102 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -365,4 +365,11 @@ struct sgx_sigstruct {
  * comment!
  */
 
+#ifdef CONFIG_X86_SGX_KVM
+int sgx_virt_ecreate(struct sgx_pageinfo *pageinfo, void __user *secs,
+int *trapnr);
+int sgx_virt_einit(void __user *sigstruct, void __user *token,
+  void __user *secs, u64 *lepubkeyhash, int *trapnr);
+#endif
+
 #endif /* _ASM_X86_SGX_H */
diff --git a/arch/x86/kernel/cpu/sgx/virt.c b/arch/x86/kernel/cpu/sgx/virt.c
index 29d8d28b4695..eaff7d72e47f 100644
--- a/arch/x86/kernel/cpu/sgx/virt.c
+++ b/arch/x86/kernel/cpu/sgx/virt.c
@@ -258,3 +258,112 @@ int __init sgx_vepc_init(void)
 
return misc_register(&sgx_vepc_dev);
 }
+
+/**
+ * sgx_virt_ecreate() - Run ECREATE on behalf of guest
+ * @pageinfo:  Pointer to PAGEINFO structure
+ * @secs:  Userspace pointer to SECS page
+ * @trapnr:trap number injected to guest in case of ECREATE error
+ *
+ * Run ECREATE on behalf of guest after KVM traps ECREATE for the purpose
+ * of enforcing policies of guest's enclaves, and return the trap number
+ * which should be injected to guest in case of any ECREATE error.
+ *
+ * Return:
+ * - 0:ECREATE was successful.
+ * - -EFAULT:  ECREATE returned error.
+ */
+int sgx_virt_ecreate(struct sgx_pageinfo *pageinfo, void __user *secs,
+int *trapnr)
+{
+   int ret;
+
+   /*
+* @secs is an untrusted, userspace-provided address.  It comes from
+* KVM and is assumed to be a valid pointer which points somewhere in
+* userspace.  This can fault and call SGX or other fault handlers when
+* userspace mapping @secs doesn't exist.
+*
+* Add a WARN() to make sure @secs is already valid userspace pointer
+* from caller (KVM), who should already have handled invalid pointer
+* case (for instance, made by malicious guest).  All other checks,
+* such as alignment of @secs, are deferred to ENCLS itself.
+*/
+   WARN_ON_ONCE(!access_ok(secs, PAGE_SIZE));
+   __uaccess_begin();
+   ret = __ecreate(pageinfo, (void *)secs);
+   __uaccess_end();
+
+   if (encls_faulted(ret)) {
+   *trapnr = ENCLS_TRAPNR(ret);
+   return -EFAULT;
+   }
+
+   /* ECREATE doesn't return an error code, it faults or succeeds. */
+   WARN_ON_ONCE(ret);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(sgx_virt_ecreate);
+
+static int __sgx_virt_einit(void __user *sigstruct, void __user *token,
+   void __user *secs)
+{
+   int ret;
+
+   /*
+* Make sure all userspace pointers from caller (KVM) are valid.
+* All other checks deferred to ENCLS itself.  Also see comment
+* for @secs in sgx_virt_ecreate().
+*/
+#define SGX_EINITTOKEN_SIZE304
+   WARN_ON_ONCE(!access_ok(sigstruct, sizeof(struct sgx_sigstruct)) ||
+!access_ok(token, SGX_EINITTOKEN_SIZE) ||
+!access_ok(secs, PAGE_SIZE));
+   __uaccess_begin();
+   ret =  __einit((void *)sigstruct, (void *)token, (void *)secs);
+   __uaccess_end();
+
+   return ret;
+}
+
+/**
+ * sgx_virt_einit() - Run EINIT on behalf of guest
+ * @sigstruct: Userspace pointer to SIGSTRUCT structure
+ * @token: Userspace pointer to EINITTOKEN structure
+ * @secs:  Userspace pointer to SECS page
+ * @lepubkeyhash:  Pointer to guest's *virtual* SGX_LEPUBKEYHASH MSR values
+ * @trapnr:   

[PATCH v3 15/25] KVM: x86: Export kvm_mmu_gva_to_gpa_{read,write}() for SGX (VMX)

[Kai Huang]

From: Sean Christopherson 

Export the gva_to_gpa() helpers for use by SGX virtualization when
executing ENCLS[ECREATE] and ENCLS[EINIT] on behalf of the guest.
To execute ECREATE and EINIT, KVM must obtain the GPA of the target
Secure Enclave Control Structure (SECS) in order to get its
corresponding HVA.

Because the SECS must reside in the Enclave Page Cache (EPC), copying
the SECS's data to a host-controlled buffer via existing exported
helpers is not a viable option as the EPC is not readable or writable
by the kernel.

SGX virtualization will also use gva_to_gpa() to obtain HVAs for
non-EPC pages in order to pass user pointers directly to ECREATE and
EINIT, which avoids having to copy pages worth of data into the kernel.

Signed-off-by: Sean Christopherson 
Acked-by: Jarkko Sakkinen 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/x86.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 47e021bdcc94..d2da5abcf395 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5959,6 +5959,7 @@ gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, 
gva_t gva,
u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? 
PFERR_USER_MASK : 0;
return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
 }
+EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
 
  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
struct x86_exception *exception)
@@ -5975,6 +5976,7 @@ gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, 
gva_t gva,
access |= PFERR_WRITE_MASK;
return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
 }
+EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
 
 /* uses this to access any guest's mapped memory without checking CPL */
 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
-- 
2.30.2

[PATCH v3 18/25] KVM: x86: Add reverse-CPUID lookup support for scattered SGX features

[Kai Huang]

From: Sean Christopherson 

Define a new KVM-only feature word for advertising and querying SGX
sub-features in CPUID.0x12.0x0.EAX.  Because SGX1 and SGX2 are scattered
in the kernel's feature word, they need to be translated so that the
bit numbers match those of hardware.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/cpuid.h | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 8925a929186c..a175ff75bbbe 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -13,13 +13,18 @@
  * "bug" caps, but KVM doesn't use those.
  */
 enum kvm_only_cpuid_leafs {
-   NR_KVM_CPU_CAPS = NCAPINTS,
+   CPUID_12_EAX = NCAPINTS,
+   NR_KVM_CPU_CAPS,
 
NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
 };
 
 #define X86_KVM_FEATURE(w, f)  ((w)*32 + (f))
 
+/* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
+#define __X86_FEATURE_SGX1 X86_KVM_FEATURE(CPUID_12_EAX, 0)
+#define __X86_FEATURE_SGX2 X86_KVM_FEATURE(CPUID_12_EAX, 1)
+
 extern u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;
 void kvm_set_cpu_caps(void);
 
@@ -93,6 +98,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
[CPUID_8000_0007_EBX] = {0x8007, 0, CPUID_EBX},
[CPUID_7_EDX] = { 7, 0, CPUID_EDX},
[CPUID_7_1_EAX]   = { 7, 1, CPUID_EAX},
+   [CPUID_12_EAX]= {0x0012, 0, CPUID_EAX},
 };
 
 /*
@@ -119,6 +125,11 @@ static __always_inline void reverse_cpuid_check(unsigned 
int x86_leaf)
  */
 static __always_inline u32 __feature_translate(int x86_feature)
 {
+   if (x86_feature == X86_FEATURE_SGX1)
+   return __X86_FEATURE_SGX1;
+   else if (x86_feature == X86_FEATURE_SGX2)
+   return __X86_FEATURE_SGX2;
+
return x86_feature;
 }
 
-- 
2.30.2

[PATCH v3 19/25] KVM: VMX: Add basic handling of VM-Exit from SGX enclave

[Kai Huang]

From: Sean Christopherson 

Add support for handling VM-Exits that originate from a guest SGX
enclave.  In SGX, an "enclave" is a new CPL3-only execution environment,
wherein the CPU and memory state is protected by hardware to make the
state inaccesible to code running outside of the enclave.  When exiting
an enclave due to an asynchronous event (from the perspective of the
enclave), e.g. exceptions, interrupts, and VM-Exits, the enclave's state
is automatically saved and scrubbed (the CPU loads synthetic state), and
then reloaded when re-entering the enclave.  E.g. after an instruction
based VM-Exit from an enclave, vmcs.GUEST_RIP will not contain the RIP
of the enclave instruction that trigered VM-Exit, but will instead point
to a RIP in the enclave's untrusted runtime (the guest userspace code
that coordinates entry/exit to/from the enclave).

To help a VMM recognize and handle exits from enclaves, SGX adds bits to
existing VMCS fields, VM_EXIT_REASON.VMX_EXIT_REASON_FROM_ENCLAVE and
GUEST_INTERRUPTIBILITY_INFO.GUEST_INTR_STATE_ENCLAVE_INTR.  Define the
new architectural bits, and add a boolean to struct vcpu_vmx to cache
VMX_EXIT_REASON_FROM_ENCLAVE.  Clear the bit in exit_reason so that
checks against exit_reason do not need to account for SGX, e.g.
"if (exit_reason == EXIT_REASON_EXCEPTION_NMI)" continues to work.

KVM is a largely a passive observer of the new bits, e.g. KVM needs to
account for the bits when propagating information to a nested VMM, but
otherwise doesn't need to act differently for the majority of VM-Exits
from enclaves.

The one scenario that is directly impacted is emulation, which is for
all intents and purposes impossible[1] since KVM does not have access to
the RIP or instruction stream that triggered the VM-Exit.  The inability
to emulate is a non-issue for KVM, as most instructions that might
trigger VM-Exit unconditionally #UD in an enclave (before the VM-Exit
check.  For the few instruction that conditionally #UD, KVM either never
sets the exiting control, e.g. PAUSE_EXITING[2], or sets it if and only
if the feature is not exposed to the guest in order to inject a #UD,
e.g. RDRAND_EXITING.

But, because it is still possible for a guest to trigger emulation,
e.g. MMIO, inject a #UD if KVM ever attempts emulation after a VM-Exit
from an enclave.  This is architecturally accurate for instruction
VM-Exits, and for MMIO it's the least bad choice, e.g. it's preferable
to killing the VM.  In practice, only broken or particularly stupid
guests should ever encounter this behavior.

Add a WARN in skip_emulated_instruction to detect any attempt to
modify the guest's RIP during an SGX enclave VM-Exit as all such flows
should either be unreachable or must handle exits from enclaves before
getting to skip_emulated_instruction.

[1] Impossible for all practical purposes.  Not truly impossible
since KVM could implement some form of para-virtualization scheme.

[2] PAUSE_LOOP_EXITING only affects CPL0 and enclaves exist only at
CPL3, so we also don't need to worry about that interaction.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/vmx.h  |  1 +
 arch/x86/include/uapi/asm/vmx.h |  1 +
 arch/x86/kvm/vmx/nested.c   |  2 ++
 arch/x86/kvm/vmx/vmx.c  | 45 +++--
 4 files changed, 47 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 358707f60d99..0ffaa3156a4e 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -373,6 +373,7 @@ enum vmcs_field {
 #define GUEST_INTR_STATE_MOV_SS0x0002
 #define GUEST_INTR_STATE_SMI   0x0004
 #define GUEST_INTR_STATE_NMI   0x0008
+#define GUEST_INTR_STATE_ENCLAVE_INTR  0x0010
 
 /* GUEST_ACTIVITY_STATE flags */
 #define GUEST_ACTIVITY_ACTIVE  0
diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
index b8e650a985e3..946d761adbd3 100644
--- a/arch/x86/include/uapi/asm/vmx.h
+++ b/arch/x86/include/uapi/asm/vmx.h
@@ -27,6 +27,7 @@
 
 
 #define VMX_EXIT_REASONS_FAILED_VMENTRY 0x8000
+#define VMX_EXIT_REASONS_SGX_ENCLAVE_MODE  0x0800
 
 #define EXIT_REASON_EXCEPTION_NMI   0
 #define EXIT_REASON_EXTERNAL_INTERRUPT  1
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index bcca0b80e0d0..28848e9f70e2 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -4105,6 +4105,8 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct 
vmcs12 *vmcs12,
 {
/* update exit information fields: */
vmcs12->vm_exit_reason = vm_exit_reason;
+   if (to_vmx(vcpu)->exit_reason.enclave_mode)
+   vmcs12->vm_exit_reason |= VMX_EXIT_REASONS_SGX_ENCLAVE_MODE;
vmcs12->exit_qualification = exit_qualification;
vmcs12->vm_exit_intr_info = exit_intr_info;
 
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 32cf8287d4a7..9dd185

[PATCH v3 16/25] KVM: x86: Define new #PF SGX error code bit

[Kai Huang]

From: Sean Christopherson 

Page faults that are signaled by the SGX Enclave Page Cache Map (EPCM),
as opposed to the traditional IA32/EPT page tables, set an SGX bit in
the error code to indicate that the #PF was induced by SGX.  KVM will
need to emulate this behavior as part of its trap-and-execute scheme for
virtualizing SGX Launch Control, e.g. to inject SGX-induced #PFs if
EINIT faults in the host, and to support live migration.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/kvm_host.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 9bc091ecaaeb..8b1c13056768 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -227,6 +227,7 @@ enum x86_intercept_stage;
 #define PFERR_RSVD_BIT 3
 #define PFERR_FETCH_BIT 4
 #define PFERR_PK_BIT 5
+#define PFERR_SGX_BIT 15
 #define PFERR_GUEST_FINAL_BIT 32
 #define PFERR_GUEST_PAGE_BIT 33
 
@@ -236,6 +237,7 @@ enum x86_intercept_stage;
 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
+#define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
 
-- 
2.30.2

[tip:x86/sgx] BUILD SUCCESS WITH WARNING 5b8719504e3adf47646273781591ad439b3c3c7a

[kernel test robot]

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/sgx
branch HEAD: 5b8719504e3adf47646273781591ad439b3c3c7a  x86/sgx: Add a basic 
NUMA allocation scheme to sgx_alloc_epc_page()

Warning reports:

https://lore.kernel.org/lkml/202103190514.xh7irkme-...@intel.com

possible Warning in current branch:

arch/x86/kernel/cpu/sgx/main.c:496:3: warning: variable 'nid' is used 
uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
arch/x86/kernel/cpu/sgx/main.c:496:7: warning: variable 'nid' is used 
uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]

Warning ids grouped by kconfigs:

clang_recent_errors
|-- x86_64-randconfig-a001-20210318
|   `-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false
|-- x86_64-randconfig-a002-20210318
|   `-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false
|-- x86_64-randconfig-a003-20210318
|   `-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false
|-- x86_64-randconfig-a004-20210318
|   `-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false
|-- x86_64-randconfig-r004-20210318
|   `-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false
`-- x86_64-randconfig-r031-20210318
`-- 
arch-x86-kernel-cpu-sgx-main.c:warning:variable-nid-is-used-uninitialized-whenever-if-condition-is-false

elapsed time: 721m

configs tested: 120
configs skipped: 54

gcc tested configs:
arm defconfig
arm64allyesconfig
arm64   defconfig
arm  allyesconfig
arm  allmodconfig
x86_64   allyesconfig
riscvallmodconfig
riscvallyesconfig
i386 allyesconfig
arc  axs101_defconfig
sh  defconfig
ia64generic_defconfig
m68kmvme147_defconfig
riscvnommu_k210_defconfig
arc defconfig
h8300h8300h-sim_defconfig
powerpc tqm8560_defconfig
mipsnlm_xlp_defconfig
ia64 allmodconfig
s390  debug_defconfig
mips bigsur_defconfig
powerpc wii_defconfig
sh  sh7785lcr_32bit_defconfig
armmps2_defconfig
powerpc linkstation_defconfig
xtensa  audio_kc705_defconfig
mipsvocore2_defconfig
powerpcge_imp3a_defconfig
arm  exynos_defconfig
powerpc tqm8548_defconfig
sh  urquell_defconfig
armmvebu_v5_defconfig
mips   capcella_defconfig
powerpc mpc834x_mds_defconfig
mips decstation_r4k_defconfig
sh  lboxre2_defconfig
armvt8500_v6_v7_defconfig
powerpc   maple_defconfig
powerpcadder875_defconfig
sh  kfr2r09_defconfig
arm lpc32xx_defconfig
s390 alldefconfig
xtensa virt_defconfig
powerpc mpc832x_rdb_defconfig
csky alldefconfig
sh   sh7724_generic_defconfig
mipsmalta_qemu_32r6_defconfig
mips  rb532_defconfig
sh   se7721_defconfig
sh magicpanelr2_defconfig
powerpcamigaone_defconfig
arm   milbeaut_m10v_defconfig
powerpc  makalu_defconfig
arm  pxa3xx_defconfig
m68k   m5208evb_defconfig
m68k   bvme6000_defconfig
powerpc kmeter1_defconfig
ia64defconfig
ia64 allyesconfig
m68k allmodconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
arc  allyesconfig
nds32 allnoconfig
nds32   defconfig
nios2allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
sh 

[PATCH v3 20/25] KVM: VMX: Frame in ENCLS handler for SGX virtualization

[Kai Huang]

From: Sean Christopherson 

Introduce sgx.c and sgx.h, along with the framework for handling ENCLS
VM-Exits.  Add a bool, enable_sgx, that will eventually be wired up to a
module param to control whether or not SGX virtualization is enabled at
runtime.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/Makefile  |  2 ++
 arch/x86/kvm/vmx/sgx.c | 50 ++
 arch/x86/kvm/vmx/sgx.h | 15 +
 arch/x86/kvm/vmx/vmx.c |  9 +---
 4 files changed, 73 insertions(+), 3 deletions(-)
 create mode 100644 arch/x86/kvm/vmx/sgx.c
 create mode 100644 arch/x86/kvm/vmx/sgx.h

diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile
index 1b4766fe1de2..87f514c36eae 100644
--- a/arch/x86/kvm/Makefile
+++ b/arch/x86/kvm/Makefile
@@ -23,6 +23,8 @@ kvm-$(CONFIG_KVM_XEN) += xen.o
 
 kvm-intel-y+= vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o 
\
   vmx/evmcs.o vmx/nested.o vmx/posted_intr.o
+kvm-intel-$(CONFIG_X86_SGX_KVM)+= vmx/sgx.o
+
 kvm-amd-y  += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o 
svm/avic.o svm/sev.o
 
 obj-$(CONFIG_KVM)  += kvm.o
diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
new file mode 100644
index ..f68adbe38750
--- /dev/null
+++ b/arch/x86/kvm/vmx/sgx.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*  Copyright(c) 2021 Intel Corporation. */
+
+#include 
+
+#include "cpuid.h"
+#include "kvm_cache_regs.h"
+#include "sgx.h"
+#include "vmx.h"
+#include "x86.h"
+
+bool __read_mostly enable_sgx;
+
+static inline bool encls_leaf_enabled_in_guest(struct kvm_vcpu *vcpu, u32 leaf)
+{
+   if (!enable_sgx || !guest_cpuid_has(vcpu, X86_FEATURE_SGX))
+   return false;
+
+   if (leaf >= ECREATE && leaf <= ETRACK)
+   return guest_cpuid_has(vcpu, X86_FEATURE_SGX1);
+
+   if (leaf >= EAUG && leaf <= EMODT)
+   return guest_cpuid_has(vcpu, X86_FEATURE_SGX2);
+
+   return false;
+}
+
+static inline bool sgx_enabled_in_guest_bios(struct kvm_vcpu *vcpu)
+{
+   const u64 bits = FEAT_CTL_SGX_ENABLED | FEAT_CTL_LOCKED;
+
+   return (to_vmx(vcpu)->msr_ia32_feature_control & bits) == bits;
+}
+
+int handle_encls(struct kvm_vcpu *vcpu)
+{
+   u32 leaf = (u32)vcpu->arch.regs[VCPU_REGS_RAX];
+
+   if (!encls_leaf_enabled_in_guest(vcpu, leaf)) {
+   kvm_queue_exception(vcpu, UD_VECTOR);
+   } else if (!sgx_enabled_in_guest_bios(vcpu)) {
+   kvm_inject_gp(vcpu, 0);
+   } else {
+   WARN(1, "KVM: unexpected exit on ENCLS[%u]", leaf);
+   vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
+   vcpu->run->hw.hardware_exit_reason = EXIT_REASON_ENCLS;
+   return 0;
+   }
+   return 1;
+}
diff --git a/arch/x86/kvm/vmx/sgx.h b/arch/x86/kvm/vmx/sgx.h
new file mode 100644
index ..6e17ecd4aca3
--- /dev/null
+++ b/arch/x86/kvm/vmx/sgx.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __KVM_X86_SGX_H
+#define __KVM_X86_SGX_H
+
+#include 
+
+#ifdef CONFIG_X86_SGX_KVM
+extern bool __read_mostly enable_sgx;
+
+int handle_encls(struct kvm_vcpu *vcpu);
+#else
+#define enable_sgx 0
+#endif
+
+#endif /* __KVM_X86_SGX_H */
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 9dd185a53a3e..ef668047a8f9 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -57,6 +57,7 @@
 #include "mmu.h"
 #include "nested.h"
 #include "pmu.h"
+#include "sgx.h"
 #include "trace.h"
 #include "vmcs.h"
 #include "vmcs12.h"
@@ -5673,16 +5674,18 @@ static int handle_vmx_instruction(struct kvm_vcpu *vcpu)
return 1;
 }
 
+#ifndef CONFIG_X86_SGX_KVM
 static int handle_encls(struct kvm_vcpu *vcpu)
 {
/*
-* SGX virtualization is not yet supported.  There is no software
-* enable bit for SGX, so we have to trap ENCLS and inject a #UD
-* to prevent the guest from executing ENCLS.
+* SGX virtualization is disabled.  There is no software enable bit for
+* SGX, so KVM intercepts all ENCLS leafs and injects a #UD to prevent
+* the guest from executing ENCLS (when SGX is supported by hardware).
 */
kvm_queue_exception(vcpu, UD_VECTOR);
return 1;
 }
+#endif /* CONFIG_X86_SGX_KVM */
 
 static int handle_bus_lock_vmexit(struct kvm_vcpu *vcpu)
 {
-- 
2.30.2

[PATCH v3 21/25] KVM: VMX: Add SGX ENCLS[ECREATE] handler to enforce CPUID restrictions

[Kai Huang]

From: Sean Christopherson 

Add an ECREATE handler that will be used to intercept ECREATE for the
purpose of enforcing and enclave's MISCSELECT, ATTRIBUTES and XFRM, i.e.
to allow userspace to restrict SGX features via CPUID.  ECREATE will be
intercepted when any of the aforementioned masks diverges from hardware
in order to enforce the desired CPUID model, i.e. inject #GP if the
guest attempts to set a bit that hasn't been enumerated as allowed-1 in
CPUID.

Note, access to the PROVISIONKEY is not yet supported.

Signed-off-by: Sean Christopherson 
Co-developed-by: Kai Huang 
Signed-off-by: Kai Huang 
---
 arch/x86/include/asm/kvm_host.h |   3 +
 arch/x86/kvm/vmx/sgx.c  | 263 
 2 files changed, 266 insertions(+)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 8b1c13056768..d6329ede0198 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1038,6 +1038,9 @@ struct kvm_arch {
 
bool bus_lock_detection_enabled;
 
+   /* Guest can access the SGX PROVISIONKEY. */
+   bool sgx_provisioning_allowed;
+
struct kvm_pmu_event_filter __rcu *pmu_event_filter;
struct task_struct *nx_lpage_recovery_thread;
 
diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
index f68adbe38750..cb7cc6174a84 100644
--- a/arch/x86/kvm/vmx/sgx.c
+++ b/arch/x86/kvm/vmx/sgx.c
@@ -11,6 +11,267 @@
 
 bool __read_mostly enable_sgx;
 
+/*
+ * ENCLS's memory operands use a fixed segment (DS) and a fixed
+ * address size based on the mode.  Related prefixes are ignored.
+ */
+static int sgx_get_encls_gva(struct kvm_vcpu *vcpu, unsigned long offset,
+int size, int alignment, gva_t *gva)
+{
+   struct kvm_segment s;
+   bool fault;
+
+   /* Skip vmcs.GUEST_DS retrieval for 64-bit mode to avoid VMREADs. */
+   *gva = offset;
+   if (!is_long_mode(vcpu)) {
+   vmx_get_segment(vcpu, &s, VCPU_SREG_DS);
+   *gva += s.base;
+   }
+
+   if (!IS_ALIGNED(*gva, alignment)) {
+   fault = true;
+   } else if (likely(is_long_mode(vcpu))) {
+   fault = is_noncanonical_address(*gva, vcpu);
+   } else {
+   *gva &= 0x;
+   fault = (s.unusable) ||
+   (s.type != 2 && s.type != 3) ||
+   (*gva > s.limit) ||
+   ((s.base != 0 || s.limit != 0x) &&
+   (((u64)*gva + size - 1) > s.limit + 1));
+   }
+   if (fault)
+   kvm_inject_gp(vcpu, 0);
+   return fault ? -EINVAL : 0;
+}
+
+static void sgx_handle_emulation_failure(struct kvm_vcpu *vcpu, u64 addr,
+unsigned int size)
+{
+   vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+   vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
+   vcpu->run->internal.ndata = 2;
+   vcpu->run->internal.data[0] = addr;
+   vcpu->run->internal.data[1] = size;
+}
+
+static int sgx_read_hva(struct kvm_vcpu *vcpu, unsigned long hva, void *data,
+   unsigned int size)
+{
+   if (__copy_from_user(data, (void __user *)hva, size)) {
+   sgx_handle_emulation_failure(vcpu, hva, size);
+   return -EFAULT;
+   }
+
+   return 0;
+}
+
+static int sgx_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t gva, bool write,
+ gpa_t *gpa)
+{
+   struct x86_exception ex;
+
+   if (write)
+   *gpa = kvm_mmu_gva_to_gpa_write(vcpu, gva, &ex);
+   else
+   *gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, &ex);
+
+   if (*gpa == UNMAPPED_GVA) {
+   kvm_inject_emulated_page_fault(vcpu, &ex);
+   return -EFAULT;
+   }
+
+   return 0;
+}
+
+static int sgx_gpa_to_hva(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned long *hva)
+{
+   *hva = kvm_vcpu_gfn_to_hva(vcpu, PFN_DOWN(gpa));
+   if (kvm_is_error_hva(*hva)) {
+   sgx_handle_emulation_failure(vcpu, gpa, 1);
+   return -EFAULT;
+   }
+
+   *hva |= gpa & ~PAGE_MASK;
+
+   return 0;
+}
+
+static int sgx_inject_fault(struct kvm_vcpu *vcpu, gva_t gva, int trapnr)
+{
+   struct x86_exception ex;
+
+   /*
+* A non-EPCM #PF indicates a bad userspace HVA.  This *should* check
+* for PFEC.SGX and not assume any #PF on SGX2 originated in the EPC,
+* but the error code isn't (yet) plumbed through the ENCLS helpers.
+*/
+   if (trapnr == PF_VECTOR && !boot_cpu_has(X86_FEATURE_SGX2)) {
+   vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+   vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
+   vcpu->run->internal.ndata = 0;
+   return 0;
+   }
+
+   /*
+* If the guest thinks it's running on SGX2 hardware, inject an SGX
+* #PF if the fault matches an EPCM fault si

[PATCH v3 17/25] KVM: x86: Add support for reverse CPUID lookup of scattered features

[Kai Huang]

From: Sean Christopherson 

Introduce a scheme that allows KVM's CPUID magic to support features
that are scattered in the kernel's feature words.  To advertise and/or
query guest support for CPUID-based features, KVM requires the bit
number of an X86_FEATURE_* to match the bit number in its associated
CPUID entry.  For scattered features, this does not hold true.

Add a framework to allow defining KVM-only words, stored in
kvm_cpu_caps after the shared kernel caps, that can be used to gather
the scattered feature bits by translating X86_FEATURE_* flags into their
KVM-defined feature.

Note, because reverse_cpuid_check() effectively forces kvm_cpu_caps
lookups to be resolved at compile time, there is no runtime cost for
translating from kernel-defined to kvm-defined features.

More details here:  https://lkml.kernel.org/r/X/jxcolg+huo4...@google.com

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/cpuid.c | 32 +++-
 arch/x86/kvm/cpuid.h | 39 ++-
 2 files changed, 61 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 6bd2f8b830e4..a0e7be9ed449 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -28,7 +28,7 @@
  * Unlike "struct cpuinfo_x86.x86_capability", kvm_cpu_caps doesn't need to be
  * aligned to sizeof(unsigned long) because it's not accessed via bitops.
  */
-u32 kvm_cpu_caps[NCAPINTS] __read_mostly;
+u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;
 EXPORT_SYMBOL_GPL(kvm_cpu_caps);
 
 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
@@ -53,6 +53,7 @@ static u32 xstate_required_size(u64 xstate_bv, bool compacted)
 }
 
 #define F feature_bit
+#define SF(name) (boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0)
 
 static inline struct kvm_cpuid_entry2 *cpuid_entry2_find(
struct kvm_cpuid_entry2 *entries, int nent, u32 function, u32 index)
@@ -347,13 +348,13 @@ int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
return r;
 }
 
-static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
+/* Mask kvm_cpu_caps for @leaf with the raw CPUID capabilities of this CPU. */
+static __always_inline void __kvm_cpu_cap_mask(enum cpuid_leafs leaf)
 {
const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32);
struct kvm_cpuid_entry2 entry;
 
reverse_cpuid_check(leaf);
-   kvm_cpu_caps[leaf] &= mask;
 
cpuid_count(cpuid.function, cpuid.index,
&entry.eax, &entry.ebx, &entry.ecx, &entry.edx);
@@ -361,6 +362,26 @@ static __always_inline void kvm_cpu_cap_mask(enum 
cpuid_leafs leaf, u32 mask)
kvm_cpu_caps[leaf] &= *__cpuid_entry_get_reg(&entry, cpuid.reg);
 }
 
+static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
+{
+   /* Use the "init" variant for scattered leafs. */
+   BUILD_BUG_ON(leaf >= NCAPINTS);
+
+   kvm_cpu_caps[leaf] &= mask;
+
+   __kvm_cpu_cap_mask(leaf);
+}
+
+static __always_inline void kvm_cpu_cap_init(enum cpuid_leafs leaf, u32 mask)
+{
+   /* Use the "mask" variant for hardwared-defined leafs. */
+   BUILD_BUG_ON(leaf < NCAPINTS);
+
+   kvm_cpu_caps[leaf] = mask;
+
+   __kvm_cpu_cap_mask(leaf);
+}
+
 void kvm_set_cpu_caps(void)
 {
unsigned int f_nx = is_efer_nx() ? F(NX) : 0;
@@ -371,12 +392,13 @@ void kvm_set_cpu_caps(void)
unsigned int f_gbpages = 0;
unsigned int f_lm = 0;
 #endif
+   memset(kvm_cpu_caps, 0, sizeof(kvm_cpu_caps));
 
-   BUILD_BUG_ON(sizeof(kvm_cpu_caps) >
+   BUILD_BUG_ON(sizeof(kvm_cpu_caps) - (NKVMCAPINTS * 
sizeof(*kvm_cpu_caps)) >
 sizeof(boot_cpu_data.x86_capability));
 
memcpy(&kvm_cpu_caps, &boot_cpu_data.x86_capability,
-  sizeof(kvm_cpu_caps));
+  sizeof(kvm_cpu_caps) - (NKVMCAPINTS * sizeof(*kvm_cpu_caps)));
 
kvm_cpu_cap_mask(CPUID_1_ECX,
/*
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 2a0c5064497f..8925a929186c 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -7,7 +7,20 @@
 #include 
 #include 
 
-extern u32 kvm_cpu_caps[NCAPINTS] __read_mostly;
+/*
+ * Hardware-defined CPUID leafs that are scattered in the kernel, but need to
+ * be directly used by KVM.  Note, these word values conflict with the kernel's
+ * "bug" caps, but KVM doesn't use those.
+ */
+enum kvm_only_cpuid_leafs {
+   NR_KVM_CPU_CAPS = NCAPINTS,
+
+   NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
+};
+
+#define X86_KVM_FEATURE(w, f)  ((w)*32 + (f))
+
+extern u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;
 void kvm_set_cpu_caps(void);
 
 void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu);
@@ -100,6 +113,20 @@ static __always_inline void reverse_cpuid_check(unsigned 
int x86_leaf)
BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
 }
 
+/*
+ * Translate feature bits that are scattered in the kernel's cpufeatures word
+ * i

[PATCH v3 22/25] KVM: VMX: Add emulation of SGX Launch Control LE hash MSRs

[Kai Huang]

From: Sean Christopherson 

Emulate the four Launch Enclave public key hash MSRs (LE hash MSRs) that
exist on CPUs that support SGX Launch Control (LC).  SGX LC modifies the
behavior of ENCLS[EINIT] to use the LE hash MSRs when verifying the key
used to sign an enclave.  On CPUs without LC support, the LE hash is
hardwired into the CPU to an Intel controlled key (the Intel key is also
the reset value of the LE hash MSRs). Track the guest's desired hash so
that a future patch can stuff the hash into the hardware MSRs when
executing EINIT on behalf of the guest, when those MSRs are writable in
host.

Note, KVM allows writes to the LE hash MSRs if IA32_FEATURE_CONTROL is
unlocked.  This is technically not architectural behavior, but it's
roughly equivalent to the arch behavior of the MSRs being writable prior
to activating SGX[1].  Emulating SGX activation is feasible, but adds no
tangible benefits and would just create extra work for KVM and guest
firmware.

[1] SGX related bits in IA32_FEATURE_CONTROL cannot be set until SGX
is activated, e.g. by firmware.  SGX activation is triggered by
setting bit 0 in MSR 0x7a.  Until SGX is activated, the LE hash
MSRs are writable, e.g. to allow firmware to lock down the LE
root key with a non-Intel value.

Signed-off-by: Sean Christopherson 
Co-developed-by: Kai Huang 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/vmx/sgx.c | 35 +++
 arch/x86/kvm/vmx/sgx.h |  6 ++
 arch/x86/kvm/vmx/vmx.c | 20 
 arch/x86/kvm/vmx/vmx.h |  2 ++
 4 files changed, 63 insertions(+)

diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
index cb7cc6174a84..be0429c3c04a 100644
--- a/arch/x86/kvm/vmx/sgx.c
+++ b/arch/x86/kvm/vmx/sgx.c
@@ -11,6 +11,9 @@
 
 bool __read_mostly enable_sgx;
 
+/* Initial value of guest's virtual SGX_LEPUBKEYHASHn MSRs */
+static u64 sgx_pubkey_hash[4] __ro_after_init;
+
 /*
  * ENCLS's memory operands use a fixed segment (DS) and a fixed
  * address size based on the mode.  Related prefixes are ignored.
@@ -311,3 +314,35 @@ int handle_encls(struct kvm_vcpu *vcpu)
}
return 1;
 }
+
+void setup_default_sgx_lepubkeyhash(void)
+{
+   /*
+* Use Intel's default value for Skylake hardware if Launch Control is
+* not supported, i.e. Intel's hash is hardcoded into silicon, or if
+* Launch Control is supported and enabled, i.e. mimic the reset value
+* and let the guest write the MSRs at will.  If Launch Control is
+* supported but disabled, then use the current MSR values as the hash
+* MSRs exist but are read-only (locked and not writable).
+*/
+   if (!enable_sgx || boot_cpu_has(X86_FEATURE_SGX_LC) ||
+   rdmsrl_safe(MSR_IA32_SGXLEPUBKEYHASH0, &sgx_pubkey_hash[0])) {
+   sgx_pubkey_hash[0] = 0xa6053e051270b7acULL;
+   sgx_pubkey_hash[1] = 0x6cfbe8ba8b3b413dULL;
+   sgx_pubkey_hash[2] = 0xc4916d99f2b3735dULL;
+   sgx_pubkey_hash[3] = 0xd4f8c05909f9bb3bULL;
+   } else {
+   /* MSR_IA32_SGXLEPUBKEYHASH0 is read above */
+   rdmsrl(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);
+   rdmsrl(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);
+   rdmsrl(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);
+   }
+}
+
+void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu)
+{
+   struct vcpu_vmx *vmx = to_vmx(vcpu);
+
+   memcpy(vmx->msr_ia32_sgxlepubkeyhash, sgx_pubkey_hash,
+  sizeof(sgx_pubkey_hash));
+}
diff --git a/arch/x86/kvm/vmx/sgx.h b/arch/x86/kvm/vmx/sgx.h
index 6e17ecd4aca3..6502fa52c7e9 100644
--- a/arch/x86/kvm/vmx/sgx.h
+++ b/arch/x86/kvm/vmx/sgx.h
@@ -8,8 +8,14 @@
 extern bool __read_mostly enable_sgx;
 
 int handle_encls(struct kvm_vcpu *vcpu);
+
+void setup_default_sgx_lepubkeyhash(void);
+void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu);
 #else
 #define enable_sgx 0
+
+static inline void setup_default_sgx_lepubkeyhash(void) { }
+static inline void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu) { }
 #endif
 
 #endif /* __KVM_X86_SGX_H */
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index ef668047a8f9..070460df5c3b 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1904,6 +1904,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct 
msr_data *msr_info)
case MSR_IA32_FEAT_CTL:
msr_info->data = vmx->msr_ia32_feature_control;
break;
+   case MSR_IA32_SGXLEPUBKEYHASH0 ... MSR_IA32_SGXLEPUBKEYHASH3:
+   if (!msr_info->host_initiated &&
+   !guest_cpuid_has(vcpu, X86_FEATURE_SGX_LC))
+   return 1;
+   msr_info->data = to_vmx(vcpu)->msr_ia32_sgxlepubkeyhash
+   [msr_info->index - MSR_IA32_SGXLEPUBKEYHASH0];
+   break;
case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:
if (!nested_vmx_allowed(v

[PATCH v3 23/25] KVM: VMX: Add ENCLS[EINIT] handler to support SGX Launch Control (LC)

[Kai Huang]

From: Sean Christopherson 

Add a VM-Exit handler to trap-and-execute EINIT when SGX LC is enabled
in the host.  When SGX LC is enabled, the host kernel may rewrite the
hardware values at will, e.g. to launch enclaves with different signers,
thus KVM needs to intercept EINIT to ensure it is executed with the
correct LE hash (even if the guest sees a hardwired hash).

Switching the LE hash MSRs on VM-Enter/VM-Exit is not a viable option as
writing the MSRs is prohibitively expensive, e.g. on SKL hardware each
WRMSR is ~400 cycles.  And because EINIT takes tens of thousands of
cycles to execute, the ~1500 cycle overhead to trap-and-execute EINIT is
unlikely to be noticed by the guest, let alone impact its overall SGX
performance.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/vmx/sgx.c | 55 ++
 1 file changed, 55 insertions(+)

diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
index be0429c3c04a..9f0149b9d53f 100644
--- a/arch/x86/kvm/vmx/sgx.c
+++ b/arch/x86/kvm/vmx/sgx.c
@@ -275,6 +275,59 @@ static int handle_encls_ecreate(struct kvm_vcpu *vcpu)
return r;
 }
 
+static int handle_encls_einit(struct kvm_vcpu *vcpu)
+{
+   unsigned long sig_hva, secs_hva, token_hva, rflags;
+   struct vcpu_vmx *vmx = to_vmx(vcpu);
+   gva_t sig_gva, secs_gva, token_gva;
+   gpa_t sig_gpa, secs_gpa, token_gpa;
+   int ret, trapnr;
+
+   if (sgx_get_encls_gva(vcpu, kvm_rbx_read(vcpu), 1808, 4096, &sig_gva) ||
+   sgx_get_encls_gva(vcpu, kvm_rcx_read(vcpu), 4096, 4096, &secs_gva) 
||
+   sgx_get_encls_gva(vcpu, kvm_rdx_read(vcpu), 304, 512, &token_gva))
+   return 1;
+
+   /*
+* Translate the SIGSTRUCT, SECS and TOKEN pointers from GVA to GPA.
+* Resume the guest on failure to inject a #PF.
+*/
+   if (sgx_gva_to_gpa(vcpu, sig_gva, false, &sig_gpa) ||
+   sgx_gva_to_gpa(vcpu, secs_gva, true, &secs_gpa) ||
+   sgx_gva_to_gpa(vcpu, token_gva, false, &token_gpa))
+   return 1;
+
+   /*
+* ...and then to HVA.  The order of accesses isn't architectural, i.e.
+* KVM doesn't have to fully process one address at a time.  Exit to
+* userspace if a GPA is invalid.  Note, all structures are aligned and
+* cannot split pages.
+*/
+   if (sgx_gpa_to_hva(vcpu, sig_gpa, &sig_hva) ||
+   sgx_gpa_to_hva(vcpu, secs_gpa, &secs_hva) ||
+   sgx_gpa_to_hva(vcpu, token_gpa, &token_hva))
+   return 0;
+
+   ret = sgx_virt_einit((void __user *)sig_hva, (void __user *)token_hva,
+(void __user *)secs_hva,
+vmx->msr_ia32_sgxlepubkeyhash, &trapnr);
+
+   if (ret == -EFAULT)
+   return sgx_inject_fault(vcpu, secs_gva, trapnr);
+
+   rflags = vmx_get_rflags(vcpu) & ~(X86_EFLAGS_CF | X86_EFLAGS_PF |
+ X86_EFLAGS_AF | X86_EFLAGS_SF |
+ X86_EFLAGS_OF);
+   if (ret)
+   rflags |= X86_EFLAGS_ZF;
+   else
+   rflags &= ~X86_EFLAGS_ZF;
+   vmx_set_rflags(vcpu, rflags);
+
+   kvm_rax_write(vcpu, ret);
+   return kvm_skip_emulated_instruction(vcpu);
+}
+
 static inline bool encls_leaf_enabled_in_guest(struct kvm_vcpu *vcpu, u32 leaf)
 {
if (!enable_sgx || !guest_cpuid_has(vcpu, X86_FEATURE_SGX))
@@ -307,6 +360,8 @@ int handle_encls(struct kvm_vcpu *vcpu)
} else {
if (leaf == ECREATE)
return handle_encls_ecreate(vcpu);
+   if (leaf == EINIT)
+   return handle_encls_einit(vcpu);
WARN(1, "KVM: unexpected exit on ENCLS[%u]", leaf);
vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
vcpu->run->hw.hardware_exit_reason = EXIT_REASON_ENCLS;
-- 
2.30.2

[PATCH v3 25/25] KVM: x86: Add capability to grant VM access to privileged SGX attribute

[Kai Huang]

From: Sean Christopherson 

Add a capability, KVM_CAP_SGX_ATTRIBUTE, that can be used by userspace
to grant a VM access to a priveleged attribute, with args[0] holding a
file handle to a valid SGX attribute file.

The SGX subsystem restricts access to a subset of enclave attributes to
provide additional security for an uncompromised kernel, e.g. to prevent
malware from using the PROVISIONKEY to ensure its nodes are running
inside a geniune SGX enclave and/or to obtain a stable fingerprint.

To prevent userspace from circumventing such restrictions by running an
enclave in a VM, KVM restricts guest access to privileged attributes by
default.

Cc: Andy Lutomirski 
Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 Documentation/virt/kvm/api.rst | 23 +++
 arch/x86/kvm/cpuid.c   |  2 +-
 arch/x86/kvm/x86.c | 21 +
 include/uapi/linux/kvm.h   |  1 +
 4 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 38e327d4b479..ebb47e48d4f3 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -6230,6 +6230,29 @@ KVM_RUN_BUS_LOCK flag is used to distinguish between 
them.
 This capability can be used to check / enable 2nd DAWR feature provided
 by POWER10 processor.
 
+7.24 KVM_CAP_SGX_ATTRIBUTE
+--
+
+:Architectures: x86
+:Target: VM
+:Parameters: args[0] is a file handle of a SGX attribute file in securityfs
+:Returns: 0 on success, -EINVAL if the file handle is invalid or if a requested
+  attribute is not supported by KVM.
+
+KVM_CAP_SGX_ATTRIBUTE enables a userspace VMM to grant a VM access to one or
+more priveleged enclave attributes.  args[0] must hold a file handle to a valid
+SGX attribute file corresponding to an attribute that is supported/restricted
+by KVM (currently only PROVISIONKEY).
+
+The SGX subsystem restricts access to a subset of enclave attributes to provide
+additional security for an uncompromised kernel, e.g. use of the PROVISIONKEY
+is restricted to deter malware from using the PROVISIONKEY to obtain a stable
+system fingerprint.  To prevent userspace from circumventing such restrictions
+by running an enclave in a VM, KVM prevents access to privileged attributes by
+default.
+
+See Documentation/x86/sgx/2.Kernel-internals.rst for more details.
+
 8. Other capabilities.
 ==
 
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a0d45607b702..6dc12d949f86 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -849,7 +849,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array 
*array, u32 function)
 * expected to derive it from supported XCR0.
 */
entry->eax &= SGX_ATTR_DEBUG | SGX_ATTR_MODE64BIT |
- /* PROVISIONKEY | */ SGX_ATTR_EINITTOKENKEY |
+ SGX_ATTR_PROVISIONKEY | SGX_ATTR_EINITTOKENKEY |
  SGX_ATTR_KSS;
entry->ebx &= 0;
break;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index d2da5abcf395..81139e076380 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -75,6 +75,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define CREATE_TRACE_POINTS
@@ -3759,6 +3760,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long 
ext)
case KVM_CAP_X86_USER_SPACE_MSR:
case KVM_CAP_X86_MSR_FILTER:
case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
+#ifdef CONFIG_X86_SGX_KVM
+   case KVM_CAP_SGX_ATTRIBUTE:
+#endif
r = 1;
break;
 #ifdef CONFIG_KVM_XEN
@@ -5345,6 +5349,23 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
kvm->arch.bus_lock_detection_enabled = true;
r = 0;
break;
+#ifdef CONFIG_X86_SGX_KVM
+   case KVM_CAP_SGX_ATTRIBUTE: {
+   unsigned long allowed_attributes = 0;
+
+   r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
+   if (r)
+   break;
+
+   /* KVM only supports the PROVISIONKEY privileged attribute. */
+   if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
+   !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
+   kvm->arch.sgx_provisioning_allowed = true;
+   else
+   r = -EINVAL;
+   break;
+   }
+#endif
default:
r = -EINVAL;
break;
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index f6afee209620..7d8927e474f8 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1078,6 +1078,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_DIRTY_LOG_RING 192
 #define KVM_CAP_X86_BUS_LOCK_EXIT 193
 #define KVM_CAP_PPC_DAWR1 194
+#define KVM_CAP_SGX_ATTRIBUTE 195
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
-- 
2.30.2

[PATCH] workqueue: update wq_watchdog_touched for unbound lockup checking

[Wang Qing]

When touch_softlockup_watchdog() is called, only wq_watchdog_touched_cpu 
updated, while the unbound worker_pool running on its core uses 
wq_watchdog_touched to determine whether locked up. This may be mischecked.

My suggestion is to update both when touch_softlockup_watchdog() is called, 
use wq_watchdog_touched_cpu to check bound, and use wq_watchdog_touched 
to check unbound worker_pool.

Signed-off-by: Wang Qing 
---
 kernel/workqueue.c | 17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index 0d150da..be08295
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -5787,22 +5787,17 @@ static void wq_watchdog_timer_fn(struct timer_list 
*unused)
continue;
 
/* get the latest of pool and touched timestamps */
+   if (pool->cpu >= 0)
+   touched = READ_ONCE(per_cpu(wq_watchdog_touched_cpu, 
pool->cpu));
+   else
+   touched = READ_ONCE(wq_watchdog_touched);
pool_ts = READ_ONCE(pool->watchdog_ts);
-   touched = READ_ONCE(wq_watchdog_touched);
 
if (time_after(pool_ts, touched))
ts = pool_ts;
else
ts = touched;
 
-   if (pool->cpu >= 0) {
-   unsigned long cpu_touched =
-   READ_ONCE(per_cpu(wq_watchdog_touched_cpu,
- pool->cpu));
-   if (time_after(cpu_touched, ts))
-   ts = cpu_touched;
-   }
-
/* did we stall? */
if (time_after(jiffies, ts + thresh)) {
lockup_detected = true;
@@ -5826,8 +5821,8 @@ notrace void wq_watchdog_touch(int cpu)
 {
if (cpu >= 0)
per_cpu(wq_watchdog_touched_cpu, cpu) = jiffies;
-   else
-   wq_watchdog_touched = jiffies;
+
+   wq_watchdog_touched = jiffies;
 }
 
 static void wq_watchdog_set_thresh(unsigned long thresh)
-- 
2.7.4

[PATCH v3 24/25] KVM: VMX: Enable SGX virtualization for SGX1, SGX2 and LC

[Kai Huang]

From: Sean Christopherson 

Enable SGX virtualization now that KVM has the VM-Exit handlers needed
to trap-and-execute ENCLS to ensure correctness and/or enforce the CPU
model exposed to the guest.  Add a KVM module param, "sgx", to allow an
admin to disable SGX virtualization independent of the kernel.

When supported in hardware and the kernel, advertise SGX1, SGX2 and SGX
LC to userspace via CPUID and wire up the ENCLS_EXITING bitmap based on
the guest's SGX capabilities, i.e. to allow ENCLS to be executed in an
SGX-enabled guest.  With the exception of the provision key, all SGX
attribute bits may be exposed to the guest.  Guest access to the
provision key, which is controlled via securityfs, will be added in a
future patch.

Note, KVM does not yet support exposing ENCLS_C leafs or ENCLV leafs.

Signed-off-by: Sean Christopherson 
Signed-off-by: Kai Huang 
---
 arch/x86/kvm/cpuid.c  | 57 +++-
 arch/x86/kvm/vmx/nested.c | 26 +++--
 arch/x86/kvm/vmx/nested.h |  5 +++
 arch/x86/kvm/vmx/sgx.c| 80 ++-
 arch/x86/kvm/vmx/sgx.h| 13 +++
 arch/x86/kvm/vmx/vmcs12.c |  1 +
 arch/x86/kvm/vmx/vmcs12.h |  4 +-
 arch/x86/kvm/vmx/vmx.c| 35 -
 8 files changed, 212 insertions(+), 9 deletions(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index a0e7be9ed449..a0d45607b702 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "cpuid.h"
 #include "lapic.h"
 #include "mmu.h"
@@ -171,6 +172,21 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
vcpu->arch.guest_supported_xcr0 =
(best->eax | ((u64)best->edx << 32)) & supported_xcr0;
 
+   /*
+* Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
+* the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
+* requested XCR0 value.  The enclave's XFRM must be a subset of XCRO
+* at the time of EENTER, thus adjust the allowed XFRM by the guest's
+* supported XCR0.  Similar to XCR0 handling, FP and SSE are forced to
+* '1' even on CPUs that don't support XSAVE.
+*/
+   best = kvm_find_cpuid_entry(vcpu, 0x12, 0x1);
+   if (best) {
+   best->ecx &= vcpu->arch.guest_supported_xcr0 & 0x;
+   best->edx &= vcpu->arch.guest_supported_xcr0 >> 32;
+   best->ecx |= XFEATURE_MASK_FPSSE;
+   }
+
kvm_update_pv_runtime(vcpu);
 
vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
@@ -429,7 +445,7 @@ void kvm_set_cpu_caps(void)
);
 
kvm_cpu_cap_mask(CPUID_7_0_EBX,
-   F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
+   F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
F(BMI2) | F(ERMS) | F(INVPCID) | F(RTM) | 0 /*MPX*/ | F(RDSEED) 
|
F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | 
F(AVX512DQ) |
@@ -440,7 +456,8 @@ void kvm_set_cpu_caps(void)
F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
-   F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/
+   F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ |
+   F(SGX_LC)
);
/* Set LA57 based on hardware capability. */
if (cpuid_ecx(7) & F(LA57))
@@ -479,6 +496,10 @@ void kvm_set_cpu_caps(void)
F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES)
);
 
+   kvm_cpu_cap_init(CPUID_12_EAX,
+   SF(SGX1) | SF(SGX2)
+   );
+
kvm_cpu_cap_mask(CPUID_8000_0001_ECX,
F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
@@ -800,6 +821,38 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array 
*array, u32 function)
entry->edx = 0;
}
break;
+   case 0x12:
+   /* Intel SGX */
+   if (!kvm_cpu_cap_has(X86_FEATURE_SGX)) {
+   entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
+   break;
+   }
+
+   /*
+* Index 0: Sub-features, MISCSELECT (a.k.a extended features)
+* and max enclave sizes.   The SGX sub-features and MISCSELECT
+* are restricted by kernel and KVM capabilities (like most
+* feature flags), while enclave size is unrestricted.
+*/
+   cpuid_entry_override(entry, CPUID_12_EAX);
+   entry->ebx &= SGX_MISC_EXINFO;
+
+   entry = do_host_cp

[PATCH -next] e1000e: Fix 'defined but not used' warning

[Bixuan Cui]

Fix the warning while disable CONFIG_PM_SLEEP:

drivers/net/ethernet/intel/e1000e/netdev.c:6926:12: warning:
‘e1000e_pm_prepare’ defined but not used [-Wunused-function]
static int e1000e_pm_prepare(struct device *dev)
^

Signed-off-by: Bixuan Cui 
---
 drivers/net/ethernet/intel/e1000e/netdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c 
b/drivers/net/ethernet/intel/e1000e/netdev.c
index f1c9debd9f3b..d2e4653536c5 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -6923,7 +6923,7 @@ static int __e1000_resume(struct pci_dev *pdev)
return 0;
 }
 
-static int e1000e_pm_prepare(struct device *dev)
+static __maybe_unused int e1000e_pm_prepare(struct device *dev)
 {
return pm_runtime_suspended(dev) &&
pm_suspend_via_firmware();
-- 
2.17.1

[PATCH v3 00/25] KVM SGX virtualization support

[Kai Huang]

This series adds KVM SGX virtualization support. The first 14 patches starting
with x86/sgx or x86/cpu.. are necessary changes to x86 and SGX core/driver to
support KVM SGX virtualization, while the rest are patches to KVM subsystem.

This series is based against latest tip/x86/sgx, which has Jarkko's NUMA
allocation support.

You can also get the code from upstream branch of kvm-sgx repo on github:

https://github.com/intel/kvm-sgx.git upstream

It also requires Qemu changes to create VM with SGX support. You can find Qemu
repo here:

https://github.com/intel/qemu-sgx.git upstream

Please refer to README.md of above qemu-sgx repo for detail on how to create
guest with SGX support. At meantime, for your quick reference you can use below
command to create SGX guest:

#qemu-system-x86_64 -smp 4 -m 2G -drive file=,if=virtio \
-cpu host,+sgx_provisionkey \
-sgx-epc id=epc1,memdev=mem1 \
-object memory-backend-epc,id=mem1,size=64M,prealloc

Please note that the SGX relevant part is:

-cpu host,+sgx_provisionkey \
-sgx-epc id=epc1,memdev=mem1 \
-object memory-backend-epc,id=mem1,size=64M,prealloc

And you can change other parameters of your qemu command based on your needs.

=
Changelog:

(Changelog here is for global changes. Please see each patch's changelog for
 changes made to specific patch.)

v2->v3:

 - No big change in design, structure of patch series, etc.
 - Rebased to lastest tip/x86/sgx, to resolve merge conflict of patch 3
   (x86/sgx: Wipe out EREMOVE from sgx_free_epc_page()).
 - Addressed some Nit issues found by Sean in v2.
 - Also addressed some Nit issues reported by checkpatch.pl. Now there's no
   checkpatch issues.
 - Updated patch 3 (x86/sgx: Wipe out EREMOVE from sgx_free_epc_page()):
   - Removed Jarkko from author, per request.
   - Changed to replace all call sites of sgx_free_epc_page() with new
 sgx_encl_free_epc_page(), to make this patch doesn't have functional
 changes (except a WARN upon EREMOVE failure requestd by Dave).
   - Rebased to tip/x86/sgx, which has Jarkko's NUMA allocation.
   - Added Jarkko's Acked-by.
 - Updated patch 8 (x86/sgx: Expose SGX architectural definitions to the
   kernel) to add MAINTAINER file update to include new introduced asm/sgx.h.
 - Updated patch 13 (x86/sgx: Add helpers to expose ECREATE and EINIT to KVM)
   to use addr and size directly in access_ok()s (which won't be triggered
   anyway).

v1->v2:

 - No big change in design, structural of patch series, etc.
 - Addressed Boris's comments regarding to suppressing both SGX1 and SGX2 in
   /proc/cpuinfo, and improvement in feat_ctl.c when enabling SGX (patch 2
   and 6).
 - Addressed Sean's comments for both x86 part patches and KVM patches (patch 3,
   5, 9, 12, 19, 21).
 - Addressed Dave's comments in RFC v6 series (patch 13).

RFC->v1:

 - Refined patch (x86/sgx: Wipe out EREMOVE from sgx_free_epc_page()) to print
   error msg that EPC page is leaked when EREMOVE failed, requested by Dave.
 - Changelog history of all RFC series is removed in both this cover letter
   and each individual patch, since majority of x86 part patches already got
   Acked-by from Dave and Jarkko. And the changelogs are not quite useful from
   my perspective.

=
KVM SGX virtualization Overview

- Virtual EPC

SGX enclave memory is special and is reserved specifically for enclave use.
In bare-metal SGX enclaves, the kernel allocates enclave pages, copies data
into the pages with privileged instructions, then allows the enclave to start.
In this scenario, only initialized pages already assigned to an enclave are
mapped to userspace.

In virtualized environments, the hypervisor still needs to do the physical
enclave page allocation.  The guest kernel is responsible for the data copying
(among other things).  This means that the job of starting an enclave is now
split between hypervisor and guest.

This series introduces a new misc device: /dev/sgx_vepc.  This device allows
the host to map *uninitialized* enclave memory into userspace, which can then
be passed into a guest.

While it might be *possible* to start a host-side enclave with /dev/sgx_enclave
and pass its memory into a guest, it would be wasteful and convoluted.

Implement the *raw* EPC allocation in the x86 core-SGX subsystem via
/dev/sgx_vepc rather than in KVM.  Doing so has two major advantages:

  - Does not require changes to KVM's uAPI, e.g. EPC gets handled as
just another memory backend for guests.

  - EPC management is wholly contained in the SGX subsystem, e.g. SGX
does not have to export any symbols, changes to reclaim flows don't
need to be routed through KVM, SGX's dirty laundry doesn't have to
get aired out for the world to see, and so on and so forth.

The virtual EPC pages allocated to guests are currently not reclaimable.
Reclaiming EPC page used by enclave requires a special reclaim

[PATCH 4/4] crypto: hisilicon/zip - support new 'sqe' type in Kunpeng930

[Yang Shen]

The Kunpeng930 changes some field meanings in 'sqe'. So add a new
'hisi_zip_sqe_ops' to describe the 'sqe' operations.

Signed-off-by: Yang Shen 
---
 drivers/crypto/hisilicon/zip/zip.h|  1 +
 drivers/crypto/hisilicon/zip/zip_crypto.c | 25 +
 2 files changed, 26 insertions(+)

diff --git a/drivers/crypto/hisilicon/zip/zip.h 
b/drivers/crypto/hisilicon/zip/zip.h
index b4d3e03..517fdbd 100644
--- a/drivers/crypto/hisilicon/zip/zip.h
+++ b/drivers/crypto/hisilicon/zip/zip.h
@@ -75,6 +75,7 @@ struct hisi_zip_sqe {
u32 dw23;
u32 dw24;
u32 dw25;
+   /* tag: in sqe type 3 */
u32 dw26;
u32 dw27;
u32 rsvd1[4];
diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 85dcf6a..4bd41a4 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -298,6 +298,11 @@ static void hisi_zip_fill_tag_v1(struct hisi_zip_sqe *sqe, 
struct hisi_zip_req *
sqe->dw13 = req->req_id;
 }
 
+static void hisi_zip_fill_tag_v2(struct hisi_zip_sqe *sqe, struct hisi_zip_req 
*req)
+{
+   sqe->dw26 = req->req_id;
+}
+
 static void hisi_zip_fill_sqe_type(struct hisi_zip_sqe *sqe, u8 sqe_type)
 {
u32 val;
@@ -380,6 +385,11 @@ static u32 hisi_zip_get_tag_v1(struct hisi_zip_sqe *sqe)
return sqe->dw13;
 }
 
+static u32 hisi_zip_get_tag_v2(struct hisi_zip_sqe *sqe)
+{
+   return sqe->dw26;
+}
+
 static u32 hisi_zip_get_status(struct hisi_zip_sqe *sqe)
 {
return sqe->dw3 & HZIP_BD_STATUS_M;
@@ -527,6 +537,19 @@ const struct hisi_zip_sqe_ops hisi_zip_ops_v1 = {
.get_dstlen = hisi_zip_get_dstlen,
 };
 
+const struct hisi_zip_sqe_ops hisi_zip_ops_v2 = {
+   .sqe_type   = 0x3,
+   .fill_addr  = hisi_zip_fill_addr,
+   .fill_buf_size  = hisi_zip_fill_buf_size,
+   .fill_buf_type  = hisi_zip_fill_buf_type,
+   .fill_req_type  = hisi_zip_fill_req_type,
+   .fill_tag   = hisi_zip_fill_tag_v2,
+   .fill_sqe_type  = hisi_zip_fill_sqe_type,
+   .get_tag= hisi_zip_get_tag_v2,
+   .get_status = hisi_zip_get_status,
+   .get_dstlen = hisi_zip_get_dstlen,
+};
+
 static int hisi_zip_ctx_init(struct hisi_zip_ctx *hisi_zip_ctx, u8 req_type, 
int node)
 {
struct hisi_qp *qps[HZIP_CTX_Q_NUM] = { NULL };
@@ -560,6 +583,8 @@ static int hisi_zip_ctx_init(struct hisi_zip_ctx 
*hisi_zip_ctx, u8 req_type, int
 
if (hisi_zip->qm.ver < QM_HW_V3)
hisi_zip_ctx->ops = &hisi_zip_ops_v1;
+   else
+   hisi_zip_ctx->ops = &hisi_zip_ops_v2;
 
return 0;
 }
-- 
2.7.4

[PATCH 2/4] crypto: hisilicon/zip - add comments for 'hisi_zip_sqe'

[Yang Shen]

Some fields of 'hisi_zip_sqe' are unused, and some fields have misc
utilities. So add comments for used fields and make others unnamed.

Signed-off-by: Yang Shen 
---
 drivers/crypto/hisilicon/zip/zip.h| 45 ++-
 drivers/crypto/hisilicon/zip/zip_crypto.c |  4 +--
 2 files changed, 34 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip.h 
b/drivers/crypto/hisilicon/zip/zip.h
index 9ed7461..b4d3e03 100644
--- a/drivers/crypto/hisilicon/zip/zip.h
+++ b/drivers/crypto/hisilicon/zip/zip.h
@@ -33,31 +33,50 @@ struct hisi_zip_sqe {
u32 consumed;
u32 produced;
u32 comp_data_length;
+   /*
+* status: 0~7 bits
+* rsvd: 8~31 bits
+*/
u32 dw3;
u32 input_data_length;
-   u32 lba_l;
-   u32 lba_h;
+   u32 dw5;
+   u32 dw6;
+   /*
+* in_sge_data_offset: 0~23 bits
+* rsvd: 24~27 bits
+* sqe_type: 29~31 bits
+*/
u32 dw7;
+   /*
+* out_sge_data_offset: 0~23 bits
+* rsvd: 24~31 bits
+*/
u32 dw8;
+   /*
+* request_type: 0~7 bits
+* buffer_type: 8~11 bits
+* rsvd: 13~31 bits
+*/
u32 dw9;
u32 dw10;
-   u32 priv_info;
+   u32 dw11;
u32 dw12;
-   u32 tag;
+   /* tag: in sqe type 0 */
+   u32 dw13;
u32 dest_avail_out;
-   u32 rsvd0;
-   u32 comp_head_addr_l;
-   u32 comp_head_addr_h;
+   u32 dw15;
+   u32 dw16;
+   u32 dw17;
u32 source_addr_l;
u32 source_addr_h;
u32 dest_addr_l;
u32 dest_addr_h;
-   u32 stream_ctx_addr_l;
-   u32 stream_ctx_addr_h;
-   u32 cipher_key1_addr_l;
-   u32 cipher_key1_addr_h;
-   u32 cipher_key2_addr_l;
-   u32 cipher_key2_addr_h;
+   u32 dw22;
+   u32 dw23;
+   u32 dw24;
+   u32 dw25;
+   u32 dw26;
+   u32 dw27;
u32 rsvd1[4];
 };
 
diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 989b273..3bc2148 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -253,7 +253,7 @@ static void hisi_zip_config_buf_type(struct hisi_zip_sqe 
*sqe, u8 buf_type)
 
 static void hisi_zip_config_tag(struct hisi_zip_sqe *sqe, u32 tag)
 {
-   sqe->tag = tag;
+   sqe->dw13 = tag;
 }
 
 static void hisi_zip_fill_sqe(struct hisi_zip_sqe *sqe, u8 req_type,
@@ -339,7 +339,7 @@ static void hisi_zip_acomp_cb(struct hisi_qp *qp, void 
*data)
struct hisi_zip_req_q *req_q = &qp_ctx->req_q;
struct device *dev = &qp->qm->pdev->dev;
struct hisi_zip_sqe *sqe = data;
-   struct hisi_zip_req *req = req_q->q + sqe->tag;
+   struct hisi_zip_req *req = req_q->q + sqe->dw13;
struct acomp_req *acomp_req = req->req;
u32 status, dlen, head_size;
int err = 0;
-- 
2.7.4

[PATCH 0/4]crypto: hisilicon/zip - support new 'sqe' type in Kunpeng930

[Yang Shen]

In Kunpeng930, some field meanings in 'sqe' are changed, so driver need to
distinguish the type on different platform.

To avoid checking the platform everytime when driver fills the 'sqe', add a
struct 'hisi_zip_sqe_ops' to describe the 'sqe' operations. The driver only
need to choose the 'ops' once when call 'hisi_zip_acomp_init'.

Yang Shen (4):
  crypto: hisilicon/zip - adjust functions location
  crypto: hisilicon/zip - add comments for 'hisi_zip_sqe'
  crypto: hisilicon/zip - initialize operations about 'sqe' in
'acomp_alg.init'
  crypto: hisilicon/zip - support new 'sqe' type in Kunpeng930

 drivers/crypto/hisilicon/zip/zip.h|  46 +-
 drivers/crypto/hisilicon/zip/zip_crypto.c | 706 +-
 2 files changed, 438 insertions(+), 314 deletions(-)

--
2.7.4

[PATCH 3/4] crypto: hisilicon/zip - initialize operations about 'sqe' in 'acomp_alg.init'

[Yang Shen]

The operations about 'sqe' are different on some hardwares. Add a struct
'hisi_zip_sqe_ops' to describe the operations in a hardware. And choose the
'ops' in 'hisi_zip_acomp_init' according to the hardware.

Signed-off-by: Yang Shen 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 141 +++---
 1 file changed, 110 insertions(+), 31 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 3bc2148..85dcf6a 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -10,6 +10,7 @@
 #define HZIP_BD_STATUS_M   GENMASK(7, 0)
 /* hisi_zip_sqe dw7 */
 #define HZIP_IN_SGE_DATA_OFFSET_M  GENMASK(23, 0)
+#define HZIP_SQE_TYPE_MGENMASK(31, 28)
 /* hisi_zip_sqe dw8 */
 #define HZIP_OUT_SGE_DATA_OFFSET_M GENMASK(23, 0)
 /* hisi_zip_sqe dw9 */
@@ -91,8 +92,22 @@ struct hisi_zip_qp_ctx {
struct hisi_zip_ctx *ctx;
 };
 
+struct hisi_zip_sqe_ops {
+   u8 sqe_type;
+   void (*fill_addr)(struct hisi_zip_sqe *sqe, struct hisi_zip_req *req);
+   void (*fill_buf_size)(struct hisi_zip_sqe *sqe, struct hisi_zip_req 
*req);
+   void (*fill_buf_type)(struct hisi_zip_sqe *sqe, u8 buf_type);
+   void (*fill_req_type)(struct hisi_zip_sqe *sqe, u8 req_type);
+   void (*fill_tag)(struct hisi_zip_sqe *sqe, struct hisi_zip_req *req);
+   void (*fill_sqe_type)(struct hisi_zip_sqe *sqe, u8 sqe_type);
+   u32 (*get_tag)(struct hisi_zip_sqe *sqe);
+   u32 (*get_status)(struct hisi_zip_sqe *sqe);
+   u32 (*get_dstlen)(struct hisi_zip_sqe *sqe);
+};
+
 struct hisi_zip_ctx {
struct hisi_zip_qp_ctx qp_ctx[HZIP_CTX_Q_NUM];
+   const struct hisi_zip_sqe_ops *ops;
 };
 
 static int sgl_sge_nr_set(const char *val, const struct kernel_param *kp)
@@ -242,35 +257,69 @@ static void hisi_zip_remove_req(struct hisi_zip_qp_ctx 
*qp_ctx,
write_unlock(&req_q->req_lock);
 }
 
-static void hisi_zip_config_buf_type(struct hisi_zip_sqe *sqe, u8 buf_type)
+static void hisi_zip_fill_addr(struct hisi_zip_sqe *sqe, struct hisi_zip_req 
*req)
+{
+   sqe->source_addr_l = lower_32_bits(req->dma_src);
+   sqe->source_addr_h = upper_32_bits(req->dma_src);
+   sqe->dest_addr_l = lower_32_bits(req->dma_dst);
+   sqe->dest_addr_h = upper_32_bits(req->dma_dst);
+}
+
+static void hisi_zip_fill_buf_size(struct hisi_zip_sqe *sqe, struct 
hisi_zip_req *req)
+{
+   struct acomp_req *a_req = req->req;
+
+   sqe->input_data_length = a_req->slen - req->sskip;
+   sqe->dest_avail_out = a_req->dlen - req->dskip;
+   sqe->dw7 = FIELD_PREP(HZIP_IN_SGE_DATA_OFFSET_M, req->sskip);
+   sqe->dw8 = FIELD_PREP(HZIP_OUT_SGE_DATA_OFFSET_M, req->dskip);
+}
+
+static void hisi_zip_fill_buf_type(struct hisi_zip_sqe *sqe, u8 buf_type)
 {
u32 val;
 
-   val = (sqe->dw9) & ~HZIP_BUF_TYPE_M;
+   val = sqe->dw9 & ~HZIP_BUF_TYPE_M;
val |= FIELD_PREP(HZIP_BUF_TYPE_M, buf_type);
sqe->dw9 = val;
 }
 
-static void hisi_zip_config_tag(struct hisi_zip_sqe *sqe, u32 tag)
+static void hisi_zip_fill_req_type(struct hisi_zip_sqe *sqe, u8 req_type)
 {
-   sqe->dw13 = tag;
+   u32 val;
+
+   val = sqe->dw9 & ~HZIP_REQ_TYPE_M;
+   val |= FIELD_PREP(HZIP_REQ_TYPE_M, req_type);
+   sqe->dw9 = val;
 }
 
-static void hisi_zip_fill_sqe(struct hisi_zip_sqe *sqe, u8 req_type,
- dma_addr_t s_addr, dma_addr_t d_addr, u32 slen,
- u32 dlen, u32 sskip, u32 dskip)
+static void hisi_zip_fill_tag_v1(struct hisi_zip_sqe *sqe, struct hisi_zip_req 
*req)
 {
+   sqe->dw13 = req->req_id;
+}
+
+static void hisi_zip_fill_sqe_type(struct hisi_zip_sqe *sqe, u8 sqe_type)
+{
+   u32 val;
+
+   val = sqe->dw7 & ~HZIP_SQE_TYPE_M;
+   val |= FIELD_PREP(HZIP_SQE_TYPE_M, sqe_type);
+   sqe->dw7 = val;
+}
+
+static void hisi_zip_fill_sqe(struct hisi_zip_ctx *ctx, struct hisi_zip_sqe 
*sqe,
+ u8 req_type, struct hisi_zip_req *req)
+{
+   const struct hisi_zip_sqe_ops *ops = ctx->ops;
+
memset(sqe, 0, sizeof(struct hisi_zip_sqe));
 
-   sqe->input_data_length = slen - sskip;
-   sqe->dw7 = FIELD_PREP(HZIP_IN_SGE_DATA_OFFSET_M, sskip);
-   sqe->dw8 = FIELD_PREP(HZIP_OUT_SGE_DATA_OFFSET_M, dskip);
-   sqe->dw9 = FIELD_PREP(HZIP_REQ_TYPE_M, req_type);
-   sqe->dest_avail_out = dlen - dskip;
-   sqe->source_addr_l = lower_32_bits(s_addr);
-   sqe->source_addr_h = upper_32_bits(s_addr);
-   sqe->dest_addr_l = lower_32_bits(d_addr);
-   sqe->dest_addr_h = upper_32_bits(d_addr);
+   ops->fill_addr(sqe, req);
+   ops->fill_buf_size(sqe, req);
+   ops->fill_buf_type(sqe, HZIP_SGL);
+   ops->fill_req_type(sqe, req_type);
+   ops->fill_tag(sqe, req);
+   ops->fill_sqe_type(sqe, ops->sqe_type);
 }
 
 static int hisi_zip_do_work(struc

[PATCH 1/4] crypto: hisilicon/zip - adjust functions location

[Yang Shen]

This patch changes nothing about functions except location in order to make
code logic clearly.

This adjustment follows three principles:
1.The called functions are listed in order above the calling functions.
2.The paired functions are next to each other.
3.Logically similar functions are placed in the same area. Here, we use
the callback of 'acomp_alg' as the basis for dividing areas.

Signed-off-by: Yang Shen 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 564 +++---
 1 file changed, 282 insertions(+), 282 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 41f6966..989b273 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -119,6 +119,129 @@ static u16 sgl_sge_nr = HZIP_SGL_SGE_NR;
 module_param_cb(sgl_sge_nr, &sgl_sge_nr_ops, &sgl_sge_nr, 0444);
 MODULE_PARM_DESC(sgl_sge_nr, "Number of sge in sgl(1-255)");

+static u16 get_extra_field_size(const u8 *start)
+{
+   return *((u16 *)start) + GZIP_HEAD_FEXTRA_XLEN;
+}
+
+static u32 get_name_field_size(const u8 *start)
+{
+   return strlen(start) + 1;
+}
+
+static u32 get_comment_field_size(const u8 *start)
+{
+   return strlen(start) + 1;
+}
+
+static u32 __get_gzip_head_size(const u8 *src)
+{
+   u8 head_flg = *(src + GZIP_HEAD_FLG_SHIFT);
+   u32 size = GZIP_HEAD_FEXTRA_SHIFT;
+
+   if (head_flg & GZIP_HEAD_FEXTRA_BIT)
+   size += get_extra_field_size(src + size);
+   if (head_flg & GZIP_HEAD_FNAME_BIT)
+   size += get_name_field_size(src + size);
+   if (head_flg & GZIP_HEAD_FCOMMENT_BIT)
+   size += get_comment_field_size(src + size);
+   if (head_flg & GZIP_HEAD_FHCRC_BIT)
+   size += GZIP_HEAD_FHCRC_SIZE;
+
+   return size;
+}
+
+static size_t __maybe_unused get_gzip_head_size(struct scatterlist *sgl)
+{
+   char buf[HZIP_GZIP_HEAD_BUF];
+
+   sg_copy_to_buffer(sgl, sg_nents(sgl), buf, sizeof(buf));
+
+   return __get_gzip_head_size(buf);
+}
+
+static int add_comp_head(struct scatterlist *dst, u8 req_type)
+{
+   int head_size = TO_HEAD_SIZE(req_type);
+   const u8 *head = TO_HEAD(req_type);
+   int ret;
+
+   ret = sg_copy_from_buffer(dst, sg_nents(dst), head, head_size);
+   if (ret != head_size) {
+   pr_err("the head size of buffer is wrong (%d)!\n", ret);
+   return -ENOMEM;
+   }
+
+   return head_size;
+}
+
+static int get_comp_head_size(struct acomp_req *acomp_req, u8 req_type)
+{
+   if (!acomp_req->src || !acomp_req->slen)
+   return -EINVAL;
+
+   if (req_type == HZIP_ALG_TYPE_GZIP &&
+   acomp_req->slen < GZIP_HEAD_FEXTRA_SHIFT)
+   return -EINVAL;
+
+   switch (req_type) {
+   case HZIP_ALG_TYPE_ZLIB:
+   return TO_HEAD_SIZE(HZIP_ALG_TYPE_ZLIB);
+   case HZIP_ALG_TYPE_GZIP:
+   return TO_HEAD_SIZE(HZIP_ALG_TYPE_GZIP);
+   default:
+   pr_err("request type does not support!\n");
+   return -EINVAL;
+   }
+}
+
+static struct hisi_zip_req *hisi_zip_create_req(struct acomp_req *req,
+   struct hisi_zip_qp_ctx *qp_ctx,
+   size_t head_size, bool is_comp)
+{
+   struct hisi_zip_req_q *req_q = &qp_ctx->req_q;
+   struct hisi_zip_req *q = req_q->q;
+   struct hisi_zip_req *req_cache;
+   int req_id;
+
+   write_lock(&req_q->req_lock);
+
+   req_id = find_first_zero_bit(req_q->req_bitmap, req_q->size);
+   if (req_id >= req_q->size) {
+   write_unlock(&req_q->req_lock);
+   dev_dbg(&qp_ctx->qp->qm->pdev->dev, "req cache is full!\n");
+   return ERR_PTR(-EAGAIN);
+   }
+   set_bit(req_id, req_q->req_bitmap);
+
+   req_cache = q + req_id;
+   req_cache->req_id = req_id;
+   req_cache->req = req;
+
+   if (is_comp) {
+   req_cache->sskip = 0;
+   req_cache->dskip = head_size;
+   } else {
+   req_cache->sskip = head_size;
+   req_cache->dskip = 0;
+   }
+
+   write_unlock(&req_q->req_lock);
+
+   return req_cache;
+}
+
+static void hisi_zip_remove_req(struct hisi_zip_qp_ctx *qp_ctx,
+   struct hisi_zip_req *req)
+{
+   struct hisi_zip_req_q *req_q = &qp_ctx->req_q;
+
+   write_lock(&req_q->req_lock);
+   clear_bit(req->req_id, req_q->req_bitmap);
+   memset(req, 0, sizeof(struct hisi_zip_req));
+   write_unlock(&req_q->req_lock);
+}
+
 static void hisi_zip_config_buf_type(struct hisi_zip_sqe *sqe, u8 buf_type)
 {
u32 val;
@@ -150,6 +273,159 @@ static void hisi_zip_fill_sqe(struct hisi_zip_sqe *sqe, 
u8 req_type,
sqe->dest_addr_h = upper_32_bits(d_addr);
 }

+static int hisi_zip_do_work(struct hisi_zip_req *req,
+   struct his

[PATCH v2 1/2] ext4: Handle casefolding with encryption

[Daniel Rosenberg]

This adds support for encryption with casefolding.

Since the name on disk is case preserving, and also encrypted, we can no
longer just recompute the hash on the fly. Additionally, to avoid
leaking extra information from the hash of the unencrypted name, we use
siphash via an fscrypt v2 policy.

The hash is stored at the end of the directory entry for all entries
inside of an encrypted and casefolded directory apart from those that
deal with '.' and '..'. This way, the change is backwards compatible
with existing ext4 filesystems.

Signed-off-by: Daniel Rosenberg 
---
 Documentation/filesystems/ext4/directory.rst |  27 +++
 fs/ext4/dir.c|  37 +++-
 fs/ext4/ext4.h   |  56 +-
 fs/ext4/hash.c   |  25 ++-
 fs/ext4/inline.c |  25 ++-
 fs/ext4/namei.c  | 198 ++-
 fs/ext4/super.c  |   6 -
 7 files changed, 285 insertions(+), 89 deletions(-)

diff --git a/Documentation/filesystems/ext4/directory.rst 
b/Documentation/filesystems/ext4/directory.rst
index 073940cc64ed..55f618b37144 100644
--- a/Documentation/filesystems/ext4/directory.rst
+++ b/Documentation/filesystems/ext4/directory.rst
@@ -121,6 +121,31 @@ The directory file type is one of the following values:
* - 0x7
  - Symbolic link.
 
+To support directories that are both encrypted and casefolded directories, we
+must also include hash information in the directory entry. We append
+``ext4_extended_dir_entry_2`` to ``ext4_dir_entry_2`` except for the entries
+for dot and dotdot, which are kept the same. The structure follows immediately
+after ``name`` and is included in the size listed by ``rec_len`` If a directory
+entry uses this extension, it may be up to 271 bytes.
+
+.. list-table::
+   :widths: 8 8 24 40
+   :header-rows: 1
+
+   * - Offset
+ - Size
+ - Name
+ - Description
+   * - 0x0
+ - \_\_le32
+ - hash
+ - The hash of the directory name
+   * - 0x4
+ - \_\_le32
+ - minor\_hash
+ - The minor hash of the directory name
+
+
 In order to add checksums to these classic directory blocks, a phony
 ``struct ext4_dir_entry`` is placed at the end of each leaf block to
 hold the checksum. The directory entry is 12 bytes long. The inode
@@ -322,6 +347,8 @@ The directory hash is one of the following values:
  - Half MD4, unsigned.
* - 0x5
  - Tea, unsigned.
+   * - 0x6
+ - Siphash.
 
 Interior nodes of an htree are recorded as ``struct dx_node``, which is
 also the full length of a data block:
diff --git a/fs/ext4/dir.c b/fs/ext4/dir.c
index 5ed870614c8d..21a98288de49 100644
--- a/fs/ext4/dir.c
+++ b/fs/ext4/dir.c
@@ -55,6 +55,18 @@ static int is_dx_dir(struct inode *inode)
return 0;
 }
 
+static bool is_fake_dir_entry(struct ext4_dir_entry_2 *de)
+{
+   /* Check if . or .. , or skip if namelen is 0 */
+   if ((de->name_len > 0) && (de->name_len <= 2) && (de->name[0] == '.') &&
+   (de->name[1] == '.' || de->name[1] == '\0'))
+   return true;
+   /* Check if this is a csum entry */
+   if (de->file_type == EXT4_FT_DIR_CSUM)
+   return true;
+   return false;
+}
+
 /*
  * Return 0 if the directory entry is OK, and 1 if there is a problem
  *
@@ -73,16 +85,20 @@ int __ext4_check_dir_entry(const char *function, unsigned 
int line,
const int rlen = ext4_rec_len_from_disk(de->rec_len,
dir->i_sb->s_blocksize);
const int next_offset = ((char *) de - buf) + rlen;
+   bool fake = is_fake_dir_entry(de);
+   bool has_csum = ext4_has_metadata_csum(dir->i_sb);
 
-   if (unlikely(rlen < EXT4_DIR_REC_LEN(1)))
+   if (unlikely(rlen < ext4_dir_rec_len(1, fake ? NULL : dir)))
error_msg = "rec_len is smaller than minimal";
else if (unlikely(rlen % 4 != 0))
error_msg = "rec_len % 4 != 0";
-   else if (unlikely(rlen < EXT4_DIR_REC_LEN(de->name_len)))
+   else if (unlikely(rlen < ext4_dir_rec_len(de->name_len,
+   fake ? NULL : dir)))
error_msg = "rec_len is too small for name_len";
else if (unlikely(next_offset > size))
error_msg = "directory entry overrun";
-   else if (unlikely(next_offset > size - EXT4_DIR_REC_LEN(1) &&
+   else if (unlikely(next_offset > size - ext4_dir_rec_len(1,
+ has_csum ? NULL : dir) &&
  next_offset != size))
error_msg = "directory entry too close to block end";
else if (unlikely(le32_to_cpu(de->inode) >
@@ -94,15 +110,15 @@ int __ext4_check_dir_entry(const char *function, unsigned 
int line,
if (filp)
ext4_error_file(filp, function, line, bh->b_blocknr,
"bad entry in directo

[PATCH v2 0/2] Reconcile Encryption and Casefolding in Ext4

[Daniel Rosenberg]

These patches add support for ext4 encryption and casefolding at the same time.
Since the hash for encrypted casefolded directory names cannot be computed
without the key, we need to store the hash on disk. We only do so for encrypted
and casefolded directories to avoid on disk format changes.

e2fsprogs has already been updated with support for casefolding and encryption.

v2 changes:
When checking for 'fake' entries (which do not include the extra hash 
bytes)
-Check for . and .. using names instead of position
-Check for csum entries via file_type instead of position
-Assume last entry in directory will be csum for __ext4_check_entry if 
csum enabled

This means we don't need to pass along lblk all over the place

-Don't use siphash value for find_group_orlov, just use regular hash

Daniel Rosenberg (2):
  ext4: Handle casefolding with encryption
  ext4: Optimize match for casefolded encrypted dirs

 Documentation/filesystems/ext4/directory.rst |  27 +++
 fs/ext4/dir.c|  37 +++-
 fs/ext4/ext4.h   |  73 +--
 fs/ext4/hash.c   |  25 ++-
 fs/ext4/inline.c |  25 ++-
 fs/ext4/namei.c  | 213 ++-
 fs/ext4/super.c  |   6 -
 7 files changed, 303 insertions(+), 103 deletions(-)


base-commit: f296bfd5cd04cbb49b8fc9585adc280ab2b58624
-- 
2.31.0.rc2.261.g7f71774620-goog

[PATCH v2 2/2] ext4: Optimize match for casefolded encrypted dirs

[Daniel Rosenberg]

Matching names with casefolded encrypting directories requires
decrypting entries to confirm case since we are case preserving. We can
avoid needing to decrypt if our hash values don't match.

Signed-off-by: Daniel Rosenberg 
---
 fs/ext4/ext4.h  | 17 ---
 fs/ext4/namei.c | 55 ++---
 2 files changed, 38 insertions(+), 34 deletions(-)

diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index dafa528c4d9f..181d07791efb 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -2637,9 +2637,9 @@ extern unsigned ext4_free_clusters_after_init(struct 
super_block *sb,
 ext4_fsblk_t ext4_inode_to_goal_block(struct inode *);
 
 #ifdef CONFIG_UNICODE
-extern void ext4_fname_setup_ci_filename(struct inode *dir,
+extern int ext4_fname_setup_ci_filename(struct inode *dir,
 const struct qstr *iname,
-struct fscrypt_str *fname);
+struct ext4_filename *fname);
 #endif
 
 #ifdef CONFIG_FS_ENCRYPTION
@@ -2670,9 +2670,9 @@ static inline int ext4_fname_setup_filename(struct inode 
*dir,
ext4_fname_from_fscrypt_name(fname, &name);
 
 #ifdef CONFIG_UNICODE
-   ext4_fname_setup_ci_filename(dir, iname, &fname->cf_name);
+   err = ext4_fname_setup_ci_filename(dir, iname, fname);
 #endif
-   return 0;
+   return err;
 }
 
 static inline int ext4_fname_prepare_lookup(struct inode *dir,
@@ -2689,9 +2689,9 @@ static inline int ext4_fname_prepare_lookup(struct inode 
*dir,
ext4_fname_from_fscrypt_name(fname, &name);
 
 #ifdef CONFIG_UNICODE
-   ext4_fname_setup_ci_filename(dir, &dentry->d_name, &fname->cf_name);
+   err = ext4_fname_setup_ci_filename(dir, &dentry->d_name, fname);
 #endif
-   return 0;
+   return err;
 }
 
 static inline void ext4_fname_free_filename(struct ext4_filename *fname)
@@ -2716,15 +2716,16 @@ static inline int ext4_fname_setup_filename(struct 
inode *dir,
int lookup,
struct ext4_filename *fname)
 {
+   int err = 0;
fname->usr_fname = iname;
fname->disk_name.name = (unsigned char *) iname->name;
fname->disk_name.len = iname->len;
 
 #ifdef CONFIG_UNICODE
-   ext4_fname_setup_ci_filename(dir, iname, &fname->cf_name);
+   err = ext4_fname_setup_ci_filename(dir, iname, fname);
 #endif
 
-   return 0;
+   return err;
 }
 
 static inline int ext4_fname_prepare_lookup(struct inode *dir,
diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c
index 97d2755b9775..1fb7128220ce 100644
--- a/fs/ext4/namei.c
+++ b/fs/ext4/namei.c
@@ -816,7 +816,9 @@ dx_probe(struct ext4_filename *fname, struct inode *dir,
if (hinfo->hash_version <= DX_HASH_TEA)
hinfo->hash_version += EXT4_SB(dir->i_sb)->s_hash_unsigned;
hinfo->seed = EXT4_SB(dir->i_sb)->s_hash_seed;
-   if (fname && fname_name(fname))
+   /* hash is already computed for encrypted casefolded directory */
+   if (fname && fname_name(fname) &&
+   !(IS_ENCRYPTED(dir) && IS_CASEFOLDED(dir)))
ext4fs_dirhash(dir, fname_name(fname), fname_len(fname), hinfo);
hash = hinfo->hash;
 
@@ -1367,19 +1369,21 @@ static int ext4_ci_compare(const struct inode *parent, 
const struct qstr *name,
return ret;
 }
 
-void ext4_fname_setup_ci_filename(struct inode *dir, const struct qstr *iname,
- struct fscrypt_str *cf_name)
+int ext4_fname_setup_ci_filename(struct inode *dir, const struct qstr *iname,
+ struct ext4_filename *name)
 {
+   struct fscrypt_str *cf_name = &name->cf_name;
+   struct dx_hash_info *hinfo = &name->hinfo;
int len;
 
if (!IS_CASEFOLDED(dir) || !dir->i_sb->s_encoding) {
cf_name->name = NULL;
-   return;
+   return 0;
}
 
cf_name->name = kmalloc(EXT4_NAME_LEN, GFP_NOFS);
if (!cf_name->name)
-   return;
+   return -ENOMEM;
 
len = utf8_casefold(dir->i_sb->s_encoding,
iname, cf_name->name,
@@ -1387,10 +1391,18 @@ void ext4_fname_setup_ci_filename(struct inode *dir, 
const struct qstr *iname,
if (len <= 0) {
kfree(cf_name->name);
cf_name->name = NULL;
-   return;
}
cf_name->len = (unsigned) len;
+   if (!IS_ENCRYPTED(dir))
+   return 0;
 
+   hinfo->hash_version = DX_HASH_SIPHASH;
+   hinfo->seed = NULL;
+   if (cf_name->name)
+   ext4fs_dirhash(dir, cf_name->name, cf_name->len, hinfo);
+   else
+   ext4fs_dirhash(dir, iname->name, iname->len, hinfo);
+   return 0;
 }
 #endif
 
@@ -1420,16 +1432,12 @@ static bool ext4_match(struct inode *parent,
struct qstr cf = {.name = fname->cf_name.nam

sparc: clang: error: unknown argument: '-mno-fpu'

[Naresh Kamboju]

Linux mainline master build breaks for sparc defconfig.
There are multiple errors / warnings with clang-12 and clang-11 and 10.
 - sparc (defconfig) with clang-12, clang-11 and clang-10
 - sparc (tinyconfig) with clang-12, clang-11 and clang-10
 - sparc (allnoconfig) with clang-12, clang-11 and clang-10

make --silent --keep-going --jobs=8
O=/home/tuxbuild/.cache/tuxmake/builds/1/tmp ARCH=sparc
CROSS_COMPILE=sparc64-linux-gnu- 'HOSTCC=sccache clang' 'CC=sccache
clang'
clang: error: unknown argument: '-mno-fpu'
clang: error: unknown argument: '-fcall-used-g5'
clang: error: unknown argument: '-fcall-used-g7'
make[2]: *** [/builds/linux/scripts/Makefile.build:116:
scripts/mod/devicetable-offsets.s] Error 1
clang: error: unknown argument: '-mno-fpu'
clang: error: unknown argument: '-fcall-used-g5'
clang: error: unknown argument: '-fcall-used-g7'
make[2]: *** [/builds/linux/scripts/Makefile.build:271:
scripts/mod/empty.o] Error 1

Reported-by: Naresh Kamboju 

build link,
https://gitlab.com/Linaro/lkft/mirrors/torvalds/linux-mainline/-/jobs/1110841374#L81

steps to reproduce:
--
# TuxMake is a command line tool and Python library that provides
# portable and repeatable Linux kernel builds across a variety of
# architectures, toolchains, kernel configurations, and make targets.
#
# TuxMake supports the concept of runtimes.
# See https://docs.tuxmake.org/runtimes/, for that to work it requires
# that you install podman or docker on your system.
#
# To install tuxmake on your system globally:
# sudo pip3 install -U tuxmake
#
# See https://docs.tuxmake.org/ for complete documentation.

tuxmake --runtime podman --target-arch sparc --toolchain clang-12
--kconfig defconfig


--
Linaro LKFT
https://lkft.linaro.org

Re: [RFC][PATCH] sched: Optimize cpufreq_update_util

[Viresh Kumar]

On 18-03-21, 22:28, Peter Zijlstra wrote:
> Also, is there a lock order comment in cpufreq somewhere?

I don't think so.

> I tried
> following it, but eventually gave up and figured 'asking' lockdep was
> far simpler.

This will get called from CPU's online/offline path at worst, nothing more.
 
> +static void cpufreq_update_optimize(void)
> +{
> + struct update_util_data *data;
> + cpu_util_update_f func = NULL, dfunc;
> + int cpu;
> +
> + for_each_online_cpu(cpu) {
> + data = per_cpu(cpufreq_update_util_data, cpu);
> + dfunc = data ? READ_ONCE(data->func) : NULL;
> +
> + if (dfunc) {
> + if (!func)
> + func = dfunc;
> + else if (func != dfunc)
> + return;
> + } else if (func)
> + return;
> + }

So there is nothing cpufreq specific IIRC that can help make this better, this
is basically per policy.

For example, on an ARM platform we have two cpufreq policies with one policy
covering 4 CPUs, while the other one covering only 1 (maybe because we didn't
add those CPUs in DT or something else), then also we will end up separate
routines.

Or if we take all CPUs of a policy offline and then bring them up one by one, I
think for the first CPU online event in that policy we will end up using the
sugov_update_single_freq() variant for some time, until the time more CPUs come
up.

So traversing the way you did this is probably something that will work properly
in all corner cases.

-- 
viresh

[PATCH net] r8152: limit the RX buffer size of RTL8153A for USB 2.0

[Hayes Wang]

If the USB host controller is EHCI, the throughput is reduced from
300Mb/s to 60Mb/s, when the rx buffer size is modified from 16K to
32K.

According to the EHCI spec, the maximum size of the qTD is 20K.
Therefore, when the driver uses more than 20K buffer, the latency
time of EHCI would be increased. And, it let the RTL8153A get worse
throughput.

However, the driver uses alloc_pages() for rx buffer, so I limit
the rx buffer to 16K rather than 20K.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=205923
Fixes: ec5791c202ac ("r8152: separate the rx buffer size")
Reported-by: Robert Davies 
Signed-off-by: Hayes Wang 
---
 drivers/net/usb/r8152.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 90f1c0200042..20fb5638ac65 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -6553,7 +6553,10 @@ static int rtl_ops_init(struct r8152 *tp)
ops->in_nway= rtl8153_in_nway;
ops->hw_phy_cfg = r8153_hw_phy_cfg;
ops->autosuspend_en = rtl8153_runtime_enable;
-   tp->rx_buf_sz   = 32 * 1024;
+   if (tp->udev->speed < USB_SPEED_SUPER)
+   tp->rx_buf_sz   = 16 * 1024;
+   else
+   tp->rx_buf_sz   = 32 * 1024;
tp->eee_en  = true;
tp->eee_adv = MDIO_EEE_1000T | MDIO_EEE_100TX;
break;
-- 
2.26.2

RE: [EXT] Re: [PATCH 06/11] i2c: imx-lpi2c: improve i2c driver probe priority

[Clark Wang]

> -Original Message-
> From: Wolfram Sang 
> Sent: Friday, March 19, 2021 13:39
> To: Clark Wang 
> Cc: Aisheng Dong ; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> dl-linux-imx ; sumit.sem...@linaro.org;
> christian.koe...@amd.com; linux-...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH 06/11] i2c: imx-lpi2c: improve i2c driver probe
> priority
> 
> On Wed, Mar 17, 2021 at 02:53:54PM +0800, Clark Wang wrote:
> > From: Gao Pan 
> >
> > use subsys_initcall for i2c driver to improve i2c driver probe
> > priority
> >
> > Signed-off-by: Gao Pan 
> 
> I usually don't take subsys_initcall patches anymore. In most cases, the
client
> drivers can be fixed instead. If this is not the case for you, you need to
state
> that explicitly in the commit message.

Okay. Because it is an old patch, I will check if it is necessary. If no,
I will continue to use module_platform_driver(lpi2c_imx_driver);
Thanks.

Best Regards,
Clark Wang


smime.p7s
Description: S/MIME cryptographic signature

Re: [PATCH net V2 1/1] net: phy: fix invalid phy id when probe using C22

[Heiner Kallweit]

On 18.03.2021 10:09, Wong Vee Khee wrote:
> When using Clause-22 to probe for PHY devices such as the Marvell
> 88E2110, PHY ID with value 0 is read from the MII PHYID registers
> which caused the PHY framework failed to attach the Marvell PHY
> driver.
> 
> Fixed this by adding a check of PHY ID equals to all zeroes.
> 
> Fixes: ee951005e95e ("net: phy: clean up get_phy_c22_id() invalid ID 
> handling")
> Cc: sta...@vger.kernel.org
> Reviewed-by: Voon Weifeng 
> Signed-off-by: Wong Vee Khee 
> ---
> v2 changelog:
>  - added fixes tag
>  - marked for net instead of net-next
> ---
>  drivers/net/phy/phy_device.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
> index cc38e326405a..c12c30254c11 100644
> --- a/drivers/net/phy/phy_device.c
> +++ b/drivers/net/phy/phy_device.c
> @@ -809,8 +809,8 @@ static int get_phy_c22_id(struct mii_bus *bus, int addr, 
> u32 *phy_id)
>  
>   *phy_id |= phy_reg;
>  
> - /* If the phy_id is mostly Fs, there is no device there */
> - if ((*phy_id & 0x1fff) == 0x1fff)
> + /* If the phy_id is mostly Fs or all zeroes, there is no device there */
> + if (((*phy_id & 0x1fff) == 0x1fff) || (*phy_id == 0))
>   return -ENODEV;
>  
>   return 0;
> 

+ the authors of 0cc8fecf041d ("net: phy: Allow mdio buses to auto-probe c45 
devices")

In case of MDIOBUS_C22_C45 we probe c22 first, and then c45.
This causes problems with c45 PHY's that have rudimentary c22 support
and return 0 when reading the c22 PHY ID registers.

Is there a specific reason why c22 is probed first? Reversing the order
would solve the issue we speak about here.
c45-probing of c22-only PHY's shouldn't return false positives
(at least at a first glance).

Re: [PATCH v7 07/17] media: uvcvideo: Add support for V4L2_CTRL_TYPE_CTRL_CLASS

[Hans Verkuil]

On 18/03/2021 21:29, Ricardo Ribalda wrote:
> Create all the class controls for the device defined controls.
> 
> Fixes v4l2-compliance:
> Control ioctls (Input 0):
>   fail: v4l2-test-controls.cpp(216): missing control class for 
> class 0098
>   fail: v4l2-test-controls.cpp(216): missing control tclass for 
> class 009a
>   test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: FAIL
> 
> Signed-off-by: Ricardo Ribalda 

Reviewed-by: Hans Verkuil 

Regards,

Hans

> ---
>  drivers/media/usb/uvc/uvc_ctrl.c | 94 
>  drivers/media/usb/uvc/uvcvideo.h |  5 ++
>  2 files changed, 99 insertions(+)
> 
> diff --git a/drivers/media/usb/uvc/uvc_ctrl.c 
> b/drivers/media/usb/uvc/uvc_ctrl.c
> index b75da65115ef..ba14733db757 100644
> --- a/drivers/media/usb/uvc/uvc_ctrl.c
> +++ b/drivers/media/usb/uvc/uvc_ctrl.c
> @@ -357,6 +357,15 @@ static const struct uvc_control_info uvc_ctrls[] = {
>   },
>  };
>  
> +static const struct uvc_control_class uvc_control_class[] = {
> + {
> + .id = V4L2_CID_CAMERA_CLASS,
> + },
> + {
> + .id = V4L2_CID_USER_CLASS,
> + },
> +};
> +
>  static const struct uvc_menu_info power_line_frequency_controls[] = {
>   { 0, "Disabled" },
>   { 1, "50 Hz" },
> @@ -1024,6 +1033,49 @@ static int __uvc_ctrl_get(struct uvc_video_chain 
> *chain,
>   return 0;
>  }
>  
> +static int __uvc_query_v4l2_class(struct uvc_video_chain *chain, u32 req_id,
> +   u32 found_id)
> +{
> + bool find_next = req_id & V4L2_CTRL_FLAG_NEXT_CTRL;
> + unsigned int i;
> +
> + req_id &= V4L2_CTRL_ID_MASK;
> +
> + for (i = 0; i < ARRAY_SIZE(uvc_control_class); i++) {
> + if (!(chain->ctrl_class_bitmap & BIT(i)))
> + continue;
> + if (!find_next) {
> + if (uvc_control_class[i].id == req_id)
> + return i;
> + continue;
> + }
> + if (uvc_control_class[i].id > req_id &&
> + uvc_control_class[i].id < found_id)
> + return i;
> + }
> +
> + return -ENODEV;
> +}
> +
> +static int uvc_query_v4l2_class(struct uvc_video_chain *chain, u32 req_id,
> + u32 found_id, struct v4l2_queryctrl *v4l2_ctrl)
> +{
> + int idx;
> +
> + idx = __uvc_query_v4l2_class(chain, req_id, found_id);
> + if (idx < 0)
> + return -ENODEV;
> +
> + memset(v4l2_ctrl, 0, sizeof(*v4l2_ctrl));
> + v4l2_ctrl->id = uvc_control_class[idx].id;
> + strscpy(v4l2_ctrl->name, v4l2_ctrl_get_name(v4l2_ctrl->id),
> + sizeof(v4l2_ctrl->name));
> + v4l2_ctrl->type = V4L2_CTRL_TYPE_CTRL_CLASS;
> + v4l2_ctrl->flags = V4L2_CTRL_FLAG_WRITE_ONLY
> +| V4L2_CTRL_FLAG_READ_ONLY;
> + return 0;
> +}
> +
>  static int __uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
>   struct uvc_control *ctrl,
>   struct uvc_control_mapping *mapping,
> @@ -1127,12 +1179,31 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,
>   if (ret < 0)
>   return -ERESTARTSYS;
>  
> + /* Check if the ctrl is a know class */
> + if (!(v4l2_ctrl->id & V4L2_CTRL_FLAG_NEXT_CTRL)) {
> + ret = uvc_query_v4l2_class(chain, v4l2_ctrl->id, 0, v4l2_ctrl);
> + if (!ret)
> + goto done;
> + }
> +
>   ctrl = uvc_find_control(chain, v4l2_ctrl->id, &mapping);
>   if (ctrl == NULL) {
>   ret = -EINVAL;
>   goto done;
>   }
>  
> + /*
> +  * If we're enumerating control with V4L2_CTRL_FLAG_NEXT_CTRL, check if
> +  * a class should be inserted between the previous control and the one
> +  * we have just found.
> +  */
> + if (v4l2_ctrl->id & V4L2_CTRL_FLAG_NEXT_CTRL) {
> + ret = uvc_query_v4l2_class(chain, v4l2_ctrl->id, mapping->id,
> +v4l2_ctrl);
> + if (!ret)
> + goto done;
> + }
> +
>   ret = __uvc_query_v4l2_ctrl(chain, ctrl, mapping, v4l2_ctrl);
>  done:
>   mutex_unlock(&chain->ctrl_mutex);
> @@ -1426,6 +1497,11 @@ static int uvc_ctrl_add_event(struct 
> v4l2_subscribed_event *sev, unsigned elems)
>   if (ret < 0)
>   return -ERESTARTSYS;
>  
> + if (__uvc_query_v4l2_class(handle->chain, sev->id, 0) >= 0) {
> + ret = 0;
> + goto done;
> + }
> +
>   ctrl = uvc_find_control(handle->chain, sev->id, &mapping);
>   if (ctrl == NULL) {
>   ret = -EINVAL;
> @@ -1459,7 +1535,10 @@ static void uvc_ctrl_del_event(struct 
> v4l2_subscribed_event *sev)
>   struct uvc_fh *handle = container_of(sev->fh, struct uvc_fh, vfh);
>  
>   mutex_lock(&handle->chain->ctrl_mutex);
> + if (__uvc_query_v4l2_class(handle->chain, sev->id, 0) >= 0)
> + goto done;

Re: [PATCH] io_uring: Try to merge io requests only for regular files

[Dmitry Monakhov]

- stable@



19.03.2021, 08:29, "Dmitry Monakhov" :
> Otherwise we may endup blocking on pipe or socket.
>
> Fixes: 6d5d5ac ("io_uring: extend async work merge")
> Testcase: 
> https://github.com/dmonakhov/liburing/commit/16d171b6ef9d68e6db66650a83d98c5c721d01f6
> Signed-off-by: Dmitry Monakhov 
> ---
>  fs/io_uring.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/fs/io_uring.c b/fs/io_uring.c
> index 478df7e..848657c 100644
> --- a/fs/io_uring.c
> +++ b/fs/io_uring.c
> @@ -2183,6 +2183,9 @@ static int __io_submit_sqe(struct io_ring_ctx *ctx, 
> struct io_kiocb *req,
>  static struct async_list *io_async_list_from_req(struct io_ring_ctx *ctx,
>   struct io_kiocb *req)
>  {
> + if (!(req->flags & REQ_F_ISREG))
> + return NULL;
> +
IMHO it is reasonable to completely disable  io_should_merge logic because
even with the this fix it still affected by latency spikes like follows:

->submit_read: req1[slow_hdd, sector=z]
->submit_read: req2[nvme, sector=X]
-> wait(req2)  -> fast

->submit_read: req3[nvme, sector=Y] 
--> wait(req3)  ->slow  
  if completes if X and Y belongs to same page merge logic will wait for req1 
to complete



From c24cda9aa902775e4e23575b758f009e9fae4640 Mon Sep 17 00:00:00 2001
From: Dmitry Monakhov 
Date: Fri, 19 Mar 2021 08:48:18 +0300
Subject: [PATCH] io_uring: completely disable io_should_merge logic

io_should_merge logic is wierd and prone to latency spikes because of slow neighbors.

Signed-off-by: Dmitry Monakhov 

diff --git a/fs/io_uring.c b/fs/io_uring.c
index 478df7e..a4fb3a7 100644
--- a/fs/io_uring.c
+++ b/fs/io_uring.c
@@ -1288,7 +1288,7 @@ static ssize_t io_import_iovec(struct io_ring_ctx *ctx, int rw,
 
 static inline bool io_should_merge(struct async_list *al, struct kiocb *kiocb)
 {
-	if (al->file == kiocb->ki_filp) {
+	if (al->file == kiocb->ki_filp && 0) {
 		off_t start, end;
 
 		/*
-- 
2.7.4

[PATCH] clk: qcom: camcc: Update the clock ops for the SC7180

[Taniya Das]

Update the RCGs to use shared ops to park the RCGs at XO.

Fixes: 15d09e830bbc ("clk: qcom: camcc: Add camera clock controller driver for 
SC7180")
Signed-off-by: Taniya Das 
---
 drivers/clk/qcom/camcc-sc7180.c | 50 -
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/clk/qcom/camcc-sc7180.c b/drivers/clk/qcom/camcc-sc7180.c
index dbac565..9bcf2f8 100644
--- a/drivers/clk/qcom/camcc-sc7180.c
+++ b/drivers/clk/qcom/camcc-sc7180.c
@@ -304,7 +304,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
.name = "cam_cc_bps_clk_src",
.parent_data = cam_cc_parent_data_2,
.num_parents = 5,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -325,7 +325,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
.name = "cam_cc_cci_0_clk_src",
.parent_data = cam_cc_parent_data_5,
.num_parents = 3,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -339,7 +339,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
.name = "cam_cc_cci_1_clk_src",
.parent_data = cam_cc_parent_data_5,
.num_parents = 3,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -360,7 +360,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
.name = "cam_cc_cphy_rx_clk_src",
.parent_data = cam_cc_parent_data_3,
.num_parents = 6,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -379,7 +379,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
.name = "cam_cc_csi0phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -393,7 +393,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
.name = "cam_cc_csi1phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -407,7 +407,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
.name = "cam_cc_csi2phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -421,7 +421,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
.name = "cam_cc_csi3phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -443,7 +443,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
.name = "cam_cc_fast_ahb_clk_src",
.parent_data = cam_cc_parent_data_0,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -466,7 +466,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
.name = "cam_cc_icp_clk_src",
.parent_data = cam_cc_parent_data_2,
.num_parents = 5,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -488,7 +488,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
.name = "cam_cc_ife_0_clk_src",
.parent_data = cam_cc_parent_data_4,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -510,7 +510,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
.name = "cam_cc_ife_0_csid_clk_src",
.parent_data = cam_cc_parent_data_3,
.num_parents = 6,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -524,7 +524,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
.name = "cam_cc_ife_1_clk_src",
.parent_data = cam_cc_parent_data_4,
.num_parents = 4,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -538,7 +538,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
.name = "cam_cc_ife_1_csid_clk_src",
.parent_data = cam_cc_parent_data_3,
.num_parents = 6,
-   .ops = &clk_rcg2_ops,
+   .ops = &clk_rcg2_shared_ops,
},
 };

@@ -553,7 +553,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
.parent_data = cam_cc_parent_data_4,
.num_parents = 4,
.flags = CLK_SET_RATE_P

Re: [PATCH v2] gpio: mpc8xxx: Add ACPI support

[Michael Walle]

Am 2021-03-19 03:53, schrieb Ran Wang:

Current implementation only supports DT, now add ACPI support.

Note that compared to device of 'fsl,qoriq-gpio', LS1028A and
LS1088A's GPIO have no extra programming, so simplify related checking.

Signed-off-by: Ran Wang 
---
Change in v2:
 - Initialize devtype with NULL to fix compile warning.
 - Replace of_device_get_match_data() and acpi_match_device with
device_get_match_data().
 - Replace acpi_match_device() with simpler checking logic per Andy's
suggestion.

 drivers/gpio/gpio-mpc8xxx.c | 34 +++---
 1 file changed, 23 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 6dfca83bcd90..646225fa3e73 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -9,6 +9,7 @@
  * kind, whether express or implied.
  */

+#include 
 #include 
 #include 
 #include 
@@ -292,8 +293,6 @@ static const struct of_device_id mpc8xxx_gpio_ids[] 
= {

{ .compatible = "fsl,mpc5121-gpio", .data = &mpc512x_gpio_devtype, },
{ .compatible = "fsl,mpc5125-gpio", .data = &mpc5125_gpio_devtype, },
{ .compatible = "fsl,pq3-gpio", },
-   { .compatible = "fsl,ls1028a-gpio", },
-   { .compatible = "fsl,ls1088a-gpio", },
{ .compatible = "fsl,qoriq-gpio",   },
{}
 };
@@ -303,8 +302,8 @@ static int mpc8xxx_probe(struct platform_device 
*pdev)

struct device_node *np = pdev->dev.of_node;
struct mpc8xxx_gpio_chip *mpc8xxx_gc;
struct gpio_chip*gc;
-   const struct mpc8xxx_gpio_devtype *devtype =
-   of_device_get_match_data(&pdev->dev);
+   const struct mpc8xxx_gpio_devtype *devtype = NULL;
+   struct fwnode_handle *fwnode;
int ret;

 	mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), 
GFP_KERNEL);
@@ -315,14 +314,14 @@ static int mpc8xxx_probe(struct platform_device 
*pdev)


raw_spin_lock_init(&mpc8xxx_gc->lock);

-   mpc8xxx_gc->regs = of_iomap(np, 0);
+   mpc8xxx_gc->regs = devm_platform_ioremap_resource(pdev, 0);
if (!mpc8xxx_gc->regs)
return -ENOMEM;

gc = &mpc8xxx_gc->gc;
gc->parent = &pdev->dev;

-   if (of_property_read_bool(np, "little-endian")) {
+   if (device_property_read_bool(&pdev->dev, "little-endian")) {
ret = bgpio_init(gc, &pdev->dev, 4,
 mpc8xxx_gc->regs + GPIO_DAT,
 NULL, NULL,
@@ -345,6 +344,7 @@ static int mpc8xxx_probe(struct platform_device 
*pdev)


mpc8xxx_gc->direction_output = gc->direction_output;

+   devtype = device_get_match_data(&pdev->dev);
if (!devtype)
devtype = &mpc8xxx_gpio_devtype_default;

@@ -369,9 +369,9 @@ static int mpc8xxx_probe(struct platform_device 
*pdev)
 	 * associated input enable must be set (GPIOxGPIE[IEn]=1) to 
propagate

 * the port value to the GPIO Data Register.
 */
+   fwnode = dev_fwnode(&pdev->dev);
if (of_device_is_compatible(np, "fsl,qoriq-gpio") ||
-   of_device_is_compatible(np, "fsl,ls1028a-gpio") ||
-   of_device_is_compatible(np, "fsl,ls1088a-gpio"))


Again, please keep this. The DT bindings don't mention "fsl,qoriq-gpio"
is required. Alternatively, change the binding (ideally convert it to
YAML) and get an ack by Rob.

-michael

Re: [PATCH v8] i2c: virtio: add a virtio i2c frontend driver

[Jie Deng]

On 2021/3/19 13:53, Viresh Kumar wrote:

On 16-03-21, 18:35, Jie Deng wrote:

+++ b/drivers/i2c/busses/i2c-virtio.c
+static int virtio_i2c_send_reqs(struct virtqueue *vq,
+   struct virtio_i2c_req *reqs,
+   struct i2c_msg *msgs, int nr)
+{
+   struct scatterlist *sgs[3], out_hdr, msg_buf, in_hdr;
+   int i, outcnt, incnt, err = 0;
+
+   for (i = 0; i < nr; i++) {
+   if (!msgs[i].len)
+   break;
+
+   /*
+* Only 7-bit mode supported for this moment. For the address 
format,
+* Please check the Virtio I2C Specification.
+*/
+   reqs[i].out_hdr.addr = cpu_to_le16(msgs[i].addr << 1);
+
+   if (i != nr - 1)
+   reqs[i].out_hdr.flags = 
cpu_to_le32(VIRTIO_I2C_FLAGS_FAIL_NEXT);
+
+   outcnt = incnt = 0;
+   sg_init_one(&out_hdr, &reqs[i].out_hdr, 
sizeof(reqs[i].out_hdr));
+   sgs[outcnt++] = &out_hdr;
+
+   reqs[i].buf = i2c_get_dma_safe_msg_buf(&msgs[i], 1);

You allocate a buffer here, lets see if they are freeing properly or not (I
remember that I gave same feedback earlier as well, but anyway).



"MAY" allocate a buffer here.





+   if (!reqs[i].buf)
+   break;
+
+   sg_init_one(&msg_buf, reqs[i].buf, msgs[i].len);
+
+   if (msgs[i].flags & I2C_M_RD)
+   sgs[outcnt + incnt++] = &msg_buf;
+   else
+   sgs[outcnt++] = &msg_buf;
+
+   sg_init_one(&in_hdr, &reqs[i].in_hdr, sizeof(reqs[i].in_hdr));
+   sgs[outcnt + incnt++] = &in_hdr;
+
+   err = virtqueue_add_sgs(vq, sgs, outcnt, incnt, &reqs[i], 
GFP_KERNEL);
+   if (err < 0) {
+   pr_err("failed to add msg[%d] to virtqueue.\n", i);
+   i2c_put_dma_safe_msg_buf(reqs[i].buf, &msgs[i], false);

On failure here, you freed the buffers for request "i" but not others..



Others still need to be sent and then be freed.





+   break;
+   }
+   }
+
+   return i;
+}
+
+static int virtio_i2c_complete_reqs(struct virtqueue *vq,
+   struct virtio_i2c_req *reqs,
+   struct i2c_msg *msgs, int nr)
+{
+   struct virtio_i2c_req *req;
+   unsigned int len;
+   int i, j;
+
+   for (i = 0; i < nr; i++) {
+   req = virtqueue_get_buf(vq, &len);
+   if (!(req && req == &reqs[i])) {
+   pr_err("msg[%d]: addr=0x%x is out of order.\n", i, 
msgs[i].addr);
+   break;

Since you break here, what will happen to the buffer ? I thought
virtqueue_get_buf() will return a req only once and then you can't access it ?



Will refine it along with the latter loop.





+   }
+
+   if (req->in_hdr.status != VIRTIO_I2C_MSG_OK) {
+   pr_err("msg[%d]: addr=0x%x backend error.\n", i, 
msgs[i].addr);
+   break;
+   }
+
+   i2c_put_dma_safe_msg_buf(req->buf, &msgs[i], true);
+   }
+
+   /*
+* Detach all the used buffers from the vq and
+* Release unused DMA safe buffer if any.
+*/
+   for (j = i; j < nr; j++) {
+   req = virtqueue_get_buf(vq, &len);
+   if (req)
+   i2c_put_dma_safe_msg_buf(req->buf, &msgs[j], false);

This will come in play only if something failed in the earlier loop ? Or my
understanding incorrect ? Also this should be merged with the above for loop
itself, it is just doing part of it.



Will refine it along with the earlier loop.





+   }
+
+   return i;
+}
+
+static int virtio_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int 
num)
+{
+   struct virtio_i2c *vi = i2c_get_adapdata(adap);
+   struct virtqueue *vq = vi->vq;
+   struct virtio_i2c_req *reqs;
+   unsigned long time_left;
+   int ret, nr;
+
+   reqs = kcalloc(num, sizeof(*reqs), GFP_KERNEL);
+   if (!reqs)
+   return -ENOMEM;
+
+   mutex_lock(&vi->lock);
+
+   ret = virtio_i2c_send_reqs(vq, reqs, msgs, num);
+   if (ret == 0)
+   goto err_unlock_free;
+
+   nr = ret;
+   reinit_completion(&vi->completion);
+   virtqueue_kick(vq);
+
+   time_left = wait_for_completion_timeout(&vi->completion, adap->timeout);
+   if (!time_left) {

On error here, we will surely not free the buffers, isn't it ?



Right. Will fix it. Thank you.



+   dev_err(&adap->dev, "virtio i2c backend timeout.\n");
+   ret = -ETIMEDOUT;
+   goto err_unlock_free;
+   }
+
+   ret = virtio_i2c_complete_reqs(vq, reqs, msgs, nr);
+
+err_unlock_free:
+   mutex_unlock(&vi->lock);
+   kfree(reqs);
+   

Re: [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero

[Hawa, Hanna]

On 3/18/2021 2:15 PM, Andy Shevchenko wrote:



On Wed, Mar 17, 2021 at 11:42 PM Hanna Hawa  wrote:

An SError was detected when trying to print the supported pins in a

What is SError? Yes, I have read a discussion, but here is the hint:
if a person sees this as a first text due to, for example, bisecting
an issue, what she/he can get from this cryptic name?


What you suggest?
s/An SError/A kernel-panic/?
Or remove the sentence and keep the below:
"
This change fixes the pcs_pin_dbg_show() in pinctrl-single driver when 
bits_per_mux is not zero. In addition move offset calculation and pin 
offset in register to common function.

"




pinctrl device which supports multiple pins per register. This change
fixes the pcs_pin_dbg_show() in pinctrl-single driver when bits_per_mux
is not zero. In addition move offset calculation and pin offset in
register to common function.

Reviewed-by: Andy Shevchenko


Thanks




Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of 
different modules")
Signed-off-by: Hanna Hawa
---
  drivers/pinctrl/pinctrl-single.c | 57 +---
  1 file changed, 37 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index f3394517cb2e..4595acf6545e 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -270,20 +270,46 @@ static void __maybe_unused pcs_writel(unsigned val, void 
__iomem *reg)
 writel(val, reg);
  }

+static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs,
+  unsigned int pin)
+{
+   unsigned int mux_bytes;
+
+   mux_bytes = pcs->width / BITS_PER_BYTE;

Can be folded to one line.


Ack




+   if (pcs->bits_per_mux) {
+   unsigned int pin_offset_bytes;
+
+   pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
+   return (pin_offset_bytes / mux_bytes) * mux_bytes;

Side note for the further improvements (in a separate change, because
I see that you just copied an original code, and after all this is
just a fix patch): this can be replaced by round down APIs (one which
works for arbitrary divisors).


Agree, didn't want to change the formula as it's fix patch. (here and 
below), this can be taken for further improvements.





+   }
+
+   return pin * mux_bytes;
+}
+
+static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs,
+ unsigned int pin)
+{
+   return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin;

Also a side note: I'm wondering if this can be optimized to have less divisions.


+}
+
  static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
 struct seq_file *s,
 unsigned pin)
  {


Thanks,
Hanna

RE: [PATCH v2] gpio: mpc8xxx: Add ACPI support

[Ran Wang]

Hi Michael,

On Friday, March 19, 2021 3:52 PM, Michael Walle wrote:
> 
> Am 2021-03-19 03:53, schrieb Ran Wang:
> > Current implementation only supports DT, now add ACPI support.
> >
> > Note that compared to device of 'fsl,qoriq-gpio', LS1028A and
> > LS1088A's GPIO have no extra programming, so simplify related checking.
> >
> > Signed-off-by: Ran Wang 
> > ---
> > Change in v2:
> >  - Initialize devtype with NULL to fix compile warning.
> >  - Replace of_device_get_match_data() and acpi_match_device with
> > device_get_match_data().
> >  - Replace acpi_match_device() with simpler checking logic per Andy's
> > suggestion.
> >
> >  drivers/gpio/gpio-mpc8xxx.c | 34 +++---
> >  1 file changed, 23 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
> > index 6dfca83bcd90..646225fa3e73 100644
> > --- a/drivers/gpio/gpio-mpc8xxx.c
> > +++ b/drivers/gpio/gpio-mpc8xxx.c
> > @@ -9,6 +9,7 @@
> >   * kind, whether express or implied.
> >   */
> >
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -292,8 +293,6 @@ static const struct of_device_id
> > mpc8xxx_gpio_ids[] = {
> > { .compatible = "fsl,mpc5121-gpio", .data = &mpc512x_gpio_devtype, },
> > { .compatible = "fsl,mpc5125-gpio", .data = &mpc5125_gpio_devtype, },
> > { .compatible = "fsl,pq3-gpio", },
> > -   { .compatible = "fsl,ls1028a-gpio", },
> > -   { .compatible = "fsl,ls1088a-gpio", },
> > { .compatible = "fsl,qoriq-gpio",   },
> > {}
> >  };
> > @@ -303,8 +302,8 @@ static int mpc8xxx_probe(struct platform_device
> > *pdev)
> > struct device_node *np = pdev->dev.of_node;
> > struct mpc8xxx_gpio_chip *mpc8xxx_gc;
> > struct gpio_chip*gc;
> > -   const struct mpc8xxx_gpio_devtype *devtype =
> > -   of_device_get_match_data(&pdev->dev);
> > +   const struct mpc8xxx_gpio_devtype *devtype = NULL;
> > +   struct fwnode_handle *fwnode;
> > int ret;
> >
> > mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc),
> > GFP_KERNEL); @@ -315,14 +314,14 @@ static int mpc8xxx_probe(struct
> > platform_device
> > *pdev)
> >
> > raw_spin_lock_init(&mpc8xxx_gc->lock);
> >
> > -   mpc8xxx_gc->regs = of_iomap(np, 0);
> > +   mpc8xxx_gc->regs = devm_platform_ioremap_resource(pdev, 0);
> > if (!mpc8xxx_gc->regs)
> > return -ENOMEM;
> >
> > gc = &mpc8xxx_gc->gc;
> > gc->parent = &pdev->dev;
> >
> > -   if (of_property_read_bool(np, "little-endian")) {
> > +   if (device_property_read_bool(&pdev->dev, "little-endian")) {
> > ret = bgpio_init(gc, &pdev->dev, 4,
> >  mpc8xxx_gc->regs + GPIO_DAT,
> >  NULL, NULL,
> > @@ -345,6 +344,7 @@ static int mpc8xxx_probe(struct platform_device
> > *pdev)
> >
> > mpc8xxx_gc->direction_output = gc->direction_output;
> >
> > +   devtype = device_get_match_data(&pdev->dev);
> > if (!devtype)
> > devtype = &mpc8xxx_gpio_devtype_default;
> >
> > @@ -369,9 +369,9 @@ static int mpc8xxx_probe(struct platform_device
> > *pdev)
> >  * associated input enable must be set (GPIOxGPIE[IEn]=1) to
> > propagate
> >  * the port value to the GPIO Data Register.
> >  */
> > +   fwnode = dev_fwnode(&pdev->dev);
> > if (of_device_is_compatible(np, "fsl,qoriq-gpio") ||
> > -   of_device_is_compatible(np, "fsl,ls1028a-gpio") ||
> > -   of_device_is_compatible(np, "fsl,ls1088a-gpio"))
> 
> Again, please keep this. The DT bindings don't mention "fsl,qoriq-gpio"
> is required. Alternatively, change the binding (ideally convert it to
> YAML) and get an ack by Rob.

OK, I will keep this in next version

Regards,
Ran

> -michael

Re: [PATCH v2 11/14] objtool: Add elf_create_undef_symbol()

[Peter Zijlstra]

On Thu, Mar 18, 2021 at 09:29:23PM -0500, Josh Poimboeuf wrote:
> On Thu, Mar 18, 2021 at 06:11:14PM +0100, Peter Zijlstra wrote:
> > Allow objtool to create undefined symbols; this allows creating
> > relocations to symbols not currently in the symbol table.
> > 
> > Signed-off-by: Peter Zijlstra (Intel) 
> > ---
> >  tools/objtool/elf.c |   63 
> > 
> >  tools/objtool/include/objtool/elf.h |1 
> >  2 files changed, 64 insertions(+)
> > 
> > --- a/tools/objtool/elf.c
> > +++ b/tools/objtool/elf.c
> > @@ -724,6 +724,69 @@ static int elf_strtab_concat(struct elf
> > return len;
> >  }
> >  
> > +struct symbol *elf_create_undef_symbol(struct elf *elf, const char *name)
> > +{
> > +   struct section *symtab;
> > +   struct symbol *sym;
> > +   Elf_Data *data;
> > +   Elf_Scn *s;
> > +
> > +   sym = malloc(sizeof(*sym));
> > +   if (!sym) {
> > +   perror("malloc");
> > +   return NULL;
> > +   }
> > +   memset(sym, 0, sizeof(*sym));
> > +
> > +   sym->name = strdup(name);
> > +
> > +   sym->sym.st_name = elf_strtab_concat(elf, sym->name, NULL);
> > +   if (sym->sym.st_name == -1)
> > +   return NULL;
> > +
> > +   sym->sym.st_info = 0x10; /* STB_GLOBAL, STT_NOTYPE */
> 
> There's a generic macro for this:
>   
>   sym->sym.st_info = GELF_ST_INFO(STB_GLOBAL, STT_NOTYPE);

Ah, I remember not finding that many moons ago when I wrote that ..

> And sym->bind and sym->type should probably get set.

They are, it's in that elf_add_symbol() thing.

Re: [PATCH V2 2/5] regulator: qcom-rpmh: Add PM7325/PMR735A regulator support

[skakit]

Hi Matthias,

Thanks for reviewing the patches!

On 2021-03-17 01:22, Matthias Kaehlcke wrote:

On Mon, Mar 15, 2021 at 07:24:11PM +0530, satya priya wrote:

Add support for PM7325/PMR735A regulators. This ensures
that consumers are able to modify the physical state of PMIC
regulators.

Signed-off-by: satya priya 
---
Changes in V2:
 - No change.

 drivers/regulator/qcom-rpmh-regulator.c | 53 
-

 1 file changed, 52 insertions(+), 1 deletion(-)

diff --git a/drivers/regulator/qcom-rpmh-regulator.c 
b/drivers/regulator/qcom-rpmh-regulator.c

index 9471890..3509523 100644
--- a/drivers/regulator/qcom-rpmh-regulator.c
+++ b/drivers/regulator/qcom-rpmh-regulator.c
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0
-// Copyright (c) 2018-2019, The Linux Foundation. All rights 
reserved.
+// Copyright (c) 2018-2021, The Linux Foundation. All rights 
reserved.


 #define pr_fmt(fmt) "%s: " fmt, __func__

@@ -1042,6 +1042,49 @@ static const struct rpmh_vreg_init_data 
pmx55_vreg_data[] = {

{},
 };

+static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
+   RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
+   RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
+   RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps520, "vdd-s3"),
+   RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps520, "vdd-s4"),
+   RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps520, "vdd-s5"),
+   RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps520, "vdd-s6"),
+   RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps520, "vdd-s7"),
+   RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
+	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,  
"vdd-l1-l4-l12-l15"),

+   RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,  "vdd-l2-l7"),
+   RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,  "vdd-l3"),
+	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,  
"vdd-l1-l4-l12-l15"),

+   RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,  "vdd-l5"),
+   RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,  "vdd-l6-l9-l10"),
+   RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,  "vdd-l2-l7"),
+   RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,  "vdd-l8"),
+   RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,  "vdd-l6-l9-l10"),
+   RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,  "vdd-l6-l9-l10"),
+	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo_lv,   
"vdd-l11-l17-l18-l19"),
+	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_nldo,  
"vdd-l1-l4-l12-l15"),

+   RPMH_VREG("ldo13",  "ldo%s13", &pmic5_nldo,  "vdd-l13"),
+   RPMH_VREG("ldo14",  "ldo%s14", &pmic5_nldo,  "vdd-l14-l16"),
+	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_nldo,  
"vdd-l1-l4-l12-l15"),

+   RPMH_VREG("ldo16",  "ldo%s16", &pmic5_nldo,  "vdd-l14-l16"),
+	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo_lv,   
"vdd-l11-l17-l18-l19"),
+	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_pldo_lv,   
"vdd-l11-l17-l18-l19"),
+	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_pldo_lv,   
"vdd-l11-l17-l18-l19"),

+};


Could you help me understand these funky supply names? I see other RPMh
regulators also have them, so they are probably totally fine, but it
isn't clear to me what exactly the names represent. Apparently the LDO
itself is in the supply name, but many LDOs also list others.


These supply names are taken from powergrid. They are basically the 
parent supply names.
For example ldo2 and ldo7 have the parent supply vdd-l2-l7. Hence we 
gave supply name vdd-l2-l7 for these 2 regulators.


Thanks,
Satya Priya

Re: [PATCH V2 4/5] dt-bindings: regulator: Convert regulator bindings to YAML format

[skakit]

On 2021-03-17 00:17, Matthias Kaehlcke wrote:
Subject: dt-bindings: regulator: Convert regulator bindings to YAML 
format


Make sure to mention that this is about the RPMh regulators, not the
general regulator binding which was already converted.



Okay, will change the commit message.

[PATCH 0/2] AM642-sk: Add support for USB

[Aswath Govindraju]

The following series of patches add support for,
- single one lane SERDES present in AM64
- USB super-speed port on AM642-sk

USB test logs,
https://pastebin.ubuntu.com/p/4RT9Y94fPv/

The following patches depend on,
1) - 
https://lore.kernel.org/linux-devicetree/20210310112745.3445-1-kis...@ti.com/
 binding additions and given below is an immutable tag  provided by
 Vinod Koul  (one of the Maintainers of GENERIC PHY
 FRAMEWORK) after applying them,

 git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git
 tags/ti-serdes-for-5.13

2) - https://patchwork.kernel.org/project/linux-phy/list/?series=445371
 Serdes driver changes required for USB super-speed functionality.

Kishon Vijay Abraham I (2):
  arm64: dts: ti: k3-am64: Add SERDES DT node
  arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port

 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 39 ++
 2 files changed, 91 insertions(+)

-- 
2.17.1

[PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port

[Aswath Govindraju]

From: Kishon Vijay Abraham I 

Enable USB Super-Speed HOST port.

Signed-off-by: Kishon Vijay Abraham I 
Signed-off-by: Aswath Govindraju 
---
 arch/arm64/boot/dts/ti/k3-am642-sk.dts | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts 
b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 3a5bee4b0b0c..f193ec630d18 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -5,6 +5,8 @@
 
 /dts-v1/;
 
+#include 
+#include 
 #include 
 #include 
 #include "k3-am642.dtsi"
@@ -85,6 +87,12 @@
>;
};
 
+   main_usb0_pins_default: main-usb0-pins-default {
+   pinctrl-single,pins = <
+   AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) 
USB0_DRVVBUS */
+   >;
+   };
+
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) 
I2C1_SCL */
@@ -230,6 +238,37 @@
disable-wp;
 };
 
+&serdes_ln_ctrl {
+   idle-states = ;
+};
+
+&serdes_wiz0 {
+   status = "okay";
+};
+
+&serdes0 {
+   serdes0_usb_link: phy@0 {
+   reg = <0>;
+   cdns,num-lanes = <1>;
+   #phy-cells = <0>;
+   cdns,phy-type = ;
+   resets = <&serdes_wiz0 1>;
+   };
+};
+
+&usbss0 {
+   ti,vbus-divider;
+};
+
+&usb0 {
+   dr_mode = "host";
+   maximum-speed = "super-speed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&main_usb0_pins_default>;
+   phys = <&serdes0_usb_link>;
+   phy-names = "cdns3,usb3-phy";
+};
+
 &cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default
-- 
2.17.1

[PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node

[Aswath Govindraju]

From: Kishon Vijay Abraham I 

Add SERDES DT node for the single one lane SERDES present in
AM64.

Signed-off-by: Kishon Vijay Abraham I 
Signed-off-by: Aswath Govindraju 
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi 
b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index a03b66456062..5a62a96c048c 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -5,6 +5,17 @@
  * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
  */
 
+#include 
+#include 
+
+/ {
+   serdes_refclk: serdes-refclk {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <1>;
+   };
+};
+
 &cbass_main {
oc_sram: sram@7000 {
compatible = "mmio-sram";
@@ -184,6 +195,12 @@
reg = <0x4044 0x8>;
#phy-cells = <1>;
};
+
+   serdes_ln_ctrl: mux {
+   compatible = "mmio-mux";
+   #mux-control-cells = <1>;
+   mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
+   };
};
 
main_uart0: serial@280 {
@@ -477,6 +494,41 @@
};
};
 
+   serdes_wiz0: wiz@f00 {
+   compatible = "ti,am64-wiz-10g";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
+   clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>;
+   clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+   num-lanes = <1>;
+   #reset-cells = <1>;
+   #clock-cells = <1>;
+   ranges = <0x0f00 0x0 0x0f00 0x0001>;
+   assigned-clocks = <&k3_clks 162 1>;
+   assigned-clock-parents = <&k3_clks 162 5>;
+
+   serdes0: serdes@f00 {
+   compatible = "ti,j721e-serdes-10g";
+   reg = <0x0f00 0x0001>;
+   reg-names = "torrent_phy";
+   resets = <&serdes_wiz0 0>;
+   reset-names = "torrent_reset";
+   clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
+<&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;
+   clock-names = "refclk", "phy_en_refclk";
+   assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
+ <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>,
+ <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
+   assigned-clock-parents = <&k3_clks 162 1>,
+<&k3_clks 162 1>,
+<&k3_clks 162 1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #clock-cells = <1>;
+   };
+   };
+
cpts@3900 {
compatible = "ti,j721e-cpts";
reg = <0x0 0x3900 0x0 0x400>;
-- 
2.17.1

Re: [PATCH V2 3/5] arm64: dts: qcom: sc7280: Add RPMh regulators for sc7280-idp

[skakit]

On 2021-03-17 04:56, Matthias Kaehlcke wrote:

On Mon, Mar 15, 2021 at 07:24:12PM +0530, satya priya wrote:

Add regulator devices for SC7280 as RPMh regulators. This ensures
that consumers are able to modify the physical state of PMIC
regulators.

Signed-off-by: satya priya 
---
Changes in V2:
 - Corrected the indentation for "compatible" and "qcom,pmic-id" under
   pm8350c-regulators as per Konrad's comment.

 arch/arm64/boot/dts/qcom/sc7280-idp.dts | 212 


 1 file changed, 212 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts 
b/arch/arm64/boot/dts/qcom/sc7280-idp.dts

index 428f863..78effe5 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
@@ -22,6 +22,218 @@
};
 };

+&apps_rsc {
+   pm7325-regulators {
+   compatible = "qcom,pm7325-rpmh-regulators";
+   qcom,pmic-id = "b";
+
+   vreg_s1b_1p8: smps1 {
+   regulator-min-microvolt = <1856000>;


For most LDOs their 'Active minimum voltage' is specified as their
minimum, however for S1B and S8B it's the 'Nominal voltage. Is that
intentional?

There might be a misunderstanding on my side what the values in the
datasheet actually mean, see my comment at the end.


+   regulator-max-microvolt = <204>;
+   };
+
+   vreg_s7b_0p9: smps7 {
+   regulator-min-microvolt = <535000>;


According to the datasheet the minimum voltage of the S7B regulator
is 904 mV.


+   regulator-max-microvolt = <112>;
+   };
+
+   vreg_s8b_1p2: smps8 {
+   regulator-min-microvolt = <1256000>;
+   regulator-max-microvolt = <150>;
+   };
+
+   vreg_l1b_0p8: ldo1 {
+   regulator-min-microvolt = <825000>;
+   regulator-max-microvolt = <925000>;
+   };
+
+   vreg_l2b_3p0: ldo2 {
+   regulator-min-microvolt = <270>;
+   regulator-max-microvolt = <3544000>;
+   };


Another question that came up for sc7180-trogdor regulators,
whose core regulator config was derived from sc7180-idp: the
label suggests that this regulator is supposed to supply 3V,
however the range spans from 2.7 to 3.54V. Shouldn't it be
narrower around 3V? Same for other some regulators.



The label names are given based on the default voltage value(a typical 
value supported by any usecase) which is specified in the Powergrid. For 
this regulator the default voltage is 3.072V, whereas the range is 2.7 
to 3.5V



+
+   vreg_l6b_1p2: ldo6 {
+   regulator-min-microvolt = <114>;


The datasheet says the minimum for L6B is 1.2V.


+   regulator-max-microvolt = <126>;
+   };
+
+   vreg_l7b_2p9: ldo7 {
+   regulator-min-microvolt = <296>;
+   regulator-max-microvolt = <296>;
+   };


This regulator has a fixed voltage in difference to the others, why
is that?



L7B and L19B regulators are used for EMMC. EMMC probe is failing if the 
value is not fixed to default voltage(2.96V for L7B). Similar issue was 
seen on Rennell as well, [1] is the upstream change for the same posted 
by storage team.


[1] https://lore.kernel.org/patchwork/patch/1176993/


+
+   vreg_l8b_0p9: ldo8 {
+   regulator-min-microvolt = <87>;
+   regulator-max-microvolt = <97>;
+   };
+
+   vreg_l9b_1p2: ldo9 {
+   regulator-min-microvolt = <108>;
+   regulator-max-microvolt = <1304000>;
+   };
+
+   vreg_l11b_1p7: ldo11 {
+   regulator-min-microvolt = <1504000>;


The datasheet says the mininum voltage for L11B is 1.776V.


+   regulator-max-microvolt = <200>;
+   };
+
+   vreg_l12b_0p8: ldo12 {
+   regulator-min-microvolt = <751000>;
+   regulator-max-microvolt = <824000>;
+   };
+
+   vreg_l13b_0p8: ldo13 {
+   regulator-min-microvolt = <53>;
+   regulator-max-microvolt = <824000>;


The max for L13B is 880mV, is this a copy and paste from L12B?


+   };
+
+   vreg_l14b_1p2: ldo14 {
+   regulator-min-microvolt = <108>;


The datasheet says the mininum voltage for L14B is 1.2V.


+   regulator-max-microvolt = <1304000>;
+   };
+
+   vreg_l15b_0p8: ldo15 {
+   regulator-min-microvolt = <765000>;
+   regulator-max-microvolt = <102>;
+   };
+
+   vreg_l16b_1p2: ldo16 {
+  

RE: [PATCH 02/11] i2c: imx-lpi2c: add runtime pm support

[Clark Wang]

> -Original Message-
> From: Clark Wang 
> Sent: Friday, March 19, 2021 14:16
> To: Aisheng Dong ; shawn...@kernel.org;
> s.ha...@pengutronix.de
> Cc: ker...@pengutronix.de; feste...@gmail.com; dl-linux-imx  i...@nxp.com>; sumit.sem...@linaro.org; christian.koe...@amd.com;
> linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org
> Subject: RE: [PATCH 02/11] i2c: imx-lpi2c: add runtime pm support
>
>
> > -Original Message-
> > From: Aisheng Dong 
> > Sent: Friday, March 19, 2021 12:40
> > To: Clark Wang ; shawn...@kernel.org;
> > s.ha...@pengutronix.de
> > Cc: ker...@pengutronix.de; feste...@gmail.com; dl-linux-imx  > i...@nxp.com>; sumit.sem...@linaro.org; christian.koe...@amd.com;
> > linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> > ker...@vger.kernel.org
> > Subject: RE: [PATCH 02/11] i2c: imx-lpi2c: add runtime pm support
> >
> > > From: Clark Wang 
> > > Sent: Wednesday, March 17, 2021 2:54 PM
> > > Subject: [PATCH 02/11] i2c: imx-lpi2c: add runtime pm support
> > >
> > > - Add runtime pm support to dynamicly manage the clock.
> > > - Put the suspend to suspend_noirq.
> > > - Call .pm_runtime_force_suspend() to force runtime pm suspended
> > >   in .suspend_noirq().
> > >
> >
> > The patch title needs to be improved as the driver already supports rpm.
> > And do one thing in one patch.
> >
> > > Signed-off-by: Fugang Duan 
> > > Signed-off-by: Gao Pan 
> > > Reviewed-by: Anson Huang 
> >
> > Please add your sign-off.
> >
> > > ---
> > >  drivers/i2c/busses/i2c-imx-lpi2c.c | 50
> > > --
> > >  1 file changed, 33 insertions(+), 17 deletions(-)
> > >
> > > diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > > b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > > index bbf44ac95021..1e920e7ac7c1 100644
> > > --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> > > +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> > > @@ -574,7 +574,8 @@ static int lpi2c_imx_probe(struct platform_device
> > > *pdev)
> > >   if (ret)
> > >   lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ;
> > >
> > > - ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0,
> > > + ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr,
> > > +IRQF_NO_SUSPEND,
> >
> > This belongs to a separate patch
> >
> > >  pdev->name, lpi2c_imx);
> > >   if (ret) {
> > >   dev_err(&pdev->dev, "can't claim irq %d\n", irq); @@ -
> > 584,35
> > > +585,32 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
> > >   i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
> > >   platform_set_drvdata(pdev, lpi2c_imx);
> > >
> > > - ret = clk_prepare_enable(lpi2c_imx->clk);
> > > - if (ret) {
> > > - dev_err(&pdev->dev, "clk enable failed %d\n", ret);
> > > - return ret;
> > > - }
> > > -
> > >   pm_runtime_set_autosuspend_delay(&pdev->dev,
> > I2C_PM_TIMEOUT);
> > >   pm_runtime_use_autosuspend(&pdev->dev);
> > > - pm_runtime_get_noresume(&pdev->dev);
> > > - pm_runtime_set_active(&pdev->dev);
> > >   pm_runtime_enable(&pdev->dev);
> > >
> > > + ret = pm_runtime_get_sync(&pdev->dev);
> > > + if (ret < 0) {
> > > + pm_runtime_put_noidle(&pdev->dev);
> > > + dev_err(&pdev->dev, "failed to enable clock\n");
> > > + return ret;
> > > + }
> >
> > Can't current clk control via rpm work well?
> > Please describe why need change.
>
> I think the previous patch maker might want to use the return value of
> pm_runtime_get_sync to check whether the clock has been turned on
> correctly to
> avoid the kernel panic.
> Maybe I can change to the method like this.
>   pm_runtime_get_noresume(&pdev->dev);
>   ret = pm_runtime_set_active(&pdev->dev);
>   if (ret < 0)
>   goto out;
>   pm_runtime_enable(&pdev->dev);
>
> Best Regards,
> Clark Wang

Sorry, I missed the point before.
If we use pm_runtime_get_noresume(&pdev->dev); and 
pm_runtime_set_active(&pdev->dev); here, the clk should be enabled by using 
clk_prepare_enable() in the probe function. However, the call of 
clk_prepare_enable() is already in lpi2c_runtime_resume().
Using get_sync() here can help to reduce the repetitive code, especially ipg 
clk will be added later.
Shall we change to use pm_runtime_get_sync() here?

Regards,
Clark Wang




smime.p7s
Description: S/MIME cryptographic signature

[PATCH V2] workqueue: watchdog: update wq_watchdog_touched for unbound lockup checking

[Wang Qing]

When touch_softlockup_watchdog() is called, only wq_watchdog_touched_cpu 
updated, while the unbound worker_pool running on its core uses 
wq_watchdog_touched to determine whether locked up. This may be mischecked.

My suggestion is to update both when touch_softlockup_watchdog() is called, 
use wq_watchdog_touched_cpu to check bound, and use wq_watchdog_touched 
to check unbound worker_pool.

Signed-off-by: Wang Qing 
---
 kernel/watchdog.c  |  5 +++--
 kernel/workqueue.c | 17 ++---
 2 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/kernel/watchdog.c b/kernel/watchdog.c
index 7110906..107bc38
--- a/kernel/watchdog.c
+++ b/kernel/watchdog.c
@@ -278,9 +278,10 @@ void touch_all_softlockup_watchdogs(void)
 * update as well, the only side effect might be a cycle delay for
 * the softlockup check.
 */
-   for_each_cpu(cpu, &watchdog_allowed_mask)
+   for_each_cpu(cpu, &watchdog_allowed_mask) {
per_cpu(watchdog_touch_ts, cpu) = SOFTLOCKUP_RESET;
-   wq_watchdog_touch(-1);
+   wq_watchdog_touch(cpu);
+   }
 }
 
 void touch_softlockup_watchdog_sync(void)
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index 0d150da..be08295
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -5787,22 +5787,17 @@ static void wq_watchdog_timer_fn(struct timer_list 
*unused)
continue;
 
/* get the latest of pool and touched timestamps */
+   if (pool->cpu >= 0)
+   touched = READ_ONCE(per_cpu(wq_watchdog_touched_cpu, 
pool->cpu));
+   else
+   touched = READ_ONCE(wq_watchdog_touched);
pool_ts = READ_ONCE(pool->watchdog_ts);
-   touched = READ_ONCE(wq_watchdog_touched);
 
if (time_after(pool_ts, touched))
ts = pool_ts;
else
ts = touched;
 
-   if (pool->cpu >= 0) {
-   unsigned long cpu_touched =
-   READ_ONCE(per_cpu(wq_watchdog_touched_cpu,
- pool->cpu));
-   if (time_after(cpu_touched, ts))
-   ts = cpu_touched;
-   }
-
/* did we stall? */
if (time_after(jiffies, ts + thresh)) {
lockup_detected = true;
@@ -5826,8 +5821,8 @@ notrace void wq_watchdog_touch(int cpu)
 {
if (cpu >= 0)
per_cpu(wq_watchdog_touched_cpu, cpu) = jiffies;
-   else
-   wq_watchdog_touched = jiffies;
+
+   wq_watchdog_touched = jiffies;
 }
 
 static void wq_watchdog_set_thresh(unsigned long thresh)
-- 
2.7.4

Re: linux-next: Signed-off-by missing for commit in the block tree

[Stefan Metzmacher]

Am 19.03.21 um 00:25 schrieb Jens Axboe:
> On 3/18/21 5:16 PM, Stephen Rothwell wrote:
>> Hi all,
>>
>> Commit
>>
>>   c2c6c067c050 ("io_uring: remove structures from include/linux/io_uring.h")
>>
>> is missing a Signed-off-by from its author.
> 
> Stefan, let me know if you're OK with me adding that, not sure how I missed
> that.

Yes, sure :-)
I guess you removed it while adding 'Link:'

You may want to remove cc: stable from 3aab52c9a708f7183460d368700181ef0c2a09e6
("io_uring: imply MSG_NOSIGNAL for send[msg]()/recv[msg]() calls")
for now.

I'll want to do some more test with it on 5.12,
I guess we'd then have to backport it to stable as part of the
io_thread worker backport. I'll post some more details later
to the io-uring list.

Thanks!
metze

Re: [PATCH v2 14/14] objtool,x86: Rewrite retpoline thunk calls

[Peter Zijlstra]

On Thu, Mar 18, 2021 at 10:29:55PM -0500, Josh Poimboeuf wrote:
> On Thu, Mar 18, 2021 at 06:11:17PM +0100, Peter Zijlstra wrote:
> > When the compiler emits: "CALL __x86_indirect_thunk_\reg" for an
> > indirect call, have objtool rewrite it to:
> > 
> > ALTERNATIVE "call __x86_indirect_thunk_\reg",
> > "call *%reg", ALT_NOT(X86_FEATURE_RETPOLINE)
> > 
> > Additionally, in order to not emit endless identical
> > .altinst_replacement chunks, use a global symbol for them, see
> > __x86_indirect_alt_*.
> > 
> > This also avoids objtool from having to do code generation.
> > 
> > Signed-off-by: Peter Zijlstra (Intel) 
> 
> This is better than I expected.  Nice workaround for not generating
> code.

Thanks :-)

> > +.macro ALT_THUNK reg
> > +
> > +   .align 1
> > +
> > +SYM_FUNC_START_NOALIGN(__x86_indirect_alt_call_\reg)
> > +   ANNOTATE_RETPOLINE_SAFE
> > +1: call*%\reg
> > +2: .skip   5-(2b-1b), 0x90
> > +SYM_FUNC_END(__x86_indirect_alt_call_\reg)
> > +
> > +SYM_FUNC_START_NOALIGN(__x86_indirect_alt_jmp_\reg)
> > +   ANNOTATE_RETPOLINE_SAFE
> > +1: jmp *%\reg
> > +2: .skip   5-(2b-1b), 0x90
> > +SYM_FUNC_END(__x86_indirect_alt_jmp_\reg)
> 
> This mysterious code needs a comment.  Shouldn't it be in
> .altinstr_replacement or something?

Comment, yes, I suppose so. And no, if we stick it in
.altinstr_replacement we'll throw them away with initmem and module
alternative patching (which will also refer to these symbols) will go
side-ways.

> Also doesn't the alternative code already insert nops?

Problem is that the {call,jmp} *%\reg thing is not fixed length. They're
2 or 3 bytes depending on which register is picked.

We could make them all 3 long and insert 0,1 nop I suppose.

Initially alternatives wouldn't re-optimize nops on patched things, it
would simply add nops on. And I had the above be:

1:  INSN*%\reg
2:  .nops   5-(2b-1b)

and we'd get a single right sized nop. But the .nops directive it too
new, we support binutils that don't have it :/

Hence, it now reads:

2:  .skip   5-(2b-1b), 0x90

End result is that alternative NOP optimizer patch at the start of the
series that now also optimizes a bunch of cases that are unrelated and
were previously missed -- but crucially, it covers this case too :-)

Anyway, yes I could make it 3 long.

> > +int arch_rewrite_retpoline(struct objtool_file *file,
> > +  struct instruction *insn,
> > +  struct reloc *reloc)
> > +{
> > +   struct symbol *sym;
> > +   char name[32] = "";
> > +
> > +   if (!strcmp(insn->sec->name, ".text.__x86.indirect_thunk"))
> > +   return 0;
> > +
> > +   sprintf(name, "__x86_indirect_alt_%s_%s",
> > +   insn->type == INSN_JUMP_DYNAMIC ? "jmp" : "call",
> > +   reloc->sym->name + 21);
> > +
> > +   sym = find_symbol_by_name(file->elf, name);
> > +   if (!sym) {
> > +   sym = elf_create_undef_symbol(file->elf, name);
> > +   if (!sym) {
> > +   WARN("elf_create_undef_symbol");
> > +   return -1;
> > +   }
> > +   }
> > +
> > +   elf_add_alternative(file->elf, insn, sym,
> > +   ALT_NOT(X86_FEATURE_RETPOLINE), 5, 5);
> > +
> > +   return 0;
> > +}
> 
> Need to propagate the error.

Oh, indeed so.

Re: [PATCH] dma-buf: use wake_up_process() instead of wake_up_state()

[Christian König]

Am 19.03.21 um 03:58 schrieb Wang Qing:

Using wake_up_process() is more simpler and friendly,
and it is more convenient for analysis and statistics

Signed-off-by: Wang Qing 


Reviewed-by: Christian König 

Should I pick it up or do you want to push it through some other tree 
than DRM?


Thanks,
Christian.


---
  drivers/dma-buf/dma-fence.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index 7475e09..de51326
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -655,7 +655,7 @@ dma_fence_default_wait_cb(struct dma_fence *fence, struct 
dma_fence_cb *cb)
struct default_wait_cb *wait =
container_of(cb, struct default_wait_cb, base);
  
-	wake_up_state(wait->task, TASK_NORMAL);

+   wake_up_process(wait->task);
  }
  
  /**

Re: [PATCH] selftests/kvm: add get_msr_index_features

[Emanuele Giuseppe Esposito]

Hi Andrew,

Thank you for the feedback (also in v1).

On 18/03/2021 18:03, Andrew Jones wrote:

On Thu, Mar 18, 2021 at 03:56:29PM +0100, Emanuele Giuseppe Esposito wrote:

Test the KVM_GET_MSR_FEATURE_INDEX_LIST
and KVM_GET_MSR_INDEX_LIST ioctls.

Signed-off-by: Emanuele Giuseppe Esposito 
---
  tools/testing/selftests/kvm/.gitignore|   1 +
  tools/testing/selftests/kvm/Makefile  |   1 +
  .../kvm/x86_64/get_msr_index_features.c   | 124 ++
  3 files changed, 126 insertions(+)
  create mode 100644 tools/testing/selftests/kvm/x86_64/get_msr_index_features.c

diff --git a/tools/testing/selftests/kvm/.gitignore 
b/tools/testing/selftests/kvm/.gitignore
index 32b87cc77c8e..d99f3969d371 100644
--- a/tools/testing/selftests/kvm/.gitignore
+++ b/tools/testing/selftests/kvm/.gitignore
@@ -5,6 +5,7 @@
  /s390x/resets
  /s390x/sync_regs_test
  /x86_64/cr4_cpuid_sync_test
+/x86_64/get_msr_index_features
  /x86_64/debug_regs
  /x86_64/evmcs_test
  /x86_64/get_cpuid_test
diff --git a/tools/testing/selftests/kvm/Makefile 
b/tools/testing/selftests/kvm/Makefile
index a6d61f451f88..c748b9650e28 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -39,6 +39,7 @@ LIBKVM_aarch64 = lib/aarch64/processor.c lib/aarch64/ucall.c
  LIBKVM_s390x = lib/s390x/processor.c lib/s390x/ucall.c 
lib/s390x/diag318_test_handler.c
  
  TEST_GEN_PROGS_x86_64 = x86_64/cr4_cpuid_sync_test

+TEST_GEN_PROGS_x86_64 += x86_64/get_msr_index_features


Maybe we should give up trying to keep an alphabetic order.


My bad, I did not notice that it was in alphabetic order.




  TEST_GEN_PROGS_x86_64 += x86_64/evmcs_test
  TEST_GEN_PROGS_x86_64 += x86_64/get_cpuid_test
  TEST_GEN_PROGS_x86_64 += x86_64/hyperv_cpuid
diff --git a/tools/testing/selftests/kvm/x86_64/get_msr_index_features.c 
b/tools/testing/selftests/kvm/x86_64/get_msr_index_features.c
new file mode 100644
index ..ad9972d99dfa
--- /dev/null
+++ b/tools/testing/selftests/kvm/x86_64/get_msr_index_features.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Test that KVM_GET_MSR_INDEX_LIST and
+ * KVM_GET_MSR_FEATURE_INDEX_LIST work as intended
+ *
+ * Copyright (C) 2020, Red Hat, Inc.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "test_util.h"
+#include "kvm_util.h"
+#include "processor.h"
+#include "../lib/kvm_util_internal.h"


I'm not sure why the original kvm selftests authors decided to do this
internal stuff, but we should either kill that or avoid doing stuff like
this.


I need this include because of the KVM_DEV_PATH macro, to get the kvm_fd.
No other reason for including it in this test.

+
+static int kvm_num_feature_msrs(int kvm_fd, int nmsrs)
+{
+   struct kvm_msr_list *list;
+   int r;
+
+   list = malloc(sizeof(*list) + nmsrs * sizeof(list->indices[0]));
+   list->nmsrs = nmsrs;
+   r = ioctl(kvm_fd, KVM_GET_MSR_FEATURE_INDEX_LIST, list);
+   TEST_ASSERT(r == -1 && errno == E2BIG,
+   "Unexpected result from KVM_GET_MSR_FEATURE_INDEX_LIST probe, r: 
%i",
+   r);


Weird indentation. I'd just leave it up on the last line. We don't care
about long lines.


Ok. I wanted avoid warnings from the checkpatch script.

Paolo, do you want me to send v2 with fixed indentation or you already 
took care of it? I'll be happy to do so.


Emanuele

include/linux/compiler_types.h:315:38: error: call to '__compiletime_assert_511' declared with attribute error: BUILD_BUG_ON failed: offsetof(struct can_frame, len) != offsetof(struct canfd_frame, len

[kernel test robot]

Hi Oliver,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   8b12a62a4e3ed4ae99c715034f557eb391d6b196
commit: c7b74967799b1af52b3045d69d4c26836b2d41de can: replace can_dlc as 
variable/element for payload length
date:   4 months ago
config: arm-randconfig-r004-20210318 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c7b74967799b1af52b3045d69d4c26836b2d41de
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout c7b74967799b1af52b3045d69d4c26836b2d41de
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from :
   net/can/af_can.c: In function 'can_init':
>> include/linux/compiler_types.h:315:38: error: call to 
>> '__compiletime_assert_511' declared with attribute error: BUILD_BUG_ON 
>> failed: offsetof(struct can_frame, len) != offsetof(struct canfd_frame, len) 
>> || offsetof(struct can_frame, data) != offsetof(struct canfd_frame, data)
 315 |  _compiletime_assert(condition, msg, __compiletime_assert_, 
__COUNTER__)
 |  ^
   include/linux/compiler_types.h:296:4: note: in definition of macro 
'__compiletime_assert'
 296 |prefix ## suffix();\
 |^~
   include/linux/compiler_types.h:315:2: note: in expansion of macro 
'_compiletime_assert'
 315 |  _compiletime_assert(condition, msg, __compiletime_assert_, 
__COUNTER__)
 |  ^~~
   include/linux/build_bug.h:39:37: note: in expansion of macro 
'compiletime_assert'
  39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
 | ^~
   include/linux/build_bug.h:50:2: note: in expansion of macro 
'BUILD_BUG_ON_MSG'
  50 |  BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
 |  ^~~~
   net/can/af_can.c:891:2: note: in expansion of macro 'BUILD_BUG_ON'
 891 |  BUILD_BUG_ON(offsetof(struct can_frame, len) !=
 |  ^~~~


vim +/__compiletime_assert_511 +315 include/linux/compiler_types.h

eb5c2d4b45e3d2 Will Deacon 2020-07-21  301  
eb5c2d4b45e3d2 Will Deacon 2020-07-21  302  #define 
_compiletime_assert(condition, msg, prefix, suffix) \
eb5c2d4b45e3d2 Will Deacon 2020-07-21  303  __compiletime_assert(condition, 
msg, prefix, suffix)
eb5c2d4b45e3d2 Will Deacon 2020-07-21  304  
eb5c2d4b45e3d2 Will Deacon 2020-07-21  305  /**
eb5c2d4b45e3d2 Will Deacon 2020-07-21  306   * compiletime_assert - break build 
and emit msg if condition is false
eb5c2d4b45e3d2 Will Deacon 2020-07-21  307   * @condition: a compile-time 
constant condition to check
eb5c2d4b45e3d2 Will Deacon 2020-07-21  308   * @msg:   a message to emit if 
condition is false
eb5c2d4b45e3d2 Will Deacon 2020-07-21  309   *
eb5c2d4b45e3d2 Will Deacon 2020-07-21  310   * In tradition of POSIX assert, 
this macro will break the build if the
eb5c2d4b45e3d2 Will Deacon 2020-07-21  311   * supplied condition is *false*, 
emitting the supplied error message if the
eb5c2d4b45e3d2 Will Deacon 2020-07-21  312   * compiler has support to do so.
eb5c2d4b45e3d2 Will Deacon 2020-07-21  313   */
eb5c2d4b45e3d2 Will Deacon 2020-07-21  314  #define 
compiletime_assert(condition, msg) \
eb5c2d4b45e3d2 Will Deacon 2020-07-21 @315  _compiletime_assert(condition, 
msg, __compiletime_assert_, __COUNTER__)
eb5c2d4b45e3d2 Will Deacon 2020-07-21  316  

:: The code at line 315 was first introduced by commit
:: eb5c2d4b45e3d2d5d052ea6b8f1463976b1020d5 compiler.h: Move 
compiletime_assert() macros into compiler_types.h

:: TO: Will Deacon 
:: CC: Will Deacon 

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [PATCH v2 1/9] units: Add the HZ macros

[Daniel Lezcano]

Hi Rafael,

is it possible to merge this series through linux-pm ?


On 25/02/2021 12:22, Andy Shevchenko wrote:
> On Wed, Feb 24, 2021 at 03:42:11PM +0100, Daniel Lezcano wrote:
>> The macros for the unit conversion for frequency are duplicated in
>> different places.
>>
>> Provide these macros in the 'units' header, so they can be reused.
> 
> For the all that have not been tagged:
> Reviewed-by: Andy Shevchenko 
> 
> Thanks!
> 
>> Signed-off-by: Daniel Lezcano 
>> Reviewed-by: Christian Eggers 
>> Reviewed-by: Andy Shevchenko 
>> ---
>>  include/linux/units.h | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/include/linux/units.h b/include/linux/units.h
>> index dcc30a53fa93..218ec0d314b6 100644
>> --- a/include/linux/units.h
>> +++ b/include/linux/units.h
>> @@ -4,6 +4,10 @@
>>  
>>  #include 
>>  
>> +#define HZ_PER_KHZ  1000L
>> +#define KHZ_PER_MHZ 1000L
>> +#define HZ_PER_MHZ  100L
>> +
>>  #define MILLIWATT_PER_WATT  1000L
>>  #define MICROWATT_PER_MILLIWATT 1000L
>>  #define MICROWATT_PER_WATT  100L
>> -- 
>> 2.17.1
>>
> 


-- 
 Linaro.org │ Open source software for ARM SoCs

Follow Linaro:   Facebook |
 Twitter |
 Blog

Re: [PATCH 00/36] [Set 4] Rid W=1 warnings in SCSI

[Lee Jones]

On Thu, 18 Mar 2021, Martin K. Petersen wrote:

> 
> Lee,
> 
> > This set is part of a larger effort attempting to clean-up W=1 kernel
> > builds, which are currently overwhelmingly riddled with niggly little
> > warnings.
> 
> Applied to 5.13/scsi-staging, thanks! I fixed a few little things.

Thanks for your continued support Martin.

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH] tty: serial: samsung_tty: remove spinlock flags in interrupt handlers

[Johan Hovold]

On Fri, Mar 19, 2021 at 06:36:39AM +, Song Bao Hua (Barry Song) wrote:
> 
> 
> > -Original Message-
> > From: Andy Shevchenko [mailto:andy.shevche...@gmail.com]
> > Sent: Tuesday, March 16, 2021 10:41 PM
> > To: Johan Hovold ; Finn Thain 
> > ;
> > Song Bao Hua (Barry Song) 
> > Cc: Krzysztof Kozlowski ; Greg
> > Kroah-Hartman ; Jiri Slaby 
> > ;
> > linux-arm Mailing List ; Linux Samsung
> > SOC ; open list:SERIAL DRIVERS
> > ; Linux Kernel Mailing List
> > ; Hector Martin ; Arnd
> > Bergmann 
> > Subject: Re: [PATCH] tty: serial: samsung_tty: remove spinlock flags in
> > interrupt handlers
> > 
> > On Tue, Mar 16, 2021 at 11:02 AM Johan Hovold  wrote:
> > >
> > > On Mon, Mar 15, 2021 at 07:12:12PM +0100, Krzysztof Kozlowski wrote:
> > > > Since interrupt handler is called with disabled local interrupts, there
> > > > is no need to use the spinlock primitives disabling interrupts as well.
> > >
> > > This isn't generally true due to "threadirqs" and that can lead to
> > > deadlocks if the console code is called from hard irq context.
> > >
> > > Now, this is *not* the case for this particular driver since it doesn't
> > > even bother to take the port lock in console_write(). That should
> > > probably be fixed instead.
> > >
> > > See https://lore.kernel.org/r/X7kviiRwuxvPxC8O@localhost.
> > 
> > Finn, Barry, something to check I think?
> 
> My understanding is that spin_lock_irqsave can't protect the context
> the console_write() is called in hardirq for threaded_irq case mainly
> for preempt-rt scenarios as spin_lock_irqsave doesn't disable irq in
> that case at all.

Forced threaded interrupts have so far run with interrupts enabled and
spin_lock_irqsave() would suffice on non-RT. This is about to change
though so that drivers don't need to worry about "threadirqs":

https://lore.kernel.org/r/20210317143859.513307...@linutronix.de

> See:
> https://www.kernel.org/doc/html/latest/locking/locktypes.html
> spinlock_t and PREEMPT_RT
> On a PREEMPT_RT kernel spinlock_t is mapped to a separate implementation
> based on rt_mutex which changes the semantics:
> Preemption is not disabled.
> The hard interrupt related suffixes for spin_lock / spin_unlock operations
> (_irq, _irqsave / _irqrestore) do not affect the CPU’s interrupt disabled
> state.
> 
> So if console_write() can interrupt our code in hardirq, we should
> move to raw_spin_lock_irqsave for this driver.

No, no. RT handles this by deferring console writes apparently.

> I think it is almost always wrong to call spin_lock_irqsave in hardirq.

Again, no. It's even been a requirement due to "threadirqs" in some
cases (e.g. hrtimers) up until now (or rather until the above patch is
in mainline).

Johan

[PATCH v3] gpio: mpc8xxx: Add ACPI support

[Ran Wang]

Current implementation only supports DT, now add ACPI support.

Signed-off-by: Ran Wang 
---
Change in v3:
 - Recover ls1028a and ls1088a compatilbe checking logic

Change in v2:
 - Initialize devtype with NULL to fix compile warning.
 - Replace of_device_get_match_data() and acpi_match_device with 
device_get_match_data().
 - Replace acpi_match_device() with simpler checking logic per Andy's 
suggestion.

 drivers/gpio/gpio-mpc8xxx.c | 32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 6dfca83bcd90..25ac7db847af 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -9,6 +9,7 @@
  * kind, whether express or implied.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -303,8 +304,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
struct mpc8xxx_gpio_chip *mpc8xxx_gc;
struct gpio_chip*gc;
-   const struct mpc8xxx_gpio_devtype *devtype =
-   of_device_get_match_data(&pdev->dev);
+   const struct mpc8xxx_gpio_devtype *devtype = NULL;
+   struct fwnode_handle *fwnode;
int ret;
 
mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);
@@ -315,14 +316,14 @@ static int mpc8xxx_probe(struct platform_device *pdev)
 
raw_spin_lock_init(&mpc8xxx_gc->lock);
 
-   mpc8xxx_gc->regs = of_iomap(np, 0);
+   mpc8xxx_gc->regs = devm_platform_ioremap_resource(pdev, 0);
if (!mpc8xxx_gc->regs)
return -ENOMEM;
 
gc = &mpc8xxx_gc->gc;
gc->parent = &pdev->dev;
 
-   if (of_property_read_bool(np, "little-endian")) {
+   if (device_property_read_bool(&pdev->dev, "little-endian")) {
ret = bgpio_init(gc, &pdev->dev, 4,
 mpc8xxx_gc->regs + GPIO_DAT,
 NULL, NULL,
@@ -345,6 +346,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
 
mpc8xxx_gc->direction_output = gc->direction_output;
 
+   devtype = device_get_match_data(&pdev->dev);
if (!devtype)
devtype = &mpc8xxx_gpio_devtype_default;
 
@@ -369,9 +371,11 @@ static int mpc8xxx_probe(struct platform_device *pdev)
 * associated input enable must be set (GPIOxGPIE[IEn]=1) to propagate
 * the port value to the GPIO Data Register.
 */
+   fwnode = dev_fwnode(&pdev->dev);
if (of_device_is_compatible(np, "fsl,qoriq-gpio") ||
of_device_is_compatible(np, "fsl,ls1028a-gpio") ||
-   of_device_is_compatible(np, "fsl,ls1088a-gpio"))
+   of_device_is_compatible(np, "fsl,ls1088a-gpio") ||
+   !(IS_ERR_OR_NULL(fwnode) || is_of_node(fwnode)))
gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0x);
 
ret = gpiochip_add_data(gc, mpc8xxx_gc);
@@ -381,12 +385,15 @@ static int mpc8xxx_probe(struct platform_device *pdev)
goto err;
}
 
-   mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0);
+   mpc8xxx_gc->irqn = platform_get_irq(pdev, 0);
if (!mpc8xxx_gc->irqn)
return 0;
 
-   mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,
-   &mpc8xxx_gpio_irq_ops, mpc8xxx_gc);
+   mpc8xxx_gc->irq = irq_domain_create_linear(fwnode,
+  MPC8XXX_GPIO_PINS,
+  &mpc8xxx_gpio_irq_ops,
+  mpc8xxx_gc);
+
if (!mpc8xxx_gc->irq)
return 0;
 
@@ -425,12 +432,21 @@ static int mpc8xxx_remove(struct platform_device *pdev)
return 0;
 }
 
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id gpio_acpi_ids[] = {
+   {"NXP0031",},
+   { }
+};
+MODULE_DEVICE_TABLE(acpi, gpio_acpi_ids);
+#endif
+
 static struct platform_driver mpc8xxx_plat_driver = {
.probe  = mpc8xxx_probe,
.remove = mpc8xxx_remove,
.driver = {
.name = "gpio-mpc8xxx",
.of_match_table = mpc8xxx_gpio_ids,
+   .acpi_match_table = ACPI_PTR(gpio_acpi_ids),
},
 };
 
-- 
2.25.1

[PATCH] dm thin: remove needless request_queue NULL pointer check

[Xu Wang]

Since commit ff9ea323816d ("block, bdi: an active gendisk always has a
request_queue associated with it") the request_queue pointer returned
from bdev_get_queue() shall never be NULL.

Signed-off-by: Xu Wang 
---
 drivers/md/dm-thin.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index fff4c50df74d..985baee3a678 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -2816,7 +2816,7 @@ static bool data_dev_supports_discard(struct pool_c *pt)
 {
struct request_queue *q = bdev_get_queue(pt->data_dev->bdev);
 
-   return q && blk_queue_discard(q);
+   return blk_queue_discard(q);
 }
 
 static bool is_factor(sector_t block_size, uint32_t n)
-- 
2.17.1

[PATCH] dm cache: remove needless request_queue NULL pointer checks

[Xu Wang]

Since commit ff9ea323816d ("block, bdi: an active gendisk always has a
request_queue associated with it") the request_queue pointer returned
from bdev_get_queue() shall never be NULL.

Signed-off-by: Xu Wang 
---
 drivers/md/dm-cache-target.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c
index 541c45027cc8..6ab01ff25747 100644
--- a/drivers/md/dm-cache-target.c
+++ b/drivers/md/dm-cache-target.c
@@ -3387,7 +3387,7 @@ static bool origin_dev_supports_discard(struct 
block_device *origin_bdev)
 {
struct request_queue *q = bdev_get_queue(origin_bdev);
 
-   return q && blk_queue_discard(q);
+   return blk_queue_discard(q);
 }
 
 /*
-- 
2.17.1

Re: [PATCH] selftests/kvm: add get_msr_index_features

[Paolo Bonzini]

On 19/03/21 09:07, Emanuele Giuseppe Esposito wrote:


I'm not sure why the original kvm selftests authors decided to do this
internal stuff, but we should either kill that or avoid doing stuff like
this.


I need this include because of the KVM_DEV_PATH macro, to get the kvm_fd.
No other reason for including it in this test.


I'll take care of moving that macro to the non-internal kvm_util.h 
header, thanks.


No need to do anything, I'll send the pull request later today.

Paolo

Re:Re: [PATCH] dma-buf: use wake_up_process() instead of wake_up_state()

[王擎]

>> Using wake_up_process() is more simpler and friendly,
>> and it is more convenient for analysis and statistics
>>
>> Signed-off-by: Wang Qing 
>
>Reviewed-by: Christian König 
>
>Should I pick it up or do you want to push it through some other tree 
>than DRM?

Pick it up just fine, thanks,
WangQing.

>
>Thanks,
>Christian.

Re: [PATCH] MAINTAINERS: Update MCAN MMIO device driver maintainer

[Marc Kleine-Budde]

On 18.03.2021 16:56:34, Pankaj Sharma wrote:
> Update Chandrasekar Ramakrishnan as maintainer for mcan mmio device driver as 
> I
> will be moving to a different role.

Applied to can-next/testing.

regards,
Marc

-- 
Pengutronix e.K. | Marc Kleine-Budde   |
Embedded Linux   | https://www.pengutronix.de  |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917- |


signature.asc
Description: PGP signature

[PATCH] dm persistent data: Remove unused variable ret

[Jiapeng Chong]

Fix the following coccicheck warnings:

./drivers/md/persistent-data/dm-btree-spine.c:188:5-6: Unneeded
variable: "r". Return "0" on line 194.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Chong 
---
 drivers/md/persistent-data/dm-btree-internal.h | 2 +-
 drivers/md/persistent-data/dm-btree-spine.c| 6 ++
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/md/persistent-data/dm-btree-internal.h 
b/drivers/md/persistent-data/dm-btree-internal.h
index fe073d9..d0c5591 100644
--- a/drivers/md/persistent-data/dm-btree-internal.h
+++ b/drivers/md/persistent-data/dm-btree-internal.h
@@ -83,7 +83,7 @@ struct shadow_spine {
 };
 
 void init_shadow_spine(struct shadow_spine *s, struct dm_btree_info *info);
-int exit_shadow_spine(struct shadow_spine *s);
+void exit_shadow_spine(struct shadow_spine *s);
 
 int shadow_step(struct shadow_spine *s, dm_block_t b,
struct dm_btree_value_type *vt);
diff --git a/drivers/md/persistent-data/dm-btree-spine.c 
b/drivers/md/persistent-data/dm-btree-spine.c
index 8a2bfbf..dd2ff3c 100644
--- a/drivers/md/persistent-data/dm-btree-spine.c
+++ b/drivers/md/persistent-data/dm-btree-spine.c
@@ -183,15 +183,13 @@ void init_shadow_spine(struct shadow_spine *s, struct 
dm_btree_info *info)
s->count = 0;
 }
 
-int exit_shadow_spine(struct shadow_spine *s)
+void exit_shadow_spine(struct shadow_spine *s)
 {
-   int r = 0, i;
+   int i;
 
for (i = 0; i < s->count; i++) {
unlock_block(s->info, s->nodes[i]);
}
-
-   return r;
 }
 
 int shadow_step(struct shadow_spine *s, dm_block_t b,
-- 
1.8.3.1

[PATCH] ASoC: fsl_sai: Don't use devm_regmap_init_mmio_clk

[Shengjiu Wang]

When there is power domain bind with bus clock,

The call flow:
devm_regmap_init_mmio_clk
   - clk_prepare()
  - clk_pm_runtime_get()

cause the power domain of clock always be enabled after
regmap_init(). which impact the power consumption.

So use devm_regmap_init_mmio instead of
devm_regmap_init_mmio_clk, then explicitly enable clock when
using by pm_runtime_get(), if CONFIG_PM=n, then
fsl_sai_runtime_resume will be explicitly called.

Signed-off-by: Shengjiu Wang 
Signed-off-by: Viorel Suman 
---
 sound/soc/fsl/fsl_sai.c | 48 +++--
 1 file changed, 32 insertions(+), 16 deletions(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 9e7893f91882..f2c70a31c7bb 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -987,6 +987,9 @@ static int fsl_sai_check_version(struct device *dev)
return 0;
 }
 
+static int fsl_sai_runtime_suspend(struct device *dev);
+static int fsl_sai_runtime_resume(struct device *dev);
+
 static int fsl_sai_probe(struct platform_device *pdev)
 {
struct device_node *np = pdev->dev.of_node;
@@ -1019,24 +1022,21 @@ static int fsl_sai_probe(struct platform_device *pdev)
ARRAY_SIZE(fsl_sai_reg_defaults_ofs8);
}
 
-   sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
-   "bus", base, &fsl_sai_regmap_config);
-
-   /* Compatible with old DTB cases */
-   if (IS_ERR(sai->regmap) && PTR_ERR(sai->regmap) != -EPROBE_DEFER)
-   sai->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
-   "sai", base, &fsl_sai_regmap_config);
+   sai->regmap = devm_regmap_init_mmio(&pdev->dev, base, 
&fsl_sai_regmap_config);
if (IS_ERR(sai->regmap)) {
dev_err(&pdev->dev, "regmap init failed\n");
return PTR_ERR(sai->regmap);
}
 
-   /* No error out for old DTB cases but only mark the clock NULL */
sai->bus_clk = devm_clk_get(&pdev->dev, "bus");
+   /* Compatible with old DTB cases */
+   if (IS_ERR(sai->bus_clk) && PTR_ERR(sai->bus_clk) != -EPROBE_DEFER)
+   sai->bus_clk = devm_clk_get(&pdev->dev, "sai");
if (IS_ERR(sai->bus_clk)) {
dev_err(&pdev->dev, "failed to get bus clock: %ld\n",
PTR_ERR(sai->bus_clk));
-   sai->bus_clk = NULL;
+   /* -EPROBE_DEFER */
+   return PTR_ERR(sai->bus_clk);
}
 
for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {
@@ -1117,6 +1117,18 @@ static int fsl_sai_probe(struct platform_device *pdev)
sai->dma_params_tx.maxburst = FSL_SAI_MAXBURST_TX;
 
platform_set_drvdata(pdev, sai);
+   pm_runtime_enable(&pdev->dev);
+   if (!pm_runtime_enabled(&pdev->dev)) {
+   ret = fsl_sai_runtime_resume(&pdev->dev);
+   if (ret)
+   goto err_pm_disable;
+   }
+
+   ret = pm_runtime_get_sync(&pdev->dev);
+   if (ret < 0) {
+   pm_runtime_put_noidle(&pdev->dev);
+   goto err_pm_get_sync;
+   }
 
/* Get sai version */
ret = fsl_sai_check_version(&pdev->dev);
@@ -1130,26 +1142,30 @@ static int fsl_sai_probe(struct platform_device *pdev)
   FSL_SAI_MCTL_MCLK_EN, FSL_SAI_MCTL_MCLK_EN);
}
 
-   pm_runtime_enable(&pdev->dev);
-   regcache_cache_only(sai->regmap, true);
+   ret = pm_runtime_put_sync(&pdev->dev);
+   if (ret < 0)
+   goto err_pm_get_sync;
 
ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component,
  &sai->cpu_dai_drv, 1);
if (ret)
-   goto err_pm_disable;
+   goto err_pm_get_sync;
 
if (sai->soc_data->use_imx_pcm) {
ret = imx_pcm_dma_init(pdev, IMX_SAI_DMABUF_SIZE);
if (ret)
-   goto err_pm_disable;
+   goto err_pm_get_sync;
} else {
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
if (ret)
-   goto err_pm_disable;
+   goto err_pm_get_sync;
}
 
return ret;
 
+err_pm_get_sync:
+   if (!pm_runtime_status_suspended(&pdev->dev))
+   fsl_sai_runtime_suspend(&pdev->dev);
 err_pm_disable:
pm_runtime_disable(&pdev->dev);
 
@@ -1159,6 +1175,8 @@ static int fsl_sai_probe(struct platform_device *pdev)
 static int fsl_sai_remove(struct platform_device *pdev)
 {
pm_runtime_disable(&pdev->dev);
+   if (!pm_runtime_status_suspended(&pdev->dev))
+   fsl_sai_runtime_suspend(&pdev->dev);
 
return 0;
 }
@@ -1219,7 +1237,6 @@ static const struct of_device_id fsl_sai_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, fsl_sai_ids);
 
-#ifdef CONFIG_PM
 static int fsl_sai_runtime_suspend(struct device *dev)
 {
struct fsl_sai *sai = dev_ge

Re: [PATCH v7 0/5] clk: add driver for the SiFive FU740

[Zong Li]

On Thu, Mar 18, 2021 at 10:07 AM Zong Li  wrote:
>
> On Wed, Mar 17, 2021 at 3:45 AM Andreas Schwab  wrote:
> >
> > On Dez 09 2020, Zong Li wrote:
> >
> > > Add a driver for the SiFive FU740 PRCI IP block, which handles more
> > > clocks than FU540. These patches also refactor the original
> > > implementation by spliting the dependent-code of fu540 and fu740
> > > respectively.
> >
> > That breaks ethernet on the fu540.
> >
>
> I would check that, thanks for the report.
>

Hi Andreas,

Could you please point me out how to test the ethernet from your side?
I had tried to quick test by using iperf and wget, the ethernet seems
to work fine to me.

Thanks.

> > Andreas.
> >
> > --
> > Andreas Schwab, sch...@linux-m68k.org
> > GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
> > "And now for something completely different."

Re: [RESEND 00/53] Rid GPU from W=1 warnings

[Lee Jones]

On Thu, 18 Mar 2021, Daniel Vetter wrote:

> On Wed, Mar 17, 2021 at 9:32 PM Daniel Vetter  wrote:
> >
> > On Wed, Mar 17, 2021 at 9:17 AM Lee Jones  wrote:
> > >
> > > On Thu, 11 Mar 2021, Lee Jones wrote:
> > >
> > > > On Thu, 11 Mar 2021, Daniel Vetter wrote:
> > > >
> > > > > On Mon, Mar 08, 2021 at 09:19:32AM +, Lee Jones wrote:
> > > > > > On Fri, 05 Mar 2021, Roland Scheidegger wrote:
> > > > > >
> > > > > > > The vmwgfx ones look all good to me, so for
> > > > > > > 23-53: Reviewed-by: Roland Scheidegger 
> > > > > > > That said, they were already signed off by Zack, so not sure what
> > > > > > > happened here.
> > > > > >
> > > > > > Yes, they were accepted at one point, then dropped without a reason.
> > > > > >
> > > > > > Since I rebased onto the latest -next, I had to pluck them back out 
> > > > > > of
> > > > > > a previous one.
> > > > >
> > > > > They should show up in linux-next again. We merge patches for next 
> > > > > merge
> > > > > window even during the current merge window, but need to make sure 
> > > > > they
> > > > > don't pollute linux-next. Occasionally the cut off is wrong so patches
> > > > > show up, and then get pulled again.
> > > > >
> > > > > Unfortunately especially the 5.12 merge cycle was very wobbly due to 
> > > > > some
> > > > > confusion here. But your patches should all be in linux-next again 
> > > > > (they
> > > > > are queued up for 5.13 in drm-misc-next, I checked that).
> > > > >
> > > > > Sorry for the confusion here.
> > > >
> > > > Oh, I see.  Well so long as they don't get dropped, I'll be happy.
> > > >
> > > > Thanks for the explanation Daniel
> > >
> > > After rebasing today, all of my GPU patches have remained.  Would
> > > someone be kind enough to check that everything is still in order
> > > please?
> >
> > It's still broken somehow. I've kiced Maxime and Maarten again,
> > they're also on this thread.
> 
> You're patches have made it into drm-next meanwhile, so they should
> show up in linux-next through that tree at least. Except if that one
> also has some trouble.

Thanks for letting me know.

I see some patches made it back in, others didn't.

I'll resend the stragglers - bear with.

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH 01/19] drm/nouveau/nvkm/subdev/bios/init: Demote obvious abuse of kernel-doc

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:584: warning: Function 
parameter or member 'init' not described in 'init_reserved'
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:611: warning: Function 
parameter or member 'init' not described in 'init_done'
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:622: warning: Function 
parameter or member 'init' not described in 'init_io_restrict_prog'
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:659: warning: Function 
parameter or member 'init' not described in 'init_repeat'
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:685: warning: Function 
parameter or member 'init' not described in 'init_io_restrict_pll'
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c:725: warning: Function 
parameter or member 'init' not described in 'init_end_repeat'

NB: Trimmed for brevity (lots of these!)

Cc: Ben Skeggs 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 .../gpu/drm/nouveau/nvkm/subdev/bios/init.c   | 204 ++
 1 file changed, 68 insertions(+), 136 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c 
b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
index 9de74f41dcd2a..5a91dc4e5c8ec 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
@@ -575,9 +575,8 @@ init_tmds_reg(struct nvbios_init *init, u8 tmds)
  * init opcode handlers
  */
 
-/**
+/*
  * init_reserved - stub for various unknown/unused single-byte opcodes
- *
  */
 static void
 init_reserved(struct nvbios_init *init)
@@ -602,9 +601,8 @@ init_reserved(struct nvbios_init *init)
init->offset += length;
 }
 
-/**
+/*
  * INIT_DONE - opcode 0x71
- *
  */
 static void
 init_done(struct nvbios_init *init)
@@ -613,9 +611,8 @@ init_done(struct nvbios_init *init)
init->offset = 0x;
 }
 
-/**
+/*
  * INIT_IO_RESTRICT_PROG - opcode 0x32
- *
  */
 static void
 init_io_restrict_prog(struct nvbios_init *init)
@@ -650,9 +647,8 @@ init_io_restrict_prog(struct nvbios_init *init)
trace("}]\n");
 }
 
-/**
+/*
  * INIT_REPEAT - opcode 0x33
- *
  */
 static void
 init_repeat(struct nvbios_init *init)
@@ -676,9 +672,8 @@ init_repeat(struct nvbios_init *init)
init->repeat = repeat;
 }
 
-/**
+/*
  * INIT_IO_RESTRICT_PLL - opcode 0x34
- *
  */
 static void
 init_io_restrict_pll(struct nvbios_init *init)
@@ -716,9 +711,8 @@ init_io_restrict_pll(struct nvbios_init *init)
trace("}]\n");
 }
 
-/**
+/*
  * INIT_END_REPEAT - opcode 0x36
- *
  */
 static void
 init_end_repeat(struct nvbios_init *init)
@@ -732,9 +726,8 @@ init_end_repeat(struct nvbios_init *init)
}
 }
 
-/**
+/*
  * INIT_COPY - opcode 0x37
- *
  */
 static void
 init_copy(struct nvbios_init *init)
@@ -759,9 +752,8 @@ init_copy(struct nvbios_init *init)
init_wrvgai(init, port, index, data);
 }
 
-/**
+/*
  * INIT_NOT - opcode 0x38
- *
  */
 static void
 init_not(struct nvbios_init *init)
@@ -771,9 +763,8 @@ init_not(struct nvbios_init *init)
init_exec_inv(init);
 }
 
-/**
+/*
  * INIT_IO_FLAG_CONDITION - opcode 0x39
- *
  */
 static void
 init_io_flag_condition(struct nvbios_init *init)
@@ -788,9 +779,8 @@ init_io_flag_condition(struct nvbios_init *init)
init_exec_set(init, false);
 }
 
-/**
+/*
  * INIT_GENERIC_CONDITION - opcode 0x3a
- *
  */
 static void
 init_generic_condition(struct nvbios_init *init)
@@ -840,9 +830,8 @@ init_generic_condition(struct nvbios_init *init)
}
 }
 
-/**
+/*
  * INIT_IO_MASK_OR - opcode 0x3b
- *
  */
 static void
 init_io_mask_or(struct nvbios_init *init)
@@ -859,9 +848,8 @@ init_io_mask_or(struct nvbios_init *init)
init_wrvgai(init, 0x03d4, index, data &= ~(1 << or));
 }
 
-/**
+/*
  * INIT_IO_OR - opcode 0x3c
- *
  */
 static void
 init_io_or(struct nvbios_init *init)
@@ -878,9 +866,8 @@ init_io_or(struct nvbios_init *init)
init_wrvgai(init, 0x03d4, index, data | (1 << or));
 }
 
-/**
+/*
  * INIT_ANDN_REG - opcode 0x47
- *
  */
 static void
 init_andn_reg(struct nvbios_init *init)
@@ -895,9 +882,8 @@ init_andn_reg(struct nvbios_init *init)
init_mask(init, reg, mask, 0);
 }
 
-/**
+/*
  * INIT_OR_REG - opcode 0x48
- *
  */
 static void
 init_or_reg(struct nvbios_init *init)
@@ -912,9 +898,8 @@ init_or_reg(struct nvbios_init *init)
init_mask(init, reg, 0, mask);
 }
 
-/**
+/*
  * INIT_INDEX_ADDRESS_LATCHED - opcode 0x49
- *
  */
 static void
 init_idx_addr_latched(struct nvbios_init *init)
@@ -942,9 +927,8 @@ init_idx_addr_latched(struct nvbios_init *init)
}
 }
 
-/**
+/*
  * INIT_IO_RESTRICT_PLL2 - opcode 0x4a
- *
  */
 static void
 init_io_restrict_pll2(struct nvbios_init *init)
@@ -977,9 +961,8 @@ init_io_restrict_pll2(struct nvbios_init *init)
trace("}]\n");
 }
 
-/**
+/*
  * INIT_PL

[RESEND 00/19] Rid GPU from W=1 warnings

[Lee Jones]

MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This is a resend of the remaining patches.

All of these patches have been sent before.

Lee Jones (19):
  drm/nouveau/nvkm/subdev/bios/init: Demote obvious abuse of kernel-doc
  drm/nouveau/dispnv50/disp: Remove unused variable 'ret'
  drm/msm/dp/dp_display: Remove unused variable 'hpd'
  include: drm: drm_atomic: Make use of 'new_plane_state'
  drm/nouveau/nvkm/subdev/volt/gk20a: Demote non-conformant kernel-doc
headers
  drm/amd/display/dc/calcs/dce_calcs: Move some large variables from the
stack to the heap
  drm/amd/display/dc/calcs/dce_calcs: Remove some large variables from
the stack
  drm/amd/display/dc/dce80/dce80_resource: Make local functions static
  drm/nouveau/nvkm/engine/gr/gf100: Demote non-conformant kernel-doc
header
  drm/nouveau/nouveau_bo: Remove unused variables 'dev'
  drm/nouveau/nouveau_display: Remove set but unused variable 'width'
  drm/nouveau/dispnv04/crtc: Demote non-conforming kernel-doc headers
  drm/nouveau/dispnv50/disp: Remove unused variable 'ret' from function
returning void
  drm/nouveau/dispnv50/headc57d: Make local function 'headc57d_olut'
static
  drm/nouveau/nv50_display: Remove superfluous prototype for local
static functions
  drm/nouveau/dispnv50/disp: Include header containing our prototypes
  drm/nouveau/nouveau_ioc32: File headers are not good candidates for
kernel-doc
  drm/nouveau/nouveau_svm: Remove unused variable 'ret' from void
function
  drm/nouveau/nouveau_ioc32: Demote kernel-doc abuse to standard comment
block

 .../gpu/drm/amd/display/dc/calcs/dce_calcs.c  | 1154 +
 .../drm/amd/display/dc/dce80/dce80_resource.c |   16 +-
 drivers/gpu/drm/msm/dp/dp_display.c   |3 -
 drivers/gpu/drm/nouveau/dispnv04/crtc.c   |4 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c   |   10 +-
 drivers/gpu/drm/nouveau/dispnv50/headc57d.c   |2 +-
 drivers/gpu/drm/nouveau/nouveau_bo.c  |4 -
 drivers/gpu/drm/nouveau/nouveau_display.c |8 +-
 drivers/gpu/drm/nouveau/nouveau_ioc32.c   |4 +-
 drivers/gpu/drm/nouveau/nouveau_svm.c |5 +-
 drivers/gpu/drm/nouveau/nv50_display.h|3 -
 .../gpu/drm/nouveau/nvkm/engine/gr/gf100.c|2 +-
 .../gpu/drm/nouveau/nvkm/subdev/bios/init.c   |  204 +--
 .../gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c  |4 +-
 include/drm/drm_atomic.h  |3 +-
 15 files changed, 692 insertions(+), 734 deletions(-)

Cc: Alex Deucher 
Cc: amd-...@lists.freedesktop.org
Cc: Anthony Koo 
Cc: Ben Skeggs 
Cc: "Christian König" 
Cc: Colin Ian King 
Cc: Daniel Vetter 
Cc: David Airlie 
Cc: dri-de...@lists.freedesktop.org
Cc: freedr...@lists.freedesktop.org
Cc: Harry Wentland 
Cc: Jeremy Kolb 
Cc: Kuogee Hsieh 
Cc: Leo Li 
Cc: linaro-mm-...@lists.linaro.org
Cc: linux-arm-...@vger.kernel.org
Cc: linux-me...@vger.kernel.org
Cc: Lyude Paul 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: nouv...@lists.freedesktop.org
Cc: Rob Clark 
Cc: Sean Paul 
Cc: Sumit Semwal 
Cc: Thomas Zimmermann 
-- 
2.27.0

[PATCH 05/19] drm/nouveau/nvkm/subdev/volt/gk20a: Demote non-conformant kernel-doc headers

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:53: warning: Function 
parameter or member 'speedo' not described in 'gk20a_volt_get_cvb_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:53: warning: Function 
parameter or member 's_scale' not described in 'gk20a_volt_get_cvb_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:53: warning: Function 
parameter or member 'coef' not described in 'gk20a_volt_get_cvb_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:69: warning: Function 
parameter or member 'speedo' not described in 'gk20a_volt_get_cvb_t_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:69: warning: Function 
parameter or member 'temp' not described in 'gk20a_volt_get_cvb_t_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:69: warning: Function 
parameter or member 's_scale' not described in 'gk20a_volt_get_cvb_t_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:69: warning: Function 
parameter or member 't_scale' not described in 'gk20a_volt_get_cvb_t_voltage'
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c:69: warning: Function 
parameter or member 'coef' not described in 'gk20a_volt_get_cvb_t_voltage'

Cc: Ben Skeggs 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c 
b/drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c
index 8c2faa9645111..ccac88da88648 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c
@@ -45,7 +45,7 @@ static const struct cvb_coef gk20a_cvb_coef[] = {
/* 852 */ { 1608418, -21643, -269, 0,763,  -48},
 };
 
-/**
+/*
  * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
  */
 static inline int
@@ -58,7 +58,7 @@ gk20a_volt_get_cvb_voltage(int speedo, int s_scale, const 
struct cvb_coef *coef)
return mv;
 }
 
-/**
+/*
  * cvb_t_mv =
  * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
  * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
-- 
2.27.0

[PATCH 03/19] drm/msm/dp/dp_display: Remove unused variable 'hpd'

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/msm/dp/dp_display.c: In function 
‘dp_display_usbpd_attention_cb’:
 drivers/gpu/drm/msm/dp/dp_display.c:496:19: warning: variable ‘hpd’ set but 
not used [-Wunused-but-set-variable]

Cc: Rob Clark 
Cc: Sean Paul 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: Kuogee Hsieh 
Cc: linux-arm-...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 5a39da6e1eaf2..31bf2a40a9eb2 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -493,7 +493,6 @@ static int dp_display_usbpd_attention_cb(struct device *dev)
int rc = 0;
u32 sink_request;
struct dp_display_private *dp;
-   struct dp_usbpd *hpd;
 
if (!dev) {
DRM_ERROR("invalid dev\n");
@@ -507,8 +506,6 @@ static int dp_display_usbpd_attention_cb(struct device *dev)
return -ENODEV;
}
 
-   hpd = dp->usbpd;
-
/* check for any test request issued by sink */
rc = dp_link_process_request(dp->link);
if (!rc) {
-- 
2.27.0

[PATCH 08/19] drm/amd/display/dc/dce80/dce80_resource: Make local functions static

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:527:17: 
warning: no previous prototype for ‘dce80_aux_engine_create’ 
[-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:565:20: 
warning: no previous prototype for ‘dce80_i2c_hw_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:581:20: 
warning: no previous prototype for ‘dce80_i2c_sw_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:715:22: 
warning: no previous prototype for ‘dce80_link_encoder_create’ 
[-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:754:22: 
warning: no previous prototype for ‘dce80_clock_source_create’ 
[-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:778:6: 
warning: no previous prototype for ‘dce80_clock_source_destroy’ 
[-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:868:6: 
warning: no previous prototype for ‘dce80_validate_bandwidth’ 
[-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:913:16: 
warning: no previous prototype for ‘dce80_validate_global’ 
[-Wmissing-prototypes]

Cc: Harry Wentland 
Cc: Leo Li 
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: Anthony Koo 
Cc: amd-...@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 .../drm/amd/display/dc/dce80/dce80_resource.c| 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 
b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index 612450f992782..725d92e40cd30 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -526,7 +526,7 @@ static struct output_pixel_processor *dce80_opp_create(
return &opp->base;
 }
 
-struct dce_aux *dce80_aux_engine_create(
+static struct dce_aux *dce80_aux_engine_create(
struct dc_context *ctx,
uint32_t inst)
 {
@@ -564,7 +564,7 @@ static const struct dce_i2c_mask i2c_masks = {
I2C_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK)
 };
 
-struct dce_i2c_hw *dce80_i2c_hw_create(
+static struct dce_i2c_hw *dce80_i2c_hw_create(
struct dc_context *ctx,
uint32_t inst)
 {
@@ -580,7 +580,7 @@ struct dce_i2c_hw *dce80_i2c_hw_create(
return dce_i2c_hw;
 }
 
-struct dce_i2c_sw *dce80_i2c_sw_create(
+static struct dce_i2c_sw *dce80_i2c_sw_create(
struct dc_context *ctx)
 {
struct dce_i2c_sw *dce_i2c_sw =
@@ -714,7 +714,7 @@ static const struct encoder_feature_support 
link_enc_feature = {
.flags.bits.IS_TPS3_CAPABLE = true
 };
 
-struct link_encoder *dce80_link_encoder_create(
+static struct link_encoder *dce80_link_encoder_create(
const struct encoder_init_data *enc_init_data)
 {
struct dce110_link_encoder *enc110 =
@@ -753,7 +753,7 @@ static struct panel_cntl *dce80_panel_cntl_create(const 
struct panel_cntl_init_d
return &panel_cntl->base;
 }
 
-struct clock_source *dce80_clock_source_create(
+static struct clock_source *dce80_clock_source_create(
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
@@ -777,7 +777,7 @@ struct clock_source *dce80_clock_source_create(
return NULL;
 }
 
-void dce80_clock_source_destroy(struct clock_source **clk_src)
+static void dce80_clock_source_destroy(struct clock_source **clk_src)
 {
kfree(TO_DCE110_CLK_SRC(*clk_src));
*clk_src = NULL;
@@ -867,7 +867,7 @@ static void dce80_resource_destruct(struct 
dce110_resource_pool *pool)
}
 }
 
-bool dce80_validate_bandwidth(
+static bool dce80_validate_bandwidth(
struct dc *dc,
struct dc_state *context,
bool fast_validate)
@@ -912,7 +912,7 @@ static bool dce80_validate_surface_sets(
return true;
 }
 
-enum dc_status dce80_validate_global(
+static enum dc_status dce80_validate_global(
struct dc *dc,
struct dc_state *context)
 {
-- 
2.27.0

[PATCH 09/19] drm/nouveau/nvkm/engine/gr/gf100: Demote non-conformant kernel-doc header

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:992: warning: Function 
parameter or member 'gr' not described in 'gf100_gr_wait_idle'

Cc: Ben Skeggs 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
index 397ff4fe9df89..69e6008f99196 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -982,7 +982,7 @@ gf100_gr_zbc_init(struct gf100_gr *gr)
}
 }
 
-/**
+/*
  * Wait until GR goes idle. GR is considered idle if it is disabled by the
  * MC (0x200) register, or GR is not busy and a context switch is not in
  * progress.
-- 
2.27.0

[PATCH 02/19] drm/nouveau/dispnv50/disp: Remove unused variable 'ret'

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/nouveau/dispnv50/disp.c:1381:6: warning: variable ‘ret’ set 
but not used [-Wunused-but-set-variable]

Cc: Ben Skeggs 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 196612addfd61..c51efca82ac78 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1410,10 +1410,9 @@ nv50_mstm_prepare(struct nv50_mstm *mstm)
 {
struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
struct drm_encoder *encoder;
-   int ret;
 
NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name);
-   ret = drm_dp_update_payload_part1(&mstm->mgr);
+   drm_dp_update_payload_part1(&mstm->mgr);
 
drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
-- 
2.27.0

[PATCH 13/19] drm/nouveau/dispnv50/disp: Remove unused variable 'ret' from function returning void

[Lee Jones]

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/nouveau/dispnv50/disp.c: In function ‘nv50_mstm_cleanup’:
 drivers/gpu/drm/nouveau/dispnv50/disp.c:1357:6: warning: variable ‘ret’ set 
but not used [-Wunused-but-set-variable]

Cc: Ben Skeggs 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Lee Jones 
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index c51efca82ac78..828f48d5bdd4e 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1386,12 +1386,11 @@ nv50_mstm_cleanup(struct nv50_mstm *mstm)
 {
struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
struct drm_encoder *encoder;
-   int ret;
 
NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name);
-   ret = drm_dp_check_act_status(&mstm->mgr);
+   drm_dp_check_act_status(&mstm->mgr);
 
-   ret = drm_dp_update_payload_part2(&mstm->mgr);
+   drm_dp_update_payload_part2(&mstm->mgr);
 
drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
-- 
2.27.0