[PATCH 1/2] armv8: aarch32: Execute 32-bit Linux for LayerScape platforms

[Alison Wang]

The ARMv8 architecture supports:
1. 64-bit execution state, AArch64.
2. 32-bit execution state, AArch32, that is compatible with previous
versions of the ARM architecture.

LayerScape platforms are compliant with ARMv8 architecture. This patch
is to support running 32-bit Linux kernel for LayerScape platforms.

Verified on LayerScape LS1043ARDB, LS1012ARDB, LS1046ARDB boards.

Signed-off-by: Ebony Zhu 
Signed-off-by: Alison Wang 
---
 arch/arm/Kconfig|  9 +
 arch/arm/mach-imx/Kconfig   | 14 ++
 arch/arm/mach-imx/Makefile  |  4 +++-
 arch/arm/mach-imx/mach-layerscape.c | 23 +++
 4 files changed, 49 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-imx/mach-layerscape.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f0c8068..e8d470e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -294,6 +294,15 @@ config PGTABLE_LEVELS
default 3 if ARM_LPAE
default 2
 
+config ARCH_AARCH32_ES_SUPPORT
+   def_bool n
+   help
+The ARMv8 architecture supports 64-bit execution state, AArch64
+and 32-bit execution state, AArch32, that is compatible with
+previous versions of the ARM architecture.
+
+Enable AArch32 execution state support for ARMv8 architecture.
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0ac05a0..fda4f5f 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -549,6 +549,20 @@ config SOC_LS1021A
help
  This enables support for Freescale LS1021A processor.
 
+config ARCH_LAYERSCAPE_AARCH32
+   bool "Freescale Layerscape SoC AArch32 ES support"
+   select ARCH_AARCH32_ES_SUPPORT
+   select ARM_AMBA
+   select ARM_GIC
+   select ARM_ARCH_TIMER
+   select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+   select PCI_LAYERSCAPE if PCI
+   select PCI_DOMAINS if PCI
+
+   help
+ This enables support for Freescale Layerscape SoC family in
+ in AArch32 execution state.
+
 endif
 
 comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms"
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 737450f..7ded4fa 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -69,7 +69,7 @@ obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
 obj-$(CONFIG_HAVE_IMX_SRC) += src.o
-ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A),)
+ifneq 
($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A)$(CONFIG_ARCH_LAYERSCAPE_AARCH32),)
 AFLAGS_headsmp.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += headsmp.o platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
@@ -96,4 +96,6 @@ obj-$(CONFIG_SOC_VF610) += mach-vf610.o
 
 obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o
 
+obj-$(CONFIG_ARCH_LAYERSCAPE_AARCH32) += mach-layerscape.o
+
 obj-y += devices/
diff --git a/arch/arm/mach-imx/mach-layerscape.c 
b/arch/arm/mach-imx/mach-layerscape.c
new file mode 100644
index 000..acfb2a2
--- /dev/null
+++ b/arch/arm/mach-imx/mach-layerscape.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+
+#include "common.h"
+
+static const char * const layerscape_dt_compat[] __initconst = {
+   "fsl,ls1012a",
+   "fsl,ls1043a",
+   "fsl,ls1046a",
+   NULL,
+};
+
+DT_MACHINE_START(LAYERSCAPE_AARCH32, "Freescale LAYERSCAPE")
+   .dt_compat  = layerscape_dt_compat,
+MACHINE_END
-- 
2.1.0.27.g96db324

[PATCH 2/2] armv8: aarch32: Add SMP support for 32-bit Linux kernel

[Alison Wang]

The patch adds SMP support for running 32-bit Linux kernel for
Layerscape platforms. Spin-table method is used for SMP support.

Signed-off-by: Alison Wang 
Signed-off-by: Chenhui Zhao 
---
 arch/arm/mach-imx/common.h  |  1 +
 arch/arm/mach-imx/mach-layerscape.c |  1 +
 arch/arm/mach-imx/platsmp.c | 49 +
 3 files changed, 51 insertions(+)

diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index c4436d9..6362790 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -152,5 +152,6 @@ static inline void imx_init_l2cache(void) {}
 
 extern const struct smp_operations imx_smp_ops;
 extern const struct smp_operations ls1021a_smp_ops;
+extern const struct smp_operations layerscape_smp_ops;
 
 #endif
diff --git a/arch/arm/mach-imx/mach-layerscape.c 
b/arch/arm/mach-imx/mach-layerscape.c
index acfb2a2..109d488 100644
--- a/arch/arm/mach-imx/mach-layerscape.c
+++ b/arch/arm/mach-imx/mach-layerscape.c
@@ -19,5 +19,6 @@ static const char * const layerscape_dt_compat[] __initconst 
= {
 };
 
 DT_MACHINE_START(LAYERSCAPE_AARCH32, "Freescale LAYERSCAPE")
+   .smp= smp_ops(layerscape_smp_ops),
.dt_compat  = layerscape_dt_compat,
 MACHINE_END
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 711dbbd..e2fc7a2 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -26,6 +27,8 @@
 u32 g_diag_reg;
 static void __iomem *scu_base;
 
+static u64 cpu_release_addr[NR_CPUS];
+
 static struct map_desc scu_io_desc __initdata = {
/* .virtual and .pfn are run-time assigned */
.length = SZ_4K,
@@ -127,3 +130,49 @@ const struct smp_operations ls1021a_smp_ops __initconst = {
.smp_prepare_cpus   = ls1021a_smp_prepare_cpus,
.smp_boot_secondary = ls1021a_boot_secondary,
 };
+
+static int layerscape_smp_boot_secondary(unsigned int cpu,
+struct task_struct *idle)
+{
+   u32 secondary_startup_phys;
+   __le32 __iomem *release_addr;
+
+   secondary_startup_phys = virt_to_phys(secondary_startup);
+
+   release_addr = memremap((u32)cpu_release_addr[cpu], sizeof(u64),
+   MEMREMAP_WB);
+   if (!release_addr)
+   return -ENOMEM;
+
+   writel_relaxed(secondary_startup_phys, release_addr);
+   writel_relaxed(0, release_addr + 1);
+   __cpuc_flush_dcache_area((__force void *)release_addr,
+sizeof(u64));
+
+   sev();
+
+   iounmap(release_addr);
+
+   return 0;
+}
+
+static void layerscape_smp_init_cpus(void)
+{
+   struct device_node *dnt = NULL;
+   unsigned int cpu = 0;
+
+   while ((dnt = of_find_node_by_type(dnt, "cpu"))) {
+   if (of_property_read_u64(dnt, "cpu-release-addr",
+   &cpu_release_addr[cpu])) {
+   pr_err("CPU %d: missing or invalid cpu-release-addr 
property\n",
+   cpu);
+   }
+
+   cpu++;
+   }
+}
+
+const struct smp_operations layerscape_smp_ops __initconst = {
+   .smp_init_cpus  = layerscape_smp_init_cpus,
+   .smp_boot_secondary = layerscape_smp_boot_secondary,
+};
-- 
2.1.0.27.g96db324

[PATCH] arm/arm64: KVM: Add support for ARMv8 AArch32 execution state

[Alison Wang]

The ARMv8 architecture supports two execution state, AArch64 and
AArch32. To support KVM in AArch32 execution state for ARMv8, Cortex-A53
and Cortex-A72 need to be added for target-specific checks.

Signed-off-by: Alison Wang 
---
 arch/arm/include/asm/cputype.h | 2 ++
 arch/arm/kvm/guest.c   | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 754f86f..4f8c632 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -75,6 +75,8 @@
 #define ARM_CPU_PART_CORTEX_A120x4100c0d0
 #define ARM_CPU_PART_CORTEX_A170x4100c0e0
 #define ARM_CPU_PART_CORTEX_A150x4100c0f0
+#define ARM_CPU_PART_CORTEX_A53_AARCH320x4100d030
+#define ARM_CPU_PART_CORTEX_A72_AARCH320x4100d080
 #define ARM_CPU_PART_MASK  0xff00fff0
 
 /* DEC implemented cores */
diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
index 9aca920..462a099 100644
--- a/arch/arm/kvm/guest.c
+++ b/arch/arm/kvm/guest.c
@@ -252,6 +252,8 @@ int __attribute_const__ kvm_target_cpu(void)
 {
switch (read_cpuid_part()) {
case ARM_CPU_PART_CORTEX_A7:
+   case ARM_CPU_PART_CORTEX_A53_AARCH32:
+   case ARM_CPU_PART_CORTEX_A72_AARCH32:
return KVM_ARM_TARGET_CORTEX_A7;
case ARM_CPU_PART_CORTEX_A15:
return KVM_ARM_TARGET_CORTEX_A15;
-- 
2.1.0.27.g96db324

[PATCH] ASoC: sgtl5000: Allow SCLK pad drive strength to be changed

[Alison Wang]

This patch introduces "sclk-strength" property to allow SCLK pad drive
strength to be changed via device tree.

When running playback test on LS1028ARDB, Tx Frame sync error interrupt
will occur sometimes. Some noises also exist. After changing SCLK pad
drive strength to the maximum value, the issues are gone.

Signed-off-by: Alison Wang 
---
 sound/soc/codecs/sgtl5000.c |   19 ++-
 1 files changed, 18 insertions(+), 1 deletions(-)

diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index add18d6..a6a4748 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -116,6 +116,13 @@ enum  {
I2S_LRCLK_STRENGTH_HIGH,
 };
 
+enum  {
+   I2S_SCLK_STRENGTH_DISABLE,
+   I2S_SCLK_STRENGTH_LOW,
+   I2S_SCLK_STRENGTH_MEDIUM,
+   I2S_SCLK_STRENGTH_HIGH,
+};
+
 /* sgtl5000 private structure in codec */
 struct sgtl5000_priv {
int sysclk; /* sysclk rate */
@@ -129,6 +136,7 @@ struct sgtl5000_priv {
u8 micbias_resistor;
u8 micbias_voltage;
u8 lrclk_strength;
+   u8 sclk_strength;
 };
 
 /*
@@ -1302,7 +1310,9 @@ static int sgtl5000_probe(struct snd_soc_component 
*component)
SGTL5000_DAC_MUTE_RIGHT |
SGTL5000_DAC_MUTE_LEFT);
 
-   reg = ((sgtl5000->lrclk_strength) << SGTL5000_PAD_I2S_LRCLK_SHIFT | 
0x5f);
+   reg = ((sgtl5000->lrclk_strength) << SGTL5000_PAD_I2S_LRCLK_SHIFT |
+  (sgtl5000->sclk_strength) << SGTL5000_PAD_I2S_SCLK_SHIFT |
+  0x1f);
snd_soc_component_write(component, SGTL5000_CHIP_PAD_STRENGTH, reg);
 
snd_soc_component_write(component, SGTL5000_CHIP_ANA_CTRL,
@@ -1542,6 +1552,13 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
sgtl5000->lrclk_strength = value;
}
 
+   sgtl5000->sclk_strength = I2S_SCLK_STRENGTH_LOW;
+   if (!of_property_read_u32(np, "sclk-strength", &value)) {
+   if (value > I2S_SCLK_STRENGTH_HIGH)
+   value = I2S_SCLK_STRENGTH_LOW;
+   sgtl5000->sclk_strength = value;
+   }
+
/* Ensure sgtl5000 will start with sane register values */
sgtl5000_fill_defaults(client);
 
-- 
1.7.1

[PATCH v2] ASoC: sgtl5000: Allow SCLK pad drive strength to be changed

[Alison Wang]

This patch introduces "sclk-strength" property to allow SCLK pad drive
strength to be changed via device tree.

When running playback test on LS1028ARDB, Tx Frame sync error interrupt
will occur sometimes. Some noises also exist. After changing SCLK pad
drive strength to the maximum value, the issues are gone.

Signed-off-by: Alison Wang 
---
Change in v2:
 - Add the description about this new property in the dt-bindings.

 .../devicetree/bindings/sound/sgtl5000.txt |9 +
 sound/soc/codecs/sgtl5000.c|   19 ++-
 2 files changed, 27 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/sgtl5000.txt 
b/Documentation/devicetree/bindings/sound/sgtl5000.txt
index 9c58f72..9d9ff51 100644
--- a/Documentation/devicetree/bindings/sound/sgtl5000.txt
+++ b/Documentation/devicetree/bindings/sound/sgtl5000.txt
@@ -37,6 +37,15 @@ VDDIO1.8V2.5V3.3V
 2 =3.33 mA 5.74 mA 8.03  mA
 3 =4.99 mA 8.61 mA 12.05 mA
 
+- sclk-strength: the SCLK pad strength. Possible values are:
+0, 1, 2 and 3 as per the table below:
+
+VDDIO  1.8V2.5V3.3V
+0 =Disable
+1 =1.66 mA 2.87 mA 4.02  mA
+2 =3.33 mA 5.74 mA 8.03  mA
+3 =4.99 mA 8.61 mA 12.05 mA
+
 Example:
 
 sgtl5000: codec@a {
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index add18d6..a6a4748 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -116,6 +116,13 @@ enum  {
I2S_LRCLK_STRENGTH_HIGH,
 };
 
+enum  {
+   I2S_SCLK_STRENGTH_DISABLE,
+   I2S_SCLK_STRENGTH_LOW,
+   I2S_SCLK_STRENGTH_MEDIUM,
+   I2S_SCLK_STRENGTH_HIGH,
+};
+
 /* sgtl5000 private structure in codec */
 struct sgtl5000_priv {
int sysclk; /* sysclk rate */
@@ -129,6 +136,7 @@ struct sgtl5000_priv {
u8 micbias_resistor;
u8 micbias_voltage;
u8 lrclk_strength;
+   u8 sclk_strength;
 };
 
 /*
@@ -1302,7 +1310,9 @@ static int sgtl5000_probe(struct snd_soc_component 
*component)
SGTL5000_DAC_MUTE_RIGHT |
SGTL5000_DAC_MUTE_LEFT);
 
-   reg = ((sgtl5000->lrclk_strength) << SGTL5000_PAD_I2S_LRCLK_SHIFT | 
0x5f);
+   reg = ((sgtl5000->lrclk_strength) << SGTL5000_PAD_I2S_LRCLK_SHIFT |
+  (sgtl5000->sclk_strength) << SGTL5000_PAD_I2S_SCLK_SHIFT |
+  0x1f);
snd_soc_component_write(component, SGTL5000_CHIP_PAD_STRENGTH, reg);
 
snd_soc_component_write(component, SGTL5000_CHIP_ANA_CTRL,
@@ -1542,6 +1552,13 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
sgtl5000->lrclk_strength = value;
}
 
+   sgtl5000->sclk_strength = I2S_SCLK_STRENGTH_LOW;
+   if (!of_property_read_u32(np, "sclk-strength", &value)) {
+   if (value > I2S_SCLK_STRENGTH_HIGH)
+   value = I2S_SCLK_STRENGTH_LOW;
+   sgtl5000->sclk_strength = value;
+   }
+
/* Ensure sgtl5000 will start with sane register values */
sgtl5000_fill_defaults(client);
 
-- 
1.7.1

[PATCH] net/fsl: remove dependency FSL_SOC for Gianfar

[Alison Wang]

CONFIG_GIANFAR is not depended on FSL_SOC, it
can be built on non-PPC platforms.

Signed-off-by: Alison Wang 
---
 drivers/net/ethernet/freescale/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/freescale/Kconfig 
b/drivers/net/ethernet/freescale/Kconfig
index b8de87b..ff76d4e 100644
--- a/drivers/net/ethernet/freescale/Kconfig
+++ b/drivers/net/ethernet/freescale/Kconfig
@@ -83,12 +83,12 @@ config UGETH_TX_ON_DEMAND
 
 config GIANFAR
tristate "Gianfar Ethernet"
-   depends on FSL_SOC
select FSL_PQ_MDIO
select PHYLIB
select CRC32
---help---
  This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
- and MPC86xx family of chips, and the FEC on the 8540.
+ and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
+ on the 8540.
 
 endif # NET_VENDOR_FREESCALE
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] dts: ls1021a: Add dts nodes for eTSEC0, eTSEC1 and eTSEC2

[Alison Wang]

This patch adds generic dts nodes for eTSEC0, eTSEC1 and eTSEC2.

Signed-off-by: Claudiu Manoil 
Signed-off-by: Alison Wang 
---
 arch/arm/boot/dts/ls1021a-qds.dts | 20 ++
 arch/arm/boot/dts/ls1021a-twr.dts | 20 ++
 arch/arm/boot/dts/ls1021a.dtsi| 82 +++
 3 files changed, 122 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index 9c5e16b..f16a061 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -75,6 +75,26 @@
};
 };
 
+&enet0 {
+   tbi-handle = <&tbi0>;
+   phy-handle = <&sgmii_phy1c>;
+   phy-connection-type = "sgmii";
+   status = "okay";
+};
+
+&enet1 {
+   tbi-handle = <&tbi0>;
+   phy-handle = <&sgmii_phy1d>;
+   phy-connection-type = "sgmii";
+   status = "okay";
+};
+
+&enet2 {
+   phy-handle = <&rgmii_phy3>;
+   phy-connection-type = "rgmii-id";
+   status = "okay";
+};
+
 &i2c0 {
status = "okay";
 
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index a2c591e..4b61766 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -73,6 +73,26 @@
};
 };
 
+&enet0 {
+   tbi-handle = <&tbi1>;
+   phy-handle = <&sgmii_phy2>;
+   phy-connection-type = "sgmii";
+   status = "okay";
+};
+
+&enet1 {
+   tbi-handle = <&tbi1>;
+   phy-handle = <&sgmii_phy0>;
+   phy-connection-type = "sgmii";
+   status = "okay";
+};
+
+&enet2 {
+   phy-handle = <&rgmii_phy1>;
+   phy-connection-type = "rgmii-id";
+   status = "okay";
+};
+
 &i2c0 {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c70bb27..6c41b10 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -59,6 +59,9 @@
serial3 = &lpuart3;
serial4 = &lpuart4;
serial5 = &lpuart5;
+   ethernet0 = &enet0;
+   ethernet1 = &enet1;
+   ethernet2 = &enet2;
sysclk = &sysclk;
};
 
@@ -391,6 +394,85 @@
reg = <0x0 0x2d24000 0x0 0x4000>;
};
 
+   enet0: ethernet@2d1 {
+   compatible = "fsl,etsec2";
+   device_type = "network";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   interrupt-parent = <&gic>;
+   model = "eTSEC";
+   fsl,dma-endian-le;
+   fsl,magic-packet;
+   fsl,wake-on-filer;
+   fsl,num_rx_queues = <0x1>;
+   fsl,num_tx_queues = <0x1>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
+   ranges;
+
+   queue-group@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x0 0x2d1 0x0 0x8000>;
+   fsl,rx-bit-map = <0xff>;
+   fsl,tx-bit-map = <0xff>;
+   interrupts = ,
+   ,
+   ;
+   };
+
+   };
+
+   enet1: ethernet@2d5 {
+   compatible = "fsl,etsec2";
+   device_type = "network";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   interrupt-parent = <&gic>;
+   model = "eTSEC";
+   fsl,dma-endian-le;
+   fsl,num_rx_queues = <0x1>;
+   fsl,num_tx_queues = <0x1>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
+   ranges;
+
+   queue-group@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x0 0x2d5 0x0 0x8000>;
+   fsl,rx-bit-map = <0xff>;
+   fsl,tx-bit-map = <0xff>;
+   interrupts = ,
+   ,
+   ;
+

RE: [PATCH v2] arm64: dts: ls1028a: Add Audio DT nodes

[Alison Wang]

> On Wed, Feb 20, 2019 at 04:44:57PM +0800, Alison Wang wrote:
> > This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards.
> >
> > Signed-off-by: Alison Wang 
> > ---
> > Changes in v2:
> >  - Modify some nodes' names.
> >  - Use GIC_SPI and IRQ_TYPE_LEVEL_HIGH.
> >
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |   62
> 
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   63
> +
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi|   57
> +++
> >  3 files changed, 182 insertions(+), 0 deletions(-)
> >  
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > index a8cf92a..de590ec 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > @@ -335,5 +335,62 @@
> >  , 
> >  IRQ_TYPE_LEVEL_HIGH>,
> >  , 
> >  IRQ_TYPE_LEVEL_HIGH>;
> > };
> > +
> > +   edma0: dma-controller@22c {
> 
> Please sort the node in unit-address.
> 
[Alison] Ok, I will update it in v3. Thanks.


Best Regards,
Alison Wang

[PATCH v3] arm64: dts: ls1028a: Add Audio DT nodes

[Alison Wang]

This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards.

Signed-off-by: Alison Wang 
---
Changes in v3:
 - Sort EDMA node in unit-address. 

Changes in v2:
 - Modify some nodes' names.
 - Use GIC_SPI and IRQ_TYPE_LEVEL_HIGH.

 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |   62 
 arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   63 +
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi|   57 +++
 3 files changed, 182 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index 14c79f4..b359068 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -32,6 +32,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone Jack",
+   "Microphone Jack", "Mic Bias",
+   "LINE_IN", "Line In Jack",
+   "Headphone Jack", "HP_OUT",
+   "Speaker Ext", "LINE_OUT";
+
+   simple-audio-card,cpu {
+   sound-dai = <&sai1>;
+   frame-master;
+   bitclock-master;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&sgtl5000>;
+   frame-master;
+   bitclock-master;
+   system-clock-frequency = <2500>;
+   };
+   };
 };
 
 &duart0 {
@@ -89,5 +132,24 @@
reg = <0x57>;
};
};
+
+   i2c@5 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x5>;
+
+   sgtl5000: audio-codec@a {
+   #sound-dai-cells = <0>;
+   compatible = "fsl,sgtl5000";
+   reg = <0xa>;
+   VDDA-supply = <®_1p8v>;
+   VDDIO-supply = <®_1p8v>;
+   clocks = <&sys_mclk>;
+   };
+   };
};
 };
+
+&sai1 {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index fdeb417..50ca51a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -28,6 +28,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x000>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", &

[PATCH] arm64: dts: ls1028a: add pmu dt nodes

[Alison Wang]

This patch adds pmu dt nodes for LS1028A.

Signed-off-by: Alison Wang 
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index a8cf92a..36ef9c5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -89,6 +89,11 @@
  IRQ_TYPE_LEVEL_LOW)>;
};
 
+   pmu {
+   compatible = "arm,armv8-pmuv3";
+   interrupts = ;
+   };
+
gic: interrupt-controller@600 {
compatible= "arm,gic-v3";
#address-cells = <2>;
-- 
1.7.1

[PATCH] audio: sai: Add Power Management support

[Alison Wang]

This patch adds Power Management support for SAI.
Activate regmap cache with REGCACHE_RBTREE, and use
regmap cache code to save and restore registers in
suspend and resume. The Transmit Control Register
(TCSR) and Receive Control Register(RCSR) should
be volatile registers.

Signed-off-by: Alison Wang 
---
 sound/soc/fsl/fsl_sai.c | 33 -
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 7eeb1dd..c7dd953 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -509,9 +509,11 @@ static bool fsl_sai_readable_reg(struct device *dev, 
unsigned int reg)
 static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
 {
switch (reg) {
+   case FSL_SAI_TCSR:
case FSL_SAI_TFR:
-   case FSL_SAI_RFR:
case FSL_SAI_TDR:
+   case FSL_SAI_RCSR:
+   case FSL_SAI_RFR:
case FSL_SAI_RDR:
return true;
default:
@@ -553,6 +555,7 @@ static const struct regmap_config fsl_sai_regmap_config = {
.readable_reg = fsl_sai_readable_reg,
.volatile_reg = fsl_sai_volatile_reg,
.writeable_reg = fsl_sai_writeable_reg,
+   .cache_type = REGCACHE_RBTREE,
 };
 
 static int fsl_sai_probe(struct platform_device *pdev)
@@ -668,6 +671,33 @@ static int fsl_sai_probe(struct platform_device *pdev)
SND_DMAENGINE_PCM_FLAG_NO_RESIDUE);
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int fsl_sai_suspend(struct device *dev)
+{
+   struct fsl_sai *sai = dev_get_drvdata(dev);
+
+   regcache_cache_only(sai->regmap, true);
+   regcache_mark_dirty(sai->regmap);
+
+   return 0;
+}
+
+static int fsl_sai_resume(struct device *dev)
+{
+   struct fsl_sai *sai = dev_get_drvdata(dev);
+
+   /* Restore all registers */
+   regcache_cache_only(sai->regmap, false);
+   regcache_sync(sai->regmap);
+
+   return 0;
+};
+#endif /* CONFIG_PM_SLEEP */
+
+static const struct dev_pm_ops fsl_sai_pm = {
+   SET_SYSTEM_SLEEP_PM_OPS(fsl_sai_suspend, fsl_sai_resume)
+};
+
 static const struct of_device_id fsl_sai_ids[] = {
{ .compatible = "fsl,vf610-sai", },
{ .compatible = "fsl,imx6sx-sai", },
@@ -680,6 +710,7 @@ static struct platform_driver fsl_sai_driver = {
.name = "fsl-sai",
.owner = THIS_MODULE,
.of_match_table = fsl_sai_ids,
+   .pm = &fsl_sai_pm,
},
 };
 module_platform_driver(fsl_sai_driver);
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v2] ARM: configs: Add Freescale LS1021A defconfig

[Alison Wang]

Add Freescale LS1021A initial defconfig file.
The LS1021A SoC is a dual-core Cortex-A7 based processor.

LS1021A has some special configure options against common V7 SOCs,
such as CONFIG_THUMB2_KERNEL, CONFIG_VMSPLIT_2G, CONFIG_VFP...

Enable I2C, LPUART, eDMA, WDT, GIANFAR, Sound, DSPI at default.

Signed-off-by: Haikun Wang 
Signed-off-by: Alison Wang 
---
Changes since v1:
- Enable GIANFAR, Sound and DSPI.

 arch/arm/configs/ls1021a_defconfig | 160 +
 1 file changed, 160 insertions(+)
 create mode 100644 arch/arm/configs/ls1021a_defconfig

diff --git a/arch/arm/configs/ls1021a_defconfig 
b/arch/arm/configs/ls1021a_defconfig
new file mode 100644
index 000..079c48f
--- /dev/null
+++ b/arch/arm/configs/ls1021a_defconfig
@@ -0,0 +1,160 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLK_CMDLINE_PARSER=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_LS1021A=y
+CONFIG_ARM_LPAE=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_SMP=y
+CONFIG_VMSPLIT_2G=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_THUMB2_KERNEL=y
+CONFIG_HIGHMEM=y
+CONFIG_CLEANCACHE=y
+CONFIG_FRONTSWAP=y
+CONFIG_CMDLINE="console=ttyS0,115200"
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_MROUTE=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_UDP_DIAG=m
+CONFIG_NETFILTER=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=256000
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_ATA=y
+CONFIG_NETDEVICES=y
+CONFIG_GIANFAR=y
+CONFIG_VITESSE_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_INA2XX=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+CONFIG_SND=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CLK_QORIQ=y
+CONFIG_MEMORY=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] ARM: ls1021a: add platform notifier for dma-coherent requirement

[Alison Wang]

This patch adds platform notifier for dma-coherent requirement.
Structure arm_coherent_dma_ops is used instead of arm_dma_ops.

Signed-off-by: Alison Wang 
---
 arch/arm/mach-imx/mach-ls1021a.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c
index b89c858..6bfc71b 100644
--- a/arch/arm/mach-imx/mach-ls1021a.c
+++ b/arch/arm/mach-imx/mach-ls1021a.c
@@ -7,10 +7,39 @@
  * (at your option) any later version.
  */
 
+#include 
+#include 
 #include 
 
 #include "common.h"
 
+static int ls1021a_platform_notifier(struct notifier_block *nb,
+ unsigned long event, void *__dev)
+{
+   struct device *dev = __dev;
+
+   if (event != BUS_NOTIFY_ADD_DEVICE)
+   return NOTIFY_DONE;
+
+   if (of_device_is_compatible(dev->of_node, "fsl,etsec2"))
+   set_dma_ops(dev, &arm_coherent_dma_ops);
+   else if (of_property_read_bool(dev->of_node, "dma-coherent"))
+   set_dma_ops(dev, &arm_coherent_dma_ops);
+
+   return NOTIFY_OK;
+}
+
+static struct notifier_block ls1021a_platform_nb = {
+   .notifier_call = ls1021a_platform_notifier,
+};
+
+static void __init ls1021a_init_machine(void)
+{
+   bus_register_notifier(&platform_bus_type, &ls1021a_platform_nb);
+
+   of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
 static const char * const ls1021a_dt_compat[] __initconst = {
"fsl,ls1021a",
NULL,
@@ -18,5 +47,6 @@ static const char * const ls1021a_dt_compat[] __initconst = {
 
 DT_MACHINE_START(LS1021A, "Freescale LS1021A")
.smp= smp_ops(ls1021a_smp_ops),
+   .init_machine   = ls1021a_init_machine,
.dt_compat  = ls1021a_dt_compat,
 MACHINE_END
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v3] ARM: configs: Add Freescale LS1021A defconfig

[Alison Wang]

Add Freescale LS1021A initial defconfig file.
The LS1021A SoC is a dual-core Cortex-A7 based processor.

LS1021A has some special configure options against common V7 SOCs,
such as CONFIG_THUMB2_KERNEL, CONFIG_VMSPLIT_2G, CONFIG_VFP...

Enable I2C, LPUART, eDMA, WDT, GIANFAR, Sound, DSPI at default.

Signed-off-by: Haikun Wang 
Signed-off-by: Alison Wang 
---
Changes since v2:
- Enable PSCI, as PSCI is enabled in u-boot.
Changes since v1:
- Enable GIANFAR, Sound and DSPI.

 arch/arm/configs/ls1021a_defconfig | 161 +
 1 file changed, 161 insertions(+)
 create mode 100644 arch/arm/configs/ls1021a_defconfig

diff --git a/arch/arm/configs/ls1021a_defconfig 
b/arch/arm/configs/ls1021a_defconfig
new file mode 100644
index 000..5576f67
--- /dev/null
+++ b/arch/arm/configs/ls1021a_defconfig
@@ -0,0 +1,161 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLK_CMDLINE_PARSER=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_LS1021A=y
+CONFIG_ARM_LPAE=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_SMP=y
+CONFIG_VMSPLIT_2G=y
+CONFIG_ARM_PSCI=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_THUMB2_KERNEL=y
+CONFIG_HIGHMEM=y
+CONFIG_CLEANCACHE=y
+CONFIG_FRONTSWAP=y
+CONFIG_CMDLINE="console=ttyS0,115200"
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_MROUTE=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_UDP_DIAG=m
+CONFIG_NETFILTER=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=256000
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_ATA=y
+CONFIG_NETDEVICES=y
+CONFIG_GIANFAR=y
+CONFIG_VITESSE_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_INA2XX=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+CONFIG_SND=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CLK_QORIQ=y
+CONFIG_MEMORY=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] arm: kernel: utilize hrtimer based broadcast

[Alison Wang]

Hrtimer based broadcast is used on ARM platform. It can be
registered as the tick broadcast device in the absence of
a real external clock device.

Signed-off-by: Alison Wang 
---
 arch/arm/kernel/time.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index a66e37e..a9bc73c 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -12,6 +12,7 @@
  *  reading the RTC at bootup, etc...
  */
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -121,5 +122,7 @@ void __init time_init(void)
of_clk_init(NULL);
 #endif
clocksource_of_init();
+
+   tick_setup_hrtimer_broadcast();
}
 }
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] ARM: ls1021a: Add dma-coherent property for eTSEC nodes

[Alison Wang]

This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.

Signed-off-by: Alison Wang 
Signed-off-by: Shawn Guo 
---
 arch/arm/boot/dts/ls1021a.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496..e1a16ed 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -405,6 +405,7 @@
model = "eTSEC";
fsl,magic-packet;
ranges;
+   dma-coherent;
 
queue-group@2d1 {
#address-cells = <2>;
@@ -433,6 +434,7 @@
interrupt-parent = <&gic>;
model = "eTSEC";
ranges;
+   dma-coherent;
 
queue-group@2d5  {
#address-cells = <2>;
@@ -461,6 +463,7 @@
interrupt-parent = <&gic>;
model = "eTSEC";
ranges;
+   dma-coherent;
 
queue-group@2d9  {
#address-cells = <2>;
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v2] audio: sai: Add Power Management support

[Alison Wang]

This patch adds Power Management support for SAI.
Activate regmap cache with REGCACHE_FLAT, and use
regmap cache code to save and restore registers in
suspend and resume. The Transmit Control Register
(TCSR) and Receive Control Register(RCSR) should
be volatile registers.

Signed-off-by: Alison Wang 
---
Changes since v1:
- Use REGCACHE_FLAT instead of REGCACHE_RBTREE.
- Use SIMPLE_DEV_PM_OPS to simplify the code. 

 sound/soc/fsl/fsl_sai.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index a18fd92..030f71e 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -637,9 +637,11 @@ static bool fsl_sai_readable_reg(struct device *dev, 
unsigned int reg)
 static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
 {
switch (reg) {
+   case FSL_SAI_TCSR:
case FSL_SAI_TFR:
-   case FSL_SAI_RFR:
case FSL_SAI_TDR:
+   case FSL_SAI_RCSR:
+   case FSL_SAI_RFR:
case FSL_SAI_RDR:
return true;
default:
@@ -681,6 +683,7 @@ static const struct regmap_config fsl_sai_regmap_config = {
.readable_reg = fsl_sai_readable_reg,
.volatile_reg = fsl_sai_volatile_reg,
.writeable_reg = fsl_sai_writeable_reg,
+   .cache_type = REGCACHE_FLAT,
 };
 
 static int fsl_sai_probe(struct platform_device *pdev)
@@ -796,6 +799,31 @@ static int fsl_sai_probe(struct platform_device *pdev)
return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int fsl_sai_suspend(struct device *dev)
+{
+   struct fsl_sai *sai = dev_get_drvdata(dev);
+
+   regcache_cache_only(sai->regmap, true);
+   regcache_mark_dirty(sai->regmap);
+
+   return 0;
+}
+
+static int fsl_sai_resume(struct device *dev)
+{
+   struct fsl_sai *sai = dev_get_drvdata(dev);
+
+   /* Restore all registers */
+   regcache_cache_only(sai->regmap, false);
+   regcache_sync(sai->regmap);
+
+   return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static SIMPLE_DEV_PM_OPS(fsl_sai_pm, fsl_sai_suspend, fsl_sai_resume);
+
 static const struct of_device_id fsl_sai_ids[] = {
{ .compatible = "fsl,vf610-sai", },
{ .compatible = "fsl,imx6sx-sai", },
@@ -807,6 +835,7 @@ static struct platform_driver fsl_sai_driver = {
.driver = {
.name = "fsl-sai",
.of_match_table = fsl_sai_ids,
+   .pm = &fsl_sai_pm,
},
 };
 module_platform_driver(fsl_sai_driver);
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] ARM: multi_v7_defconfig: Enable some drivers for LS1021A

[Alison Wang]

This patch enables some drivers for LS1021A, such as
GIANFAR, WATCHDOG, AUDIO, QSPI, I2C, ESDHC, EDMA, FTM.
QorIQ Clock Framework and Ramdisk support is also enabled.

Signed-off-by: Alison Wang 
---
 arch/arm/configs/multi_v7_defconfig | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/configs/multi_v7_defconfig 
b/arch/arm/configs/multi_v7_defconfig
index f6a2557..95e725c 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -128,6 +128,7 @@ CONFIG_KEXEC=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_STAT_DETAILS=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_QORIQ_CPUFREQ=y
 CONFIG_CPU_IDLE=y
 CONFIG_ARM_CPUIDLE=y
 CONFIG_NEON=y
@@ -182,8 +183,11 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_MTD_NAND_BRCMNAND=y
 CONFIG_MTD_NAND_DAVINCI=y
 CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_FSL_QUADSPI=y
 CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
 CONFIG_AD525X_DPOT=y
 CONFIG_AD525X_DPOT_I2C=y
 CONFIG_ATMEL_TCLIB=y
@@ -210,6 +214,7 @@ CONFIG_HIX5HD2_GMAC=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_MACB=y
 CONFIG_NET_CALXEDA_XGMAC=y
+CONFIG_GIANFAR=y
 CONFIG_IGB=y
 CONFIG_MV643XX_ETH=y
 CONFIG_MVNETA=y
@@ -226,6 +231,7 @@ CONFIG_MARVELL_PHY=y
 CONFIG_SMSC_PHY=y
 CONFIG_BROADCOM_PHY=y
 CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
 CONFIG_MICREL_PHY=y
 CONFIG_FIXED_PHY=y
 CONFIG_USB_PEGASUS=y
@@ -312,6 +318,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_I2C_DIGICOLOR=m
 CONFIG_I2C_GPIO=m
 CONFIG_I2C_EXYNOS5=y
+CONFIG_I2C_IMX=y
 CONFIG_I2C_MV64XXX=y
 CONFIG_I2C_RIIC=y
 CONFIG_I2C_RK3X=y
@@ -330,6 +337,7 @@ CONFIG_SPI=y
 CONFIG_SPI_ATMEL=m
 CONFIG_SPI_CADENCE=y
 CONFIG_SPI_DAVINCI=y
+CONFIG_SPI_FSL_DSPI=y
 CONFIG_SPI_OMAP24XX=y
 CONFIG_SPI_ORION=y
 CONFIG_SPI_PL022=y
@@ -405,6 +413,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
 CONFIG_ORION_WATCHDOG=y
 CONFIG_ST_LPC_WATCHDOG=y
 CONFIG_SUNXI_WATCHDOG=y
+CONFIG_IMX2_WDT=y
 CONFIG_TEGRA_WATCHDOG=m
 CONFIG_MESON_WATCHDOG=y
 CONFIG_DIGICOLOR_WATCHDOG=y
@@ -525,6 +534,7 @@ CONFIG_SND_USB_AUDIO=y
 CONFIG_SND_SOC=m
 CONFIG_SND_ATMEL_SOC=m
 CONFIG_SND_ATMEL_SOC_WM8904=m
+CONFIG_SND_SOC_FSL_SAI=m
 CONFIG_SND_SOC_SH4_FSI=m
 CONFIG_SND_SOC_RCAR=m
 CONFIG_SND_SOC_RSRC_CARD=m
@@ -537,6 +547,7 @@ CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
 CONFIG_SND_SOC_TEGRA_ALC5632=m
 CONFIG_SND_SOC_TEGRA_MAX98090=m
 CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_SGTL5000=m
 CONFIG_SND_SOC_WM8978=m
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -577,6 +588,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_OF_ARASAN=y
 CONFIG_MMC_SDHCI_OF_AT91=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SDHCI_DOVE=y
 CONFIG_MMC_SDHCI_TEGRA=y
@@ -653,6 +665,7 @@ CONFIG_DMADEVICES=y
 CONFIG_DW_DMAC=y
 CONFIG_AT_HDMAC=y
 CONFIG_AT_XDMAC=y
+CONFIG_FSL_EDMA=y
 CONFIG_MV_XOR=y
 CONFIG_TEGRA20_APB_DMA=y
 CONFIG_SH_DMAE=y
@@ -712,6 +725,7 @@ CONFIG_AK8975=y
 CONFIG_PWM=y
 CONFIG_PWM_ATMEL=m
 CONFIG_PWM_ATMEL_TCB=m
+CONFIG_PWM_FSL_FTM=y
 CONFIG_PWM_RENESAS_TPU=y
 CONFIG_PWM_ROCKCHIP=m
 CONFIG_PWM_SAMSUNG=m
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] ARM: add v7 LPAE multi-platform defconfig

[Alison Wang]

v7 LPAE multi-platform defconfig is based on v7 multi-platform
defconfig and adds LPAE support.

This defconfig is verified on LS1021A which enables GIANFAR,
I2C, WATCHDOG, AUDIO, EDMA and DSPI drivers, etc.

Signed-off-by: Alison Wang 
---
 arch/arm/configs/multi_v7_lpae_defconfig | 168 +++
 1 file changed, 168 insertions(+)
 create mode 100644 arch/arm/configs/multi_v7_lpae_defconfig

diff --git a/arch/arm/configs/multi_v7_lpae_defconfig 
b/arch/arm/configs/multi_v7_lpae_defconfig
new file mode 100644
index 000..65876d0
--- /dev/null
+++ b/arch/arm/configs/multi_v7_lpae_defconfig
@@ -0,0 +1,168 @@
+CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_CGROUPS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_CMDLINE_PARTITION=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_LS1021A=y
+CONFIG_ARM_LPAE=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCI_LAYERSCAPE=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=16
+CONFIG_ARM_PSCI=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_CMA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_CAN=y
+CONFIG_CAN_FLEXCAN=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=256000
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_SATA_SIL24=y
+CONFIG_NETDEVICES=y
+CONFIG_MACB=y
+CONFIG_GIANFAR=y
+CONFIG_E1000E=y
+CONFIG_AT803X_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_DRM=y
+CONFIG_DRM_FSL_DCU=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CLK_QORIQ=y
+CONFIG_MEMORY=y
+CONFIG_PWM=y
+CONFIG_PWM_FSL_FTM=y
+CONFIG_GENERIC_PHY=y
+CONFIG_EXT4_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM_NEON=m
+CONFIG_CRYPTO_SHA1_ARM_CE=m
+CONFIG_CRYPTO_SHA2_ARM_CE=m
+CONFIG_CRYPTO_SHA512_ARM=m
+CONFIG_CRYPTO_AES_ARM_BS=m
+CONFIG_CRYPTO_AES_ARM_CE=m
+CONFIG_CRYPTO_GHASH_ARM_CE=m
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] dts: ls1021a: audio: Add dts nodes for audio on LS1021A

[Alison Wang]

This patch adds dts nodes for audio on LS1021A.

Signed-off-by: Alison Wang 
---
 arch/arm/boot/dts/ls1021a-qds.dts | 71 +++
 arch/arm/boot/dts/ls1021a-twr.dts | 63 ++
 arch/arm/boot/dts/ls1021a.dtsi| 14 
 3 files changed, 142 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index f16a061..9533f1d 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -58,6 +58,57 @@
enet0_sgmii_phy = &sgmii_phy1c;
enet1_sgmii_phy = &sgmii_phy1d;
};
+
+   clocks {
+   sys_mclk: clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <24576000>;
+   };
+   };
+
+   regulators {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg_3p3v: regulator@0 {
+   compatible = "regulator-fixed";
+   reg = <0>;
+   regulator-name = "3P3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone Jack",
+   "Microphone Jack", "Mic Bias",
+   "LINE_IN", "Line In Jack",
+   "Headphone Jack", "HP_OUT",
+   "Speaker Ext", "LINE_OUT";
+
+   simple-audio-card,cpu {
+   sound-dai = <&sai2>;
+   frame-master;
+   bitclock-master;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&codec>;
+   frame-master;
+   bitclock-master;
+   };
+   };
 };
 
 &dspi0 {
@@ -99,6 +150,7 @@
status = "okay";
 
pca9547: mux@77 {
+   compatible = "nxp,pca9547";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
@@ -153,6 +205,21 @@
reg = <0x4c>;
};
};
+
+   i2c@4 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x4>;
+
+   codec: sgtl5000@2a {
+   #sound-dai-cells = <0>;
+   compatible = "fsl,sgtl5000";
+   reg = <0x2a>;
+   VDDA-supply = <®_3p3v>;
+   VDDIO-supply = <®_3p3v>;
+   clocks = <&sys_mclk 1>;
+   };
+   };
};
 };
 
@@ -251,6 +318,10 @@
};
 };
 
+&sai2 {
+   status = "okay";
+};
+
 &uart0 {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index 4b61766..a0d9ad6 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -56,6 +56,57 @@
enet0_sgmii_phy = &sgmii_phy2;
enet1_sgmii_phy = &sgmii_phy0;
};
+
+   clocks {
+   sys_mclk: clock {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <24576000>;
+   };
+   };
+
+   regulators {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg_3p3v: regulator@0 {
+   compatible = "regulator-fixed";
+   reg = <0>;
+   regulator-name = "3P3V";
+   regulator-min-microvolt = <330>

[RFC PATCH] ARM: add v7 LPAE multi-platform defconfig

[Alison Wang]

v7 LPAE multi-platform defconfig is based on v7 multi-platform
defconfig and adds LPAE support.

The platforms based on Cortex-A7/A12/A15/A17, PJ4B, Krait are
also enabled in this defconfig. But Cortex-A5/A8/A9, Scorpion
and PJ4 are removed.

This defconfig is verified on LS1021A which enables GIANFAR,
I2C, WATCHDOG, AUDIO, EDMA and DSPI drivers, etc.

The other platforms need to be verified by the platform
maintainers too.

Signed-off-by: Alison Wang 
---
 arch/arm/configs/multi_v7_lpae_defconfig | 597 +++
 1 file changed, 597 insertions(+)
 create mode 100644 arch/arm/configs/multi_v7_lpae_defconfig

diff --git a/arch/arm/configs/multi_v7_lpae_defconfig 
b/arch/arm/configs/multi_v7_lpae_defconfig
new file mode 100644
index 000..ce20a27
--- /dev/null
+++ b/arch/arm/configs/multi_v7_lpae_defconfig
@@ -0,0 +1,597 @@
+CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_CGROUPS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_CMDLINE_PARTITION=y
+CONFIG_ARCH_VIRT=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_MACH_ARMADA_XP=y
+CONFIG_ARCH_ALPINE=y
+CONFIG_ARCH_BERLIN=y
+CONFIG_MACH_BERLIN_BG2=y
+CONFIG_MACH_BERLIN_BG2CD=y
+CONFIG_MACH_BERLIN_BG2Q=y
+CONFIG_ARCH_HIGHBANK=y
+CONFIG_ARCH_HISI=y
+CONFIG_ARCH_HIP04=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_IMX7D=y
+CONFIG_SOC_LS1021A=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_SOC_OMAP5=y
+CONFIG_SOC_DRA7XX=y
+# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
+# CONFIG_SOC_HAS_REALTIME_COUNTER is not set
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_MSM8X60=y
+CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
+CONFIG_ARCH_EXYNOS=y
+# CONFIG_ARCH_EXYNOS4 is not set
+CONFIG_EXYNOS5420_MCPM=y
+CONFIG_ARCH_SHMOBILE_MULTI=y
+CONFIG_ARCH_R8A73A4=y
+CONFIG_ARCH_R8A7791=y
+CONFIG_ARCH_R8A7793=y
+CONFIG_ARCH_R8A7794=y
+CONFIG_ARCH_SUNXI=y
+# CONFIG_MACH_SUN4I is not set
+# CONFIG_MACH_SUN5I is not set
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_TEGRA_114_SOC=y
+CONFIG_ARCH_TEGRA_124_SOC=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VEXPRESS_TC2_PM=y
+CONFIG_ARM_LPAE=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MVEBU=y
+CONFIG_PCI_TEGRA=y
+CONFIG_PCI_RCAR_GEN2=y
+CONFIG_PCI_RCAR_GEN2_PCIE=y
+CONFIG_PCI_KEYSTONE=y
+CONFIG_PCI_LAYERSCAPE=y
+CONFIG_PCIE_IPROC=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=16
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_CMA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_QORIQ_CPUFREQ=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_ARM_EXYNOS_CPUIDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_CAN=y
+CONFIG_CAN_SUN4I=y
+CONFIG_CAN_MCP251X=y
+CONFIG_BT=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_GPIO=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=64
+CONFIG_OMAP_OCP2SCP=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_BRCMNAND=y
+CONFIG_MTD_NAND_DAVINCI=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=256000
+CONFIG_AD525X_DPOT=y
+CONFIG_AD525X_DPOT_I2C=y
+CONFIG_ICS932S401=y
+CONFIG_APDS9802ALS=y
+CONFIG_ISL29003=y
+CONFIG_EEPROM_AT24=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_SUNXI=y
+CONFIG_AHCI_TEGRA=y
+CONFIG_SATA_HIGHBANK=y
+CONFIG_SATA_MV=y
+CONFIG_SATA_RCAR=y
+CONFIG_NETDEVICES=y
+CONFIG_SUN4I_EMAC=y
+CONFIG_MACB=y
+CONFIG_NET_CALXEDA_XGMAC=y
+CONFIG_GIANFAR=y
+CONFIG_HIX5HD2_GMAC=y
+CONFIG_IGB=y
+CONFIG_MV643XX_ETH=y
+CONFIG_MVNETA=y
+CONFIG_PXA168_ETH=m
+CONFIG_KS8851=y
+CONFIG_R8169=y
+CONFIG_SH_ETH=y
+CONFIG_SMSC911X=y
+CONFIG_STMMAC_ETH=y
+CONFIG_TI_CPSW=y
+CONFIG_AT803X_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_USB_PEGASUS=y
+CONFIG_USB_RTL8152=m
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_SMSC75XX=y
+CONFIG_USB_NET_SMSC95XX=y
+CONFIG_BRCMFMAC=m
+CONFIG_RT2X00=m
+CONFIG_RT2800USB=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_INPUT_JOYDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_QT1070=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_TEGRA=y
+CONFIG_KEYBOARD_SAMSUNG=y

RE: [PATCH] arm64: dts: ls1028a: Add Audio DT nodes

[Alison Wang]

Hi, Shawn,

> On Wed, Jan 23, 2019 at 01:21:35PM +0800, Alison Wang wrote:
> > This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards.
> >
> > Signed-off-by: Alison Wang 
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |   62
> 
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   63
> +
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi|   57
> +++
> >  3 files changed, 182 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> > index 14c79f4..139728e 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> > @@ -32,6 +32,49 @@
> > device_type = "memory";
> > reg = <0x0 0x8000 0x1 0x>;
> > };
> > +
> > +   sys_mclk: clock-mclk {
> > +   compatible = "fixed-clock";
> > +   #clock-cells = <0>;
> > +   clock-frequency = <2500>;
> > +   };
> > +
> > +   reg_1p8v: regulator-1p8v {
> > +   compatible = "regulator-fixed";
> > +   regulator-name = "1P8V";
> > +   regulator-min-microvolt = <180>;
> > +   regulator-max-microvolt = <180>;
> > +   regulator-always-on;
> > +   };
> > +
> > 
> > +
> > +   codec: sgtl5000@a {
> > +   #sound-dai-cells = <0>;
> > +   compatible = "fsl,sgtl5000";
> > +   reg = <0xa>;
> > +   VDDA-supply = <®_1p8v>;
> > +   VDDIO-supply = <®_1p8v>;
> > +   clocks = <&sys_mclk>;
> > +   sclk-strength = <3>;
> 
> What is this property?
[Alison] It is a new property. I have submitted a patch for this new property 
https://lkml.org/lkml/2018/12/25/123. This patch is already merged in 
linux-next.

For other items you mentioned, I will modify them in v2. Thanks a lot for your 
review.


Best Regards,
Alison Wang

[PATCH v2] arm64: dts: ls1028a: Add Audio DT nodes

[Alison Wang]

This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards.

Signed-off-by: Alison Wang 
---
Changes in v2:
 - Modify some nodes' names.
 - Use GIC_SPI and IRQ_TYPE_LEVEL_HIGH.

 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |   62 
 arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   63 +
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi|   57 +++
 3 files changed, 182 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index 14c79f4..b359068 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -32,6 +32,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone Jack",
+   "Microphone Jack", "Mic Bias",
+   "LINE_IN", "Line In Jack",
+   "Headphone Jack", "HP_OUT",
+   "Speaker Ext", "LINE_OUT";
+
+   simple-audio-card,cpu {
+   sound-dai = <&sai1>;
+   frame-master;
+   bitclock-master;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&sgtl5000>;
+   frame-master;
+   bitclock-master;
+   system-clock-frequency = <2500>;
+   };
+   };
 };
 
 &duart0 {
@@ -89,5 +132,24 @@
reg = <0x57>;
};
};
+
+   i2c@5 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x5>;
+
+   sgtl5000: audio-codec@a {
+   #sound-dai-cells = <0>;
+   compatible = "fsl,sgtl5000";
+   reg = <0xa>;
+   VDDA-supply = <®_1p8v>;
+   VDDIO-supply = <®_1p8v>;
+   clocks = <&sys_mclk>;
+   };
+   };
};
 };
+
+&sai1 {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index fdeb417..50ca51a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -28,6 +28,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x000>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-a

[PATCH] arm64: dts: ls1028a: Add Audio DT nodes

[Alison Wang]

This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards.

Signed-off-by: Alison Wang 
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |   62 
 arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |   63 +
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi|   57 +++
 3 files changed, 182 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index 14c79f4..139728e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -32,6 +32,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone Jack",
+   "Microphone Jack", "Mic Bias",
+   "LINE_IN", "Line In Jack",
+   "Headphone Jack", "HP_OUT",
+   "Speaker Ext", "LINE_OUT";
+
+   simple-audio-card,cpu {
+   sound-dai = <&sai1>;
+   frame-master;
+   bitclock-master;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&codec>;
+   frame-master;
+   bitclock-master;
+   system-clock-frequency = <2500>;
+   };
+   };
 };
 
 &duart0 {
@@ -89,5 +132,24 @@
reg = <0x57>;
};
};
+
+   i2c@5 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x5>;
+
+   codec: sgtl5000@a {
+   #sound-dai-cells = <0>;
+   compatible = "fsl,sgtl5000";
+   reg = <0xa>;
+   VDDA-supply = <®_1p8v>;
+   VDDIO-supply = <®_1p8v>;
+   clocks = <&sys_mclk>;
+   };
+   };
};
 };
+
+&sai1 {
+   status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index fdeb417..1b3d5e3 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -28,6 +28,49 @@
device_type = "memory";
reg = <0x0 0x8000 0x1 0x000>;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2500>;
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "1P8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-always-on;
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone J

RE: [PATCH] arm64: dts: ls1028a: add pmu dt nodes

[Alison Wang]

Hi, Shawn,

> On Wed, Feb 27, 2019 at 09:57:52AM +0800, Alison Wang wrote:
> > This patch adds pmu dt nodes for LS1028A.
> >
> > Signed-off-by: Alison Wang 
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |5 +
> >  1 files changed, 5 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > index a8cf92a..36ef9c5 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > @@ -89,6 +89,11 @@
> >   IRQ_TYPE_LEVEL_LOW)>;
> > };
> >
> > +   pmu {
> > +   compatible = "arm,armv8-pmuv3";
> 
> Shouldn't we use "arm,cortex-a72-pmu" as compatible for better?
> 
[Alison] Yes, it is better as compatible. I will change it in v2.
Thanks.


Best Regards,
Alison Wang

> Shawn
> 
> > +   interrupts = ;
> > +   };
> > +
> > gic: interrupt-controller@600 {
> > compatible= "arm,gic-v3";
> > #address-cells = <2>;
> > --
> > 1.7.1
> >

[PATCH v2] arm64: dts: ls1028a: Add pmu dt nodes

[Alison Wang]

This patch adds pmu dt nodes for LS1028A.

Signed-off-by: Alison Wang 
---
Changes in v2:
  - Update compatible property.

 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 2896bbc..b1cd5fd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -89,6 +89,11 @@
  IRQ_TYPE_LEVEL_LOW)>;
};
 
+   pmu {
+   compatible = "arm,cortex-a72-pmu";
+   interrupts = ;
+   };
+
gic: interrupt-controller@600 {
compatible= "arm,gic-v3";
#address-cells = <2>;
-- 
1.7.1

RE: [PATCH v2 2/2] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

> On 01/04/2017 02:46 AM, Alison Wang wrote:
> >> On 01/03/2017 03:41 AM, Alison Wang wrote:
> >>> As NAND support for Freescale/NXP IFC controller is available on
> >>> LS1021A, the dependency for LS1021A is added.
> >>
> >> Does LS stand for LayerScape ? Yes it does. So why does
> >> ARCH_LAYERSCAPE not cover LS1021 ?
> > [Alison Wang] LS1021A is an earlier product and is not compatible
> with later Layerscape architecture. So ARCH_LAYERSCAPE can't cover
> LS1021A.
> 
> Ah ok, I see. That information would be useful in the commit message ;-)
> 
[Alison Wang] Ok. :)
> >>
> >>> Signed-off-by: Alison Wang 
> >>> ---
> >>> Changes in v2:
> >>> - None
> >>>
> >>>  drivers/mtd/nand/Kconfig | 2 +-
> >>>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> >> index
> >>> 353a9dd..85e3860 100644
> >>> --- a/drivers/mtd/nand/Kconfig
> >>> +++ b/drivers/mtd/nand/Kconfig
> >>> @@ -441,7 +441,7 @@ config MTD_NAND_FSL_ELBC
> >>>
> >>>  config MTD_NAND_FSL_IFC
> >>>   tristate "NAND support for Freescale IFC controller"
> >>> - depends on FSL_SOC || ARCH_LAYERSCAPE
> >>> + depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
> >>>   select FSL_IFC
> >>>   select MEMORY
> >>>   help
> >>>
> >
> > Best Regards,
> > Alison Wang
> >
> 
> 
> --
> Best regards,
> Marek Vasut

Best Regards,
Alison Wang

RE: [PATCH] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

Hi, Boris,

> kbuild test robot  wrote:
> 
> > Hi Alison,
> >
> > [auto build test WARNING on mtd/master] [also build test WARNING on
> > v4.10-rc1 next-20161224] [if your patch is applied to the wrong git
> > tree, please drop us a note to help improve the system]
> >
> > url:    https://github.com/0day-ci/linux/commits/Alison-Wang/mtd-
> nand-Update-dependency-of-IFC-for-LS1021A/20161229-125233
> > base:   git://git.infradead.org/linux-mtd.git master
> > config: arm-allmodconfig (attached as .config)
> > compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
> > reproduce:
> > wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-
> tests.git/plain/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # save the attached .config to linux build tree
> > make.cross ARCH=arm
> >
> > All warnings (new ones prefixed by >>):
> >
> > warning: (MTD_NAND_FSL_IFC) selects FSL_IFC which has unmet direct
> > dependencies (MEMORY && (FSL_SOC || ARCH_LAYERSCAPE))
> 
> Do you have another patch adding the '|| SOC_LS1021A' dependency on
> FSL_IFC? If so, please send both patches in the same series.
> 
[Alison Wang] Thanks for your reminder. Yes, I have another patch. I will send 
it soon.


Best Regards,
Alison Wang

[PATCH v2 1/2] mtd: ifc: Update dependency of IFC for LS1021A

[Alison Wang]

As Freescale/NXP IFC controller is available on LS1021A, the dependency
for LS1021A is added.

Signed-off-by: Alison Wang 
---
Changes in v2:
- New patch

 drivers/memory/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index ec80e35..fff8345 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -115,7 +115,7 @@ config FSL_CORENET_CF
 
 config FSL_IFC
bool
-   depends on FSL_SOC || ARCH_LAYERSCAPE
+   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
 
 config JZ4780_NEMC
bool "Ingenic JZ4780 SoC NEMC driver"
-- 
2.1.0.27.g96db324

[PATCH v2 2/2] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.

Signed-off-by: Alison Wang 
---
Changes in v2:
- None

 drivers/mtd/nand/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 353a9dd..85e3860 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -441,7 +441,7 @@ config MTD_NAND_FSL_ELBC
 
 config MTD_NAND_FSL_IFC
tristate "NAND support for Freescale IFC controller"
-   depends on FSL_SOC || ARCH_LAYERSCAPE
+   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
select FSL_IFC
select MEMORY
help
-- 
2.1.0.27.g96db324

RE: [PATCH v2 1/2] mtd: ifc: Update dependency of IFC for LS1021A

[Alison Wang]

Ok, I see. Thanks.


Best Regards,
Alison Wang

> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@free-electrons.com]
> Sent: Tuesday, January 03, 2017 5:05 PM
> To: Alison Wang 
> Cc: marek.va...@gmail.com; cyrille.pitc...@atmel.com; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> m...@lists.infradead.org; dw...@infradead.org;
> computersforpe...@gmail.com; Alison Wang 
> Subject: Re: [PATCH v2 1/2] mtd: ifc: Update dependency of IFC for
> LS1021A
> 
> Hi Alison,
> 
> The subject prefix should be "memory: " and not "mtd: ifc: ".
> 
> Looks good otherwise.
> 
> No need to resend, I can fix that when applying.
> 
> Regards,
> 
> Boris
> 
> On Tue, 3 Jan 2017 10:41:05 +0800
> Alison Wang  wrote:
> 
> > As Freescale/NXP IFC controller is available on LS1021A, the
> > dependency for LS1021A is added.
> >
> > Signed-off-by: Alison Wang 
> > ---
> > Changes in v2:
> > - New patch
> >
> >  drivers/memory/Kconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index
> > ec80e35..fff8345 100644
> > --- a/drivers/memory/Kconfig
> > +++ b/drivers/memory/Kconfig
> > @@ -115,7 +115,7 @@ config FSL_CORENET_CF
> >
> >  config FSL_IFC
> > bool
> > -   depends on FSL_SOC || ARCH_LAYERSCAPE
> > +   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
> >
> >  config JZ4780_NEMC
> > bool "Ingenic JZ4780 SoC NEMC driver"

RE: [PATCH v2 2/2] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

> On 01/03/2017 03:41 AM, Alison Wang wrote:
> > As NAND support for Freescale/NXP IFC controller is available on
> > LS1021A, the dependency for LS1021A is added.
> 
> Does LS stand for LayerScape ? Yes it does. So why does ARCH_LAYERSCAPE
> not cover LS1021 ?
[Alison Wang] LS1021A is an earlier product and is not compatible with later 
Layerscape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.

> 
> > Signed-off-by: Alison Wang 
> > ---
> > Changes in v2:
> > - None
> >
> >  drivers/mtd/nand/Kconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index
> > 353a9dd..85e3860 100644
> > --- a/drivers/mtd/nand/Kconfig
> > +++ b/drivers/mtd/nand/Kconfig
> > @@ -441,7 +441,7 @@ config MTD_NAND_FSL_ELBC
> >
> >  config MTD_NAND_FSL_IFC
> > tristate "NAND support for Freescale IFC controller"
> > -   depends on FSL_SOC || ARCH_LAYERSCAPE
> > +   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
> > select FSL_IFC
> > select MEMORY
> > help
> >

Best Regards,
Alison Wang

[PATCH] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.

Signed-off-by: Alison Wang 
---
 drivers/mtd/nand/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 353a9dd..85e3860 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -441,7 +441,7 @@ config MTD_NAND_FSL_ELBC
 
 config MTD_NAND_FSL_IFC
tristate "NAND support for Freescale IFC controller"
-   depends on FSL_SOC || ARCH_LAYERSCAPE
+   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
select FSL_IFC
select MEMORY
help
-- 
2.1.0.27.g96db324

[PATCH v3 1/2] mtd: ifc: Update dependency of IFC for LS1021A

[Alison Wang]

As Freescale/NXP IFC controller is available on LS1021A, the dependency
for LS1021A is added.

LS1021A is an earlier product and is not compatible with later
LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.

Signed-off-by: Alison Wang 
---
Changes in v3:
- Update the commit message.

Changes in v2:
- New patch

 drivers/memory/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index ec80e35..fff8345 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -115,7 +115,7 @@ config FSL_CORENET_CF
 
 config FSL_IFC
bool
-   depends on FSL_SOC || ARCH_LAYERSCAPE
+   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
 
 config JZ4780_NEMC
bool "Ingenic JZ4780 SoC NEMC driver"
-- 
2.1.0.27.g96db324

RE: [PATCH v2 2/2] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

Hi, Boris,

> On Thu, 5 Jan 2017 02:02:30 +
> Alison Wang  wrote:
> 
> > > On 01/04/2017 02:46 AM, Alison Wang wrote:
> > > >> On 01/03/2017 03:41 AM, Alison Wang wrote:
> > > >>> As NAND support for Freescale/NXP IFC controller is available
> on
> > > >>> LS1021A, the dependency for LS1021A is added.
> > > >>
> > > >> Does LS stand for LayerScape ? Yes it does. So why does
> > > >> ARCH_LAYERSCAPE not cover LS1021 ?
> > > > [Alison Wang] LS1021A is an earlier product and is not compatible
> > > with later Layerscape architecture. So ARCH_LAYERSCAPE can't cover
> > > LS1021A.
> > >
> > > Ah ok, I see. That information would be useful in the commit
> message
> > > ;-)
> > >
> > [Alison Wang] Ok. :)
> 
> Would you mind sending a v3 with the updated commit message?
> 
[Alison Wang] I will send the v3 patches at once. :)


Best Regards,
Alison Wang

[PATCH v3 2/2] mtd: nand: Update dependency of IFC for LS1021A

[Alison Wang]

As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.

LS1021A is an earlier product and is not compatible with later
LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.

Signed-off-by: Alison Wang 
---
Changes in v3:
- Update the commit message.

Changes in v2:
- None

 drivers/mtd/nand/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 353a9dd..85e3860 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -441,7 +441,7 @@ config MTD_NAND_FSL_ELBC
 
 config MTD_NAND_FSL_IFC
tristate "NAND support for Freescale IFC controller"
-   depends on FSL_SOC || ARCH_LAYERSCAPE
+   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
select FSL_IFC
select MEMORY
help
-- 
2.1.0.27.g96db324

RE: [PATCH v3 1/2] mtd: ifc: Update dependency of IFC for LS1021A

[Alison Wang]

Hi, Boris,

Sorry, I forgot to change them. Should I resend them or you help to fix 
that when applying?


Best Regards,
Alison Wang

> 
> Hi Alison,
> 
> The subject prefix is still wrong, should be 'memory: ifc: '.
> 
> On Mon, 13 Feb 2017 14:46:55 +0800
> Alison Wang  wrote:
> 
> > As Freescale/NXP IFC controller is available on LS1021A, the
> > dependency for LS1021A is added.
> >
> > LS1021A is an earlier product and is not compatible with later
> > LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.
> >
> > Signed-off-by: Alison Wang 
> > ---
> > Changes in v3:
> > - Update the commit message.
> >
> > Changes in v2:
> > - New patch
> >
> >  drivers/memory/Kconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index
> > ec80e35..fff8345 100644
> > --- a/drivers/memory/Kconfig
> > +++ b/drivers/memory/Kconfig
> > @@ -115,7 +115,7 @@ config FSL_CORENET_CF
> >
> >  config FSL_IFC
> > bool
> > -   depends on FSL_SOC || ARCH_LAYERSCAPE
> > +   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
> >
> >  config JZ4780_NEMC
> > bool "Ingenic JZ4780 SoC NEMC driver"

RE: [PATCH v3 1/2] mtd: ifc: Update dependency of IFC for LS1021A

[Alison Wang]

> On Mon, 13 Feb 2017 07:39:41 +
> Alison Wang  wrote:
> 
> > Hi, Boris,
> >
> > Sorry, I forgot to change them. Should I resend them or you help
> to fix that when applying?
> 
> I can fix that when applying, no need to resend.
> Note that you missed 4.11 (already sent my PR to Brian), I'll queue it
> for 4.12.
> 
[Alison Wang] Ok, I see. Thanks a lot.


Best Regards,
Alison Wang
> 
> 
> >
> >
> > Best Regards,
> > Alison Wang
> >
> > >
> > > Hi Alison,
> > >
> > > The subject prefix is still wrong, should be 'memory: ifc: '.
> > >
> > > On Mon, 13 Feb 2017 14:46:55 +0800
> > > Alison Wang  wrote:
> > >
> > > > As Freescale/NXP IFC controller is available on LS1021A, the
> > > > dependency for LS1021A is added.
> > > >
> > > > LS1021A is an earlier product and is not compatible with later
> > > > LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.
> > > >
> > > > Signed-off-by: Alison Wang 
> > > > ---
> > > > Changes in v3:
> > > > - Update the commit message.
> > > >
> > > > Changes in v2:
> > > > - New patch
> > > >
> > > >  drivers/memory/Kconfig | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index
> > > > ec80e35..fff8345 100644
> > > > --- a/drivers/memory/Kconfig
> > > > +++ b/drivers/memory/Kconfig
> > > > @@ -115,7 +115,7 @@ config FSL_CORENET_CF
> > > >
> > > >  config FSL_IFC
> > > > bool
> > > > -   depends on FSL_SOC || ARCH_LAYERSCAPE
> > > > +   depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
> > > >
> > > >  config JZ4780_NEMC
> > > > bool "Ingenic JZ4780 SoC NEMC driver"
> >

[PATCH] ARM: dts: ls102xa: Use new clock binding

[Alison Wang]

According to the current clock driver for Freescale QorIQ platform, new
clock binding will be used for LS1021A.

Signed-off-by: Alison Wang 
---
 arch/arm/boot/dts/ls1021a.dtsi | 97 +-
 1 file changed, 40 insertions(+), 57 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 726372d..5483728 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -74,14 +74,14 @@
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
-   clocks = <&cluster1_clk>;
+   clocks = <&clockgen 1 0>;
};
 
cpu@f01 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf01>;
-   clocks = <&cluster1_clk>;
+   clocks = <&clockgen 1 0>;
};
};
 
@@ -99,6 +99,20 @@
 ;
};
 
+   sysclk: sysclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1>;
+   clock-output-names = "sysclk";
+   };
+
+   clk32k: clk32k {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+   clock-output-names = "clk32k";
+   };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -149,7 +163,7 @@
  <0x0 0x20220520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
interrupts = ;
-   clocks = <&platform_clk 1>;
+   clocks = <&clockgen 4 0>;
dma-coherent;
status = "disabled";
};
@@ -200,41 +214,10 @@
};
 
clockgen: clocking@1ee1000 {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges = <0x0 0x0 0x1ee1000 0x1>;
-
-   sysclk: sysclk {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-output-names = "sysclk";
-   };
-
-   cga_pll1: pll@800 {
-   compatible = "fsl,qoriq-core-pll-2.0";
-   #clock-cells = <1>;
-   reg = <0x800 0x10>;
-   clocks = <&sysclk>;
-   clock-output-names = "cga-pll1", 
"cga-pll1-div2",
-"cga-pll1-div4";
-   };
-
-   platform_clk: pll@c00 {
-   compatible = "fsl,qoriq-core-pll-2.0";
-   #clock-cells = <1>;
-   reg = <0xc00 0x10>;
-   clocks = <&sysclk>;
-   clock-output-names = "platform-clk", 
"platform-clk-div2";
-   };
-
-   cluster1_clk: clk0c0@0 {
-   compatible = "fsl,qoriq-core-mux-2.0";
-   #clock-cells = <0>;
-   reg = <0x0 0x10>;
-   clock-names = "pll1cga", "pll1cga-div2", 
"pll1cga-div4";
-   clocks = <&cga_pll1 0>, <&cga_pll1 1>, 
<&cga_pll1 2>;
-   clock-output-names = "cluster1-clk";
-   };
+   compatible = "fsl,ls1021a-clockgen";
+   reg = <0x0 0x1ee1000 0x0 0x1000>;
+   #clock-cells = <2>;
+   clocks = <&sysclk>;
};
 
dspi0: dspi@210 {
@@ -244,7 +227,7 @@
reg = <0x0 0x210 0x0 0x1>;
interrupts = ;
clock-names = "dspi";
-   clocks = <&platform_clk 1>;
+   clocks = <&clockgen 4 1>;
spi-num-chipselects = <5>;
big-endian;

[PATCH v4] ARM: configs: Add Freescale LS1021A defconfig

[Alison Wang]

Add Freescale LS1021A initial defconfig file.
The LS1021A SoC is a dual-core Cortex-A7 based processor.

LS1021A has some special configurations against imx_v6_v7_defconfig and
multi_v7_defconfig, such as CONFIG_ARM_LPAE, CONFIG_ARM_PSCI...
LPAE needs to be supported to access memory beyond the 4GB limit for
LS1021A. PSCI needs to be supported for LS1021A too. But CONFIG_ARM_LPAE
and CONFIG_ARM_PSCI are disabled in imx_v6_v7_defconfig and
multi_v7_defconfig, so a separate LS1021A defconfig is needed.

Enable I2C, LPUART, eDMA, WDT, GIANFAR, Sound, DSPI at default.

Signed-off-by: Haikun Wang 
Signed-off-by: Alison Wang 
---
Changes since v3:
- Modify the commit.
Changes since v2:
- Enable PSCI, as PSCI is enabled in u-boot.
Changes since v1:
- Enable GIANFAR, Sound and DSPI.

 arch/arm/configs/ls1021a_defconfig | 160 +
 1 file changed, 160 insertions(+)
 create mode 100644 arch/arm/configs/ls1021a_defconfig

diff --git a/arch/arm/configs/ls1021a_defconfig 
b/arch/arm/configs/ls1021a_defconfig
new file mode 100644
index 000..5ec5316
--- /dev/null
+++ b/arch/arm/configs/ls1021a_defconfig
@@ -0,0 +1,160 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLK_CMDLINE_PARSER=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_LS1021A=y
+CONFIG_ARM_LPAE=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_SMP=y
+CONFIG_VMSPLIT_2G=y
+CONFIG_ARM_PSCI=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_CLEANCACHE=y
+CONFIG_FRONTSWAP=y
+CONFIG_CMDLINE="console=ttyS0,115200"
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_MROUTE=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_UDP_DIAG=m
+CONFIG_NETFILTER=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=256000
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_ATA=y
+CONFIG_NETDEVICES=y
+CONFIG_GIANFAR=y
+CONFIG_VITESSE_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_IMX=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_INA2XX=y
+CONFIG_WATCHDOG=y
+CONFIG_IMX2_WDT=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+CONFIG_SND=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CLK_QORIQ=y
+CONFIG_MEMORY=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] arm: dts: ls1021a: Add LTC2945 node for LS1021A TWR board

[Alison Wang]

From: Jia Hongtao 

This patch adds LTC2945 node for LS1021A TWR board.

Signed-off-by: Jia Hongtao 
---
 arch/arm/boot/dts/ls1021a-twr.dts | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index a0d9ad6..938b16a 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -160,6 +160,13 @@
};
 };
 
+&i2c2 {
+   status = "okay";
+   monitor: ltc2945@67 {
+   reg = <0x67>;
+   };
+};
+
 &ifc {
#address-cells = <2>;
#size-cells = <1>;
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] arm: dts: ls1021a: add wakeup device ftm0 node for ls1021a

[Alison Wang]

From: Wang Dongsheng 

Add ftm0 node, cause of ftm0 can be set as a alarm before system
going to deep sleep.

Signed-off-by: Wang Dongsheng 
---
 arch/arm/boot/dts/ls1021a-qds.dts | 4 
 arch/arm/boot/dts/ls1021a.dtsi| 8 
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index 9533f1d..e2ccae6 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -146,6 +146,10 @@
status = "okay";
 };
 
+&ftm0 {
+   status = "okay";
+};
+
 &i2c0 {
status = "okay";
 
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 4ad30d0..707850f 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -335,6 +335,14 @@
status = "disabled";
};
 
+   ftm0: ftm0@29d {
+   compatible = "fsl,ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   interrupts = ;
+   big-endian;
+   status = "disabled";
+   };
+
wdog0: watchdog@2ad {
compatible = "fsl,imx21-wdt";
reg = <0x0 0x2ad 0x0 0x1>;
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v2] ARM: dts: ls1021a: add wakeup device ftm0 node for ls1021a

[Alison Wang]

Add ftm0 node, cause of ftm0 can be set as a alarm before system
going to deep sleep.

Signed-off-by: Wang Dongsheng 
Signed-off-by: Alison Wang 
---
Changes since v1:
- Add my SoB.
- Use "ARM:" as subject prefix.

 arch/arm/boot/dts/ls1021a-qds.dts | 4 
 arch/arm/boot/dts/ls1021a.dtsi| 8 
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index 9c5e16b..f14731b 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -75,6 +75,10 @@
};
 };
 
+&ftm0 {
+   status = "okay";
+};
+
 &i2c0 {
status = "okay";
 
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c70bb27..7e9e122 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -332,6 +332,14 @@
status = "disabled";
};
 
+   ftm0: ftm0@29d {
+   compatible = "fsl,ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   interrupts = ;
+   big-endian;
+   status = "disabled";
+   };
+
wdog0: watchdog@2ad {
compatible = "fsl,imx21-wdt";
reg = <0x0 0x2ad 0x0 0x1>;
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v2] ARM: dts: ls1021a: audio: Add dts nodes for audio on LS1021A

[Alison Wang]

This patch adds dts nodes for audio on LS1021A.

Signed-off-by: Alison Wang 
Signed-off-by: Shawn Guo 
---
Changes since v1:
- Remove "clocks" container, and use a unit node name.

 arch/arm/boot/dts/ls1021a-qds.dts | 69 +++
 arch/arm/boot/dts/ls1021a-twr.dts | 61 ++
 arch/arm/boot/dts/ls1021a.dtsi| 14 
 3 files changed, 138 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index f14731b..f5f4194 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -58,6 +58,55 @@
enet0_sgmii_phy = &sgmii_phy1c;
enet1_sgmii_phy = &sgmii_phy1d;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <24576000>;
+   };
+
+   regulators {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg_3p3v: regulator@0 {
+   compatible = "regulator-fixed";
+   reg = <0>;
+   regulator-name = "3P3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   simple-audio-card,widgets =
+   "Microphone", "Microphone Jack",
+   "Headphone", "Headphone Jack",
+   "Speaker", "Speaker Ext",
+   "Line", "Line In Jack";
+   simple-audio-card,routing =
+   "MIC_IN", "Microphone Jack",
+   "Microphone Jack", "Mic Bias",
+   "LINE_IN", "Line In Jack",
+   "Headphone Jack", "HP_OUT",
+   "Speaker Ext", "LINE_OUT";
+
+   simple-audio-card,cpu {
+   sound-dai = <&sai2>;
+   frame-master;
+   bitclock-master;
+   };
+
+   simple-audio-card,codec {
+   sound-dai = <&codec>;
+   frame-master;
+   bitclock-master;
+   };
+   };
 };
 
 &dspi0 {
@@ -83,6 +132,7 @@
status = "okay";
 
pca9547: mux@77 {
+   compatible = "nxp,pca9547";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
@@ -137,6 +187,21 @@
reg = <0x4c>;
};
};
+
+   i2c@4 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x4>;
+
+   codec: sgtl5000@2a {
+   #sound-dai-cells = <0>;
+   compatible = "fsl,sgtl5000";
+   reg = <0x2a>;
+   VDDA-supply = <®_3p3v>;
+   VDDIO-supply = <®_3p3v>;
+   clocks = <&sys_mclk 1>;
+   };
+   };
};
 };
 
@@ -235,6 +300,10 @@
};
 };
 
+&sai2 {
+   status = "okay";
+};
+
 &uart0 {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index a2c591e..db41e4f 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -56,6 +56,55 @@
enet0_sgmii_phy = &sgmii_phy2;
enet1_sgmii_phy = &sgmii_phy0;
};
+
+   sys_mclk: clock-mclk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <24576000>;
+   };
+
+   regulators {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg_3p3v: regulator@0 {
+   compatible = "regulator-fixed";
+   reg = <0>;
+   regulator-name = "3P3V";
+   regulator-min-microvolt = <330>;
+  

[PATCH] arm: ls1021a: utilize hrtimer based broadcast mode

[Alison Wang]

Hrtimer based broadcast mode is used instead of
periodic tick broadcast to provide high resolution
clock in SMP.

Signed-off-by: Alison Wang 
---
 arch/arm/mach-imx/mach-ls1021a.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c
index b89c858..1a1a115 100644
--- a/arch/arm/mach-imx/mach-ls1021a.c
+++ b/arch/arm/mach-imx/mach-ls1021a.c
@@ -8,9 +8,19 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 #include "common.h"
 
+static void __init ls1021a_init_time(void)
+{
+   of_clk_init(NULL);
+   clocksource_of_init();
+   tick_setup_hrtimer_broadcast();
+}
+
 static const char * const ls1021a_dt_compat[] __initconst = {
"fsl,ls1021a",
NULL,
@@ -18,5 +28,6 @@ static const char * const ls1021a_dt_compat[] __initconst = {
 
 DT_MACHINE_START(LS1021A, "Freescale LS1021A")
.smp= smp_ops(ls1021a_smp_ops),
+   .init_time  = ls1021a_init_time,
.dt_compat  = ls1021a_dt_compat,
 MACHINE_END
-- 
2.1.0.27.g96db324

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH] dts: ls102xa: ifc: Add the partition for NOR flash

[Alison Wang]

According to the new mapping table, the partition for NOR flash
is added.

Signed-off-by: Alison Wang 
---
 arch/arm/boot/dts/ls1021a-qds.dts | 60 +++
 arch/arm/boot/dts/ls1021a-twr.dts | 60 +++
 2 files changed, 120 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts 
b/arch/arm/boot/dts/ls1021a-qds.dts
index 9408753..904ee09 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -237,6 +237,66 @@
reg = <0x0 0x0 0x800>;
bank-width = <2>;
device-width = <1>;
+
+   partition@0 {
+   /* 128KB for bank0 RCW */
+   reg = <0x 0x0002>;
+   label = "NOR bank0 RCW Image";
+   };
+
+   partition@10 {
+   /* 1MB for bank0 u-boot Image */
+   reg = <0x0010 0x0010>;
+   label = "NOR bank0 u-boot Image";
+   };
+
+   partition@20 {
+   /* 1MB for bank0 DTB */
+   reg = <0x0020 0x0010>;
+   label = "NOR bank0 DTB Image";
+   };
+
+   partition@30 {
+   /* 7MB for bank0 Linux Kernel */
+   reg = <0x0030 0x0070>;
+   label = "NOR bank0 Linux Kernel Image";
+   };
+
+   partition@a0 {
+   /* 54MB for bank0 Ramdisk Root File System */
+   reg = <0x00a0 0x0360>;
+   label = "NOR bank0 Ramdisk Root File System Image";
+   };
+
+   partition@400 {
+   /* 128KB for bank4 RCW */
+   reg = <0x0400 0x0002>;
+   label = "NOR bank4 RCW Image";
+   };
+
+   partition@410 {
+   /* 1MB for bank4 u-boot Image */
+   reg = <0x0410 0x0010>;
+   label = "NOR bank4 u-boot Image";
+   };
+
+   partition@420 {
+   /* 1MB for bank4 DTB */
+   reg = <0x0420 0x0010>;
+   label = "NOR bank4 DTB Image";
+   };
+
+   partition@430 {
+   /* 7MB for bank4 Linux Kernel */
+   reg = <0x0430 0x0070>;
+   label = "NOR bank4 Linux Kernel Image";
+   };
+
+   partition@4a0 {
+   /* 54MB for bank4 Ramdisk Root File System */
+   reg = <0x04a0 0x0360>;
+   label = "NOR bank4 Ramdisk Root File System Image";
+   };
};
 
fpga: board-control@3,0 {
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts 
b/arch/arm/boot/dts/ls1021a-twr.dts
index 75ecaed..f5e9616 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -194,6 +194,66 @@
reg = <0x0 0x0 0x800>;
bank-width = <2>;
device-width = <1>;
+
+   partition@0 {
+   /* 128KB for bank0 RCW */
+   reg = <0x 0x0002>;
+   label = "NOR bank0 RCW Image";
+   };
+
+   partition@10 {
+   /* 1MB for bank0 u-boot Image */
+   reg = <0x0010 0x0010>;
+   label = "NOR bank0 u-boot Image";
+   };
+
+   partition@20 {
+   /* 1MB for bank0 DTB */
+   reg = <0x0020 0x0010>;
+   label = "NOR bank0 DTB Image";
+   };
+
+   partition@30 {
+   /* 7MB for bank0 Linux Kernel */
+   reg = <0x0030 0x0070>;
+   label = "NOR bank0 Linux Kernel Image";
+   };
+
+   partition@a0 {
+   /* 54MB for bank0 Ramdisk Root File System */
+   reg = <0x00a0 0x0360>;
+   label = "NOR bank0 Ramdisk Root File System Image";
+   };
+
+   partition@400 {
+   /* 128KB for bank4 RCW */
+   reg = <0x0400 0x0002>;
+   label = "NOR bank4 RCW Image";
+   };
+
+   partition@410 {
+ 

RE: [EXT] Re: [PATCH] edac: nxp: Add L1 and L2 error detection for A53 and A72 cores

[Alison Wang]

Hi, James,

> On 25/08/2020 03:31, Alison Wang wrote:
> >> On 09/07/2020 09:22, Alison Wang wrote:
> >>> Add error detection for A53 and A72 cores. Hardware error injection
> >>> is supported on A53. Software error injection is supported on both.
> >>
> > 
> >>
> >> As we can't safely write to these registers from linux, so I think
> >> this means all the error injection and maybe SMC stuff can disappear.
> 
> > I agreed with your opinion that CPUACTLR_EL1 and L2ACTLR can't be written
> in Linux.
> 
> Well, we can't do what the TRM tells us we must before writing to that
> register.
[Alison] Right.
> 
> 
> > So the error injection can't be done in Linux. Do you mean the error
> > injection can only be done in firmware before Linux boots up? If so,
> > the system is running with error injection enabled all the time, it may be 
> > not
> a good idea too. Any suggestion?
> 
> These registers are expected to have one value, forever. The errata document
> sometimes tells us to to set or clear one of these bits to workaround an 
> issue.
> Because they can only be written to when the system is idle, typically during
> boot, this is firmware's responsibility.
> 
> I expect firmware to set the bits in ACTLR_EL3, to prevent lower exception
> levels from touching any of these registers.
> 
> 
> I don't know how the error injection on A53 or A72 works, so I don't know if
> you can leave it enabled all the time. The bit you are setting is described as
> RES0 by the A53 and A72 TRMs. I suspect I had the wrong TRM open, as my
> 'L1DEIEN' comment seems to be what your CPUACTLR_EL1[6] is called on A35.
> (35, 53? Guess how that happened!)
[Alison] Please check A53 TRM r0p4 from 
https://developer.arm.com/documentation/ddi0500/j/System-Control/AArch64-register-descriptions/CPU-Auxiliary-Control-Register--EL1?lang=en
 . 
In the CPUACTLR_EL1 bit assignments, you will find the following description.
[6] L1DEIEN 
L1 D-cache data RAM error injection enable.
0
Normal behavior, errors are not injected. This is the reset value.
1
Double-bit errors are injected on all writes to the L1 D-cache data RAMs for 
the first word of each 32-byte region.
> 
> A35's error injection says:
> | While this bit is set, double-bit errors are injected on all writes to
> | the L1 D-cache data RAMs for the first word of each 32-byte region.
> 
> You certainly can't leave this sort of thing enabled! And you can't change it 
> at
> runtime, so we can't use it.
[Alison] Ok.
> 
> 
> I think features like this are intended to be used to check the integration, 
> not
> to test the software.
> 
> 
> After I sent the original comments on this, I found Sascha's version, which 
> has
> these issues resolved:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ker
> nel.org%2Flinux-arm-kernel%2F20200813075721.27981-1-s.hauer%40pengut
> ronix.de%2F&data=02%7C01%7Calison.wang%40nxp.com%7C3dc61602
> 25b24fce068708d848f9557e%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0
> %7C0%7C637339583002064849&sdata=tLf6MHh5IMSBXvASkeaIANLGX
> A0J6F26hpn254a6I6c%3D&reserved=0
> 
> I think this version should work on your platform too.
[Alison] I have a look at this patch. This patch doesn't complete all the 
functions in my patch. It
is just to report errors, but error injection function is all removed.


Best Regards,
Alison Wang

RE: [EXT] Re: [PATCH] edac: nxp: Add L1 and L2 error detection for A53 and A72 cores

[Alison Wang]

Hi, James,

> On 09/07/2020 09:22, Alison Wang wrote:
> > Add error detection for A53 and A72 cores. Hardware error injection is
> > supported on A53. Software error injection is supported on both.
> 

> 
> As we can't safely write to these registers from linux, so I think this means 
> all
> the error injection and maybe SMC stuff can disappear.
> 
> 
> (I've not read past here..)
> 
[Alison] Thank you very much for all your detailed comments.
I agreed with your opinion that CPUACTLR_EL1 and L2ACTLR can't be written in 
Linux. So the error injection can't be done in Linux. Do you mean the error 
injection can only be done in firmware before Linux boots up? If so, the system 
is running with error injection enabled all the time, it may be not a good idea 
too. Any suggestion?


Best Regards,
Alison Wang

[PATCH] edac: nxp: Add L1 and L2 error detection for A53 and A72 cores

[Alison Wang]

Add error detection for A53 and A72 cores. Hardware error injection is
supported on A53. Software error injection is supported on both.
For hardware error injection on A53 to work, proper access to
L2ACTLR_EL1, CPUACTLR_EL1 needs to be granted by EL3 firmware. This is
done by making an SMC call in the driver. Failure to enable access
disables hardware error injection. For error detection to work, another
SMC call enables access to L2ECTLR_EL1.

It is for NXP's Layerscape family LS1043A, LS1046A, LS2088A and LX2160A.

Signed-off-by: York Sun 
Signed-off-by: Alison Wang 
---
 .../bindings/edac/cortex-arm64-edac.txt   |  40 +
 drivers/edac/Kconfig  |   7 +
 drivers/edac/Makefile |   1 +
 drivers/edac/cortex_arm64_l1_l2.c | 738 ++
 drivers/edac/cortex_arm64_l1_l2.h |  54 ++
 5 files changed, 840 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/edac/cortex-arm64-edac.txt
 create mode 100644 drivers/edac/cortex_arm64_l1_l2.c
 create mode 100644 drivers/edac/cortex_arm64_l1_l2.h

diff --git a/Documentation/devicetree/bindings/edac/cortex-arm64-edac.txt 
b/Documentation/devicetree/bindings/edac/cortex-arm64-edac.txt
new file mode 100644
index ..41c840993814
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/cortex-arm64-edac.txt
@@ -0,0 +1,40 @@
+ARM Cortex A53 and A72 L1/L2 cache error reporting
+
+CPU Memory Error Syndrome and L2 Memory Error Syndrome registers can be
+used for checking L1 and L2 memory errors. However, only A53 supports
+double-bit error injection to L1 and L2 memory. This driver uses the
+hardware error injection when available, but also provides a way to
+inject errors by software.
+
+To use hardware error injection and the interrupt, proper access needs
+to be granted in ACTLR_EL3 (and/or ACTLR_EL2) register by EL3 firmware SMC 
call.
+
+Correctable errors do not trigger such interrupt. This driver uses
+dynamic polling internal to check for errors. The more errors detected,
+the more frequently it polls. Combining with interrupt, this driver can
+detect correctable and uncorrectable errors. However, if the
+uncorrectable errors cause system abort exception, this driver is not able to
+report errors in time.
+
+The SIP-specific SMC calls are only for NXP's Layerscape family LS1043A,
+LS1046A, LS2088A and LX2160A.
+
+The following section describes the Cortex A53/A72 EDAC DT node binding.
+
+Required properties:
+- compatible: Should be "arm,cortex-a53-edac" or "arm,cortex-a72-edac"
+- cpus: Should be a list of compatible cores
+
+Optional properties:
+- interrupts: Interrupt number if supported
+
+Example:
+   edac {
+   compatible = "arm,cortex-a53-edac";
+   cpus = <&cpu0>,
+  <&cpu1>,
+  <&cpu2>,
+  <&cpu3>;
+   interrupts = <0 108 0x4>;
+
+   };
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 7b6ec3014ba2..6317cebf0a95 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -530,4 +530,11 @@ config EDAC_DMC520
  Support for error detection and correction on the
  SoCs with ARM DMC-520 DRAM controller.
 
+config EDAC_CORTEX_ARM64_L1_L2
+   tristate "ARM Cortex A53/A72"
+   depends on ARM64 && ARCH_LAYERSCAPE
+   help
+ Support for error detection on ARM Cortex A53 and A72 with Layerscape
+ SoC family LS1043A, LS1046A, LS2088A and LX2160A.
+
 endif # EDAC
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 269e15118cea..3edba6bea350 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -88,3 +88,4 @@ obj-$(CONFIG_EDAC_QCOM)   += qcom_edac.o
 obj-$(CONFIG_EDAC_ASPEED)  += aspeed_edac.o
 obj-$(CONFIG_EDAC_BLUEFIELD)   += bluefield_edac.o
 obj-$(CONFIG_EDAC_DMC520)  += dmc520_edac.o
+obj-$(CONFIG_EDAC_CORTEX_ARM64_L1_L2)  += cortex_arm64_l1_l2.o
diff --git a/drivers/edac/cortex_arm64_l1_l2.c 
b/drivers/edac/cortex_arm64_l1_l2.c
new file mode 100644
index ..0443384bd656
--- /dev/null
+++ b/drivers/edac/cortex_arm64_l1_l2.c
@@ -0,0 +1,738 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cortex A53 and A72 EDAC L1 and L2 cache error detection
+ *
+ * Copyright 2018-2020 NXP
+ * Author: York Sun 
+ *
+ * Partially take from a similar driver by
+ * Brijesh Singh 
+ * Copyright (c) 2015, Advanced Micro Devices
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "edac_module.h"
+#include "cortex_arm64_l1_l2.h"
+
+static int poll_msec = 1024;
+static long l1_ce_sw_inject_count, l1_ue_sw_inject_count;
+static long l2_ce_sw_inject_count, l2_ue_sw_inject_count;
+static struct cpumask compat_mask;
+static struct cpumask l1_ce_cpu_mask, l1_ue_cpu_mask;
+s

[RFC PATCH] arm64: defconfig: Disable fine-grained task level IRQ time accounting

[Alison Wang]

In the current arm64 defconfig, CONFIG_IRQ_TIME_ACCOUNTING is enabled as
default. According to my tests on NXP's LayerScape and i.MX platforms,
the system hangs when running the command "stress-ng --hrtimers 1" with
CONFIG_IRQ_TIME_ACCOUNTING enabled. Disabling this option, the issue
disappears. CONFIG_IRQ_TIME_ACCOUNTING causes serious performance impact
when running hrtimer stress test at the same time.

Signed-off-by: Alison Wang 
---
 arch/arm64/configs/defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e0f33826819f..ff1c11d8b10b 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -4,7 +4,6 @@ CONFIG_AUDIT=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
-CONFIG_IRQ_TIME_ACCOUNTING=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_TASK_XACCT=y
-- 
2.17.1

RE: [EXT] Re: [RFC PATCH] arm64: defconfig: Disable fine-grained task level IRQ time accounting

[Alison Wang]

Hi, Kurt,

> On Wed Jul 29 2020, Alison Wang wrote:
> > In the current arm64 defconfig, CONFIG_IRQ_TIME_ACCOUNTING is enabled
> > as default. According to my tests on NXP's LayerScape and i.MX
> > platforms, the system hangs when running the command "stress-ng
> > --hrtimers 1" with CONFIG_IRQ_TIME_ACCOUNTING enabled. Disabling this
> > option, the issue disappears. CONFIG_IRQ_TIME_ACCOUNTING causes
> > serious performance impact when running hrtimer stress test at the same
> time.
> 
> I think instead of disabling the option for all arm64 devices, it might be 
> better
> to analyze the root-cause why the hrtimer test hangs when this option is
> enabled.
> 
> +Cc hrtimer maintainers: Thomas and Anna-Maria
> 
[Alison] Yes, I agree. I hope others can give me some clues for the root cause.


Best Regards,
Alison Wang

[PATCH 2/2] drm/fsl-dcu: Fix the interrupt issue in suspend/resume functions

[Alison Wang]

drm_atomic_helper_suspend()/drm_atomic_helper_resume() are used in
suspend/resume functions. Interrupt can not be disabled when calling
drm_atomic_helper_resume(). Or else vblank interrupt will not generate
and the error about vblank wait timed out will occur.

This patch will enable interrupt before calling
drm_atomic_helper_resume().

The patch is verified on LS1021ATWR board.

Signed-off-by: Alison Wang 
---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 875b0fdc4274..aa0393d32661 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -192,7 +192,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
if (!fsl_dev)
return 0;
 
-   disable_irq(fsl_dev->irq);
drm_kms_helper_poll_disable(fsl_dev->drm);
 
console_lock();
@@ -210,6 +209,8 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
return PTR_ERR(fsl_dev->state);
}
 
+   disable_irq(fsl_dev->irq);
+
clk_disable_unprepare(fsl_dev->pix_clk);
clk_disable_unprepare(fsl_dev->clk);
 
@@ -236,6 +237,8 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
return ret;
}
 
+   enable_irq(fsl_dev->irq);
+
if (fsl_dev->tcon)
fsl_tcon_bypass_enable(fsl_dev->tcon);
fsl_dcu_drm_init_planes(fsl_dev->drm);
@@ -246,7 +249,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
console_unlock();
 
drm_kms_helper_poll_enable(fsl_dev->drm);
-   enable_irq(fsl_dev->irq);
 
return 0;
 }
-- 
2.14.1

[PATCH 1/2] drm/fsl-dcu: Fix DCU pixel clock issue in suspend/resume functions

[Alison Wang]

As there is not corresponding clk_prepare_enable() for
fsl_dev->pix_clk in previous contexts, clk_disable_unprepare() for
fsl_dcu->pix_clk in suspend function will fail.

This patch will add clk_prepare_enable() for fsl_dev->pix_clk in
previous contexts and resume function to fix the issue.

This patch is verified on LS1021ATWR board.

Signed-off-by: Alison Wang 
---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c 
b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 58e9e0601a61..875b0fdc4274 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -230,6 +230,12 @@ static int fsl_dcu_drm_pm_resume(struct device *dev)
return ret;
}
 
+   ret = clk_prepare_enable(fsl_dev->pix_clk);
+   if (ret < 0) {
+   dev_err(dev, "failed to enable dcu pix clk\n");
+   return ret;
+   }
+
if (fsl_dev->tcon)
fsl_tcon_bypass_enable(fsl_dev->tcon);
fsl_dcu_drm_init_planes(fsl_dev->drm);
@@ -351,6 +357,12 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev)
goto disable_clk;
}
 
+   ret = clk_prepare_enable(fsl_dev->pix_clk);
+   if (ret < 0) {
+   dev_err(dev, "failed to enable dcu pix clk\n");
+   return ret;
+   }
+
fsl_dev->tcon = fsl_tcon_init(dev);
 
drm = drm_dev_alloc(driver, dev);
-- 
2.14.1

RE: [PATCH] arm: kernel: utilize hrtimer based broadcast

[Alison Wang]

Hi, Russell,

> On Sat, 2 Jan 2016, Russell King - ARM Linux wrote:
> > On Tue, Dec 29, 2015 at 02:54:10PM +0100, Thomas Gleixner wrote:
> > > I have no real opinion about that patch. It does no harm to
> > > unconditionally setup the hrtimer based broadcast even if it's never
> used.
> > >
> > > Up to the arch maintainer to decide.
> >
> > That's really not fair to keep shovelling these kinds of decisions
> > onto architecture maintainers without any kind of explanation about
> > how an architecture maintainer should make such a decision.
> >
> > Do I roll a 6-face dice, and if it gives an odd number, I apply this
> > patch, otherwise I reject it?
> >
> > Is there a technical basis for making the decision?  If so, please
> > explain what the technical arguments are against having or not having
> > this change.
> 
> The hrtimer based broadcast device is used when you have per cpu timers
> which stop in deeper power states, but you have no other timer hardware on
> the chip which can backup the per cpu timer in deep power states. The
> trick is that it emulates a timer hardware via a hrtimer and then tells
> the cpu idle code not to go into deep power states on the cpu which owns
> that hrtimer. All other cpus can go as deep as they want and still get
> woken up.
> 
> The only downside of adding this unconditionally is extra code in case
> that it is not needed on a particular platform.
> 
> Hope that helps.
> 
[Alison Wang] What's your opinion about this explanation? Is this patch 
acceptable?

Best Regards,
Alison Wang