Re: [PATCH 2/4] pwm: atmel-tcb: Add .owner to struct pwm_ops
On 31/03/2013 05:15, Axel Lin wrote:
Add missing .owner of struct pwm_ops. This prevents the module from being
removed from underneath its users.
Signed-off-by: Axel Lin
Acked-by: Boris BREZILLON
---
drivers/pwm/pwm-atmel-tcb.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c
index 16cb530..0a7b658 100644
--- a/drivers/pwm/pwm-atmel-tcb.c
+++ b/drivers/pwm/pwm-atmel-tcb.c
@@ -358,6 +358,7 @@ static const struct pwm_ops atmel_tcb_pwm_ops = {
.set_polarity = atmel_tcb_pwm_set_polarity,
.enable = atmel_tcb_pwm_enable,
.disable = atmel_tcb_pwm_disable,
+ .owner = THIS_MODULE,
};
static int atmel_tcb_pwm_probe(struct platform_device *pdev)
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: at91/tc: fix clock source id for tc block > 1
This patch fixes wrong clock request for TC block 2.
The second block was using t0_clk, t1_clk and t2_clk clks instead of
t3_clk, t4_clk and t5_clk clks.
Signed-off-by: Boris BREZILLON
---
drivers/misc/atmel_tclib.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/misc/atmel_tclib.c b/drivers/misc/atmel_tclib.c
index c8d8e38..768a988 100644
--- a/drivers/misc/atmel_tclib.c
+++ b/drivers/misc/atmel_tclib.c
@@ -142,6 +142,8 @@ static int __init tc_probe(struct platform_device *pdev)
struct atmel_tc *tc;
struct clk *clk;
int irq;
+ charclk_id[7];
+ int clk_offset;
if (!platform_get_resource(pdev, IORESOURCE_MEM, 0))
return -EINVAL;
@@ -156,25 +158,31 @@ static int __init tc_probe(struct platform_device *pdev)
tc->pdev = pdev;
- clk = clk_get(&pdev->dev, "t0_clk");
- if (IS_ERR(clk)) {
- kfree(tc);
- return -EINVAL;
- }
-
/* Now take SoC information if available */
if (pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_node(atmel_tcb_dt_ids, pdev->dev.of_node);
if (match)
tc->tcb_config = match->data;
+ clk_offset = of_alias_get_id(tc->pdev->dev.of_node, "tcb");
+ } else
+ clk_offset = pdev->id;
+ clk_offset *= 3;
+
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ clk = clk_get(&pdev->dev, clk_id);
+ if (IS_ERR(clk)) {
+ kfree(tc);
+ return -EINVAL;
}
tc->clk[0] = clk;
- tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ tc->clk[1] = clk_get(&pdev->dev, clk_id);
if (IS_ERR(tc->clk[1]))
tc->clk[1] = clk;
- tc->clk[2] = clk_get(&pdev->dev, "t2_clk");
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ tc->clk[2] = clk_get(&pdev->dev, clk_id);
if (IS_ERR(tc->clk[2]))
tc->clk[2] = clk;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH RESEND] pwm: pwm-atmel-tcb: pinctrl support
Setup tcb pins using pinctrl subsystem.
Signed-off-by: Boris BREZILLON
---
drivers/pwm/pwm-atmel-tcb.c |9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c
index 16cb530..985b7bf 100644
--- a/drivers/pwm/pwm-atmel-tcb.c
+++ b/drivers/pwm/pwm-atmel-tcb.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#define NPWM 6
@@ -365,6 +366,7 @@ static int atmel_tcb_pwm_probe(struct platform_device *pdev)
struct atmel_tcb_pwm_chip *tcbpwm;
struct device_node *np = pdev->dev.of_node;
struct atmel_tc *tc;
+ struct pinctrl *pinctrl;
int err;
int tcblock;
@@ -389,6 +391,13 @@ static int atmel_tcb_pwm_probe(struct platform_device
*pdev)
return -ENOMEM;
}
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ atmel_tc_free(tc);
+ dev_err(&pdev->dev, "failed to get pinctrl config\n");
+ return PTR_ERR(pinctrl);
+ }
+
tcbpwm->chip.dev = &pdev->dev;
tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
tcbpwm->chip.of_xlate = of_pwm_xlate_with_flags;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] ARM: at91/tc: fix clock source id for tc block > 1
On 03/04/2013 09:26, Nicolas Ferre wrote:
On 04/03/2013 06:45 AM, Jean-Christophe PLAGNIOL-VILLARD :
On 18:46 Tue 02 Apr , Boris BREZILLON wrote:
This patch fixes wrong clock request for TC block 2.
The second block was using t0_clk, t1_clk and t2_clk clks instead of
t3_clk, t4_clk and t5_clk clks.
this is intended as we have 3 clock per device
You're right.
True.
Boris, did you hit an issue with former code that your patch is solving?
What is the reason for this patch?
I should have taken a closer look at the code before sending this patch.
I mistook clk name for conid devid association.
As I am enabling the tc block 1 clocks in the bootstrap code, I thought
this was the reason for these clocks to be enabled after the kernel boot.
But I tried to disable these clocks in the bootstrap and this works fine.
Sorry if I bothered you.
Best Regards,
Boris
Thanks, best regards,
Signed-off-by: Boris BREZILLON
---
drivers/misc/atmel_tclib.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/misc/atmel_tclib.c b/drivers/misc/atmel_tclib.c
index c8d8e38..768a988 100644
--- a/drivers/misc/atmel_tclib.c
+++ b/drivers/misc/atmel_tclib.c
@@ -142,6 +142,8 @@ static int __init tc_probe(struct platform_device *pdev)
struct atmel_tc *tc;
struct clk *clk;
int irq;
+ charclk_id[7];
+ int clk_offset;
if (!platform_get_resource(pdev, IORESOURCE_MEM, 0))
return -EINVAL;
@@ -156,25 +158,31 @@ static int __init tc_probe(struct platform_device *pdev)
tc->pdev = pdev;
- clk = clk_get(&pdev->dev, "t0_clk");
- if (IS_ERR(clk)) {
- kfree(tc);
- return -EINVAL;
- }
-
/* Now take SoC information if available */
if (pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_node(atmel_tcb_dt_ids, pdev->dev.of_node);
if (match)
tc->tcb_config = match->data;
+ clk_offset = of_alias_get_id(tc->pdev->dev.of_node, "tcb");
+ } else
+ clk_offset = pdev->id;
+ clk_offset *= 3;
+
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ clk = clk_get(&pdev->dev, clk_id);
+ if (IS_ERR(clk)) {
+ kfree(tc);
+ return -EINVAL;
}
tc->clk[0] = clk;
- tc->clk[1] = clk_get(&pdev->dev, "t1_clk");
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ tc->clk[1] = clk_get(&pdev->dev, clk_id);
if (IS_ERR(tc->clk[1]))
tc->clk[1] = clk;
- tc->clk[2] = clk_get(&pdev->dev, "t2_clk");
+ snprintf(clk_id, sizeof(clk_id), "t%d_clk", clk_offset++);
+ tc->clk[2] = clk_get(&pdev->dev, clk_id);
if (IS_ERR(tc->clk[2]))
tc->clk[2] = clk;
--
1.7.9.5
___
linux-arm-kernel mailing list
linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 0/3] pinctrl: at91: add support for generic pinconf
Hello, This patch series is an attempt to add support for generic pin config syntax to at91 pinctrl driver. My primary goal is to add support for output configuration from dt definition. This is needed to fully move at91rm9200ek board to dt (other boards may have the same needs). This board use a pin to drive an external switch which select between 2 functionnalities: - mmc interface - spi interface The pin level is currently configured in the board init (init_machine) function based on user config choices (CONFIG_MTD_AT91_DATAFLASH_CARD). Instead of adding a new flag to the current (native) pin config binding, I tried to add support for the generic pin config used by some pinctrl drivers (i.e. rockchip). Is this the right way to do this or should I add a new at91 native flags for output config (OUTPUT_HIGH/LOW) ? The second patch introduce a new config parameter to add a glitch filter on a specific pin. Glitch filter is similar to bounce filter (or debounce) but with a smaller delay (expressed in nsecs ?). I'm not sure this is the right approach. Maybe we should reuse the debounce parameter and add a flag to specify the delay unit (usec or nsec). What do you think ? The third patch migrate sama5 dt boards to the new generic config syntax. Please feel free to share your thoughts. Best Regards, Boris Boris BREZILLON (3): pinctrl: add new generic pinconf config for deglitch filter pinctrl: at91: add support for generic pinconf ARM: at91/dt: move sama5 to generic pinconf .../bindings/pinctrl/atmel,at91-pinctrl.txt| 43 ++- .../bindings/pinctrl/pinctrl-bindings.txt |1 + arch/arm/boot/dts/sama5d3.dtsi | 363 ++-- arch/arm/boot/dts/sama5d3xdm.dtsi |2 +- arch/arm/boot/dts/sama5d3xmb.dtsi | 12 +- drivers/pinctrl/Kconfig|2 +- drivers/pinctrl/pinconf-generic.c |2 + drivers/pinctrl/pinctrl-at91.c | 265 +- include/linux/pinctrl/pinconf-generic.h|5 + 9 files changed, 494 insertions(+), 201 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 1/3] pinctrl: add new generic pinconf config for deglitch filter
Add a new parameter to support deglitch filter configuration.
A deglitch filter works like a debounce filter but with a smaller
delay (nanoseconds).
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/pinctrl-bindings.txt |1 +
drivers/pinctrl/pinconf-generic.c |2 ++
include/linux/pinctrl/pinconf-generic.h|5 +
3 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
index 1958ca9..2f7613e 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
@@ -154,6 +154,7 @@ drive-strength - sink or source at most X mA
input-schmitt-enable - enable schmitt-trigger mode
input-schmitt-disable - disable schmitt-trigger mode
input-debounce - debounce mode with debound time X
+input-deglitch - deglitch mode
low-power-enable - enable low power mode
low-power-disable - disable low power mode
output-low - set the pin to output mode with low level
diff --git a/drivers/pinctrl/pinconf-generic.c
b/drivers/pinctrl/pinconf-generic.c
index 2c62225..f14a386 100644
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -51,6 +51,7 @@ static struct pin_config_item conf_items[] = {
PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT_ENABLE, "input schmitt enabled",
NULL),
PCONFDUMP(PIN_CONFIG_INPUT_SCHMITT, "input schmitt trigger", NULL),
PCONFDUMP(PIN_CONFIG_INPUT_DEBOUNCE, "input debounce", "usec"),
+ PCONFDUMP(PIN_CONFIG_INPUT_DEGLITCH, "input deglitch", NULL),
PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector"),
PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL),
PCONFDUMP(PIN_CONFIG_LOW_POWER_MODE, "pin low power", "mode"),
@@ -163,6 +164,7 @@ static struct pinconf_generic_dt_params dt_params[] = {
{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
{ "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
+ { "input-deglitch", PIN_CONFIG_INPUT_DEGLITCH, 0 },
{ "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 },
{ "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 },
{ "output-low", PIN_CONFIG_OUTPUT, 0, },
diff --git a/include/linux/pinctrl/pinconf-generic.h
b/include/linux/pinctrl/pinconf-generic.h
index fb90ef5..aa06535 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -72,6 +72,10 @@
* which means it will wait for signals to settle when reading inputs. The
* argument gives the debounce time in usecs. Setting the
* argument to zero turns debouncing off.
+ * @PIN_CONFIG_INPUT_DEGLITCH: this will configure the pin to deglitch mode,
+ * which means it will wait for signals to settle when reading inputs. The
+ * If the argument != 0, deglitch mode is enabled. If it's 0, deglitch
+ * mode is disabled.
* @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
* supplies, the argument to this parameter (on a custom format) tells
* the driver which alternative power source to use.
@@ -102,6 +106,7 @@ enum pin_config_param {
PIN_CONFIG_INPUT_SCHMITT_ENABLE,
PIN_CONFIG_INPUT_SCHMITT,
PIN_CONFIG_INPUT_DEBOUNCE,
+ PIN_CONFIG_INPUT_DEGLITCH,
PIN_CONFIG_POWER_SOURCE,
PIN_CONFIG_SLEW_RATE,
PIN_CONFIG_LOW_POWER_MODE,
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
Add support for generic pin configuration to pinctrl-at91 driver.
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 43 +++-
drivers/pinctrl/Kconfig|2 +-
drivers/pinctrl/pinctrl-at91.c | 265 ++--
3 files changed, 289 insertions(+), 21 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 7ccae49..7a7c0c4 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -18,7 +18,9 @@ mode) this pin can work on and the 'config' configures
various pad settings
such as pull-up, multi drive, etc.
Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl"
+- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl".
+ Add "generic-pinconf" to the compatible string list to use the generic pin
+ configuration syntax.
- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
configured in this periph mode. All the periph and bank need to be describe.
@@ -83,6 +85,11 @@ Required properties for pin configuration node:
setting. The format is atmel,pins = .
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
+ Dependending on the presence of the "generic-pinconf" string in the
+ compatible property the 4th cell is:
+ * a phandle referencing a generic pin config node (refer to
+ pinctrl-bindings.txt)
+ * an integer defining the pin config (see the following description)
Bits used for CONFIG:
PULL_UP(1 << 0): indicate this pin need a pull up.
@@ -132,6 +139,40 @@ pinctrl@f400 {
};
};
+or
+
+pinctrl@f400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "atmel,at91rm9200-pinctrl", "generic-pinconf",
"simple-bus";
+ reg = <0xf400 0x600>;
+
+ atmel,mux-mask = <
+ /*A B */
+ 0x 0xffc00c3b /* pioA */
+ 0x 0x7fff3ccf /* pioB */
+ 0x 0x007f /* pioC */
+ >;
+
+ pcfg_none: pcfg_none {
+ bias-disable;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pullup;
+ };
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <1 14 0x1 &pcfg_none/* PB14 periph
A */
+1 15 0x1 &pcfg_pull_up>; /* PB15 periph
A with pullup */
+ };
+ };
+};
+
dbgu: serial@f200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf200 0x200>;
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bdb1a87..55a4f2c 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -54,7 +54,7 @@ config PINCTRL_AT91
depends on OF
depends on ARCH_AT91
select PINMUX
- select PINCONF
+ select GENERIC_PINCONF
help
Say Y here to enable the at91 pinctrl driver
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 7cce066..1994dd2 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
/* Since we request GPIOs from ourself */
@@ -32,6 +33,7 @@
#include
#include "core.h"
+#include "pinconf.h"
#define MAX_NB_GPIO_PER_BANK 32
@@ -85,6 +87,21 @@ enum at91_mux {
AT91_MUX_PERIPH_D = 4,
};
+struct at91_generic_pinconf {
+ unsigned long *configs;
+ unsigned intnconfigs;
+};
+
+enum at91_pinconf_type {
+ AT91_PINCONF_NATIVE,
+ AT91_PINCONF_GENERIC,
+};
+
+union at91_pinconf {
+ unsigned long native;
+ struct at91_generic_pinconf generic;
+};
+
/**
* struct at91_pmx_pin - describes an At91 pin mux
* @bank: the bank of the pin
@@ -93,10 +110,11 @@ enum at91_mux {
* @conf: the configuration of the pin: PULL_UP, MULTIDRIVE etc...
*/
struct at91_pmx_pin {
- uint32_tbank;
- uint32_tpin;
- enum at91_mux mux;
- unsigned long conf;
+ uint32_tbank;
+ uint32_tpin;
+ enum at91_mux mux;
+ enum at91_pinconf_type conftype;
+ union at91_pinconf conf;
};
/**
@@ -278,8 +296,16 @@ static int at91_dt_node_to_map(struct pinctrl_dev *pctldev,
new_map[i].type = PIN_M
[RFC PATCH 3/3] ARM: at91/dt: move sama5 to generic pinconf
Add generic pinconf definitions and reference appropriate configs in
atmel,pins properties.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sama5d3.dtsi| 363 +++--
arch/arm/boot/dts/sama5d3xdm.dtsi |2 +-
arch/arm/boot/dts/sama5d3xmb.dtsi | 12 +-
3 files changed, 197 insertions(+), 180 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index a1d5e25..3e38383 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -402,7 +402,7 @@
pinctrl@f200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl",
"atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91sam9x5-pinctrl",
"atmel,at91rm9200-pinctrl", "generic-pinconf", "simple-bus";
ranges = <0xf200 0xf200 0xa00>;
atmel,mux-mask = <
/* A B C */
@@ -413,206 +413,223 @@
0x 0xbf9f8000 0x1800
/* pioE */
>;
+ pcfg_none: pcfg_none {
+ bias-disable;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pull-up;
+ };
+
+ pcfg_deglitch: pcfg_deglitch {
+ input-deglitch = <1>;
+ };
+
+ pcfg_pull_up_deglitch: pcfg_pull_up_deglitch {
+ bias-pull-up;
+ input-deglitch = <1>;
+ };
+
/* shared pinctrl settings */
adc0 {
pinctrl_adc0_adtrg: adc0_adtrg {
atmel,pins =
- ; /* PD19 periph A ADTRG */
+ ;/* PD19 periph A ADTRG */
};
pinctrl_adc0_ad0: adc0_ad0 {
atmel,pins =
- ; /* PD20 periph A AD0 */
+ ;/* PD20 periph A AD0 */
};
pinctrl_adc0_ad1: adc0_ad1 {
atmel,pins =
- ; /* PD21 periph A AD1 */
+ ;/* PD21 periph A AD1 */
};
pinctrl_adc0_ad2: adc0_ad2 {
atmel,pins =
- ; /* PD22 periph A AD2 */
+ ;/* PD22 periph A AD2 */
};
pinctrl_adc0_ad3: adc0_ad3 {
atmel,pins =
- ; /* PD23 periph A AD3 */
+ ;/* PD23 periph A AD3 */
};
pinctrl_adc0_ad4: adc0_ad4 {
atmel,pins =
- ; /* PD24 periph A AD4 */
+ ;/* PD24 periph A AD4 */
};
pinctrl_adc0_ad5: adc0_ad5 {
atmel,pins =
- ; /* PD25 periph A AD5 */
+ ;/* PD25 periph A AD5 */
};
pinctrl_adc0_ad6: adc0_ad6 {
atmel,pins =
- ; /* PD26 periph A AD6 */
+ ;/* PD26 periph A AD6 */
};
Re: [RFC PATCH 0/3] pinctrl: at91: add support for generic pinconf
On 24/08/2013 23:32, Boris BREZILLON wrote: Hello, This patch series is an attempt to add support for generic pin config syntax to at91 pinctrl driver. My primary goal is to add support for output configuration from dt definition. This is needed to fully move at91rm9200ek board to dt (other boards may have the same needs). This board use a pin to drive an external switch which select between 2 functionnalities: - mmc interface - spi interface The pin level is currently configured in the board init (init_machine) function based on user config choices (CONFIG_MTD_AT91_DATAFLASH_CARD). Instead of adding a new flag to the current (native) pin config binding, I tried to add support for the generic pin config used by some pinctrl drivers (i.e. rockchip). Is this the right way to do this or should I add a new at91 native flags for output config (OUTPUT_HIGH/LOW) ? The second patch introduce a new config parameter to add a glitch filter on a specific pin. The first patch, not the second. Glitch filter is similar to bounce filter (or debounce) but with a smaller delay (expressed in nsecs ?). I'm not sure this is the right approach. Maybe we should reuse the debounce parameter and add a flag to specify the delay unit (usec or nsec). What do you think ? The third patch migrate sama5 dt boards to the new generic config syntax. Please feel free to share your thoughts. Best Regards, Boris Boris BREZILLON (3): pinctrl: add new generic pinconf config for deglitch filter pinctrl: at91: add support for generic pinconf ARM: at91/dt: move sama5 to generic pinconf .../bindings/pinctrl/atmel,at91-pinctrl.txt| 43 ++- .../bindings/pinctrl/pinctrl-bindings.txt |1 + arch/arm/boot/dts/sama5d3.dtsi | 363 ++-- arch/arm/boot/dts/sama5d3xdm.dtsi |2 +- arch/arm/boot/dts/sama5d3xmb.dtsi | 12 +- drivers/pinctrl/Kconfig|2 +- drivers/pinctrl/pinconf-generic.c |2 + drivers/pinctrl/pinctrl-at91.c | 265 +- include/linux/pinctrl/pinconf-generic.h|5 + 9 files changed, 494 insertions(+), 201 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v4 2/5] mmc: atmel-mci: prepare clk before calling enable
Hello Chris,
On 25/08/2013 05:18, Chris Ball wrote:
Hi,
On Thu, Jul 18 2013, Boris BREZILLON wrote:
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.
Signed-off-by: Boris BREZILLON
Acked-by: Ludovic Desroches
Okay, pushed to mmc-next for 3.12.
Thanks.
Boris, you got feedback from Thomas Petazzoni and Russell King, but
you didn't CC either of them on the patch v4
I didn't knew I had to add the reviewers of a patch in the cc list
of the future versions. I'll do it next time.
, and you didn't write a
changelog explaining the differences between patches v3 and v4 --
please do both of those next time.
The changelog is in the cover letter ("Changes since v3").
But I didn't send you this cover letter.
Also, it looks like the Ack from Ludovic happened away from the MMC
list, since I don't see a message from Ludovic on the thread here.
It would be better if the Ack happened somewhere I can see it.
The 'Acked-by: Ludovic Desroches ' was added
in the 2nd version of this patch series.
But I don't know if I should have kept it in this version since this
patch has evolved.
Thanks for these feebacks, I'm still learning the good practices of the
kernel
submission process.
I'll check these points next time.
Best Regards,
Boris
Thanks,
- Chris.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] net/cadence/macb: fix kernel Oops if no PHY were discovered during probe
Hello Bo, On 26/08/2013 11:09, Bo Shen wrote: Hi Boris, On 08/25/2013 03:21 AM, Boris BREZILLON wrote: Test the presence of a PHY device before printing attached PHY informations. Signed-off-by: Boris BREZILLON --- drivers/net/ethernet/cadence/macb.c |6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index e866608..fd3b67f 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -1868,8 +1868,10 @@ static int __init macb_probe(struct platform_device *pdev) dev->irq, dev->dev_addr); phydev = bp->phy_dev; -netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", -phydev->drv->name, dev_name(&phydev->dev), phydev->irq); +if (phydev) +netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", +phydev->drv->name, dev_name(&phydev->dev), +phydev->irq); Actually no need this check, if PHY is attached failed, the macb driver probe will fail, then it won't show this message. You're right (thanks for pointing this out). Indeed this is a bug I introduced in this patch series ( https://lkml.org/lkml/2013/8/22/381). In macb_mii_init function, the err field may be set to 0 (instead of the default -ENXIO value) if no PHY is discovered. As macb_mii_probe return code is not copied to err, this result in a 0 return even if macb_mii_probe failed. Nicolas, forget about this patch, I'll fix this in the appropriate patch series (except if you plan to add dynamic MAC/PHY association, and treat missing PHY during probe process as an acceptable result :-)). Best Regards, Boris BREZILLON return 0; Best Regards, Bo Shen -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 0/2] net/cadence/macb: add support for dt phy definition
Hello, This patch series adds support for ethernet phy definition using device tree. This may help in moving some at91 boards to dt (some of them define an interrupt pin). Tested on samad31ek. Best Regards, Boris Changes since v1: - fix wrong macb_mii_init return code when no PHY device is discovered Boris BREZILLON (2): net/cadence/macb: add support for dt phy definition ARM: at91/dt: define phy available on sama5d3 mother board arch/arm/boot/dts/sama5d3xmb.dtsi |8 ++ drivers/net/ethernet/cadence/macb.c | 47 +++ 2 files changed, 45 insertions(+), 10 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/2] ARM: at91/dt: define phy available on sama5d3 mother board
This patch describe the phy used on atmel sama5d3 mother board:
- phy address
- phy interrupt pin
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sama5d3xmb.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 8a9e05d..e9521d5 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -81,6 +81,14 @@
macb1: ethernet@f802c000 {
phy-mode = "rmii";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&pioE>;
+ interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+ reg = <1>;
+ };
};
pinctrl@f200 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/2] net/cadence/macb: add support for dt phy definition
The macb driver only handle PHY description through platform_data
(macb_platform_data).
Thus, when using dt you cannot define phy properties like phy address or
phy irq pin.
This patch makes use of the of_mdiobus_register to add support for
phy device definition using dt.
A fallback to the autoscan procedure is added in case there is no phy
devices defined in dt.
Signed-off-by: Boris BREZILLON
---
drivers/net/ethernet/cadence/macb.c | 47 +++
1 file changed, 37 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index e866608..7660c45 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
#include
#include
@@ -275,7 +276,7 @@ static int macb_mii_probe(struct net_device *dev)
phydev = phy_find_first(bp->mii_bus);
if (!phydev) {
netdev_err(dev, "no PHY found\n");
- return -1;
+ return -ENXIO;
}
pdata = dev_get_platdata(&bp->pdev->dev);
@@ -314,6 +315,7 @@ static int macb_mii_probe(struct net_device *dev)
int macb_mii_init(struct macb *bp)
{
struct macb_platform_data *pdata;
+ struct device_node *np;
int err = -ENXIO, i;
/* Enable management port */
@@ -335,26 +337,51 @@ int macb_mii_init(struct macb *bp)
bp->mii_bus->parent = &bp->dev->dev;
pdata = bp->pdev->dev.platform_data;
- if (pdata)
- bp->mii_bus->phy_mask = pdata->phy_mask;
-
bp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
if (!bp->mii_bus->irq) {
err = -ENOMEM;
goto err_out_free_mdiobus;
}
- for (i = 0; i < PHY_MAX_ADDR; i++)
- bp->mii_bus->irq[i] = PHY_POLL;
-
dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
- if (mdiobus_register(bp->mii_bus))
+ np = bp->pdev->dev.of_node;
+ if (np) {
+ /* try dt phy registration */
+ err = of_mdiobus_register(bp->mii_bus, np);
+
+ /* fallback to standard phy registration if no phy were
+ found during dt phy registration */
+ if (!err && !phy_find_first(bp->mii_bus)) {
+ for (i = 0; i < PHY_MAX_ADDR; i++) {
+ struct phy_device *phydev;
+
+ phydev = mdiobus_scan(bp->mii_bus, i);
+ if (IS_ERR(phydev)) {
+ err = PTR_ERR(phydev);
+ break;
+ }
+ }
+
+ if (err)
+ goto err_out_unregister_bus;
+ }
+ } else {
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ bp->mii_bus->irq[i] = PHY_POLL;
+
+ if (pdata)
+ bp->mii_bus->phy_mask = pdata->phy_mask;
+
+ err = mdiobus_register(bp->mii_bus);
+ }
+
+ if (err)
goto err_out_free_mdio_irq;
- if (macb_mii_probe(bp->dev) != 0) {
+ err = macb_mii_probe(bp->dev);
+ if (err)
goto err_out_unregister_bus;
- }
return 0;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 2/4] watchdog: at91sam9_wdt: update device tree doc
Hello,
I missed Grant's ack on this patch:
Acked-by: Grant Likely
Best Regards,
Boris
On 21/06/2013 09:23, Boris BREZILLON wrote:
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index fcdd48f..e043106 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -9,11 +9,37 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- interrupts : Should contain WDT interrupt.
+- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
+ seconds. This value should be less than 16. It is used to compute the
+ WDV field.
+- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
+ seconds. This value should be less than 4 times the max-heartbeat-sec
+ value. It is used to compute the WDD field.
+- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
+ use the at91 watchdog reset. Software watchdog use the watchdog
+ interrupt to trigger a software reset.
+- atmel,reset-type : Should be "proc" or "all".
+ "all" : assert peripherals and processor reset signals
+ "proc" : assert the processor reset signal
+ This is valid only when using "hardware" watchdog.
+- atmel,disable : Should be present if you want to disable the watchdog.
+- atmel,idle-halt : Should be present if you want to stop the watchdog when
+ entering idle state.
+- atmel,dbg-halt : Should be present if you want to stop the watchdog when
+ entering debug state.
Example:
-
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
- timeout-sec = <10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ timeout-sec = <15>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
};
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 0/4] watchdog: at91sam9_wdt: handle already configured wdt
Hello Yang, Did you test/review this series ? If you did, could you add your Acked, Reviewed and/or Tested-by. I'd really like to get this series merged to mainline. Thanks. Best Regards, Boris On 21/06/2013 09:19, Boris BREZILLON wrote: Hello, This patch series is a porposal to enhance the sam9 watchdog timer support. The at91sam9 watchdog timer can only be configured once, and the current implementation tries to configure it in a static way: - 2 seconds timeout - wdt restart every 500ms If the timer has already been configured with different values, it returns an error and do not create any watchdog device. This is not critical if the watchdog is disabled, but if it has been enabled with different timeout values it will lead to a SoC reset. This patch series tries to address this issue by adapting the heartbeat value according the WDT timer config: - it first tries to configure the timer as requested. - if it fails it fallbacks to the current config, adapting its heartbeat timer to the needs This patch series also move to a dynamically allocated at91wdt device instead of the static instance. I'm not sure this is the best solution, so please tell me if you prefer to keep static instance of watchdog. It adds a new at91 wdt type: software. This new type make use of the at91 wdt interrupt to trigger a software reboot. Finally it adds several properties to the device tree bindings. Best Regards, Boris Change since v1: - fix typo in documentaion - fix irq dt definition for sama5d3 SoC Boris BREZILLON (4): watchdog: at91sam9_wdt: better watchdog support watchdog: at91sam9_wdt: update device tree doc ARM: at91/dt: add sam9 watchdog default options to SoCs ARM: at91/dt: add watchdog properties to kizbox board .../devicetree/bindings/watchdog/atmel-wdt.txt | 30 +- arch/arm/boot/dts/at91sam9260.dtsi |5 + arch/arm/boot/dts/at91sam9263.dtsi |5 + arch/arm/boot/dts/at91sam9g45.dtsi |5 + arch/arm/boot/dts/at91sam9n12.dtsi |5 + arch/arm/boot/dts/at91sam9x5.dtsi |5 + arch/arm/boot/dts/kizbox.dts |6 + arch/arm/boot/dts/sama5d3.dtsi |5 + drivers/watchdog/at91sam9_wdt.c| 319 +++- 9 files changed, 300 insertions(+), 85 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2 2/2] ARM: at91/dt: define phy available on sama5d3 mother board
Hello Sergei,
On 26/08/2013 15:21, Sergei Shtylyov wrote:
Hello.
On 26-08-2013 16:35, Boris BREZILLON wrote:
This patch describe the phy used on atmel sama5d3 mother board:
- phy address
- phy interrupt pin
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sama5d3xmb.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 8a9e05d..e9521d5 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -81,6 +81,14 @@
macb1: ethernet@f802c000 {
phy-mode = "rmii";
+
+#address-cells = <1>;
+#size-cells = <0>;
+phy0: ethernet-phy@0 {
Address part of the node name doesn't match the "reg" property.
Indeed, I based my definition on arch/arc/boot/dts/angel4.dts where phy
is registered like this :
phy0: ethernet-phy@0 {
reg = <1>;
};
I think it's buggy there too, because I checked other dts files and they
all put the same address
after @ and in reg register.
I'll fix this fot the next version.
Thanks
Best Regards,
Boris
+interrupt-parent = <&pioE>;
+interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+reg = <1>;
+};
WBR, Sergei
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 1/3] pinctrl: add new generic pinconf config for deglitch filter
Hello Stephen, On 26/08/2013 18:50, Stephen Warren wrote: On 08/24/2013 03:35 PM, Boris BREZILLON wrote: Add a new parameter to support deglitch filter configuration. A deglitch filter works like a debounce filter but with a smaller delay (nanoseconds). Why not use the existing debounce property, just with a small delay specified. It seems like that's exactly what the property is for? That's one of the question I asked in my cover letter :-) Indeed the at91 deglitch filter delay is not configurable and is statically assigned to half a master clk cycle (if master clk = 133MHz -> 8 ns). The debounce property argument is currently expressed in usecs. This will result in always selecting the debounce filter (which is also available on at91 SoCs) over the deglitch filter. Could we add a flag in the deglitch argument to specify the delay unit (nsecs or usecs) ? Best Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
On 26/08/2013 18:53, Stephen Warren wrote: On 08/24/2013 03:37 PM, Boris BREZILLON wrote: Add support for generic pin configuration to pinctrl-at91 driver. diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt Required properties for iomux controller: -- compatible: "atmel,at91rm9200-pinctrl" +- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl". You seem to also be adding a second chip name to the list here, which is more than the patch subject/description imply you're doing... This is an update of the documentation: "atmel,at91sam9x5-pinctrl" compatible is already used in the pinctrl driver but the documention was not updated. But I agree, this should not be part of this series. + Add "generic-pinconf" to the compatible string list to use the generic pin + configuration syntax. "generic-pinconf" is too generic of a compatible value for this binding to define. Instead, I think you want to either: a) Use compatible="atmel,at91rm9200-pinctrl" for the old binding, use compatible="atmel,at91rm9200-pinctrl-generic" for the new binding or: b) Define Boolean property atmel,generic-pinconf (perhaps a better name could be chosen?). If it's not present, parse the node assuming the old binding. If it is present, parse the node assuming the new binding. Okay. I thought this property string could be generic as it may concern other drivers too (in order to keep compatibility with old dt ABI and add support the generic pinconf binding). Anyway, I prefer the first proposition. pinctrl single driver is already using these names: |compatible = "pinctrl-single" for non generic pinconf binding ||compatible = "pinconf-single" ||for generic pinconf binding| So I think we should use something similar: |compatible = "atmel,at91xx-pinctrl" for non generic pinconf binding ||compatible = "|||atmel,at91xx-|pinconf" ||for generic pinconf binding| What do you think ? Best Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
Hello Jean-Christophe,
Le 26/08/2013 19:53, Jean-Christophe PLAGNIOL-VILLARD a écrit :
On 23:37 Sat 24 Aug , Boris BREZILLON wrote:
Add support for generic pin configuration to pinctrl-at91 driver.
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 43 +++-
drivers/pinctrl/Kconfig|2 +-
drivers/pinctrl/pinctrl-at91.c | 265 ++--
3 files changed, 289 insertions(+), 21 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 7ccae49..7a7c0c4 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -18,7 +18,9 @@ mode) this pin can work on and the 'config' configures
various pad settings
such as pull-up, multi drive, etc.
Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl"
+- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl".
+ Add "generic-pinconf" to the compatible string list to use the generic pin
+ configuration syntax.
- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
configured in this periph mode. All the periph and bank need to be describe.
@@ -83,6 +85,11 @@ Required properties for pin configuration node:
setting. The format is atmel,pins = .
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
+ Dependending on the presence of the "generic-pinconf" string in the
+ compatible property the 4th cell is:
+ * a phandle referencing a generic pin config node (refer to
+ pinctrl-bindings.txt)
+ * an integer defining the pin config (see the following description)
Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up.
@@ -132,6 +139,40 @@ pinctrl@f400 {
};
};
+or
+
+pinctrl@f400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "atmel,at91rm9200-pinctrl", "generic-pinconf",
"simple-bus";
nack your break the backword compatibility
if we use a old kernel with this new dt nothing will work
as the old kernel will never known the the "generic-pinconf" means anything
Your're right, I didn't think of this case (old kernel with new dt).
if we want to use generic-pinconf support you *CAN NOT* use
atmel,at91rm9200-pinctrl
in the compatible
What about using "atmel,at91xx-pinconf" instead of
"atmel,at91xx-pinctrl" to notify
the generic pinconf compatibility (as done by single pinctrl driver) ?
+ reg = <0xf400 0x600>;
+
+ atmel,mux-mask = <
+ /*A B */
+ 0x 0xffc00c3b /* pioA */
+ 0x 0x7fff3ccf /* pioB */
+ 0x 0x007f /* pioC */
+ >;
+
+ pcfg_none: pcfg_none {
+ bias-disable;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pullup;
+ };
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <1 14 0x1 &pcfg_none /* PB14 periph
A */
+1 15 0x1 &pcfg_pull_up>;/* PB15 periph
A with pullup */
+ };
+ };
+};
+
dbgu: serial@f200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf200 0x200>;
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bdb1a87..55a4f2c 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -54,7 +54,7 @@ config PINCTRL_AT91
depends on OF
depends on ARCH_AT91
select PINMUX
- select PINCONF
+ select GENERIC_PINCONF
help
Say Y here to enable the at91 pinctrl driver
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 7cce066..1994dd2 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
/* Since we request GPIOs from ourself */
@@ -32,6 +33,7 @@
#include
#include "core.h"
+#include "pinconf.h"
#define MAX_NB_GPIO_PER_BANK 32
@@ -85,6 +87,21 @@ enum at91_mux {
AT91_MUX_PERIPH_D = 4,
};
+struct at91_generic_pinconf {
+ unsigned long *configs;
+ unsigned intnconfigs;
+};
+
+enum at91_pinconf_type {
+ AT91_PINCONF_NATIVE,
+ AT91_PINCONF_GENERIC,
+};
+
+union at91_pinconf {
+ unsigned long
Re: [RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
Le 26/08/2013 21:18, Jean-Christophe PLAGNIOL-VILLARD a écrit :
On 20:45 Mon 26 Aug , boris brezillon wrote:
Hello Jean-Christophe,
Le 26/08/2013 19:53, Jean-Christophe PLAGNIOL-VILLARD a écrit :
On 23:37 Sat 24 Aug , Boris BREZILLON wrote:
Add support for generic pin configuration to pinctrl-at91 driver.
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 43 +++-
drivers/pinctrl/Kconfig|2 +-
drivers/pinctrl/pinctrl-at91.c | 265 ++--
3 files changed, 289 insertions(+), 21 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 7ccae49..7a7c0c4 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -18,7 +18,9 @@ mode) this pin can work on and the 'config' configures
various pad settings
such as pull-up, multi drive, etc.
Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl"
+- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl".
+ Add "generic-pinconf" to the compatible string list to use the generic pin
+ configuration syntax.
- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
configured in this periph mode. All the periph and bank need to be describe.
@@ -83,6 +85,11 @@ Required properties for pin configuration node:
setting. The format is atmel,pins = .
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
+ Dependending on the presence of the "generic-pinconf" string in the
+ compatible property the 4th cell is:
+ * a phandle referencing a generic pin config node (refer to
+ pinctrl-bindings.txt)
+ * an integer defining the pin config (see the following description)
Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up.
@@ -132,6 +139,40 @@ pinctrl@f400 {
};
};
+or
+
+pinctrl@f400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "atmel,at91rm9200-pinctrl", "generic-pinconf",
"simple-bus";
nack your break the backword compatibility
if we use a old kernel with this new dt nothing will work
as the old kernel will never known the the "generic-pinconf" means anything
Your're right, I didn't think of this case (old kernel with new dt).
if we want to use generic-pinconf support you *CAN NOT* use
atmel,at91rm9200-pinctrl
in the compatible
What about using "atmel,at91xx-pinconf" instead of
"atmel,at91xx-pinctrl" to notify
the generic pinconf compatibility (as done by single pinctrl driver) ?
no as the rm9200 IP and sam9x5 IP are only partially compatible
you MUST distinguish them
What I meant is use the "-pinctrl" and "-pinconf" suffixes to
differentiate between native and generic
pinconf bindings and keep the IP names as it is right now (replace xx
with the IP name) to differentiate
the IP versions.
This gives us the following compatible strings:
"atmel,at91rm9200-pinctrl"
"atmel,at91rm9200-pinconf"
"atmel,at91sam9x5-pinctrl"
"atmel,at91sam9x5-pinconf"
+ reg = <0xf400 0x600>;
+
+ atmel,mux-mask = <
+ /*A B */
+ 0x 0xffc00c3b /* pioA */
+ 0x 0x7fff3ccf /* pioB */
+ 0x 0x007f /* pioC */
+ >;
+
+ pcfg_none: pcfg_none {
+ bias-disable;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pullup;
+ };
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <1 14 0x1 &pcfg_none /* PB14 periph
A */
+1 15 0x1 &pcfg_pull_up>;/* PB15 periph
A with pullup */
+ };
+ };
+};
+
dbgu: serial@f200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf200 0x200>;
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bdb1a87..55a4f2c 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -54,7 +54,7 @@ config PINCTRL_AT91
depends on OF
depends on ARCH_AT91
select PINMUX
- select PINCONF
+ select GENERIC_PINCONF
help
Say Y here to enable the at91 pinctrl driver
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 7cce066..1994dd2 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+
Re: [RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
On 27/08/2013 05:54, Stephen Warren wrote:
On 08/26/2013 12:45 PM, boris brezillon wrote:
Hello Jean-Christophe,
Le 26/08/2013 19:53, Jean-Christophe PLAGNIOL-VILLARD a écrit :
On 23:37 Sat 24 Aug , Boris BREZILLON wrote:
Add support for generic pin configuration to pinctrl-at91 driver.
...
a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
...
configures various pad settings
such as pull-up, multi drive, etc.
Required properties for iomux controller:
-- compatible: "atmel,at91rm9200-pinctrl"
+- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl".
+ Add "generic-pinconf" to the compatible string list to use the
generic pin
...
+pinctrl@f400 {
+#address-cells = <1>;
+#size-cells = <1>;
+ranges;
+compatible = "atmel,at91rm9200-pinctrl", "generic-pinconf",
"simple-bus";
nack your break the backword compatibility
if we use a old kernel with this new dt nothing will work
as the old kernel will never known the the "generic-pinconf" means
anything
Your're right, I didn't think of this case (old kernel with new dt).
Well, just to be clear: If a new DT uses a new compatible value of any
kind, be it adding "generic-pinconf" or switching to "foo-yyy" rather
than "foo-yyy", it won't be compatible... That somewhat implies that you
can't ever replace an old binding with something new.
That's absolutely right, however the behaviour won't be the same in both
cases.
1) If your (new) dt defines its pinctrl using the "foo-pinconf"
compatible string and
your (old) kernel does not support it, the pinctrl will never probe
the pinctrl definitions.
Moreover, if you want to define both old ("foo-pinctrl") and new
("foo-pinconf") pinctrl
definitions in your dt in order to support several kernel versions,
nothing prevents you
from doing it.
2) In the other hand, if you use an additional "generic-pinconf"
compatible string to signify
wether or not the pinctrl definition use the generic pinconf dt
binding, the (old) kernel
will probe the pinctrl definitions, ignore the "generic-pinconf"
string, and fail when parsing
the pinctrl configuration nodes (which are invalid pinctrl function
nodes in the current dt binding).
We have the same problem when using the 'atmel,generic-pinconf'
property inside a pinctrl node:
old kernels won't take this property into account.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 1/3] pinctrl: add new generic pinconf config for deglitch filter
On 27/08/2013 05:55, Stephen Warren wrote: On 08/26/2013 11:01 AM, boris brezillon wrote: Hello Stephen, On 26/08/2013 18:50, Stephen Warren wrote: On 08/24/2013 03:35 PM, Boris BREZILLON wrote: Add a new parameter to support deglitch filter configuration. A deglitch filter works like a debounce filter but with a smaller delay (nanoseconds). Why not use the existing debounce property, just with a small delay specified. It seems like that's exactly what the property is for? That's one of the question I asked in my cover letter :-) Indeed the at91 deglitch filter delay is not configurable and is statically assigned to half a master clk cycle (if master clk = 133MHz -> 8 ns). The debounce property argument is currently expressed in usecs. This will result in always selecting the debounce filter (which is also available on at91 SoCs) over the deglitch filter. Could we add a flag in the deglitch argument to specify the delay unit (nsecs or usecs) ? If the value is hard-coded in HW, why not use non-zero (or 1) to enable and zero to disable? Indeed at91 pins support both deglitch and debounce filter and I have to choose between the two given the argument value (in usec). Here's what I can do: if (arg >= 1/2 * slowclock)/* debounce case */ /* choose debounce filter and configure the delay according to the given argument value */ else /* deglitch case */ /* choose deglitch filter */ Slow clock is running at 32KHz which gives a 30 usec clock cycle. (this kind of thing is why I'm not convinced that generic pinconf works so well... What if we need psecs in the future?) Should I keep the at91 native pinconf binding and add the missing flags to this binding (OUTPUT configuration flags) ? This was another question I asked in my cover letter: wether or not the generic pinconf binding should be used. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 2/3] pinctrl: at91: add support for generic pinconf
On 27/08/2013 05:57, Stephen Warren wrote: On 08/26/2013 11:17 AM, boris brezillon wrote: On 26/08/2013 18:53, Stephen Warren wrote: On 08/24/2013 03:37 PM, Boris BREZILLON wrote: Add support for generic pin configuration to pinctrl-at91 driver. diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt Required properties for iomux controller: -- compatible: "atmel,at91rm9200-pinctrl" +- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl". You seem to also be adding a second chip name to the list here, which is more than the patch subject/description imply you're doing... This is an update of the documentation: "atmel,at91sam9x5-pinctrl" compatible is already used in the pinctrl driver but the documention was not updated. But I agree, this should not be part of this series. + Add "generic-pinconf" to the compatible string list to use the generic pin + configuration syntax. "generic-pinconf" is too generic of a compatible value for this binding to define. Instead, I think you want to either: a) Use compatible="atmel,at91rm9200-pinctrl" for the old binding, use compatible="atmel,at91rm9200-pinctrl-generic" for the new binding or: b) Define Boolean property atmel,generic-pinconf (perhaps a better name could be chosen?). If it's not present, parse the node assuming the old binding. If it is present, parse the node assuming the new binding. Okay. I thought this property string could be generic as it may concern other drivers too (in order to keep compatibility with old dt ABI and add support the generic pinconf binding). Anyway, I prefer the first proposition. pinctrl single driver is already using these names: |compatible = "pinctrl-single" for non generic pinconf binding ||compatible = "pinconf-single" ||for generic pinconf binding| So I think we should use something similar: |compatible = "atmel,at91xx-pinctrl" for non generic pinconf binding ||compatible = "|||atmel,at91xx-|pinconf" ||for generic pinconf binding| What do you think ? Hmmm. It is a little odd to switch out the compatible value and invent a new binding for the same HW. Isn't it possible to define both sets of properties in the binding, and have drivers look for either? Do you mean something like: atmel,pins = ;/* current dt binding */ atmel,generic-pins = ;/* new dt binding */ If that's what you had in mind, it will be a little bit tricky to handle, because AFAIK the pinconf_ops callbacks do not give me any element I could use to deduce the type of pinconf (generic or native). This implies I have to know early during the probe process which kind of binding is in use. Please tell me if I missed some key points, and this can be easily done. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 0/2] net/cadence/macb: add support for dt phy definition
Hello, This patch series adds support for ethernet phy definition using device tree. This may help in moving some at91 boards to dt (some of them define an interrupt pin). Tested on samad31ek. Best Regards, Boris Changes since v2: - fix wrong address of phy0 dt node Changes since v1: - fix wrong macb_mii_init return code when no PHY device is discovered Boris BREZILLON (2): net/cadence/macb: add support for dt phy definition ARM: at91/dt: define phy available on sama5d3 mother board arch/arm/boot/dts/sama5d3xmb.dtsi |8 ++ drivers/net/ethernet/cadence/macb.c | 48 +++ 2 files changed, 46 insertions(+), 10 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 1/2] net/cadence/macb: add support for dt phy definition
The macb driver only handle PHY description through platform_data
(macb_platform_data).
Thus, when using dt you cannot define phy properties like phy address or
phy irq pin.
This patch makes use of the of_mdiobus_register to add support for
phy device definition using dt.
A fallback to the autoscan procedure is added in case there is no phy
devices defined in dt.
Signed-off-by: Boris BREZILLON
---
drivers/net/ethernet/cadence/macb.c | 48 +++
1 file changed, 38 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index e866608..393afeb 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
#include
#include
@@ -275,7 +276,7 @@ static int macb_mii_probe(struct net_device *dev)
phydev = phy_find_first(bp->mii_bus);
if (!phydev) {
netdev_err(dev, "no PHY found\n");
- return -1;
+ return -ENXIO;
}
pdata = dev_get_platdata(&bp->pdev->dev);
@@ -314,6 +315,7 @@ static int macb_mii_probe(struct net_device *dev)
int macb_mii_init(struct macb *bp)
{
struct macb_platform_data *pdata;
+ struct device_node *np;
int err = -ENXIO, i;
/* Enable management port */
@@ -335,26 +337,52 @@ int macb_mii_init(struct macb *bp)
bp->mii_bus->parent = &bp->dev->dev;
pdata = bp->pdev->dev.platform_data;
- if (pdata)
- bp->mii_bus->phy_mask = pdata->phy_mask;
-
bp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
if (!bp->mii_bus->irq) {
err = -ENOMEM;
goto err_out_free_mdiobus;
}
- for (i = 0; i < PHY_MAX_ADDR; i++)
- bp->mii_bus->irq[i] = PHY_POLL;
-
dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
- if (mdiobus_register(bp->mii_bus))
+ np = bp->pdev->dev.of_node;
+ if (np) {
+ /* try dt phy registration */
+ err = of_mdiobus_register(bp->mii_bus, np);
+
+ /* fallback to standard phy registration if no phy were
+* found during dt phy registration
+*/
+ if (!err && !phy_find_first(bp->mii_bus)) {
+ for (i = 0; i < PHY_MAX_ADDR; i++) {
+ struct phy_device *phydev;
+
+ phydev = mdiobus_scan(bp->mii_bus, i);
+ if (IS_ERR(phydev)) {
+ err = PTR_ERR(phydev);
+ break;
+ }
+ }
+
+ if (err)
+ goto err_out_unregister_bus;
+ }
+ } else {
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ bp->mii_bus->irq[i] = PHY_POLL;
+
+ if (pdata)
+ bp->mii_bus->phy_mask = pdata->phy_mask;
+
+ err = mdiobus_register(bp->mii_bus);
+ }
+
+ if (err)
goto err_out_free_mdio_irq;
- if (macb_mii_probe(bp->dev) != 0) {
+ err = macb_mii_probe(bp->dev);
+ if (err)
goto err_out_unregister_bus;
- }
return 0;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/2] ARM: at91/dt: define phy available on sama5d3 mother board
This patch describe the phy used on atmel sama5d3 mother board:
- phy address
- phy interrupt pin
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/sama5d3xmb.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 8a9e05d..dba739b 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -81,6 +81,14 @@
macb1: ethernet@f802c000 {
phy-mode = "rmii";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@1 {
+ interrupt-parent = <&pioE>;
+ interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
+ reg = <1>;
+ };
};
pinctrl@f200 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 0/2] net/cadence/macb: add support for dt phy definition
Hello Dave, On 26/08/2013 22:04, David Miller wrote: From: Boris BREZILLON Date: Thu, 22 Aug 2013 17:56:20 +0200 This patch series adds support for ethernet phy definition using device tree. This may help in moving some at91 boards to dt (some of them define an interrupt pin). Tested on samad31ek. Series applied to net-next, thanks. Could you apply, the 3rd version of this series instead ? It fixes one bug when no phy is discovered and use the appropriate address for the phy dt node. Sorry for the inconvenience. Best Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/2] net/cadence/macb: add support for dt phy definition
Hello David, Sorry, I forgot to add your email in the cc list. Do you want me to send you the whole series ? Best Regards, Boris On 27/08/2013 09:36, Boris BREZILLON wrote: Hello, This patch series adds support for ethernet phy definition using device tree. This may help in moving some at91 boards to dt (some of them define an interrupt pin). Tested on samad31ek. Best Regards, Boris Changes since v2: - fix wrong address of phy0 dt node Changes since v1: - fix wrong macb_mii_init return code when no PHY device is discovered Boris BREZILLON (2): net/cadence/macb: add support for dt phy definition ARM: at91/dt: define phy available on sama5d3 mother board arch/arm/boot/dts/sama5d3xmb.dtsi |8 ++ drivers/net/ethernet/cadence/macb.c | 48 +++ 2 files changed, 46 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 1/3] pinctrl: add new generic pinconf config for deglitch filter
On 27/08/2013 09:42, Nicolas Ferre wrote: On 27/08/2013 08:16, boris brezillon : On 27/08/2013 05:55, Stephen Warren wrote: On 08/26/2013 11:01 AM, boris brezillon wrote: Hello Stephen, On 26/08/2013 18:50, Stephen Warren wrote: On 08/24/2013 03:35 PM, Boris BREZILLON wrote: Add a new parameter to support deglitch filter configuration. A deglitch filter works like a debounce filter but with a smaller delay (nanoseconds). Why not use the existing debounce property, just with a small delay specified. It seems like that's exactly what the property is for? That's one of the question I asked in my cover letter :-) Indeed the at91 deglitch filter delay is not configurable and is statically assigned to half a master clk cycle (if master clk = 133MHz -> 8 ns). The debounce property argument is currently expressed in usecs. This will result in always selecting the debounce filter (which is also available on at91 SoCs) over the deglitch filter. Could we add a flag in the deglitch argument to specify the delay unit (nsecs or usecs) ? If the value is hard-coded in HW, why not use non-zero (or 1) to enable and zero to disable? Indeed at91 pins support both deglitch and debounce filter and I have to choose between the two given the argument value (in usec). Here's what I can do: if (arg >= 1/2 * slowclock)/* debounce case */ /* choose debounce filter and configure the delay according to the given argument value */ else /* deglitch case */ /* choose deglitch filter */ Slow clock is running at 32KHz which gives a 30 usec clock cycle. I am not in favor for this kind of complicated heuristic. Deglitch and Debounce filters are different features in at91 (even if they pursuit the same goal). So I do prefer to let the user choose which feature is preferred for his application and add a different flag. (this kind of thing is why I'm not convinced that generic pinconf works so well... What if we need psecs in the future?) Should I keep the at91 native pinconf binding and add the missing flags to this binding (OUTPUT configuration flags) ? This was another question I asked in my cover letter: wether or not the generic pinconf binding should be used. The question is: how much this "generic" pinconf is... well... generic! And it is not a answer I can give. On the other hand, if the "generic" is not going to overcome the native pinctrl, I do not feel like switching to this at the cost of changing the whole dtsi/dts entries that we already have. So, it is more to Linus and Stephen to give us clues about this... Okay. I'll propose a new patch series adding native support for OUTPUT configuration of at91 pins (add OUTPUT_HIGH/LOW), and put this series in stand-by until a clear decision is made about generic pinconf. Thanks, Best Regards, Boris Bye, -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 0/2] net/cadence/macb: add support for dt phy definition
On 27/08/2013 11:07, Florian Fainelli wrote: Hello Boris, 2013/8/27 boris brezillon : Hello Dave, On 26/08/2013 22:04, David Miller wrote: From: Boris BREZILLON Date: Thu, 22 Aug 2013 17:56:20 +0200 This patch series adds support for ethernet phy definition using device tree. This may help in moving some at91 boards to dt (some of them define an interrupt pin). Tested on samad31ek. Series applied to net-next, thanks. Could you apply, the 3rd version of this series instead ? It fixes one bug when no phy is discovered and use the appropriate address for the phy dt node. Sorry for the inconvenience. You will probably have to resubmit an incremental patch, I have never seen David pick up another version of a patch once it has been pushed out: http://git.kernel.org/cgit/linux/kernel/git/davem/net-next.git/commit/?id=8c038e7e14b1c5f156745e3c4df0a3aa46173dd9 http://git.kernel.org/cgit/linux/kernel/git/davem/net-next.git/commit/?id=148cbb53ace32f584d208764c7f7e6aa8edb970c Okay, I will submit patches (based on net-next branch) to fix those bugs. Thanks. Best Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: at91/dt: fix phy address to match the reg register
Fix phy0 address to match the reg porperty defined in phy0 node.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d3xmb.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index e9521d5..dba739b 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy0: ethernet-phy@0 {
+ phy0: ethernet-phy@1 {
interrupt-parent = <&pioE>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
reg = <1>;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] net/cadence/macb: fix invalid 0 return if no phy is discovered on mii init
Replace misleading -1 (-EPERM) by a more appropriate return code (-ENXIO)
in macb_mii_probe function.
Save macb_mii_probe return before branching to err_out_unregister to avoid
erronous 0 return.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index fe06ab0..7660c45 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -276,7 +276,7 @@ static int macb_mii_probe(struct net_device *dev)
phydev = phy_find_first(bp->mii_bus);
if (!phydev) {
netdev_err(dev, "no PHY found\n");
- return -1;
+ return -ENXIO;
}
pdata = dev_get_platdata(&bp->pdev->dev);
@@ -379,9 +379,9 @@ int macb_mii_init(struct macb *bp)
if (err)
goto err_out_free_mdio_irq;
- if (macb_mii_probe(bp->dev) != 0) {
+ err = macb_mii_probe(bp->dev);
+ if (err)
goto err_out_unregister_bus;
- }
return 0;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] ARM: at91/dt: fix phy address in sama5xmb to match the reg property
Fix phy0 address to match the reg property defined in phy0 node.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
Changes since v1:
- better commit message
arch/arm/boot/dts/sama5d3xmb.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index e9521d5..dba739b 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy0: ethernet-phy@0 {
+ phy0: ethernet-phy@1 {
interrupt-parent = <&pioE>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
reg = <1>;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] ARM: at91/dt: fix phy address in sama5xmb to match the reg property
Sorry for the noise, but the previous commit message was not clear enough.
On 27/08/2013 14:41, Boris BREZILLON wrote:
Fix phy0 address to match the reg property defined in phy0 node.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
Changes since v1:
- better commit message
arch/arm/boot/dts/sama5d3xmb.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi
b/arch/arm/boot/dts/sama5d3xmb.dtsi
index e9521d5..dba739b 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy0: ethernet-phy@0 {
+ phy0: ethernet-phy@1 {
interrupt-parent = <&pioE>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
reg = <1>;
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] pinctrl: at91: fix get_pullup/down function return
In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the
pullup/down for this pin (pin is represented as a bit position) is
disabled.
Signed-off-by: Boris BREZILLON
---
drivers/pinctrl/pinctrl-at91.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index b90a3a0..19afb9a 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -325,7 +325,7 @@ static void at91_mux_disable_interrupt(void __iomem *pio,
unsigned mask)
static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin)
{
- return (readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1;
+ return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);
}
static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)
@@ -445,7 +445,7 @@ static void at91_mux_pio3_set_debounce(void __iomem *pio,
unsigned mask,
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
{
- return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1;
+ return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool
is_on)
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: at91/at91-pinctrl documentation: add missing sam9x5 compatible string
Add missing "atmel,at91sam9x5-pinctrl" compatible string to the documentation. Signed-off-by: Boris BREZILLON --- .../bindings/pinctrl/atmel,at91-pinctrl.txt|2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt index 648d60e..cf7c7bc 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt @@ -18,7 +18,7 @@ mode) this pin can work on and the 'config' configures various pad settings such as pull-up, multi drive, etc. Required properties for iomux controller: -- compatible: "atmel,at91rm9200-pinctrl" +- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl" - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be configured in this periph mode. All the periph and bank need to be describe. -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] pinctrl: at91: add support for OUTPUT config
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|2 ++
drivers/pinctrl/pinctrl-at91.c | 22
include/dt-bindings/pinctrl/at91.h |2 ++
3 files changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index cf7c7bc..5a22e0d 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -90,6 +90,8 @@ MULTIDRIVE(1 << 1): indicate this pin need to be
configured as multidrive.
DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
+OUTPUT (1 << 5): indicate this pin need to be configured as an output.
+OUTPUT_VAL (0x1 << 6): output val (1 = high, 0 = low)
DEBOUNCE (1 << 16): indicate this pin need debounce.
DEBOUNCE_VAL (0x3fff << 17): debounce val.
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 19afb9a..1578a0d 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -61,6 +61,9 @@ static int gpio_banks;
#define DEGLITCH (1 << 2)
#define PULL_DOWN (1 << 3)
#define DIS_SCHMIT (1 << 4)
+#define OUTPUT (1 << 5)
+#define OUTPUT_VAL_SHIFT 6
+#define OUTPUT_VAL (0x1 << OUTPUT_VAL_SHIFT)
#define DEBOUNCE (1 << 16)
#define DEBOUNCE_VAL_SHIFT 17
#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
@@ -333,6 +336,19 @@ static void at91_mux_set_pullup(void __iomem *pio,
unsigned mask, bool on)
writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
}
+static bool at91_mux_get_output(void __iomem *pio, unsigned pin, bool *val)
+{
+ *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
+ return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
+}
+
+static void at91_mux_set_output(void __iomem *pio, unsigned mask, bool is_on,
+ bool val)
+{
+ writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
+ writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
+}
+
static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
{
return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
@@ -712,6 +728,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
void __iomem *pio;
unsigned pin;
int div;
+ bool out;
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__,
__LINE__, pin_id, *config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
@@ -732,6 +749,9 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio,
pin))
*config |= DIS_SCHMIT;
+ if (at91_mux_get_output(pio, pin, &out))
+ *config |= OUTPUT | (out << OUTPUT_VAL_SHIFT);
+
return 0;
}
@@ -749,6 +769,8 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
if (config & PULL_UP && config & PULL_DOWN)
return -EINVAL;
+ at91_mux_set_output(pio, mask, config & OUTPUT,
+ (config & OUTPUT_VAL) >> OUTPUT_VAL_SHIFT);
at91_mux_set_pullup(pio, mask, config & PULL_UP);
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
if (info->ops->set_deglitch)
diff --git a/include/dt-bindings/pinctrl/at91.h
b/include/dt-bindings/pinctrl/at91.h
index d7988b4..9fd4d48 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -15,6 +15,8 @@
#define AT91_PINCTRL_DEGLITCH (1 << 2)
#define AT91_PINCTRL_PULL_DOWN (1 << 3)
#define AT91_PINCTRL_DIS_SCHMIT(1 << 4)
+#define AT91_PINCTRL_OUTPUT(1 << 5)
+#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 6)
#define AT91_PINCTRL_DEBOUNCE (1 << 16)
#define AT91_PINCTRL_DEBOUNCE_VA(x)(x << 17)
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] pinctrl: at91: add support for OUTPUT config
This was tested on sama5d31ek.
On 27/08/2013 16:51, Boris BREZILLON wrote:
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|2 ++
drivers/pinctrl/pinctrl-at91.c | 22
include/dt-bindings/pinctrl/at91.h |2 ++
3 files changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index cf7c7bc..5a22e0d 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -90,6 +90,8 @@ MULTIDRIVE(1 << 1): indicate this pin need to be
configured as multidrive.
DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT(1 << 4): indicate this pin need to disable schmit trigger.
+OUTPUT (1 << 5): indicate this pin need to be configured as an output.
+OUTPUT_VAL (0x1 << 6): output val (1 = high, 0 = low)
DEBOUNCE (1 << 16): indicate this pin need debounce.
DEBOUNCE_VAL (0x3fff << 17): debounce val.
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 19afb9a..1578a0d 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -61,6 +61,9 @@ static int gpio_banks;
#define DEGLITCH (1 << 2)
#define PULL_DOWN (1 << 3)
#define DIS_SCHMIT(1 << 4)
+#define OUTPUT (1 << 5)
+#define OUTPUT_VAL_SHIFT 6
+#define OUTPUT_VAL (0x1 << OUTPUT_VAL_SHIFT)
#define DEBOUNCE (1 << 16)
#define DEBOUNCE_VAL_SHIFT17
#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
@@ -333,6 +336,19 @@ static void at91_mux_set_pullup(void __iomem *pio,
unsigned mask, bool on)
writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
}
+static bool at91_mux_get_output(void __iomem *pio, unsigned pin, bool *val)
+{
+ *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
+ return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
+}
+
+static void at91_mux_set_output(void __iomem *pio, unsigned mask, bool is_on,
+ bool val)
+{
+ writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
+ writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
+}
+
static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
{
return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
@@ -712,6 +728,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
void __iomem *pio;
unsigned pin;
int div;
+ bool out;
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__, __LINE__, pin_id, *config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
@@ -732,6 +749,9 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio,
pin))
*config |= DIS_SCHMIT;
+ if (at91_mux_get_output(pio, pin, &out))
+ *config |= OUTPUT | (out << OUTPUT_VAL_SHIFT);
+
return 0;
}
@@ -749,6 +769,8 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
if (config & PULL_UP && config & PULL_DOWN)
return -EINVAL;
+ at91_mux_set_output(pio, mask, config & OUTPUT,
+ (config & OUTPUT_VAL) >> OUTPUT_VAL_SHIFT);
at91_mux_set_pullup(pio, mask, config & PULL_UP);
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
if (info->ops->set_deglitch)
diff --git a/include/dt-bindings/pinctrl/at91.h
b/include/dt-bindings/pinctrl/at91.h
index d7988b4..9fd4d48 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -15,6 +15,8 @@
#define AT91_PINCTRL_DEGLITCH (1 << 2)
#define AT91_PINCTRL_PULL_DOWN(1 << 3)
#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
+#define AT91_PINCTRL_OUTPUT(1 << 5)
+#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 6)
#define AT91_PINCTRL_DEBOUNCE (1 << 16)
#define AT91_PINCTRL_DEBOUNCE_VA(x) (x << 17)
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 0/2] net/cadence/macb: add support for dt phy definition
On 27/08/2013 18:20, David Miller wrote: From: boris brezillon Date: Tue, 27 Aug 2013 09:42:34 +0200 Could you apply, the 3rd version of this series instead ? There can never be an "instead" or reverting patches I've said I've applied already. If you want changes, you have to submit follow-on fixes. Hello David, I sent the incremental patches based on your net-next branch: https://lkml.org/lkml/2013/8/27/257 https://lkml.org/lkml/2013/8/27/259 Thanks. Best Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] pinctrl: at91: add support for OUTPUT config
On 28/08/2013 09:31, Nicolas Ferre wrote:
On 27/08/2013 16:51, Boris BREZILLON :
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|2 ++
drivers/pinctrl/pinctrl-at91.c | 22
include/dt-bindings/pinctrl/at91.h |2 ++
3 files changed, 26 insertions(+)
diff --git
a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index cf7c7bc..5a22e0d 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -90,6 +90,8 @@ MULTIDRIVE(1 << 1): indicate this pin need to
be configured as multidrive.
DEGLITCH(1 << 2): indicate this pin need deglitch.
PULL_DOWN(1 << 3): indicate this pin need a pull down.
DIS_SCHMIT(1 << 4): indicate this pin need to disable schmit
trigger.
+OUTPUT(1 << 5): indicate this pin need to be configured as
an output.
+OUTPUT_VAL(0x1 << 6): output val (1 = high, 0 = low)
DEBOUNCE(1 << 16): indicate this pin need debounce.
DEBOUNCE_VAL(0x3fff << 17): debounce val.
diff --git a/drivers/pinctrl/pinctrl-at91.c
b/drivers/pinctrl/pinctrl-at91.c
index 19afb9a..1578a0d 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -61,6 +61,9 @@ static int gpio_banks;
#define DEGLITCH(1 << 2)
#define PULL_DOWN(1 << 3)
#define DIS_SCHMIT(1 << 4)
+#define OUTPUT(1 << 5)
+#define OUTPUT_VAL_SHIFT6
+#define OUTPUT_VAL(0x1 << OUTPUT_VAL_SHIFT)
#define DEBOUNCE(1 << 16)
#define DEBOUNCE_VAL_SHIFT17
#define DEBOUNCE_VAL(0x3fff << DEBOUNCE_VAL_SHIFT)
@@ -333,6 +336,19 @@ static void at91_mux_set_pullup(void __iomem
*pio, unsigned mask, bool on)
writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
}
+static bool at91_mux_get_output(void __iomem *pio, unsigned pin,
bool *val)
+{
+*val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
+return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
+}
+
+static void at91_mux_set_output(void __iomem *pio, unsigned mask,
bool is_on,
+bool val)
+{
+writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
+writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
+}
+
static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned
pin)
{
return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
@@ -712,6 +728,7 @@ static int at91_pinconf_get(struct pinctrl_dev
*pctldev,
void __iomem *pio;
unsigned pin;
int div;
+bool out;
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__,
__LINE__, pin_id, *config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
@@ -732,6 +749,9 @@ static int at91_pinconf_get(struct pinctrl_dev
*pctldev,
if (info->ops->get_schmitt_trig &&
info->ops->get_schmitt_trig(pio, pin))
*config |= DIS_SCHMIT;
+if (at91_mux_get_output(pio, pin, &out))
+*config |= OUTPUT | (out << OUTPUT_VAL_SHIFT);
+
return 0;
}
@@ -749,6 +769,8 @@ static int at91_pinconf_set(struct pinctrl_dev
*pctldev,
if (config & PULL_UP && config & PULL_DOWN)
return -EINVAL;
+at91_mux_set_output(pio, mask, config & OUTPUT,
+(config & OUTPUT_VAL) >> OUTPUT_VAL_SHIFT);
at91_mux_set_pullup(pio, mask, config & PULL_UP);
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
if (info->ops->set_deglitch)
diff --git a/include/dt-bindings/pinctrl/at91.h
b/include/dt-bindings/pinctrl/at91.h
index d7988b4..9fd4d48 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -15,6 +15,8 @@
#define AT91_PINCTRL_DEGLITCH(1 << 2)
#define AT91_PINCTRL_PULL_DOWN(1 << 3)
#define AT91_PINCTRL_DIS_SCHMIT(1 << 4)
+#define AT91_PINCTRL_OUTPUT(1 << 5)
+#define AT91_PINCTRL_OUTPUT_VAL(x)((x & 0x1) << 6)
Can you add this change to the documentation as well:
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
#define AT91_PINCTRL_DEBOUNCE(1 << 16)
#define AT91_PINCTRL_DEBOUNCE_VA(x)(x << 17)
Oh, we have a nice typo here! ---^^
And moreover it would be good to add the mask as well.
Do you want me to fix this typo and add mask for DEBOUNCE
in a separate patch ?
Once the documentation added, you can stick my:
Acked-by: Nicolas Ferre
Thanks, bye,
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/9] ARM: at91/dt: add rm9200 spi0 chip select pins definitions
Add spi0 cs pinctrl pins definitions.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi
b/arch/arm/boot/dts/at91rm9200.dtsi
index f770655..69b76c7 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -486,6 +486,26 @@
AT91_PIOA 1
AT91_PERIPH_A AT91_PINCTRL_NONE/* PA1 periph A SPI0_MOSI pin */
AT91_PIOA 2
AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
};
+
+ pinctrl_spi0_cs0: spi0_cs0-0 {
+ atmel,pins =
+ ; /* PA3 periph A SPI0_NPCS0 pin */
+ };
+
+ pinctrl_spi0_cs1: spi0_cs1-0 {
+ atmel,pins =
+ ;/* PA4 GPIO SPI0_NPCS1 pin */
+ };
+
+ pinctrl_spi0_cs2: spi0_cs2-0 {
+ atmel,pins =
+ ;/* PA5 GPIO SPI0_NPCS2 pin */
+ };
+
+ pinctrl_spi0_cs3: spi0_cs3-0 {
+ atmel,pins =
+ ;/* PA6 GPIO SPI0_NPCS3 pin */
+ };
};
pioA: gpio@f400 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/9] ARM: at91/dt: add ethernet phy to at91rm9200ek board
Add ethernet phy node in at91rm9200ek.dts.
The reg register is not specified, as it may differ depending on the init
process of the board:
ADDR0/1 phy pins are connected to PA13/14 rm9200 pins. Which means the phy
will take its address from these pins during the reset process.
The macb driver will launch a full scan on the mdio bus to discover the phy
address.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index d2d72c3..37b0880 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -47,6 +47,11 @@
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
+
+ phy0: ethernet-phy {
+ interrupt-parent = <&pioC>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ };
};
usb1: gadget@fffb {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/9] ARM: at91/dt: add usb1 vbus and pullup pins
Add vbus and pullup pinctrl definitions.
Request the vbus and pullup pins in usb1 node.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index 37b0880..76f3e87 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -29,6 +29,18 @@
ahb {
apb {
+ pinctrl@f400 {
+ usb1 {
+ pinctrl_usb1_vbus: usb1_vbus-0 {
+ atmel,pins = ;
+ };
+
+ pinctrl_usb1_pullup: usb1_pullup-0 {
+ atmel,pins = ;
+ };
+ };
+ };
+
dbgu: serial@f200 {
status = "okay";
};
@@ -56,6 +68,9 @@
usb1: gadget@fffb {
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1_vbus
+&pinctrl_usb1_pullup>;
status = "okay";
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 4/9] ARM: at91/dt: add atmel,pullup-gpio to at91rm9200ek usb1 definition
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index 76f3e87..f2d6d79 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -68,6 +68,7 @@
usb1: gadget@fffb {
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
+ atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_vbus
&pinctrl_usb1_pullup>;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 6/9] ARM: at91/dt: add spi0 support to at91rm9200ek board
Add spi0 cs3 switch pinctrl pin definitions: this pin is used to select
between mmc0 slot0 and spi dataflash connected to cs3.
Enable spi0 controller and define the mtd_dataflash connected to cs0.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index 2bad423..b3e7425 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -56,6 +56,13 @@
;
};
};
+
+ spi0 {
+ pinctrl_spi0_cs3_switch:
spi0_cs3_switch-0 {
+ atmel,pins =
+ ;
+ };
+ };
};
dbgu: serial@f200 {
@@ -119,6 +126,19 @@
wp-gpios = <&pioA 17 GPIO_ACTIVE_HIGH>;
};
};
+
+ spi0: spi@fffe {
+ pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs0>;
+ cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <0>,
+ <0>, <0>;
+ status = "okay";
+
+ mtd_dataflash@0 {
+ compatible = "atmel,at45",
"atmel,dataflash";
+ spi-max-frequency = <1500>;
+ reg = <0>;
+ };
+ };
};
usb0: ohci@0030 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 5/9] ARM: at91/dt: add mmc0 slot0 support to at91rm9200ek board
Add slot0 of mmc0 pinctrl pins definitions:
- detect pin
- write protect pin
- enable slot0 pin: this pin is connected to an external switch which
enable mmc0 slot0 or spi dataflash connected to cs3
The mmc0 device is not enabled, as it depends on the choosen functionnality
(spi cs3 or mmc0 slot0).
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index f2d6d79..2bad423 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -39,6 +39,23 @@
atmel,pins = ;
};
};
+
+ mmc0 {
+ pinctrl_mmc0_slot0_detect:
mmc0_slot0_detect-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_mmc0_slot0_write_protect:
mmc0_slot0_write_protect-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_mmc0_slot0_switch:
mmc0_slot0_switch-0 {
+ atmel,pins =
+ ;
+ };
+ };
};
dbgu: serial@f200 {
@@ -84,6 +101,24 @@
reg = <0>;
};
};
+
+ mmc0: mmc@fffb4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pinctrl_mmc0_clk
+&pinctrl_mmc0_slot0_cmd_dat0
+&pinctrl_mmc0_slot0_dat1_3
+&pinctrl_mmc0_slot0_detect
+&pinctrl_mmc0_slot0_write_protect
+&pinctrl_mmc0_slot0_switch>;
+
+ slot0: slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+ cd-gpios = <&pioB 27 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&pioA 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
usb0: ohci@0030 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 7/9] ARM: at91/dt: add i2c devices connected to at91rm9200ek board
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts
b/arch/arm/boot/dts/at91rm9200ek.dts
index b3e7425..fd2601a 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -147,6 +147,18 @@
};
};
+ i2c@0 {
+ status = "okay";
+
+ ics1523@26 {
+ reg = <0x26>;
+ };
+
+ dac3550@4d {
+ reg = <0x4d>;
+ };
+ };
+
leds {
compatible = "gpio-leds";
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/9] ARM: at91/dt: add missing devices to rm9200ek board
Hello, This patch series adds support for the remaining devices (or device options) not yet supported in dt. AFAICT there is no more infos/devices not converted to dt for this board, and we should be able to remove board-at91rm9200ek.c (when we decide to do it). This series was not tested (the dt compilation passed), could someone owning this board test it ? In order to test it, you need to apply these series first: https://lkml.org/lkml/2013/8/27/58 pinctrl: at91: add support for OUTPUT config Best Regards, Boris Boris BREZILLON (9): ARM: at91/dt: rm9200: add spi0 chip select pins definitions ARM: at91/dt: add ethernet phy to at91rm9200ek board ARM: at91/dt: add usb1 vbus and pullup pins ARM: at91/dt: add atmel,pullup-gpio to at91rm9200ek usb1 definition ARM: at91/dt: add mmc0 slot0 support to at91rm9200ek board ARM: at91/dt: add spi0 support to at91rm9200ek board ARM: at91/dt: add i2c devices connected to at91rm9200ek board ARM: at91/dt: add new at91rm9200ek_mmc board ARM: at91/dt: add new at91rm9200ek_dataflash board arch/arm/boot/dts/at91rm9200.dtsi| 20 ++ arch/arm/boot/dts/at91rm9200ek.dts | 88 ++ arch/arm/boot/dts/at91rm9200ek_dataflash.dts | 33 ++ arch/arm/boot/dts/at91rm9200ek_mmc.dts | 23 +++ 4 files changed, 164 insertions(+) create mode 100644 arch/arm/boot/dts/at91rm9200ek_dataflash.dts create mode 100644 arch/arm/boot/dts/at91rm9200ek_mmc.dts -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 8/9] ARM: at91/dt: add new at91rm9200ek_mmc board
Add a new at91rm9200ek_mmc board (based on at91rm9200ek board) which enables
mmc0/slot0.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek_mmc.dts | 23 +++
1 file changed, 23 insertions(+)
create mode 100644 arch/arm/boot/dts/at91rm9200ek_mmc.dts
diff --git a/arch/arm/boot/dts/at91rm9200ek_mmc.dts
b/arch/arm/boot/dts/at91rm9200ek_mmc.dts
new file mode 100644
index 000..c87a861
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek_mmc.dts
@@ -0,0 +1,23 @@
+/*
+ * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit with
+ *an MMC slot
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91rm9200ek.dts"
+
+/ {
+ model = "Atmel AT91RM9200 evaluation kit with MMC slot";
+ compatible = "atmel,at91rm9200ek-mmc", "atmel,at91rm9200ek",
"atmel,at91rm9200";
+
+ ahb {
+ apb {
+ mmc0: mmc@fffb4000 {
+ status = "okay";
+ };
+ };
+ };
+};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 9/9] ARM: at91/dt: add new at91rm9200ek_dataflash board
Add a new at91rm9200ek_dataflash board (based on at91rm9200ek board) which
enables dataflash connected to cs3 of spi0.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91rm9200ek_dataflash.dts | 33 ++
1 file changed, 33 insertions(+)
create mode 100644 arch/arm/boot/dts/at91rm9200ek_dataflash.dts
diff --git a/arch/arm/boot/dts/at91rm9200ek_dataflash.dts
b/arch/arm/boot/dts/at91rm9200ek_dataflash.dts
new file mode 100644
index 000..a43412e
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek_dataflash.dts
@@ -0,0 +1,33 @@
+/*
+ * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit with
+ *2 SPI dataflash
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91rm9200ek.dts"
+
+/ {
+ model = "Atmel AT91RM9200 evaluation kit with 2 SPI dataflash";
+ compatible = "atmel,at91rm9200ek-dataflash", "atmel,at91rm9200ek",
"atmel,at91rm9200";
+
+ ahb {
+ apb {
+ spi0: spi@fffe {
+ pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs0
+&pinctrl_spi0_cs3
+&pinctrl_spi0_cs3_switch>;
+ cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <0>,
+ <0>, <&pioA 6 GPIO_ACTIVE_HIGH>;
+
+ mtd_dataflash@3 {
+ compatible = "atmel,at45",
"atmel,dataflash";
+ spi-max-frequency = <1500>;
+ reg = <3>;
+ };
+ };
+ };
+ };
+};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH 3/3] ARM: at91/dt: move sama5 to generic pinconf
Hello Linus,
On 28/08/2013 14:28, Linus Walleij wrote:
On Sat, Aug 24, 2013 at 11:40 PM, Boris BREZILLON
wrote:
Add generic pinconf definitions and reference appropriate configs in
atmel,pins properties.
Signed-off-by: Boris BREZILLON
(...)
pinctrl@f200 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "atmel,at91sam9x5-pinctrl",
"atmel,at91rm9200-pinctrl", "simple-bus";
+ compatible = "atmel,at91sam9x5-pinctrl",
"atmel,at91rm9200-pinctrl", "generic-pinconf", "simple-bus";
What kind of compatible string is that "generic-pinconf"?
There is no driver that can instantiate against this string but I'm not
100% sure about such things. Is there some other driver doing this?
Else I think it'd just be removed.
It did not exist before this patch series.
I thought it would be good idea to add a compatible string to tell if
the pinctrl subnodes support the generic-pinconf binding,
without modifying the current compatible strings:
if compatible string contains the "generic-pinconf" then the pinconf
definitions should be considered generic.
However, after discussing it with Stephen, Jean-Christophe and Nicolas,
I no longer think this is a good idea
(backward compatibility issues).
+ pcfg_none: pcfg_none {
+ bias-disable;
+ };
+
+ pcfg_pull_up: pcfg_pull_up {
+ bias-pull-up;
+ };
Nice.
+ pcfg_deglitch: pcfg_deglitch {
+ input-deglitch = <1>;
+ };
+
+ pcfg_pull_up_deglitch: pcfg_pull_up_deglitch {
+ bias-pull-up;
+ input-deglitch = <1>;
+ };
input-deglitch seems like a proposed generic binding but I haven't seen
these yet?
(It might be in my violently exploding INBOX though sorry in that case.)
This would need adding to
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
Plus changes to pinctrl core for handling.
This was added in the first patch of this series:
https://lkml.org/lkml/2013/8/24/99
BTW: this is really moving in the right direction!
Yours,
Linus Walleij
Thanks.
Best Regards,
Boris
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] pinctrl: at91: add support for OUTPUT config
On 28/08/2013 15:48, Linus Walleij wrote: On Wed, Aug 28, 2013 at 3:46 PM, Linus Walleij wrote: On Tue, Aug 27, 2013 at 4:51 PM, Boris BREZILLON wrote: Add support for pin output control through the pinctrl config: - support enabling/disabling output on a given pin - support output level setting (high or low) Signed-off-by: Boris BREZILLON NAK. We already have this: * @PIN_CONFIG_OUTPUT: this will configure the pin in output, use argument * 1 to indicate high level, argument 0 to indicate low level. It also has device tree bindings: output-low - set the pin to output mode with low level output-high - set the pin to output mode with high level Bah maybe I'm misunderstanding :-( So this is not part of the generic pin config series, but something stand-alone to augment the existing driver to do this? This is a proposal to add support for OUTPUT config using native at91 pinconf binding (not generic pinconf binding). I did this to get support for OUTPUT config quickly. The generic pinconf binding is still in discussion, and will be added as soon as at91 maintainers and pinctrl maintainers agree on how this should be done. So I just apply this patch right off then? I don't know, I think we should wait for Jean-Christophe approval. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] ARM: at91/tc/clocksource: improve driver robustness
Check function return values to avoid false positive driver init.
Signed-off-by: Boris BREZILLON
---
drivers/clocksource/tcb_clksrc.c | 33 -
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 0481562..10a5d9e 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -184,11 +184,18 @@ static struct irqaction tc_irqaction = {
.handler= ch2_irq,
};
-static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
+static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
{
+ int ret;
struct clk *t2_clk = tc->clk[2];
int irq = tc->irq[2];
+ /* try to enable t2 clk to avoid future errors in mode change */
+ ret = clk_prepare_enable(t2_clk);
+ if (ret)
+ return ret;
+ clk_disable_unprepare(t2_clk);
+
clkevt.regs = tc->regs;
clkevt.clk = t2_clk;
tc_irqaction.dev_id = &clkevt;
@@ -197,16 +204,21 @@ static void __init setup_clkevents(struct atmel_tc *tc,
int clk32k_divisor_idx)
clkevt.clkevt.cpumask = cpumask_of(0);
+ ret = setup_irq(irq, &tc_irqaction);
+ if (ret)
+ return ret;
+
clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0x);
- setup_irq(irq, &tc_irqaction);
+ return ret;
}
#else /* !CONFIG_GENERIC_CLOCKEVENTS */
-static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
+static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
{
/* NOTHING */
+ return 0;
}
#endif
@@ -328,13 +340,24 @@ static int __init tcb_clksrc_init(void)
}
/* and away we go! */
- clocksource_register_hz(&clksrc, divided_rate);
+ ret = clocksource_register_hz(&clksrc, divided_rate);
+ if (ret)
+ goto err_disable_t1;
/* channel 2: periodic and oneshot timer support */
- setup_clkevents(tc, clk32k_divisor_idx);
+ ret = setup_clkevents(tc, clk32k_divisor_idx);
+ if (ret)
+ goto err_unregister_clksrc;
return 0;
+err_unregister_clksrc:
+ clocksource_unregister(&clksrc);
+
+err_disable_t1:
+ if (!tc->tcb_config || tc->tcb_config->counter_width != 32)
+ clk_disable_unprepare(tc->clk[1]);
+
err_disable_t0:
clk_disable_unprepare(t0_clk);
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/3] ARM: at91/tc/clocksource: various robustness improvements
Hello, This series include several improvements regarding the at91 tc clocksource driver: - use clk_prepare/unprepare_enable/disable functions instead of the clk_enable/disable functions to prepare the transition to the common clk framework - check several function return values instead of considering these functions always suceed. - remove the deprecated IRQF_DISABLED flag Best Regards, Boris Boris BREZILLON (3): ARM: at91/tc/clocksource: replace clk_enable/disable with clk_prepare_enable/disable_unprepare ARM: at91/tc/clocksource: improve driver robustness ARM: at91/tc/clocksource: remove IRQF_DISABLED drivers/clocksource/tcb_clksrc.c | 61 +++--- 1 file changed, 50 insertions(+), 11 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] ARM: at91/tc/clocksource: remove IRQF_DISABLED
Remove the deprecated IRQF_DISABLED flag.
Signed-off-by: Boris BREZILLON
---
drivers/clocksource/tcb_clksrc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 10a5d9e..00fdd11 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -180,7 +180,7 @@ static irqreturn_t ch2_irq(int irq, void *handle)
static struct irqaction tc_irqaction = {
.name = "tc_clkevt",
- .flags = IRQF_TIMER | IRQF_DISABLED,
+ .flags = IRQF_TIMER,
.handler= ch2_irq,
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] ARM: at91/tc/clocksource: replace clk_enable/disable with clk_prepare_enable/disable_unprepare
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/clocksource/tcb_clksrc.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 8a61872..0481562 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -100,7 +100,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
|| tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
__raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
__raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
- clk_disable(tcd->clk);
+ clk_disable_unprepare(tcd->clk);
}
switch (m) {
@@ -109,7 +109,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
* of oneshot, we get lower overhead and improved accuracy.
*/
case CLOCK_EVT_MODE_PERIODIC:
- clk_enable(tcd->clk);
+ clk_prepare_enable(tcd->clk);
/* slow clock, count up to RC, then irq and restart */
__raw_writel(timer_clock
@@ -126,7 +126,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
break;
case CLOCK_EVT_MODE_ONESHOT:
- clk_enable(tcd->clk);
+ clk_prepare_enable(tcd->clk);
/* slow clock, count up to RC, then irq and stop */
__raw_writel(timer_clock | ATMEL_TC_CPCSTOP
@@ -265,6 +265,7 @@ static int __init tcb_clksrc_init(void)
int best_divisor_idx = -1;
int clk32k_divisor_idx = -1;
int i;
+ int ret;
tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
if (!tc) {
@@ -275,7 +276,11 @@ static int __init tcb_clksrc_init(void)
pdev = tc->pdev;
t0_clk = tc->clk[0];
- clk_enable(t0_clk);
+ ret = clk_prepare_enable(t0_clk);
+ if (ret) {
+ pr_debug("can't enable T0 clk\n");
+ goto err_free_tc;
+ }
/* How fast will we be counting? Pick something over 5 MHz. */
rate = (u32) clk_get_rate(t0_clk);
@@ -313,7 +318,11 @@ static int __init tcb_clksrc_init(void)
/* tclib will give us three clocks no matter what the
* underlying platform supports.
*/
- clk_enable(tc->clk[1]);
+ ret = clk_prepare_enable(tc->clk[1]);
+ if (ret) {
+ pr_debug("can't enable T1 clk\n");
+ goto err_disable_t0;
+ }
/* setup both channel 0 & 1 */
tcb_setup_dual_chan(tc, best_divisor_idx);
}
@@ -325,5 +334,12 @@ static int __init tcb_clksrc_init(void)
setup_clkevents(tc, clk32k_divisor_idx);
return 0;
+
+err_disable_t0:
+ clk_disable_unprepare(t0_clk);
+
+err_free_tc:
+ atmel_tc_free(tc);
+ return ret;
}
arch_initcall(tcb_clksrc_init);
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] ARM: at91/tc/clocksource: replace clk_enable/disable with clk_prepare_enable/disable_unprepare
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/clocksource/tcb_clksrc.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 8a61872..0481562 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -100,7 +100,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
|| tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
__raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
__raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
- clk_disable(tcd->clk);
+ clk_disable_unprepare(tcd->clk);
}
switch (m) {
@@ -109,7 +109,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
* of oneshot, we get lower overhead and improved accuracy.
*/
case CLOCK_EVT_MODE_PERIODIC:
- clk_enable(tcd->clk);
+ clk_prepare_enable(tcd->clk);
/* slow clock, count up to RC, then irq and restart */
__raw_writel(timer_clock
@@ -126,7 +126,7 @@ static void tc_mode(enum clock_event_mode m, struct
clock_event_device *d)
break;
case CLOCK_EVT_MODE_ONESHOT:
- clk_enable(tcd->clk);
+ clk_prepare_enable(tcd->clk);
/* slow clock, count up to RC, then irq and stop */
__raw_writel(timer_clock | ATMEL_TC_CPCSTOP
@@ -265,6 +265,7 @@ static int __init tcb_clksrc_init(void)
int best_divisor_idx = -1;
int clk32k_divisor_idx = -1;
int i;
+ int ret;
tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
if (!tc) {
@@ -275,7 +276,11 @@ static int __init tcb_clksrc_init(void)
pdev = tc->pdev;
t0_clk = tc->clk[0];
- clk_enable(t0_clk);
+ ret = clk_prepare_enable(t0_clk);
+ if (ret) {
+ pr_debug("can't enable T0 clk\n");
+ goto err_free_tc;
+ }
/* How fast will we be counting? Pick something over 5 MHz. */
rate = (u32) clk_get_rate(t0_clk);
@@ -313,7 +318,11 @@ static int __init tcb_clksrc_init(void)
/* tclib will give us three clocks no matter what the
* underlying platform supports.
*/
- clk_enable(tc->clk[1]);
+ ret = clk_prepare_enable(tc->clk[1]);
+ if (ret) {
+ pr_debug("can't enable T1 clk\n");
+ goto err_disable_t0;
+ }
/* setup both channel 0 & 1 */
tcb_setup_dual_chan(tc, best_divisor_idx);
}
@@ -325,5 +334,12 @@ static int __init tcb_clksrc_init(void)
setup_clkevents(tc, clk32k_divisor_idx);
return 0;
+
+err_disable_t0:
+ clk_disable_unprepare(t0_clk);
+
+err_free_tc:
+ atmel_tc_free(tc);
+ return ret;
}
arch_initcall(tcb_clksrc_init);
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [v2,2/4] watchdog: at91sam9_wdt: update device tree doc
On 02/10/2013 17:51, Guenter Roeck wrote:
On Fri, Jun 21, 2013 at 03:23:34PM -, Boris BREZILLON wrote:
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
Acked-by: Grant Likely
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index fcdd48f..e043106 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -9,11 +9,37 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- interrupts : Should contain WDT interrupt.
+- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
+ seconds. This value should be less than 16. It is used to compute the
+ WDV field.
+- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
+ seconds. This value should be less than 4 times the max-heartbeat-sec
+ value. It is used to compute the WDD field.
I am a bit at loss about "less than 4 times the max-heartbeat-sec value".
Why would a min-timeout larger than the max-timeout make sense under any
condition ? Do you mean to say that max-heartbeat should be at least four
times the value of min-heartbeat (or that min-heartbeat should be less or
equal to one-forth of max-heartbeat) ?
That's exactely what I meant (should be less or equal to one-forth of
max-heartbeat).
I'll fix it.
Guenter
+- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
+ use the at91 watchdog reset. Software watchdog use the watchdog
+ interrupt to trigger a software reset.
+- atmel,reset-type : Should be "proc" or "all".
+ "all" : assert peripherals and processor reset signals
+ "proc" : assert the processor reset signal
+ This is valid only when using "hardware" watchdog.
+- atmel,disable : Should be present if you want to disable the watchdog.
+- atmel,idle-halt : Should be present if you want to stop the watchdog when
+ entering idle state.
+- atmel,dbg-halt : Should be present if you want to stop the watchdog when
+ entering debug state.
Example:
-
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
- timeout-sec = <10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ timeout-sec = <15>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
};
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [v2,1/4] watchdog: at91sam9_wdt: better watchdog support
Hello Guenter,
Thanks for reviewing this patch.
On 02/10/2013 18:12, Guenter Roeck wrote:
On Fri, Jun 21, 2013 at 03:21:28PM -, Boris BREZILLON wrote:
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
---
drivers/watchdog/at91sam9_wdt.c | 319 +--
1 file changed, 236 insertions(+), 83 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..fb47ec5 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,23 +33,32 @@
#include
#include
#include
+#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + field)
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + field)
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
+#define hz_to_ticks(h) (((h << 8) / HZ) - 1)
Unused.
I'll drop it.
+#define ticks_to_hz(t) (((t + 1) * HZ) >> 8)
#define ms_to_ticks(t)(((t << 8) / 1000) - 1)
#define ticks_to_ms(t)(((t + 1) * 1000) >> 8)
You should put macro parameters in () to avoid undesired side effects.
(h), (t), (field)
Sure, some of them are old. No reason not to fix it, though.
I'll fix it (I'll fix old macros in a separate patch)
+#define WDT_MR_RESET 0x3FFF2FFF
+
+#define WDT_WDD_MAX0xFFF
+#define WDT_WDV_MAX0xFFF
What are the units ?
ticks (slow clk cycles).
I'll rename these macros:
#define WDT_XXX_MAX_TICKS 0xFFF
+
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +77,41 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* . */
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ /* Reboot */
That is quite obvious, isn't it ?
I'll drop the comment line.
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +119,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!watchdog_active(&at91_wdt_
Re: [v2,1/4] watchdog: at91sam9_wdt: better watchdog support
On 02/10/2013 21:34, Guenter Roeck wrote:
On Wed, Oct 02, 2013 at 09:27:03PM +0200, boris brezillon wrote:
Hello Guenter,
Thanks for reviewing this patch.
On 02/10/2013 18:12, Guenter Roeck wrote:
On Fri, Jun 21, 2013 at 03:21:28PM -, Boris BREZILLON wrote:
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
---
drivers/watchdog/at91sam9_wdt.c | 319 +--
1 file changed, 236 insertions(+), 83 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..fb47ec5 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,23 +33,32 @@
#include
#include
#include
+#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + field)
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + field)
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
+#define hz_to_ticks(h) (((h << 8) / HZ) - 1)
Unused.
I'll drop it.
+#define ticks_to_hz(t) (((t + 1) * HZ) >> 8)
#define ms_to_ticks(t)(((t << 8) / 1000) - 1)
#define ticks_to_ms(t)(((t + 1) * 1000) >> 8)
You should put macro parameters in () to avoid undesired side effects.
(h), (t), (field)
Sure, some of them are old. No reason not to fix it, though.
I'll fix it (I'll fix old macros in a separate patch)
+#define WDT_MR_RESET 0x3FFF2FFF
+
+#define WDT_WDD_MAX0xFFF
+#define WDT_WDV_MAX0xFFF
What are the units ?
ticks (slow clk cycles).
I'll rename these macros:
#define WDT_XXX_MAX_TICKS 0xFFF
+
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +77,41 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* .
*/
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ /* Reboot */
That is quite obvious, isn't it ?
I'll drop the comment line.
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +119,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_
Re: [PATCH v2 2/4] watchdog: at91sam9_wdt: update device tree doc
Hello Fabio, On 03/10/2013 10:08, Fabio Porcedda wrote: On Fri, Jun 21, 2013 at 9:23 AM, Boris BREZILLON wrote: Add new at91sam9 watchdog properties to the documentation. Signed-off-by: Boris BREZILLON --- .../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt index fcdd48f..e043106 100644 --- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt @@ -9,11 +9,37 @@ Required properties: Optional properties: - timeout-sec: contains the watchdog timeout in seconds. Why are you removing the documentation about this property? I'm not removing the property: this is an enumeration minus not a diff minus. Regards Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 0/4] watchdog: at91sam9_wdt: handle already configured wdt
Hello, This patch series is a porposal to enhance the sam9 watchdog timer support. The at91sam9 watchdog timer can only be configured once, and the current implementation tries to configure it in a static way: - 2 seconds timeout - wdt restart every 500ms If the timer has already been configured with different values, it returns an error and do not create any watchdog device. This is not critical if the watchdog is disabled, but if it has been enabled with different timeout values it will lead to a SoC reset. This patch series tries to address this issue by adapting the heartbeat value according the WDT timer config: - it first tries to configure the timer as requested. - if it fails it fallbacks to the current config, adapting its heartbeat timer to the needs This patch series also move to a dynamically allocated at91wdt device instead of the static instance. I'm not sure this is the best solution, so please tell me if you prefer to keep static instance of watchdog. It adds a new at91 wdt type: software. This new type make use of the at91 wdt interrupt to trigger a software reboot. Finally it adds several properties to the device tree bindings. Best Regards, Boris Changes since v2: - fix documentation - rework the heartbeat computation to get a more flexible behaviour - fix xx_to_yy macros - modify warning and error messages - remove unneeded parenthesis in arithmetic operations - use devm functions to map io memory - remove unneeded devm_kfree calls Change since v1: - fix typo in documentaion - fix irq dt definition for sama5d3 SoC Boris BREZILLON (4): watchdog: at91sam9_wdt: better watchdog support watchdog: at91sam9_wdt: update device tree doc ARM: at91/dt: add sam9 watchdog default options to SoCs ARM: at91/dt: add watchdog properties to kizbox board .../devicetree/bindings/watchdog/atmel-wdt.txt | 30 +- arch/arm/boot/dts/at91sam9260.dtsi |5 + arch/arm/boot/dts/at91sam9263.dtsi |5 + arch/arm/boot/dts/at91sam9g45.dtsi |5 + arch/arm/boot/dts/at91sam9n12.dtsi |5 + arch/arm/boot/dts/at91sam9x5.dtsi |5 + arch/arm/boot/dts/kizbox.dts |6 + arch/arm/boot/dts/sama5d3.dtsi |5 + drivers/watchdog/at91sam9_wdt.c| 301 ++-- 9 files changed, 282 insertions(+), 85 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/4] watchdog: at91sam9_wdt: better watchdog support
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
---
drivers/watchdog/at91sam9_wdt.c | 300 ---
1 file changed, 217 insertions(+), 83 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..8f44528 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,22 +33,33 @@
#include
#include
#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + (field))
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + (field))
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
-#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
-#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
+#define ticks_to_hz_rounddown(t) t) + 1) * HZ) >> 8)
+#define ticks_to_hz_roundup(t) (t) + 1) * HZ) + 255) >> 8)
+#define ticks_to_secs(t) (((t) + 1) >> 8)
+#define secs_to_ticks(s) (((s) << 8) - 1)
+
+#define WDT_MR_RESET 0x3FFF2FFF
+
+/* Watchdog max counter value in ticks */
+#define WDT_COUNTER_MAX_TICKS 0xFFF
+
+/* Watchdog max delta/value in secs */
+#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +79,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* . */
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +120,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!watchdog_active(&at91_wdt_dev))) {
- at91_wdt_reset();
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ struct at91wdt *wdt = (struct at91wdt *)data;
+ if (time_before(jiffies, wdt->next_heartbeat) ||
+ !watchdog_active(&wdt->wdd)) {
+ at91_wdt_reset(wdt);
+ mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
} else
[PATCH 2/4] watchdog: at91sam9_wdt: update device tree doc
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index fcdd48f..f90e294 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -9,11 +9,37 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- interrupts : Should contain WDT interrupt.
+- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
+ seconds. This value should be less or equal to 16. It is used to
+ compute the WDV field.
+- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
+ seconds. This value must be smaller than the max-heartbeat-sec value.
+ It is used to compute the WDD field.
+- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
+ use the at91 watchdog reset. Software watchdog use the watchdog
+ interrupt to trigger a software reset.
+- atmel,reset-type : Should be "proc" or "all".
+ "all" : assert peripherals and processor reset signals
+ "proc" : assert the processor reset signal
+ This is valid only when using "hardware" watchdog.
+- atmel,disable : Should be present if you want to disable the watchdog.
+- atmel,idle-halt : Should be present if you want to stop the watchdog when
+ entering idle state.
+- atmel,dbg-halt : Should be present if you want to stop the watchdog when
+ entering debug state.
Example:
-
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
- timeout-sec = <10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ timeout-sec = <15>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 4/4] ARM: at91/dt: add watchdog properties to kizbox board
Add watchdog specific config for kizbox board.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/kizbox.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 02df191..928f6ee 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -53,6 +53,12 @@
status = "okay";
};
+ watchdog@fd40 {
+ timeout-sec = <15>;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
+ };
};
nand0: nand@4000 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/4] ARM: at91/dt: add sam9 watchdog default options to SoCs
Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91sam9260.dtsi |5 +
arch/arm/boot/dts/at91sam9263.dtsi |5 +
arch/arm/boot/dts/at91sam9g45.dtsi |5 +
arch/arm/boot/dts/at91sam9n12.dtsi |5 +
arch/arm/boot/dts/at91sam9x5.dtsi |5 +
arch/arm/boot/dts/sama5d3.dtsi |5 +
6 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
b/arch/arm/boot/dts/at91sam9260.dtsi
index 56ee828..997901f 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -648,6 +648,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f..45fb0a4 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -523,6 +523,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e5148..16534c7 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -639,6 +639,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 9fb7ffd..eaef94b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -537,6 +537,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index e74dc15..6d31fd7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -820,6 +820,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b7f4961..3a17a3e 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -891,6 +891,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+
Re: [PATCH 1/4] watchdog: at91sam9_wdt: better watchdog support
Hi Guenter,
On 03/10/2013 19:31, Guenter Roeck wrote:
On Thu, Oct 03, 2013 at 02:19:18PM +0200, Boris BREZILLON wrote:
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
Hi Boris,
deeper dive this time ...
---
drivers/watchdog/at91sam9_wdt.c | 300 ---
1 file changed, 217 insertions(+), 83 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..8f44528 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,22 +33,33 @@
#include
#include
#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + (field))
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + (field))
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
-#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
-#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
+#define ticks_to_hz_rounddown(t) t) + 1) * HZ) >> 8)
+#define ticks_to_hz_roundup(t) (t) + 1) * HZ) + 255) >> 8)
+#define ticks_to_secs(t) (((t) + 1) >> 8)
+#define secs_to_ticks(s) (((s) << 8) - 1)
+
+#define WDT_MR_RESET 0x3FFF2FFF
+
+/* Watchdog max counter value in ticks */
+#define WDT_COUNTER_MAX_TICKS 0xFFF
+
+/* Watchdog max delta/value in secs */
+#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +79,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* . */
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +120,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!watchdog_active(&at91_wdt_dev))) {
- at91_wdt_reset();
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ struct at91wdt *wdt = (struct at91wdt *)data;
+ i
Re: [PATCH 1/4] watchdog: at91sam9_wdt: better watchdog support
On 03/10/2013 19:55, boris brezillon wrote:
Hi Guenter,
On 03/10/2013 19:31, Guenter Roeck wrote:
On Thu, Oct 03, 2013 at 02:19:18PM +0200, Boris BREZILLON wrote:
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it
returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been
enabled with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the
heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its
heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device
instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the
at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
Hi Boris,
deeper dive this time ...
---
drivers/watchdog/at91sam9_wdt.c | 300
---
1 file changed, 217 insertions(+), 83 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c
b/drivers/watchdog/at91sam9_wdt.c
index be37dde..8f44528 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,22 +33,33 @@
#include
#include
#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
-__raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
-__raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+__raw_readl((wdt)->base + (field))
+#define wdt_write(wtd, field, val) \
+__raw_writel((val), (wdt)->base + (field))
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
-#define ms_to_ticks(t)(((t << 8) / 1000) - 1)
-#define ticks_to_ms(t)(((t + 1) * 1000) >> 8)
+#define ticks_to_hz_rounddown(t)t) + 1) * HZ) >> 8)
+#define ticks_to_hz_roundup(t)(t) + 1) * HZ) + 255) >> 8)
+#define ticks_to_secs(t)(((t) + 1) >> 8)
+#define secs_to_ticks(s)(((s) << 8) - 1)
+
+#define WDT_MR_RESET0x3FFF2FFF
+
+/* Watchdog max counter value in ticks */
+#define WDT_COUNTER_MAX_TICKS0xFFF
+
+/* Watchdog max delta/value in secs */
+#define WDT_COUNTER_MAX_SECSticks_to_secs(WDT_COUNTER_MAX_TICKS)
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +79,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat;/* the next_heartbeat for the
timer */
struct timer_list timer;/* The timer that pings the
watchdog */
-} at91wdt_private;
+u32 mr;
+u32 mr_mask;
+unsigned long heartbeat;/* WDT heartbeat in jiffies */
+bool nowayout;
+unsigned int irq;
+};
/*
.
*/
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+if (wdt_read(wdt, AT91_WDT_SR)) {
+pr_crit("at91sam9 WDT software reset\n");
+emergency_restart();
+pr_crit("Reboot didn't ?\n");
+}
+
+return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
-wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +120,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
-if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
-(!watchdog_active(&at91_wdt_dev))) {
-at91_wdt_reset();
-mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+struct at91wdt *wdt = (struct at91wdt *)data;
+if (time_before(jiffies, wdt->next_heartbeat) ||
+!watchdog_active(&wdt->wdd)) {
+at91_wdt_reset(wdt);
+
[PATCH v4 0/4] watchdog: at91sam9_wdt: handle already configured wdt
Hello, This patch series is a porposal to enhance the sam9 watchdog timer support. The at91sam9 watchdog timer can only be configured once, and the current implementation tries to configure it in a static way: - 2 seconds timeout - wdt restart every 500ms If the timer has already been configured with different values, it returns an error and do not create any watchdog device. This is not critical if the watchdog is disabled, but if it has been enabled with different timeout values it will lead to a SoC reset. This patch series tries to address this issue by adapting the heartbeat value according the WDT timer config: - it first tries to configure the timer as requested. - if it fails it fallbacks to the current config, adapting its heartbeat timer to the needs This patch series also move to a dynamically allocated at91wdt device instead of the static instance. I'm not sure this is the best solution, so please tell me if you prefer to keep static instance of watchdog. It adds a new at91 wdt type: software. This new type make use of the at91 wdt interrupt to trigger a software reboot. Finally it adds several properties to the device tree bindings. Best Regards, Boris Changes since v3: - fix a bug in heartbeat time computation - fix a bug in at91_wdt_set_timeout when new timeout is bigger than the old one - rename at91_wdt_ping into at91_wdt_start - remove unneeded ping callback assignment Changes since v2: - fix documentation - rework the heartbeat computation to get a more flexible behaviour - fix xx_to_yy macros - modify warning and error messages - remove unneeded parenthesis in arithmetic operations - use devm functions to map io memory - remove unneeded devm_kfree calls Change since v1: - fix typo in documentaion - fix irq dt definition for sama5d3 SoC Boris BREZILLON (4): watchdog: at91sam9_wdt: better watchdog support watchdog: at91sam9_wdt: update device tree doc ARM: at91/dt: add sam9 watchdog default options to SoCs ARM: at91/dt: add watchdog properties to kizbox board .../devicetree/bindings/watchdog/atmel-wdt.txt | 30 +- arch/arm/boot/dts/at91sam9260.dtsi |5 + arch/arm/boot/dts/at91sam9263.dtsi |5 + arch/arm/boot/dts/at91sam9g45.dtsi |5 + arch/arm/boot/dts/at91sam9n12.dtsi |5 + arch/arm/boot/dts/at91sam9x5.dtsi |5 + arch/arm/boot/dts/kizbox.dts |6 + arch/arm/boot/dts/sama5d3.dtsi |5 + drivers/watchdog/at91sam9_wdt.c| 305 ++-- 9 files changed, 285 insertions(+), 86 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 1/4] watchdog: at91sam9_wdt: better watchdog support
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
---
drivers/watchdog/at91sam9_wdt.c | 305 ---
1 file changed, 221 insertions(+), 84 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..85760ab 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,22 +33,33 @@
#include
#include
#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + (field))
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + (field))
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
-#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
-#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
+#define ticks_to_hz_rounddown(t) t) + 1) * HZ) >> 8)
+#define ticks_to_hz_roundup(t) (t) + 1) * HZ) + 255) >> 8)
+#define ticks_to_secs(t) (((t) + 1) >> 8)
+#define secs_to_ticks(s) (((s) << 8) - 1)
+
+#define WDT_MR_RESET 0x3FFF2FFF
+
+/* Watchdog max counter value in ticks */
+#define WDT_COUNTER_MAX_TICKS 0xFFF
+
+/* Watchdog max delta/value in secs */
+#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +79,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* . */
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +120,20 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!watchdog_active(&at91_wdt_dev))) {
- at91_wdt_reset();
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ struct at91wdt *wdt = (struct at91wdt *)data;
+ if (time_before(jiffies, wdt->next_heartbeat) ||
+ !watchdog_active(&wdt->wdd)) {
+ at91_wdt_reset(wdt);
+ mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
} else
[PATCH v4 2/4] watchdog: at91sam9_wdt: update device tree doc
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index fcdd48f..f90e294 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -9,11 +9,37 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- interrupts : Should contain WDT interrupt.
+- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
+ seconds. This value should be less or equal to 16. It is used to
+ compute the WDV field.
+- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
+ seconds. This value must be smaller than the max-heartbeat-sec value.
+ It is used to compute the WDD field.
+- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
+ use the at91 watchdog reset. Software watchdog use the watchdog
+ interrupt to trigger a software reset.
+- atmel,reset-type : Should be "proc" or "all".
+ "all" : assert peripherals and processor reset signals
+ "proc" : assert the processor reset signal
+ This is valid only when using "hardware" watchdog.
+- atmel,disable : Should be present if you want to disable the watchdog.
+- atmel,idle-halt : Should be present if you want to stop the watchdog when
+ entering idle state.
+- atmel,dbg-halt : Should be present if you want to stop the watchdog when
+ entering debug state.
Example:
-
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
- timeout-sec = <10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ timeout-sec = <15>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 3/4] ARM: at91/dt: add sam9 watchdog default options to SoCs
Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91sam9260.dtsi |5 +
arch/arm/boot/dts/at91sam9263.dtsi |5 +
arch/arm/boot/dts/at91sam9g45.dtsi |5 +
arch/arm/boot/dts/at91sam9n12.dtsi |5 +
arch/arm/boot/dts/at91sam9x5.dtsi |5 +
arch/arm/boot/dts/sama5d3.dtsi |5 +
6 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
b/arch/arm/boot/dts/at91sam9260.dtsi
index 56ee828..997901f 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -648,6 +648,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f..45fb0a4 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -523,6 +523,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e5148..16534c7 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -639,6 +639,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 9fb7ffd..eaef94b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -537,6 +537,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index e74dc15..6d31fd7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -820,6 +820,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b7f4961..3a17a3e 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -891,6 +891,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+
[PATCH v4 4/4] ARM: at91/dt: add watchdog properties to kizbox board
Add watchdog specific config for kizbox board.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/kizbox.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 02df191..928f6ee 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -53,6 +53,12 @@
status = "okay";
};
+ watchdog@fd40 {
+ timeout-sec = <15>;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
+ };
};
nand0: nand@4000 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 1/4] watchdog: at91sam9_wdt: better watchdog support
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled
with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON
---
drivers/watchdog/at91sam9_wdt.c | 309 ---
1 file changed, 223 insertions(+), 86 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index be37dde..9bd089e 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -19,11 +19,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -31,22 +33,33 @@
#include
#include
#include
+#include
#include "at91sam9_wdt.h"
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
+#define wdt_read(wdt, field) \
+ __raw_readl((wdt)->base + (field))
+#define wdt_write(wtd, field, val) \
+ __raw_writel((val), (wdt)->base + (field))
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
*/
-#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
-#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
+#define ticks_to_hz_rounddown(t) t) + 1) * HZ) >> 8)
+#define ticks_to_hz_roundup(t) (t) + 1) * HZ) + 255) >> 8)
+#define ticks_to_secs(t) (((t) + 1) >> 8)
+#define secs_to_ticks(s) (((s) << 8) - 1)
+
+#define WDT_MR_RESET 0x3FFF2FFF
+
+/* Watchdog max counter value in ticks */
+#define WDT_COUNTER_MAX_TICKS 0xFFF
+
+/* Watchdog max delta/value in secs */
+#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2
@@ -66,23 +79,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static struct watchdog_device at91_wdt_dev;
-static void at91_ping(unsigned long data);
-
-static struct {
+#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
+struct at91wdt {
+ struct watchdog_device wdd;
void __iomem *base;
unsigned long next_heartbeat; /* the next_heartbeat for the timer */
struct timer_list timer;/* The timer that pings the watchdog */
-} at91wdt_private;
+ u32 mr;
+ u32 mr_mask;
+ unsigned long heartbeat;/* WDT heartbeat in jiffies */
+ bool nowayout;
+ unsigned int irq;
+};
/* . */
+static irqreturn_t wdt_interrupt(int irq, void *dev_id)
+{
+ struct at91wdt *wdt = (struct at91wdt *)dev_id;
+
+ if (wdt_read(wdt, AT91_WDT_SR)) {
+ pr_crit("at91sam9 WDT software reset\n");
+ emergency_restart();
+ pr_crit("Reboot didn't ?\n");
+ }
+
+ return IRQ_HANDLED;
+}
+
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt *wdt)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -90,26 +120,21 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!watchdog_active(&at91_wdt_dev))) {
- at91_wdt_reset();
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
- } else
+ struct at91wdt *wdt = (struct at91wdt *)data;
+ if (time_before(jiffies, wdt->next_heartbeat) ||
+ !watchdog_active(&wdt->wdd)) {
+ at91_wdt_reset(wdt);
+ mod_timer(&wdt->timer, jiffies + wdt->
[PATCH v5 2/4] watchdog: at91sam9_wdt: update device tree doc
Add new at91sam9 watchdog properties to the documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/watchdog/atmel-wdt.txt | 30 ++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index fcdd48f..f90e294 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -9,11 +9,37 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- interrupts : Should contain WDT interrupt.
+- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
+ seconds. This value should be less or equal to 16. It is used to
+ compute the WDV field.
+- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
+ seconds. This value must be smaller than the max-heartbeat-sec value.
+ It is used to compute the WDD field.
+- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
+ use the at91 watchdog reset. Software watchdog use the watchdog
+ interrupt to trigger a software reset.
+- atmel,reset-type : Should be "proc" or "all".
+ "all" : assert peripherals and processor reset signals
+ "proc" : assert the processor reset signal
+ This is valid only when using "hardware" watchdog.
+- atmel,disable : Should be present if you want to disable the watchdog.
+- atmel,idle-halt : Should be present if you want to stop the watchdog when
+ entering idle state.
+- atmel,dbg-halt : Should be present if you want to stop the watchdog when
+ entering debug state.
Example:
-
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
- timeout-sec = <10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ timeout-sec = <15>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
};
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 3/4] ARM: at91/dt: add sam9 watchdog default options to SoCs
Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/at91sam9260.dtsi |5 +
arch/arm/boot/dts/at91sam9263.dtsi |5 +
arch/arm/boot/dts/at91sam9g45.dtsi |5 +
arch/arm/boot/dts/at91sam9n12.dtsi |5 +
arch/arm/boot/dts/at91sam9x5.dtsi |5 +
arch/arm/boot/dts/sama5d3.dtsi |5 +
6 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi
b/arch/arm/boot/dts/at91sam9260.dtsi
index 56ee828..997901f 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -648,6 +648,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi
b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f..45fb0a4 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -523,6 +523,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e5148..16534c7 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -639,6 +639,11 @@
watchdog@fd40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi
b/arch/arm/boot/dts/at91sam9n12.dtsi
index 9fb7ffd..eaef94b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -537,6 +537,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index e74dc15..6d31fd7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -820,6 +820,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ atmel,idle-halt;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b7f4961..3a17a3e 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -891,6 +891,11 @@
watchdog@fe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfe40 0x10>;
+
[PATCH v5 4/4] ARM: at91/dt: add watchdog properties to kizbox board
Add watchdog specific config for kizbox board.
Signed-off-by: Boris BREZILLON
---
arch/arm/boot/dts/kizbox.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 02df191..928f6ee 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -53,6 +53,12 @@
status = "okay";
};
+ watchdog@fd40 {
+ timeout-sec = <15>;
+ atmel,max-heartbeat-sec = <16>;
+ atmel,min-heartbeat-sec = <0>;
+ status = "okay";
+ };
};
nand0: nand@4000 {
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH v5 0/4] watchdog: at91sam9_wdt: handle already configured wdt
Hello, This patch series is a porposal to enhance the sam9 watchdog timer support. The at91sam9 watchdog timer can only be configured once, and the current implementation tries to configure it in a static way: - 2 seconds timeout - wdt restart every 500ms If the timer has already been configured with different values, it returns an error and do not create any watchdog device. This is not critical if the watchdog is disabled, but if it has been enabled with different timeout values it will lead to a SoC reset. This patch series tries to address this issue by adapting the heartbeat value according the WDT timer config: - it first tries to configure the timer as requested. - if it fails it fallbacks to the current config, adapting its heartbeat timer to the needs This patch series also move to a dynamically allocated at91wdt device instead of the static instance. I'm not sure this is the best solution, so please tell me if you prefer to keep static instance of watchdog. It adds a new at91 wdt type: software. This new type make use of the at91 wdt interrupt to trigger a software reboot. Finally it adds several properties to the device tree bindings. Best Regards, Boris Changes since v4: - fix coding style issues - remove unneeded watchdog_active test Changes since v3: - fix a bug in heartbeat time computation - fix a bug in at91_wdt_set_timeout when new timeout is bigger than the old one - rename at91_wdt_ping into at91_wdt_start - remove unneeded ping callback assignment Changes since v2: - fix documentation - rework the heartbeat computation to get a more flexible behaviour - fix xx_to_yy macros - modify warning and error messages - remove unneeded parenthesis in arithmetic operations - use devm functions to map io memory - remove unneeded devm_kfree calls Change since v1: - fix typo in documentaion - fix irq dt definition for sama5d3 SoC Boris BREZILLON (4): watchdog: at91sam9_wdt: better watchdog support watchdog: at91sam9_wdt: update device tree doc ARM: at91/dt: add sam9 watchdog default options to SoCs ARM: at91/dt: add watchdog properties to kizbox board .../devicetree/bindings/watchdog/atmel-wdt.txt | 30 +- arch/arm/boot/dts/at91sam9260.dtsi |5 + arch/arm/boot/dts/at91sam9263.dtsi |5 + arch/arm/boot/dts/at91sam9g45.dtsi |5 + arch/arm/boot/dts/at91sam9n12.dtsi |5 + arch/arm/boot/dts/at91sam9x5.dtsi |5 + arch/arm/boot/dts/kizbox.dts |6 + arch/arm/boot/dts/sama5d3.dtsi |5 + drivers/watchdog/at91sam9_wdt.c| 309 ++-- 9 files changed, 287 insertions(+), 88 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH alt 4/4] pinctrl: at91: rework debounce configuration
Hello Stephen,
Le 14/09/2013 00:40, Stephen Warren a écrit :
On 09/13/2013 01:53 AM, Boris BREZILLON wrote:
AT91 SoCs do not support per pin debounce time configuration.
Instead you have to configure a debounce time which will be used for all
pins of a given bank (PIOA, PIOB, ...).
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+Optional properties for iomux controller:
+- atmel,default-debounce-div: array of debounce divisors (one divisor per bank)
+ which describes the debounce timing in use for all pins of a given bank
+ configured with the DEBOUNCE option (see the following description).
+ Debounce timing is obtained with this formula:
+ Tdebounce = 2 * (debouncediv + 1) / Fslowclk
+ with Fslowclk = 32KHz
+
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = .
@@ -91,7 +99,6 @@ DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT(1 << 4): indicate this pin need to disable schmit trigger.
DEBOUNCE (1 << 16): indicate this pin need debounce.
-DEBOUNCE_VAL (0x3fff << 17): debounce val.
This change would break the DT ABI since it removes a feature that's
already present.
I missed this point in my cons list.
This won't be an issue for in kernel DT definitions (nobody is currently
using the
DEBOUCE option), but may be for out-of-tree DT definitions.
I suppose it's still up to the Atmel maintainers to decide whether this
is appropriate, or whether the impact to out-of-tree DT files would be
problematic.
Assuming the DT ABI can be broken, I think I'd prefer to do so, rather
than take "non-alt" patch 4/4, since a per-pin DEBOUNCE_VAL clearly
doesn't correctly model the HW, assuming the patch description is
correct. I don't think arguments re: the generic pinconf debounce
property hold; if the Linux-specific/internal generic property doesn't
apply, the DT binding should not be bent to adjust to it, but should
rather still represent the HW itself.
What about the last point in my list: "reconfigure debounce after startup" ?
Here is an example that may be problematic:
Let's say you have one device using multiple configuration of pins
("default", "xxx", "yyy").
The "default" config needs a particular debounce time on a given pin and
the "xxx" and "yyy"
configs need different debounce time on the same pin.
How would you solve this with this patch approach ?
Best Regards,
Boris
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH alt 4/4] pinctrl: at91: rework debounce configuration
Hello Jean-Christophe,
Le 14/09/2013 18:37, Jean-Christophe PLAGNIOL-VILLARD a écrit :
On 09:53 Fri 13 Sep , Boris BREZILLON wrote:
AT91 SoCs do not support per pin debounce time configuration.
Instead you have to configure a debounce time which will be used for all
pins of a given bank (PIOA, PIOB, ...).
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|9 ++-
drivers/pinctrl/pinctrl-at91.c | 79
include/dt-bindings/pinctrl/at91.h |1 -
3 files changed, 73 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index cf7c7bc..8a4cdeb 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -78,6 +78,14 @@ PA31 TXD4
=> 0xffc00c3b
+Optional properties for iomux controller:
+- atmel,default-debounce-div: array of debounce divisors (one divisor per bank)
+ which describes the debounce timing in use for all pins of a given bank
+ configured with the DEBOUNCE option (see the following description).
+ Debounce timing is obtained with this formula:
+ Tdebounce = 2 * (debouncediv + 1) / Fslowclk
+ with Fslowclk = 32KHz
I known that I put the div in the original binding
but maybe we should just put the debounce timing in the DT and calculate the
div in C
Sure, I can do this: retrieve a debounce time (in usec ?) and compute the
according div value.
+
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = .
@@ -91,7 +99,6 @@ DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT(1 << 4): indicate this pin need to disable schmit trigger.
DEBOUNCE (1 << 16): indicate this pin need debounce.
-DEBOUNCE_VAL (0x3fff << 17): debounce val.
NOTE:
Some requirements for using atmel,at91rm9200-pinctrl binding:
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index ac9dbea..2903758 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -62,8 +62,6 @@ static int gpio_banks;
#define PULL_DOWN (1 << 3)
#define DIS_SCHMIT(1 << 4)
#define DEBOUNCE (1 << 16)
-#define DEBOUNCE_VAL_SHIFT 17
-#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
/**
* struct at91_pmx_func - describes AT91 pinmux functions
@@ -145,8 +143,10 @@ struct at91_pinctrl_mux_ops {
void (*mux_D_periph)(void __iomem *pio, unsigned mask);
bool (*get_deglitch)(void __iomem *pio, unsigned pin);
void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
- bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
- void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32
div);
+ bool (*get_debounce)(void __iomem *pio, unsigned pin);
+ void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on);
+ u32 (*get_debounce_div)(void __iomem *pio);
+ void (*set_debounce_div)(void __iomem *pio, u32 div);
why do you split it?
if it's just get if on or not put NULL to div but do not add more function
pointer
I not sure I got your point.
Are you suggesting we should store the default bank bebounce div values
in struct at91_pinctrl
(during probe process) and pass these values each time the set_debounce
function is called ?
IMHO if we split the logic (split debounce activation and debounce time
definition) we should split
these callbacks:
- one callback to enable debounce option on a given pin
- one callback to configure the debounce time for a given bank
If you keep the div parameter in the debounce enable/disable callback
you will reconfigure the div
register (PIO_SCDR_DIV) each time you enable the debounce option, which
is kind of useless
because the div value will never change.
bool (*get_pulldown)(void __iomem *pio, unsigned pin);
void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
@@ -432,25 +432,32 @@ static void at91_mux_pio3_set_deglitch(void __iomem *pio,
unsigned mask, bool is
at91_mux_set_deglitch(pio, mask, is_on);
}
-static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
+static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin)
{
- *div = __raw_readl(pio + PIO_SCDR);
-
return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) &&
((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_debou
Re: [RFC PATCH alt 4/4] pinctrl: at91: rework debounce configuration
Hello Stephen,
On 16/09/2013 18:41, Stephen Warren wrote:
On 09/14/2013 01:08 AM, boris brezillon wrote:
Hello Stephen,
Le 14/09/2013 00:40, Stephen Warren a écrit :
On 09/13/2013 01:53 AM, Boris BREZILLON wrote:
AT91 SoCs do not support per pin debounce time configuration.
Instead you have to configure a debounce time which will be used for all
pins of a given bank (PIOA, PIOB, ...).
...
Required properties for pin configuration node:
...
-DEBOUNCE_VAL(0x3fff << 17): debounce val.
This change would break the DT ABI since it removes a feature that's
already present.
...
I suppose it's still up to the Atmel maintainers to decide whether this
is appropriate, or whether the impact to out-of-tree DT files would be
problematic.
Assuming the DT ABI can be broken, I think I'd prefer to do so, rather
than take "non-alt" patch 4/4, since a per-pin DEBOUNCE_VAL clearly
doesn't correctly model the HW, assuming the patch description is
correct. I don't think arguments re: the generic pinconf debounce
property hold; if the Linux-specific/internal generic property doesn't
apply, the DT binding should not be bent to adjust to it, but should
rather still represent the HW itself.
What about the last point in my list: "reconfigure debounce after
startup" ?
Here is an example that may be problematic:
Let's say you have one device using multiple configuration of pins
("default", "xxx", "yyy").
The "default" config needs a particular debounce time on a given pin and
the "xxx" and "yyy"
configs need different debounce time on the same pin.
How would you solve this with this patch approach ?
Each state has a different pin configuration node, and hence can specify
a different debounce value. This patch has no impact on that (it just
changes whether the state-specific node specifies the debounce value in
a single standalone property, or encodes it into each entry in the pins
property, all within the same node).
Actually it does: this patch removes the debounce time setting option from
the pin config description. The only thing you can do is enable or
disable the
debounce filter.
The atmel,default-debounce-div property is not part of the pin group (or
pin state)
node, it is a global property you define for the whole pinctrl
controller (pinctrl node
property):
pinctrl {
atmel,default-debounce-div=<100 /* PIOA div <=> ~3 ms */
50 /* PIOB
div */
...>;
function {
group {
atmel,pins=<...>;
};
};
};
I can get the debounce time option in a separate property (as you're
suggesting):
pinctrl {
function {
group {
atmel,debounce=<1000>; /* debounce in usec */
atmel,pins=<...>;
};
};
};
but it won't solve the primary issue, that is all the pin on a given
bank (PIOA1 PIOA2, ...)
share the same debounce time.
Please tell me if I misunderstood your suggestion.
Best Regards,
Boris
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 0/2] pwm: atmel-tcb: config fixes
Hello, This patch series fix 2 bugs regarding the pwm configuration: - the clock source of the timer channel is never applied - the maximum time that can be represented when using the slow clock may be wrong if the tc block provide a 32 bits width counter Best Regards, Boris Boris BREZILLON (2): pwm: atmel-tcb: add missing clk source config pwm: atmel-tcb: fix max time computation for slow clk source drivers/pwm/pwm-atmel-tcb.c |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/2] pwm: atmel-tcb: fix max time computation for slow clk source
Use the the tcb counter width to compute the maximum time that can be represented using the slow clock source instead of the static 16 bit width. Signed-off-by: Boris BREZILLON --- drivers/pwm/pwm-atmel-tcb.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c index 0266969..f3dcd02 100644 --- a/drivers/pwm/pwm-atmel-tcb.c +++ b/drivers/pwm/pwm-atmel-tcb.c @@ -307,7 +307,7 @@ static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, i = slowclk; rate = 32768; min = div_u64(NSEC_PER_SEC, rate); - max = min << 16; + max = min << tc->tcb_config->counter_width; /* If period is too big return ERANGE error */ if (max < period_ns) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] pwm: atmel-tcb: add missing clk source config
Clock source changes are never applied to the CMR register. This may lead to wrong period/duty cycle configuration. Signed-off-by: Boris BREZILLON --- drivers/pwm/pwm-atmel-tcb.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c index ba6ce01..0266969 100644 --- a/drivers/pwm/pwm-atmel-tcb.c +++ b/drivers/pwm/pwm-atmel-tcb.c @@ -249,6 +249,8 @@ static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) } } + cmr |= (tcbpwm->div & ATMEL_TC_TCCLKS); + __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); if (index == 0) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 0/2] pwm: atmel-tcb: config fixes
On 19/09/2013 14:06, Thierry Reding wrote: On Wed, Sep 18, 2013 at 05:05:20PM +0200, Boris BREZILLON wrote: Hello, This patch series fix 2 bugs regarding the pwm configuration: - the clock source of the timer channel is never applied - the maximum time that can be represented when using the slow clock may be wrong if the tc block provide a 32 bits width counter Best Regards, Boris Boris BREZILLON (2): pwm: atmel-tcb: add missing clk source config pwm: atmel-tcb: fix max time computation for slow clk source drivers/pwm/pwm-atmel-tcb.c |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Both applied, with Nicolas' Acked-by. Thierry Thanks. Regards, Boris -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 0/4] pinctrl: at91: various fixes
Hello, This patch series fixes some errors in the pinctrl drivers: - typos in dt-binding macros and pinctrl-at91 driver (patch 1) - fix several at91-pinctrl functions (patch 2 and 3) - rework the debounce config handling (patches 4) The last point is the most important one: the at91sam9x5/pio3 controller does not provide a per pin debounce time config. Instead it provides a common debounce time for all the pins on a given bank (PIOX). In this series I proposed 2 solutions to gracefully handle this limitation: 1) Handle debounce time conflicts at config time (PATCH 4/4). In other words, all the pins on a given bank using the debounce option must use the same debounce time. If a device tries to configure a pin with conflicting a debounce time, this will result in an -EINVAL error return during the pin configuration. 2) Provide a device tree property to define the default debounce time on a given bank (PATCH alt 4/4) I prefer the first solution, as it provides a more future proof approach: - the generic pinconf layer provides a per pin debounce time config and if we plan to support it we should take this into consideration - IMHO we should be able to (re)configure the debounce time after bootup and the second solution does not provide any way to do this I might be wrong, so please feel free to share your thoughts about this. Best Regards, Boris Boris BREZILLON (4): pinctrl: at91: fix typos pinctrl: at91: reset caller's config variable before setting flags pinctrl: at91: fix get_debounce/deglitch functions for sam9x5 controller pinctrl: at91: check for debounce time conflicts drivers/pinctrl/pinctrl-at91.c | 60 +++- include/dt-bindings/pinctrl/at91.h |2 +- 2 files changed, 46 insertions(+), 16 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 1/4] pinctrl: at91: fix typos
Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo.
Fix at91_pinctrl_mux_ops callback typos.
Signed-off-by: Boris BREZILLON
---
drivers/pinctrl/pinctrl-at91.c |6 +++---
include/dt-bindings/pinctrl/at91.h |2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 19afb9a..50b555a 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -144,11 +144,11 @@ struct at91_pinctrl_mux_ops {
void (*mux_C_periph)(void __iomem *pio, unsigned mask);
void (*mux_D_periph)(void __iomem *pio, unsigned mask);
bool (*get_deglitch)(void __iomem *pio, unsigned pin);
- void (*set_deglitch)(void __iomem *pio, unsigned mask, bool in_on);
+ void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
- void (*set_debounce)(void __iomem *pio, unsigned mask, bool in_on, u32
div);
+ void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32
div);
bool (*get_pulldown)(void __iomem *pio, unsigned pin);
- void (*set_pulldown)(void __iomem *pio, unsigned mask, bool in_on);
+ void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
/* irq */
diff --git a/include/dt-bindings/pinctrl/at91.h
b/include/dt-bindings/pinctrl/at91.h
index d7988b4..0fee6ff 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -16,7 +16,7 @@
#define AT91_PINCTRL_PULL_DOWN (1 << 3)
#define AT91_PINCTRL_DIS_SCHMIT(1 << 4)
#define AT91_PINCTRL_DEBOUNCE (1 << 16)
-#define AT91_PINCTRL_DEBOUNCE_VA(x)(x << 17)
+#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP |
AT91_PINCTRL_DEGLITCH)
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 2/4] pinctrl: at91: fix sam9x5 debounce/deglitch functions
Replace at91_mux_get_deglitch with at91_mux_pio3_get_deglitch when using
sam9x5 (pio3) IP.
at91_mux_get_deglitch only test the activation of the "Input Filter" which
may be overloaded by the activation of the "Input Filter Slow Clock" to use
the input filter as a debounce filter instead of a deglitch filter.
Fix at91_mux_pio3_get_debounce to test the activation of the Input Filter
before testing the activation of the debounce filter (Input Filter Slow
Clock depends on Input Filter).
Fix at91_mux_pio3_set_debounce function to avoid disabling the deglitch
filter ("Input Filter") when debounce filter is disabled.
Signed-off-by: Boris BREZILLON
---
drivers/pinctrl/pinctrl-at91.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 50b555a..6624bce 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -417,6 +417,14 @@ static void at91_mux_set_deglitch(void __iomem *pio,
unsigned mask, bool is_on)
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
}
+static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
+{
+ if ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1)
+ return !((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
+
+ return false;
+}
+
static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool
is_on)
{
if (is_on)
@@ -428,7 +436,8 @@ static bool at91_mux_pio3_get_debounce(void __iomem *pio,
unsigned pin, u32 *div
{
*div = __raw_readl(pio + PIO_SCDR);
- return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1;
+ return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) &&
+ ((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
@@ -438,9 +447,8 @@ static void at91_mux_pio3_set_debounce(void __iomem *pio,
unsigned mask,
__raw_writel(mask, pio + PIO_IFSCER);
__raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
__raw_writel(mask, pio + PIO_IFER);
- } else {
- __raw_writel(mask, pio + PIO_IFDR);
- }
+ } else
+ __raw_writel(mask, pio + PIO_IFSCDR);
}
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
@@ -478,7 +486,7 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
.mux_B_periph = at91_mux_pio3_set_B_periph,
.mux_C_periph = at91_mux_pio3_set_C_periph,
.mux_D_periph = at91_mux_pio3_set_D_periph,
- .get_deglitch = at91_mux_get_deglitch,
+ .get_deglitch = at91_mux_pio3_get_deglitch,
.set_deglitch = at91_mux_pio3_set_deglitch,
.get_debounce = at91_mux_pio3_get_debounce,
.set_debounce = at91_mux_pio3_set_debounce,
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 3/4] pinctrl: at91: improve pinconf_set/get function robustness
Reset caller's config variable before setting current config flags to avoid
erronous config return.
DEBOUNCE and DEGLITCH options are mutually exclusive. Return an error if they
are both defined in the config.
Do not call set_deglitch if DEBOUNCE is enabled to avoid reseting the IFSR
register (which will result in disabling the debounce filter).
Signed-off-by: Boris BREZILLON
---
drivers/pinctrl/pinctrl-at91.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 6624bce..ac9dbea 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -724,6 +724,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__,
__LINE__, pin_id, *config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
pin = pin_id % MAX_NB_GPIO_PER_BANK;
+ *config = 0;
if (at91_mux_get_multidrive(pio, pin))
*config |= MULTI_DRIVE;
@@ -757,13 +758,20 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
if (config & PULL_UP && config & PULL_DOWN)
return -EINVAL;
- at91_mux_set_pullup(pio, mask, config & PULL_UP);
- at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
- if (info->ops->set_deglitch)
- info->ops->set_deglitch(pio, mask, config & DEGLITCH);
- if (info->ops->set_debounce)
+ if (config & DEBOUNCE && config & DEGLITCH)
+ return -EINVAL;
+
+ if (config & DEBOUNCE) {
+ if (!info->ops->set_debounce)
+ return -ENOTSUPP;
+
info->ops->set_debounce(pio, mask, config & DEBOUNCE,
(config & DEBOUNCE_VAL) >> DEBOUNCE_VAL_SHIFT);
+ } else if (info->ops->set_deglitch)
+ info->ops->set_deglitch(pio, mask, config & DEGLITCH);
+
+ at91_mux_set_pullup(pio, mask, config & PULL_UP);
+ at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
if (info->ops->set_pulldown)
info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
if (info->ops->disable_schmitt_trig && config & DIS_SCHMIT)
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH 4/4] pinctrl: at91: check for debounce time conflicts
On sam9x5 (pio3) PIO controller the debounce time config is shared across
all the pins of a given PIO bank (PIOA, PIOB, ...).
This patch adds checks before applying debounce config on a given pin.
If the pinctrl core tries to configure a debounce time on a given pin and
another pin on the same bank is already configured with a different
debounce time, the pin config with fail with -EINVAL.
Signed-off-by: Boris BREZILLON
---
drivers/pinctrl/pinctrl-at91.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index ac9dbea..986e9bc 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -146,7 +146,7 @@ struct at91_pinctrl_mux_ops {
bool (*get_deglitch)(void __iomem *pio, unsigned pin);
void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
- void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32
div);
+ int (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32
div);
bool (*get_pulldown)(void __iomem *pio, unsigned pin);
void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
@@ -440,15 +440,26 @@ static bool at91_mux_pio3_get_debounce(void __iomem *pio,
unsigned pin, u32 *div
((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
}
-static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
+static int at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
bool is_on, u32 div)
{
if (is_on) {
+ div &= PIO_SCDR_DIV;
+
+ /* Check if another pin of this bank is already using debounce
+* option with a different debounce time */
+ if ((__raw_readl(pio + PIO_IFSR) &
+__raw_readl(pio + PIO_IFSCSR) & ~mask) &&
+ (__raw_readl(pio + PIO_SCDR) & PIO_SCDR_DIV) != div)
+ return -EINVAL;
+
__raw_writel(mask, pio + PIO_IFSCER);
- __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+ __raw_writel(div, pio + PIO_SCDR);
__raw_writel(mask, pio + PIO_IFER);
} else
__raw_writel(mask, pio + PIO_IFSCDR);
+
+ return 0;
}
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
@@ -750,6 +761,7 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
struct at91_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
unsigned mask;
void __iomem *pio;
+ int ret;
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__,
__LINE__, pin_id, config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
@@ -765,8 +777,10 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
if (!info->ops->set_debounce)
return -ENOTSUPP;
- info->ops->set_debounce(pio, mask, config & DEBOUNCE,
+ ret = info->ops->set_debounce(pio, mask, config & DEBOUNCE,
(config & DEBOUNCE_VAL) >> DEBOUNCE_VAL_SHIFT);
+ if (ret)
+ return ret;
} else if (info->ops->set_deglitch)
info->ops->set_deglitch(pio, mask, config & DEGLITCH);
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[RFC PATCH alt 4/4] pinctrl: at91: rework debounce configuration
AT91 SoCs do not support per pin debounce time configuration.
Instead you have to configure a debounce time which will be used for all
pins of a given bank (PIOA, PIOB, ...).
Signed-off-by: Boris BREZILLON
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|9 ++-
drivers/pinctrl/pinctrl-at91.c | 79
include/dt-bindings/pinctrl/at91.h |1 -
3 files changed, 73 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index cf7c7bc..8a4cdeb 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -78,6 +78,14 @@ PA31 TXD4
=> 0xffc00c3b
+Optional properties for iomux controller:
+- atmel,default-debounce-div: array of debounce divisors (one divisor per bank)
+ which describes the debounce timing in use for all pins of a given bank
+ configured with the DEBOUNCE option (see the following description).
+ Debounce timing is obtained with this formula:
+ Tdebounce = 2 * (debouncediv + 1) / Fslowclk
+ with Fslowclk = 32KHz
+
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = .
@@ -91,7 +99,6 @@ DEGLITCH (1 << 2): indicate this pin need deglitch.
PULL_DOWN (1 << 3): indicate this pin need a pull down.
DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
DEBOUNCE (1 << 16): indicate this pin need debounce.
-DEBOUNCE_VAL (0x3fff << 17): debounce val.
NOTE:
Some requirements for using atmel,at91rm9200-pinctrl binding:
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index ac9dbea..2903758 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -62,8 +62,6 @@ static int gpio_banks;
#define PULL_DOWN (1 << 3)
#define DIS_SCHMIT (1 << 4)
#define DEBOUNCE (1 << 16)
-#define DEBOUNCE_VAL_SHIFT 17
-#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
/**
* struct at91_pmx_func - describes AT91 pinmux functions
@@ -145,8 +143,10 @@ struct at91_pinctrl_mux_ops {
void (*mux_D_periph)(void __iomem *pio, unsigned mask);
bool (*get_deglitch)(void __iomem *pio, unsigned pin);
void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
- bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
- void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32
div);
+ bool (*get_debounce)(void __iomem *pio, unsigned pin);
+ void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on);
+ u32 (*get_debounce_div)(void __iomem *pio);
+ void (*set_debounce_div)(void __iomem *pio, u32 div);
bool (*get_pulldown)(void __iomem *pio, unsigned pin);
void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
@@ -432,25 +432,32 @@ static void at91_mux_pio3_set_deglitch(void __iomem *pio,
unsigned mask, bool is
at91_mux_set_deglitch(pio, mask, is_on);
}
-static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32
*div)
+static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin)
{
- *div = __raw_readl(pio + PIO_SCDR);
-
return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) &&
((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
}
static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
- bool is_on, u32 div)
+ bool is_on)
{
if (is_on) {
__raw_writel(mask, pio + PIO_IFSCER);
- __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
__raw_writel(mask, pio + PIO_IFER);
} else
__raw_writel(mask, pio + PIO_IFSCDR);
}
+static u32 at91_mux_pio3_get_debounce_div(void __iomem *pio)
+{
+ return __raw_readl(pio + PIO_SCDR) & PIO_SCDR_DIV;
+}
+
+static void at91_mux_pio3_set_debounce_div(void __iomem *pio, u32 div)
+{
+ __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+}
+
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
{
return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1);
@@ -490,6 +497,8 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
.set_deglitch = at91_mux_pio3_set_deglitch,
.get_debounce = at91_mux_pio3_get_debounce,
.set_debounce = at91_mux_pio3_set_debounce,
+ .get_debounce_div = at91_mux_pio3_get_debounce_div,
+ .set_debounce_div = at91_mux_pio3_set_debounce_div,
.get_pulldown =
Re: [PATCH v3 03/19] clk: at91: add PMC base support
Hello Nicolas,
On 07/10/2013 17:07, Nicolas Ferre wrote:
On 08/08/2013 07:01, Boris BREZILLON :
This patch adds at91 PMC (Power Management Controller) base support.
All at91 clocks managed by the PMC unit will use this framework.
This framework provides the following fonctionalities:
- define a new struct at91_pmc to hide PMC internals (lock, PMC memory
mapping, irq domain, ...)
- read/write helper functions (pmc_read/write) to access PMC registers
- lock/unlock helper functions (pmc_lock/unlock) to lock/unlock
access to
pmc registers
- a new irq domain and its associated irq chip to request PMC specific
interrupts (useful for clk prepare callbacks)
The PMC unit is declared as a dt clk provider (CLK_OF_DECLARE), and
every
clk using this framework will declare a table of of_at91_clk_init_cb_t
and add it to the pmc_clk_ids table.
When the pmc dt clock setup function is called (by of_clk_init
function),
it triggers the registration of every supported child clk (those
matching
the definitions in pmc_clk_ids).
This patch copies at91_pmc_base (memory mapping) and at91sam9_idle
(function) from arch/arm/mach-at91/clock.c (which is not compiled if
COMMON_CLK_AT91 is enabled).
Signed-off-by: Boris BREZILLON
---
drivers/clk/Makefile |1 +
drivers/clk/at91/Makefile |5 +
drivers/clk/at91/pmc.c| 298
+
drivers/clk/at91/pmc.h| 58 +
4 files changed, 362 insertions(+)
create mode 100644 drivers/clk/at91/Makefile
create mode 100644 drivers/clk/at91/pmc.c
create mode 100644 drivers/clk/at91/pmc.h
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 4038c2b..c256a20 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_ARCH_VT8500)+= clk-vt8500.o
obj-$(CONFIG_ARCH_ZYNQ)+= zynq/
obj-$(CONFIG_ARCH_TEGRA)+= tegra/
obj-$(CONFIG_PLAT_SAMSUNG)+= samsung/
+obj-$(CONFIG_COMMON_CLK_AT91)+= at91/
obj-$(CONFIG_X86)+= x86/
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
new file mode 100644
index 000..1d4fb21
--- /dev/null
+++ b/drivers/clk/at91/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for at91 specific clk
+#
+
+obj-y += pmc.o
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
new file mode 100644
index 000..f6bd03d
--- /dev/null
+++ b/drivers/clk/at91/pmc.c
@@ -0,0 +1,298 @@
+/*
+ * drivers/clk/at91/pmc.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "pmc.h"
+
+void __iomem *at91_pmc_base;
+EXPORT_SYMBOL_GPL(at91_pmc_base);
+
+void at91sam9_idle(void)
+{
+at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+cpu_do_idle();
+}
+
+static void pmc_irq_mask(struct irq_data *d)
+{
+struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
+
+pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq);
+}
+
+static void pmc_irq_unmask(struct irq_data *d)
+{
+struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
+
+pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq);
+}
+
+static int pmc_irq_set_type(struct irq_data *d, unsigned type)
+{
+if (type != IRQ_TYPE_LEVEL_HIGH) {
+pr_warn("PMC: type not supported (support only
IRQ_TYPE_LEVEL_HIGH type)\n");
+return -EINVAL;
+}
+
+return 0;
+}
+
+static struct irq_chip pmc_irq = {
+.name = "PMC",
+.irq_disable = pmc_irq_mask,
+.irq_mask = pmc_irq_mask,
+.irq_unmask = pmc_irq_unmask,
+.irq_set_type = pmc_irq_set_type,
+};
+
+static struct lock_class_key pmc_lock_class;
+
+static int pmc_irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+struct at91_pmc*pmc = h->host_data;
+
+irq_set_lockdep_class(virq, &pmc_lock_class);
+
+irq_set_chip_and_handler(virq, &pmc_irq,
+ handle_level_irq);
+set_irq_flags(virq, IRQF_VALID);
+irq_set_chip_data(virq, pmc);
+
+return 0;
+}
+
+static int pmc_irq_domain_xlate(struct irq_domain *d,
+struct device_node *ctrlr,
+const u32 *intspec, unsigned int intsize,
+irq_hw_number_t *out_hwirq,
+unsigned int *out_type)
+{
+struct at91_pmc *pmc = d->host_data;
+const struct at91_pmc_caps *caps = pmc->caps;
+
+if (WARN_ON(intsize < 2))
+return -EINVAL;
+*out_hwirq = intspec[0];
+*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+
+if (!(caps->available_irqs & (1 << *out_hwirq)))
+return -EINVAL;
+
+if (*out_type != IRQ_TYPE_LEV
Re: [PATCH v3 02/19] ARM: at91: add Kconfig options for common clk support
On 07/10/2013 17:12, Nicolas Ferre wrote: On 08/08/2013 07:02, Boris BREZILLON : This patch adds the following Kconfig options to prepare the transition to common clk framework: - AT91_USE_OLD_CLK: this option is selected by every SoC which does not support new at91 clks based on common clk framework (SoC which does not define the clock tree in its device tree). This options is also selected when the user choose non dt boards support (new at91 clks can only be registered from a device tree definition). - COMMON_CLK_AT91: this option cannot be selected directly. Instead it is I would have prefered to keep "AT91" as a prefix => "AT91_COMMON_CLK" But it is not so important. enabled if these 3 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * device tree support is enabled * the old at91 clk implementation is disabled (every selected SoC define its clks in its device tree and non dt boards support is disabled) - OLD_CLK_AT91: this option cannot be selected directly. Instead it is Here also. I'll change the names of these options. enabled if these 2 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * at least one of the selected SoCs does not define its clks in its device tree or non dt-boards support is enabled This patch selects AT91_USE_OLD_CLK in all currently supported SoCs. These selects will be removed after clk definitions are properly added in each soc's device tree. It also selects AT91_USE_OLD_CLK in all non-dt boards support. AT91_PMC_UNIT references are replaced by OLD_CLK_AT91, because PMC Unit is enabled for both old and common clk implementations, and old clk implementation should not be compiled if COMMON_CLK is enabled. To avoid future link errors, a new stub is created for at91_dt_clock_init function if OLD_CLK_AT91 is disabled. A new check is added in dt init functions (setup.c) to prepare for SoCs supporting new clk implementation. These SoCs won't setup the register_clocks callback (clk registration is done using of_clk_init). Signed-off-by: Boris BREZILLON --- arch/arm/mach-at91/Kconfig| 21 + arch/arm/mach-at91/Kconfig.non_dt |6 ++ arch/arm/mach-at91/Makefile |2 +- arch/arm/mach-at91/generic.h |3 ++- arch/arm/mach-at91/setup.c|6 -- 5 files changed, 34 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 699b71e..85b53a4 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -6,10 +6,22 @@ config HAVE_AT91_DBGU0 config HAVE_AT91_DBGU1 bool +config AT91_USE_OLD_CLK +bool + config AT91_PMC_UNIT bool default !ARCH_AT91X40 +config COMMON_CLK_AT91 +bool +default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK +select COMMON_CLK + +config OLD_CLK_AT91 +bool +default AT91_PMC_UNIT && AT91_USE_OLD_CLK + config AT91_SAM9_ALT_RESET bool default !ARCH_AT91X40 @@ -65,6 +77,7 @@ config SOC_SAMA5D3 select SOC_SAMA5 select HAVE_FB_ATMEL select HAVE_AT91_DBGU1 +select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's SAMA5D3 family SoC. This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. @@ -78,11 +91,13 @@ config SOC_AT91RM9200 select HAVE_AT91_DBGU0 select MULTI_IRQ_HANDLER select SPARSE_IRQ +select AT91_USE_OLD_CLK config SOC_AT91SAM9260 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" select HAVE_AT91_DBGU0 select SOC_AT91SAM9 +select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE or AT91SAM9G20 SoC. @@ -92,6 +107,7 @@ config SOC_AT91SAM9261 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 +select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. @@ -100,18 +116,21 @@ config SOC_AT91SAM9263 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 +select AT91_USE_OLD_CLK config SOC_AT91SAM9RL bool "AT91SAM9RL" select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 +select AT91_USE_OLD_CLK config SOC_AT91SAM9G45 bool "AT91SAM9G45 or AT91SAM9M10 families" select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 +select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. @@ -121,6 +140,7 @@ config SOC_AT91SAM9X5 select HAVE_AT91_DBGU0 select HAVE_FB_
Re: [PATCH v3 04/19] clk: at91: add PMC macro file for dt definitions
On 07/10/2013 17:17, Nicolas Ferre wrote: On 08/08/2013 07:04, Boris BREZILLON : This patch adds a new macro file for PMC macros. This macro file includes the definitions of SR (status register) bit offsets and will be use to reference PMC irqs. Signed-off-by: Boris BREZILLON --- include/dt-bindings/clk/at91/common/pmc.h | 20 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/clk/at91/common/pmc.h diff --git a/include/dt-bindings/clk/at91/common/pmc.h b/include/dt-bindings/clk/at91/common/pmc.h new file mode 100644 index 000..edc51d6 --- /dev/null +++ b/include/dt-bindings/clk/at91/common/pmc.h @@ -0,0 +1,20 @@ +/* + * This header provides constants for AT91 pmc status. + * + * The constants defined in this header are being used in dts. It is better to add one line about license: for example: * Licensed under GPLv2 or later. + */ + +#ifndef _DT_BINDINGS_CLK_AT91_PMC_H +#define _DT_BINDINGS_CLK_AT91_PMC_H + +#define AT91_PMC_MOSCS0/* MOSCS Flag */ +#define AT91_PMC_LOCKA1/* PLLA Lock */ +#define AT91_PMC_LOCKB2/* PLLB Lock */ +#define AT91_PMC_MCKRDY3/* Master Clock */ +#define AT91_PMC_LOCKU6/* UPLL Lock */ +#define AT91_PMC_PCKRDY(id)(8 + id)/* Programmable Clock */ I prefer with parenthesis around "id" (8 + (id)) Absolutely, I'll fix it. +#define AT91_PMC_MOSCSELS16/* Main Oscillator Selection */ +#define AT91_PMC_MOSCRCS17/* Main On-Chip RC */ +#define AT91_PMC_CFDEV18/* Clock Failure Detector Event */ + +#endif -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 05/19] clk: at91: add PMC main clock
On 07/10/2013 18:51, Nicolas Ferre wrote:
On 08/08/2013 07:06, Boris BREZILLON :
This patch adds new at91 main oscillator clock implementation using
common
clk framework.
If rate is not provided during clock registration it is calculated using
the slow clock (main clk parent in this case) rate and MCFR register.
Signed-off-by: Boris BREZILLON
---
drivers/clk/at91/Makefile |1 +
drivers/clk/at91/clk-main.c | 171
+++
drivers/clk/at91/pmc.c |5 ++
drivers/clk/at91/pmc.h |3 +
4 files changed, 180 insertions(+)
create mode 100644 drivers/clk/at91/clk-main.c
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 1d4fb21..44105bd 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -3,3 +3,4 @@
#
obj-y += pmc.o
+obj-y += clk-main.o
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
new file mode 100644
index 000..68738dd
--- /dev/null
+++ b/drivers/clk/at91/clk-main.c
@@ -0,0 +1,171 @@
+/*
+ * drivers/clk/at91/clk-main.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pmc.h"
+
+#define to_clk_main(hw) container_of(hw, struct clk_main, hw)
+struct clk_main {
+struct clk_hw hw;
+struct at91_pmc *pmc;
+unsigned long rate;
+unsigned int irq;
+wait_queue_head_t wait;
+};
+
+static irqreturn_t clk_main_irq_handler(int irq, void *dev_id)
+{
+struct clk_main *clkmain = (struct clk_main *)dev_id;
+
+wake_up(&clkmain->wait);
+disable_irq_nosync(clkmain->irq);
+
+return IRQ_HANDLED;
+}
+
+static int clk_main_prepare(struct clk_hw *hw)
+{
+struct clk_main *clkmain = to_clk_main(hw);
+struct at91_pmc *pmc = clkmain->pmc;
+
+while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) {
+enable_irq(clkmain->irq);
+wait_event(clkmain->wait,
+ pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+}
+
+return 0;
+}
+
+static int clk_main_is_prepared(struct clk_hw *hw)
+{
+struct clk_main *clkmain = to_clk_main(hw);
+
+return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+}
+
+static unsigned long clk_main_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+u32 tmp;
+struct clk_main *clkmain = to_clk_main(hw);
+struct at91_pmc *pmc = clkmain->pmc;
+
+if (clkmain->rate)
+return clkmain->rate;
+
+while (!((tmp = pmc_read(pmc, AT91_CKGR_MCFR)) & AT91_PMC_MAINRDY))
+;
I must say that I do not like this while() loop. Please implement a
way out and a mean to release CPU when waiting...
Maybe taking a timeout example like this one:
http://lxr.free-electrons.com/source/drivers/net/ethernet/cadence/macb.c#L391
Which is actually what I leart from Wolfram during his interesting
session @ ELC-E:
http://elinux.org/images/5/54/Elce11_sang.pdf
I'll take a closer look at these references.
As I understand, this is about sleeping between each test/iteration of
the while loop.
It is true though that we should keep this very quick to not alter
boot time too much.
I also wonder if really checking that main clock is read makes sense.
If we are running Linux it probably mean that at least main clock is
already well configured by the bootloader.
This is not exactly the status of the main clk (the main clk status is
reflected by the MOSCXTS bit in the PMC_SR register).
This field reflects the MAINF value reliability (MAINF value is used in
case the main XTAL frequency was not provided in the dt definition,
to calculate the main XTAL frequency).
Anyway, MAINFRDY will probably be set at the time this code is executed.
And this lead to a more general remark: couldn't we simply state that
this clock is fixed and only available for reading its status?
This is up to you, but IMHO the code to support this (unlikely) case is
not so big (even with the sleeping version you suggested).
+
+tmp &= AT91_PMC_MAINF;
+clkmain->rate = (tmp * parent_rate) / 16;
+
+return clkmain->rate;
+}
+
+static const struct clk_ops main_ops = {
+.prepare = clk_main_prepare,
+.is_prepared = clk_main_is_prepared,
+.recalc_rate = clk_main_recalc_rate,
+};
+
+static struct clk * __init
+at91_clk_register_main(struct at91_pmc *pmc,
+ unsigned int irq,
+ const char *name,
+ const char *parent_name,
+ unsigned long rate)
+{
+int ret;
+struct clk_main *clkmain;
+struct clk
Re: [PATCH v3 05/19] clk: at91: add PMC main clock
On 08/10/2013 10:24, Nicolas Ferre wrote:
On 07/10/2013 21:11, boris brezillon :
On 07/10/2013 18:51, Nicolas Ferre wrote:
On 08/08/2013 07:06, Boris BREZILLON :
This patch adds new at91 main oscillator clock implementation using
common
clk framework.
If rate is not provided during clock registration it is calculated
using
the slow clock (main clk parent in this case) rate and MCFR register.
Signed-off-by: Boris BREZILLON
---
drivers/clk/at91/Makefile |1 +
drivers/clk/at91/clk-main.c | 171
+++
drivers/clk/at91/pmc.c |5 ++
drivers/clk/at91/pmc.h |3 +
4 files changed, 180 insertions(+)
create mode 100644 drivers/clk/at91/clk-main.c
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 1d4fb21..44105bd 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -3,3 +3,4 @@
#
obj-y += pmc.o
+obj-y += clk-main.o
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
new file mode 100644
index 000..68738dd
--- /dev/null
+++ b/drivers/clk/at91/clk-main.c
@@ -0,0 +1,171 @@
+/*
+ * drivers/clk/at91/clk-main.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License as
published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pmc.h"
+
+#define to_clk_main(hw) container_of(hw, struct clk_main, hw)
+struct clk_main {
+struct clk_hw hw;
+struct at91_pmc *pmc;
+unsigned long rate;
+unsigned int irq;
+wait_queue_head_t wait;
+};
+
+static irqreturn_t clk_main_irq_handler(int irq, void *dev_id)
+{
+struct clk_main *clkmain = (struct clk_main *)dev_id;
+
+wake_up(&clkmain->wait);
+disable_irq_nosync(clkmain->irq);
+
+return IRQ_HANDLED;
+}
+
+static int clk_main_prepare(struct clk_hw *hw)
+{
+struct clk_main *clkmain = to_clk_main(hw);
+struct at91_pmc *pmc = clkmain->pmc;
+
+while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) {
+enable_irq(clkmain->irq);
+wait_event(clkmain->wait,
+ pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+}
+
+return 0;
+}
+
+static int clk_main_is_prepared(struct clk_hw *hw)
+{
+struct clk_main *clkmain = to_clk_main(hw);
+
+return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+}
+
+static unsigned long clk_main_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+u32 tmp;
+struct clk_main *clkmain = to_clk_main(hw);
+struct at91_pmc *pmc = clkmain->pmc;
+
+if (clkmain->rate)
+return clkmain->rate;
+
+while (!((tmp = pmc_read(pmc, AT91_CKGR_MCFR)) &
AT91_PMC_MAINRDY))
+;
I must say that I do not like this while() loop. Please implement a
way out and a mean to release CPU when waiting...
Maybe taking a timeout example like this one:
http://lxr.free-electrons.com/source/drivers/net/ethernet/cadence/macb.c#L391
Which is actually what I leart from Wolfram during his interesting
session @ ELC-E:
http://elinux.org/images/5/54/Elce11_sang.pdf
I'll take a closer look at these references.
As I understand, this is about sleeping between each test/iteration of
the while loop.
Mike, I'm not sure if the recalc_rate callback can actually sleep.
If this is not the case, we should move this waiting loop in clk_prepare.
What do you think ?
It is true though that we should keep this very quick to not alter
boot time too much.
I also wonder if really checking that main clock is read makes sense.
If we are running Linux it probably mean that at least main clock is
already well configured by the bootloader.
This is not exactly the status of the main clk (the main clk status is
reflected by the MOSCXTS bit in the PMC_SR register).
This field reflects the MAINF value reliability (MAINF value is used in
case the main XTAL frequency was not provided in the dt definition,
to calculate the main XTAL frequency).
Anyway, MAINFRDY will probably be set at the time this code is executed.
And this lead to a more general remark: couldn't we simply state that
this clock is fixed and only available for reading its status?
This is up to you, but IMHO the code to support this (unlikely) case is
not so big (even with the sleeping version you suggested).
Fair enough, let's go for this version.
+
+tmp &= AT91_PMC_MAINF;
+clkmain->rate = (tmp * parent_rate) / 16;
+
+return clkmain->rate;
+}
+
+static const struct clk_ops main_ops = {
+.prepare = clk_main_prepare,
+.is_prepared = clk_main_is_prepared,
+.recalc_rate = clk_main_reca
Re: [PATCH v3 06/19] clk: at91: add PMC pll clocks
On 08/10/2013 12:28, Nicolas Ferre wrote:
On 08/08/2013 08:07, Boris BREZILLON :
This patch adds new at91 pll clock implementation using common clk
framework.
The pll clock layout describe the PLLX register layout.
There are four pll clock layouts:
- at91rm9200
- at91sam9g20
- at91sam9g45
- sama5d3
PLL clocks are given characteristics:
- min/max clock source rate
- ranges of valid clock output rates
- values to set in out and icpll fields for each supported output range
These characteristics are checked during rate change to avoid
over/underclocking.
These characteristics are described in atmel's SoC datasheet in
"Electrical Characteristics" paragraph.
Signed-off-by: Boris BREZILLON
---
drivers/clk/at91/Makefile |2 +-
drivers/clk/at91/clk-pll.c| 506
+
drivers/clk/at91/clk-plldiv.c | 137 +++
drivers/clk/at91/pmc.c| 21 ++
drivers/clk/at91/pmc.h| 11 +
include/linux/clk/at91_pmc.h |2 +
6 files changed, 678 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/at91/clk-pll.c
create mode 100644 drivers/clk/at91/clk-plldiv.c
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 44105bd..902bbf1 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -3,4 +3,4 @@
#
obj-y += pmc.o
-obj-y += clk-main.o
+obj-y += clk-main.o clk-pll.o clk-plldiv.o
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
new file mode 100644
index 000..ce519f2
--- /dev/null
+++ b/drivers/clk/at91/clk-pll.c
@@ -0,0 +1,506 @@
+/*
+ * drivers/clk/at91/clk-pll.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pmc.h"
+
+struct clk_pll_characteristics {
+struct clk_range input;
+int num_output;
+struct clk_range *output;
+u16 *icpll;
+u8 *out;
+};
+
+struct clk_pll_layout {
+u32 pllr_mask;
+u16 mul_mask;
+u8 mul_shift;
+};
+
+#define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
+
+struct clk_pll {
+struct clk_hw hw;
+struct at91_pmc *pmc;
+unsigned int irq;
+wait_queue_head_t wait;
+u8 id;
+u8 div;
+u8 range;
+u16 mul;
+const struct clk_pll_layout *layout;
+const struct clk_pll_characteristics *characteristics;
+};
+
+static irqreturn_t clk_pll_irq_handler(int irq, void *dev_id)
+{
+struct clk_pll *pll = (struct clk_pll *)dev_id;
+
+wake_up(&pll->wait);
+disable_irq_nosync(pll->irq);
+
+return IRQ_HANDLED;
+}
+
+static int clk_pll_prepare(struct clk_hw *hw)
+{
+struct clk_pll *pll = to_clk_pll(hw);
+struct at91_pmc *pmc = pll->pmc;
+
+while (!(pmc_read(pmc, AT91_PMC_SR) & (1 << (1 + pll->id {
Here, we can define a macro for this driver that can take pll->id and
give back the mask: it seems to be used frequently in the driver).
Sure, I will define macros and use them appropriately.
+enable_irq(pll->irq);
+wait_event(pll->wait,
+ pmc_read(pmc, AT91_PMC_SR) & (1 << (1 + pll->id)));
+}
+
+return 0;
+}
+
+static int clk_pll_is_ready(struct clk_hw *hw)
+{
+struct clk_pll *pll = to_clk_pll(hw);
+struct at91_pmc *pmc = pll->pmc;
+
+return !!(pmc_read(pmc, AT91_PMC_SR) &
+ (1 << (1 + pll->id)));
+}
+
+static void clk_pll_disable(struct clk_hw *hw)
+{
+struct clk_pll *pll = to_clk_pll(hw);
+struct at91_pmc *pmc = pll->pmc;
+const struct clk_pll_layout *layout = pll->layout;
+int offset = AT91_CKGR_PLLAR + (pll->id * 4);
Here also, a macro can be interesting to retrieve the PLL register
address.
+u32 tmp = pmc_read(pmc, offset) & ~(layout->pllr_mask);
Well why not just setting MULA/B to 0? I know it is nearly the same
but on sama5d3, there is a field that must always be set to 1 (bit 29).
This was here to handle sama5 (and maybe other SoCs I don't recall)
specific case.
This way (by reading the PLLR register and masking it with ~pllr_mask)
the bit that must be set 1 is always set correctly.
How would you do it (handle sama5 specific behaviour) ?
+
+pmc_write(pmc, offset, tmp);
+}
+
+static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+struct clk_pll *pll = to_clk_pll(hw);
+const struct clk_pll_layout *layout = pll->layout;
+struct at91_pmc *pmc = pll->pmc;
+int offset = AT91_CKGR_PLLAR + (pll->id * 4);
Ditto
+u32 tmp = pmc_read(pmc, offset) & layout->
Re: [PATCH v3 07/19] clk: at91: add pll id macros for pll dt bindings
On 08/10/2013 12:30, Nicolas Ferre wrote: On 08/08/2013 08:09, Boris BREZILLON : This patch adds the PLL id macros which will be used by pll dt definitions. It is not needed, drop it. Just document the values in the DT biding and it will be fine. I'll drop (and document) it. Signed-off-by: Boris BREZILLON --- include/dt-bindings/clk/at91/common/clk-pll.h | 13 + 1 file changed, 13 insertions(+) create mode 100644 include/dt-bindings/clk/at91/common/clk-pll.h diff --git a/include/dt-bindings/clk/at91/common/clk-pll.h b/include/dt-bindings/clk/at91/common/clk-pll.h new file mode 100644 index 000..93ec849 --- /dev/null +++ b/include/dt-bindings/clk/at91/common/clk-pll.h @@ -0,0 +1,13 @@ +/* + * This header provides constants for AT91 pll ids. + * + * The constants defined in this header are being used in dts. + */ + +#ifndef _DT_BINDINGS_CLK_AT91_PLL_H +#define _DT_BINDINGS_CLK_AT91_PLL_H + +#define AT91_PLLA_CLK0/* PLLA clk id */ +#define AT91_PLLB_CLK1/* PLLB clk id */ + +#endif -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 17/19] clk: at91: add PMC clk device tree binding doc.
On 08/10/2013 11:44, Nicolas Ferre wrote:
On 08/08/2013 09:19, Boris BREZILLON :
This patch adds new at91 clks dt bindings documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/clock/at91-clock.txt | 312
1 file changed, 312 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/at91-clock.txt
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt
b/Documentation/devicetree/bindings/clock/at91-clock.txt
new file mode 100644
index 000..04739da
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -0,0 +1,312 @@
+Device Tree Clock bindings for arch-at91
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be one of the following:
+"atmel,at91rm9200-pmc" or
+"atmel,at91sam9g45-pmc" or
+"atmel,at91sam9n12-pmc" or
+"atmel,at91sam9x5-pmc" or
+"atmel,at91sam9g35-pmc" or
Already said in previous patches: 9g35 is not different from the 9x5:
it was a bug in the older datasheet.
I'll drop it.
+"atmel,sama5d3-pmc":
+at91 PMC (Power Management Controller)
+All at91 specific clocks (clocks defined below) must be child
+node of the PMC node.
+
+"atmel,at91rm9200-clk-main":
+at91 main oscillator
+
+"atmel,at91rm9200-clk-master" or
+"atmel,at91sam9x5-clk-master":
+at91 master clock
+
+"atmel,at91sam9x5-clk-peripheral" or
+"atmel,at91rm9200-clk-peripheral":
+at91 peripheral clocks
+
+"atmel,at91rm9200-clk-pll" or
+"atmel,at91sam9g45-clk-pll" or
+"atmel,at91sam9g20-clk-pllb" or
+"atmel,sama5d3-clk-pll":
+at91 pll clocks
+
+"atmel,at91sam9x5-clk-plldiv":
+at91 plla divisor
+
+"atmel,at91rm9200-clk-programmable" or
+"atmel,at91sam9g45-clk-programmable" or
+"atmel,at91sam9x5-clk-programmable":
+at91 programmable clocks
+
+"atmel,at91sam9x5-clk-smd":
+at91 SMD (Soft Modem) clock
+
+"atmel,at91rm9200-clk-system":
+at91 system clocks
+
+"atmel,at91rm9200-clk-usb" or
+"atmel,at91sam9x5-clk-usb":
+at91 usb clock
+
+"atmel,at91sam9x5-clk-utmi":
+at91 utmi clock
+
+Required properties for PMC node:
+- reg : defines the IO memory reserved for the PMC.
+- interrupts : shall be set to PMC interrupt line.
+- interrupt-controller : tell that the PMC is an interrupt controller
+- #interrupt-cells : must be set to 2. The first cell encodes the
interrupt id
Please add more information about these values.
The first cell encodes the clk/interrupt id, which is represented by the
bit position in the PMC_SR register:
- MAIN clk = 0
- PLLA = 1
- ...
+ the second cell encodes the interrupt type.
Here also: is it always the same type that shall be given? Following
which rule? What are the allowed values?
Yes it's always IRQ_TYPE_LEVEL_HIGH, maybe I should just define one cell
and drop the irq type cell.
+For example:
+ pmc: pmc@fc00 {
+compatible = "atmel,sama5d3-pmc";
+interrupts = ;
It is an habit not to use macro names in device tree examples (even if
it is true that it is more readable).
I'll use numerical values instead of macros (anyway, the AT91_ID_XX will
be dropped).
+interrupt-controller;
+#interrupt-cells = <2>;
+
+/* put at91 clocks here */
+};
+
+Required properties for main clock:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "".
Ditto. Here you can use the numerical value and also specify the macro
name. But the numerical value should prevail.
Okay
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks (optional if clock-frequency is provided) : shall be the
slow clock
+phandle. This clock is used to compute the main clock rate if
+"clock-frequency" is not provided.
+- clock-frequency: the main oscillator frequency.Prefer the use of
Nit. one white space missing
+"clock-frequency" over automatic clock rate computation.
+
+For example:
+main: mainck {
+compatible = "atmel,at91rm9200-clk-main";
+interrupt-parent = <&pmc>;
+interrupts = ;
Ditto
+#clock-cells = <0>;
+clocks = <&ck32k>;
+clock-frequency = <18432000>;
+};
+
+Required properties for master clock:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "".
Ditto
+- #clock-cells : from common clock binding; shall be set to
