[PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins

2018-12-14 Thread jakob . wuhrer 
From: Jakob Wuhrer 

gpiio5 is missspelt in msm8996-pins.dtsi, fix that.

Signed-off-by: Jakob Wuhrer 
---
 arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
index c5c42e9..1d1f7f9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -139,7 +139,7 @@
};
 
pinconf {
-   pins = "gpio4", "gpiio5", "gpio6", "gpio7";
+   pins = "gpio4", "gpio5", "gpio6", "gpio7";
drive-strength = <2>;
bias-disable;
};
-- 
1.8.3.1

[PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts

2018-12-14 Thread jakob . wuhrer 
From: Jakob Wuhrer 

msm8996 has 12 uarts, but the devicetree only lists 3. Add the
pinmuxing and the main devicetree entries for the others.

Signed-off-by: Jakob Wuhrer 
---
 arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 524 +
 arch/arm64/boot/dts/qcom/msm8996.dtsi  |  80 +
 2 files changed, 604 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
index 1d1f7f9..99056b6 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -495,4 +495,528 @@
bias-disable;
};
};
+
+   blsp1_uart0_2pins_default: blsp1_uart0_2pins {
+   pinmux {
+   function = "blsp_uart1";
+   pins = "gpio0", "gpio1";
+   };
+   pinconf {
+   pins = "gpio0", "gpio1";
+   drive-strength = <16>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart0_2pins_sleep: blsp1_uart0_2pins_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio0", "gpio1";
+   };
+   pinconf {
+   pins = "gpio0", "gpio1";
+   drive-strength = <2>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart0_4pins_default: blsp1_uart0_4pins {
+   pinmux {
+   function = "blsp_uart1";
+   pins = "gpio0", "gpio1", "gpio2", "gpio3";
+   };
+
+   pinconf {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3";
+   drive-strength = <16>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart0_4pins_sleep: blsp1_uart0_4pins_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio0", "gpio1", "gpio2", "gpio3";
+   };
+
+   pinconf {
+   pins = "gpio0", "gpio1", "gpio2", "gpio3";
+   drive-strength = <2>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart1_2pins_default: blsp1_uart1_2pins {
+   pinmux {
+   function = "blsp_uart2";
+   pins = "gpio41", "gpio42";
+   };
+   pinconf {
+   pins = "gpio41", "gpio42";
+   drive-strength = <16>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart1_2pins_sleep: blsp1_uart1_2pins_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio41", "gpio42";
+   };
+   pinconf {
+   pins = "gpio41", "gpio42";
+   drive-strength = <2>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart1_4pins_default: blsp1_uart1_4pins {
+   pinmux {
+   function = "blsp_uart2";
+   pins = "gpio41", "gpio42", "gpio43", "gpio44";
+   };
+
+   pinconf {
+   pins = "gpio41", "gpio42", "gpio43", "gpio44";
+   drive-strength = <16>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart1_4pins_sleep: blsp1_uart1_4pins_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio41", "gpio42", "gpio43", "gpio44";
+   };
+
+   pinconf {
+   pins = "gpio41", "gpio42", "gpio43", "gpio44";
+   drive-strength = <2>;
+   bias-disable;
+   };
+   };
+
+   blsp1_uart2_2pins_default: blsp1_uart2_2pins {
+   pinmux {
+   function = "blsp_uart3";
+   pins = "gpio45", "gpio46";
+   };
+   pinconf {
+   pins = "gpio45", "gpio46";
+   drive-strength = <16>;
+   bias-disable;
+

Re: [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts

2019-01-12 Thread Jakob Wuhrer 
Hi everyone,

Did I submit these to the right lists?
If so, could someone please take a look at these patches?

On another note: I think the mailing lists might be a bit overzealous
with respect to what it blocks, I was unable to submit patches using an
@airmail.cc email account.

thanks in advance,
Jakob Wuhrer

On 12/14/18 6:01 PM, jakob.wuh...@gmail.com wrote:
> From: Jakob Wuhrer 
> 
> msm8996 has 12 uarts, but the devicetree only lists 3. Add the
> pinmuxing and the main devicetree entries for the others.
> 
> Signed-off-by: Jakob Wuhrer 
> ---
>  arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 524 
> +
>  arch/arm64/boot/dts/qcom/msm8996.dtsi  |  80 +
>  2 files changed, 604 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi 
> b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> index 1d1f7f9..99056b6 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> @@ -495,4 +495,528 @@
>   bias-disable;
>   };
>   };
> +
> + blsp1_uart0_2pins_default: blsp1_uart0_2pins {
> + pinmux {
> + function = "blsp_uart1";
> + pins = "gpio0", "gpio1";
> + };
> + pinconf {
> + pins = "gpio0", "gpio1";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_2pins_sleep: blsp1_uart0_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio0", "gpio1";
> + };
> + pinconf {
> + pins = "gpio0", "gpio1";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_4pins_default: blsp1_uart0_4pins {
> + pinmux {
> + function = "blsp_uart1";
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + };
> +
> + pinconf {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_4pins_sleep: blsp1_uart0_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + };
> +
> + pinconf {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_2pins_default: blsp1_uart1_2pins {
> + pinmux {
> + function = "blsp_uart2";
> + pins = "gpio41", "gpio42";
> + };
> + pinconf {
> + pins = "gpio41", "gpio42";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_2pins_sleep: blsp1_uart1_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio41", "gpio42";
> + };
> + pinconf {
> + pins = "gpio41", "gpio42";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_4pins_default: blsp1_uart1_4pins {
> + pinmux {
> + function = "blsp_uart2";
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + };
> +
> + pinconf {
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_4pins_sleep: blsp1_uart1_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio41", "gpio42