[PATCHv2 0/3] ARM:sunxi:ps2 Added support for A10/A20 ps2 controller.

2014-12-06 Thread vishnupatekar
Here is v2 of SUNXI PS2 controller support patch-set as with v1.

Changes in v2: 
1. added default n depends on ARCH_SUNXI || COMPILE_TEST in Kconfig.
2. handled errors and free resources on errors.
3. used BIT(x), DIV_ROUND_UP macros.
4. corrected style errors.
5. added support for A10 also, A10 and A2 have same properties of PS2 
controller.
6. by default commented ps20 and ps21 nodes,as ps20 pins conflict with HDMI
   connector on Lime2 Board.
7. added compatible as allwinner,sun4i-a10-ps2.
8. corrected the possible race condition.

Patch 0 Summary: Allwinner A10/A20 PS2 controller. These modifications are
for PS2 host controller. IBM compliant IBM PS2 and AT-compatible 
keyboard and mouse can be connected.

Patch 1 device tree bindings.

Patch 2 adds support for sun7i ps2 driver.

Patch 3 device tree support for PS2 controller.
 1) Added A10/A20 ps2 nodes to the dtsi
 2) Added A10/A20 ps2 pinmux to the dtsi
 3) Added ps2 nodes to the lime2 dts file

vishnupatekar (3):
  sunxi:dts-bindings:input:ps2 bindings for A10/A20 ps2.
  sunxi:drivers:input:ps2 Added sunxi A10/A20 ps2 driver
  ARM:dts:sunxi:ps2 dt nodes for A10/A20 PS2 controller.

 .../bindings/input/allwinner,sunxi-ps2.txt |   23 ++
 arch/arm/boot/dts/sun4i-a10.dtsi   |   27 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts|   13 +
 arch/arm/boot/dts/sun7i-a20.dtsi   |   29 ++
 drivers/input/serio/Kconfig|   10 +
 drivers/input/serio/Makefile   |1 +
 drivers/input/serio/sunxi-ps2.c|  364 
 7 files changed, 467 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/input/allwinner,sunxi-ps2.txt
 create mode 100644 drivers/input/serio/sunxi-ps2.c

-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv2 1/3] sunxi:dts-bindings:input:ps2 bindings for A10/A20 ps2.

2014-12-06 Thread vishnupatekar
A10 and A20 have same PS2 addresses, clocks, interrupts.
added compatible as allwinner,sun4i-a10-ps2.

Signed-off-by: vishnupatekar 
---
 .../bindings/input/allwinner,sunxi-ps2.txt |   23 
 1 file changed, 23 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/input/allwinner,sunxi-ps2.txt

diff --git a/Documentation/devicetree/bindings/input/allwinner,sunxi-ps2.txt 
b/Documentation/devicetree/bindings/input/allwinner,sunxi-ps2.txt
new file mode 100644
index 000..3a8919a
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/allwinner,sunxi-ps2.txt
@@ -0,0 +1,23 @@
+* Device tree bindings for Allwinner A10, A20 PS2 host controller
+
+A20 PS2 is dual role controller(PS2 host and PS2 device). These bindings are 
for PS2 host controller.
+IBM compliant IBM PS2 and AT-compatible keyboard and mouse can be connected.
+
+Required properties:
+
+ - reg : Offset and length of the register set for the device.
+ - compatible  : Should one of the following:
+ - "allwinner,sun7i-a20-ps2"
+ - "allwinner,sun4i-a10-ps2"
+ - interrupts  : The interrupt line connected to the PS2.
+ - clocks  : The gate clk connected to the PS2.
+
+
+Example:
+   ps20: ps2@0x01c2a000 {
+   compatible = "allwinner,sun7i-a20-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <0 62 4>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv2 2/3] sunxi:drivers:input:ps2 Added sunxi A10/A20 ps2 driver

2014-12-06 Thread vishnupatekar
 -added compatible as allwinner,sun4i-a10-ps2 and allwinner,sun7i-a20-ps2.
 - added default n depends on ARCH_SUNXI || COMPILE_TEST
 in Kconfig.
 -handled errors and free resources on errors.
 -used BIT(x), DIV_ROUND_UP macros.
 -corrected style errors.

Signed-off-by: vishnupatekar 
---
 drivers/input/serio/Kconfig |   10 ++
 drivers/input/serio/Makefile|1 +
 drivers/input/serio/sunxi-ps2.c |  364 +++
 3 files changed, 375 insertions(+)
 create mode 100644 drivers/input/serio/sunxi-ps2.c

diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index bc2d474..3a7599c 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -281,4 +281,14 @@ config HYPERV_KEYBOARD
  To compile this driver as a module, choose M here: the module will
  be called hyperv_keyboard.
 
+config SERIO_SUNXI_PS2
+   tristate "Allwinner Sun4i-A10/Sun7i-A20 PS/2 controller"
+   default n
+   depends on ARCH_SUNXI || COMPILE_TEST
+   help
+ Say Y here if you have Sun4i-A10/Sun7i-A20 Allwinner PS/2 ports.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sunxi-ps2.
+
 endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 815d874..0fa0f78 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_SERIO_ARC_PS2)   += arc_ps2.o
 obj-$(CONFIG_SERIO_APBPS2) += apbps2.o
 obj-$(CONFIG_SERIO_OLPC_APSP)  += olpc_apsp.o
 obj-$(CONFIG_HYPERV_KEYBOARD)  += hyperv-keyboard.o
+obj-$(CONFIG_SERIO_SUNXI_PS2)  += sunxi-ps2.o
diff --git a/drivers/input/serio/sunxi-ps2.c b/drivers/input/serio/sunxi-ps2.c
new file mode 100644
index 000..4cd89ae
--- /dev/null
+++ b/drivers/input/serio/sunxi-ps2.c
@@ -0,0 +1,364 @@
+/*
+ * Driver for Allwinner A20 PS2 host controller
+ *
+ * Author: Vishnu Patekar 
+ * Aaron.maoye 
+ *
+ * Based on 3.0 kernel
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME"sunxi-ps2"
+
+/* register offset definitions */
+#define PS2_REG_GCTL   (0x00)  /*  PS2 Module Global Control Reg */
+#define PS2_REG_DATA   (0x04)  /*  PS2 Module Data Reg */
+#define PS2_REG_LCTL   (0x08)  /*  PS2 Module Line Control Reg */
+#define PS2_REG_LSTS   (0x0C)  /*  PS2 Module Line Status Reg  */
+#define PS2_REG_FCTL   (0x10)  /*  PS2 Module FIFO Control Reg */
+#define PS2_REG_FSTS   (0x14)  /*  PS2 Module FIFO Status Reg  */
+#define PS2_REG_CLKDR  (0x18)  /*  PS2 Module Clock Divider Reg*/
+
+/*  PS2 GLOBAL CONTROL REGISTER PS2_GCTL */
+#define PS2_GCTL_INTFLAG   BIT(4)
+#define PS2_GCTL_INTEN BIT(3)
+#define PS2_GCTL_RESET BIT(2)
+#define PS2_GCTL_MASTERBIT(1)
+#define PS2_GCTL_BUSEN BIT(0)
+
+/* PS2 LINE CONTROL REGISTER */
+#define PS2_LCTL_NOACK BIT(18)
+#define PS2_LCTL_TXDTOEN   BIT(8)
+#define PS2_LCTL_STOPERREN BIT(3)
+#define PS2_LCTL_ACKERREN  BIT(2)
+#define PS2_LCTL_PARERREN  BIT(1)
+#define PS2_LCTL_RXDTOEN   BIT(0)
+
+/* PS2 LINE STATUS REGISTER */
+#define PS2_LSTS_TXTDO BIT(8)
+#define PS2_LSTS_STOPERR   BIT(3)
+#define PS2_LSTS_ACKERRBIT(2)
+#define PS2_LSTS_PARERRBIT(1)
+#define PS2_LSTS_RXTDO BIT(0)
+
+/* PS2 FIFO CONTROL REGISTER */
+#define PS2_FCTL_TXRST BIT(17)
+#define PS2_FCTL_RXRST BIT(16)
+#define PS2_FCTL_TXUFIEN   BIT(10)
+#define PS2_FCTL_TXOFIEN   BIT(9)
+#define PS2_FCTL_TXRDYIEN  BIT(8)
+#define PS2_FCTL_RXUFIEN   BIT(2)
+#define PS2_FCTL_RXOFIEN   BIT(1)
+#define PS2_FCTL_RXRDYIEN  BIT(0)
+
+/* PS2 FIFO STATUS REGISTER */
+#define PS2_FSTS_TXUF  BIT(10)
+#define PS2_FSTS_TXOF  BIT(9)
+#define PS2_FSTS_TXRDY BIT(8)
+#define PS2_FSTS_RXUF  BIT(2)
+#define PS2_FSTS_RXOF  BIT(1)
+#define PS2_FSTS_RXRDY BIT(0)
+
+
+#define PS2_LINE_ERROR_BIT \
+   (PS2_LSTS_TXTDO|PS2_LSTS_STOPERR|PS2_LSTS_ACKERR| \
+   PS2_LSTS_PARERR|PS2_LSTS_RXTDO)
+
+#define PS2_FIFO_ERROR_BIT \
+   (PS2_FSTS_TXUF|PS2_FSTS_TXOF|PS2_FSTS_TXRDY|PS2_FSTS_RXUF| \
+   PS2_FSTS_RXOF|PS2_FSTS_RXRDY)
+
+#define PS2_SAMPLE_CLK (100)
+#define PS2_SCLK   (125000)
+
+struct sunxips2data {
+   struct serio *serio;
+   struct device *dev;
+
+   /* IO mapping base */
+   void __iomem*reg_base;
+
+   /* clock management */
+   struct clk  *clk;
+
+   /* irq */
+   spinlock_t  lock;
+   int irq;
+};
+
+/*/
+/* Interrupt handler */
+/*/
+static irqreturn_t sunxips2_interrupt(int irq, void *dev_id)
+{
+   struct s

[PATCHv2 3/3] ARM:dts:sunxi:ps2 dt nodes for A10/A20 PS2 controller.

2014-12-06 Thread vishnupatekar
 Added ps2 nodes in lime2 board dts. By default ps20 and ps21 nodes are
 commented as ps20 pins conflict with HDMI connector
 on Lime2 Board.

Signed-off-by: vishnupatekar 
---
 arch/arm/boot/dts/sun4i-a10.dtsi|   27 +
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts |   13 ++
 arch/arm/boot/dts/sun7i-a20.dtsi|   29 +++
 3 files changed, 69 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 5e2ec2d..4726e8d 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -615,6 +615,19 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+   ps2_0_pins: ps2_0@0 {
+   allwinner,pins = "PI20","PI21";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+   ps2_1_pins: ps2_1@0 {
+   allwinner,pins = "PH12","PH13";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
};
 
timer@01c20c00 {
@@ -781,5 +794,19 @@
#address-cells = <1>;
#size-cells = <0>;
};
+   ps20: ps2@0x01c2a000 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <0 62 4>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
+   ps21: ps2@0x01c2a400 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a400 0x400>;
+   interrupts = <0 63 4>;
+   clocks = <&apb1_gates 7>;
+   status = "disabled";
+   };
};
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index ed364d5..5624e63 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -112,6 +112,19 @@
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
+   /* PS2 0 and PS2 1 are disabled by default
+   To enable PS2 0 and PS2 1 uncomment below ps20 and ps21 nodes
+   Please note that ps20 pins conflict with HDMI on Lime2 Board*/
+   /*ps20: ps2@0x01c2a000 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&ps2_0_pins>;
+   status = "okay";
+   };
+   ps21: ps2@0x01c2a400 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&ps2_1_pins>;
+   status = "okay";
+   };*/
 
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 8605f2b..96fe37d 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -852,6 +852,19 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+   ps2_0_pins: ps2_0@0 {
+   allwinner,pins = "PI20","PI21";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+   ps2_1_pins: ps2_1@0 {
+   allwinner,pins = "PH12","PH13";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
};
 
timer@01c20c00 {
@@ -1079,5 +1092,21 @@
#interrupt-cells = <3>;
interrupts = <1 9 0xf04>;
};
+   ps20: ps2@0x01c2a000 {
+  

[PATCH 1/3] dts-binding: input: sun7ips2: Device tree bindings for Allwinner sun7i A20 PS2 host controller

2014-12-03 Thread vishnupatekar
---
 .../bindings/input/allwinner,sun7i-a20-ps2.txt |   22 
 1 file changed, 22 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/input/allwinner,sun7i-a20-ps2.txt

diff --git 
a/Documentation/devicetree/bindings/input/allwinner,sun7i-a20-ps2.txt 
b/Documentation/devicetree/bindings/input/allwinner,sun7i-a20-ps2.txt
new file mode 100644
index 000..63b6214
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/allwinner,sun7i-a20-ps2.txt
@@ -0,0 +1,22 @@
+* Device tree bindings for Allwinner A20 PS2 host controller
+
+A20 PS2 is dual role controller(PS2 host and PS2 device). These bindings are 
for PS2 host controller.
+IBM compliant IBM PS2 and AT-compatible keyboard and mouse can be connected.
+
+Required properties:
+
+ - reg : Offset and length of the register set for the device.
+ - compatible  : Should one of the following:
+ - "allwinner,sun7i-a20-ps2"
+ - interrupts  : The interrupt line connected to the P2WI peripheral.
+ - clocks  : The gate clk connected to the P2WI peripheral.
+
+
+Example:
+   ps20: ps2@0x01c2a000 {
+   compatible = "allwinner,sun7i-a20-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <0 62 4>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH 0/3] ARM:sun7i:ps2 added support for A20 PS/2 host controller

2014-12-03 Thread vishnupatekar
This series adds support for Allwinner's A20 PS2 host controller driver.
I've done basic testing on A20 Lime 2 Board.
This needs to be further tested.

Patch 0 Summary: Allwinner A20 PS2 is dual role controller(PS2 host and PS2 
device). These modifications are for PS2 host controller.
IBM compliant IBM PS2 and AT-compatible keyboard and mouse can be connected.

Patch 1 device tree bindings.

Patch 2 adds support for sun7i ps2 driver. 

Patch 3 device tree support for PS2 controller.
 1) Added ps2 nodes to the dtsi 
 2) Added ps2 pinmux to the dtsi 
 3) Added ps2 nodes to the lime2 dts file.

vishnupatekar (3):
  dts-binding: input: sun7ips2: Device tree bindings for Allwinner
sun7i A20 PS2 host controller
  drivers:input:ps2 Added sunxi A20 ps2 driver, changed makefile and
Kconfig
  ARM:dts:sun7i:ps2 added nodes for Sun7i A20 PS2 controller. 
added ps2 nodes in lime2 board dts.

 .../bindings/input/allwinner,sun7i-a20-ps2.txt |   22 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts|   10 +
 arch/arm/boot/dts/sun7i-a20.dtsi   |   30 +-
 drivers/input/serio/Kconfig|9 +
 drivers/input/serio/Makefile   |1 +
 drivers/input/serio/sunxi-ps2.c|  305 
 6 files changed, 376 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/input/allwinner,sun7i-a20-ps2.txt
 create mode 100644 drivers/input/serio/sunxi-ps2.c

-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCH 2/3] drivers:input:ps2 Added sunxi A20 ps2 driver, changed makefile and Kconfig

2014-12-03 Thread vishnupatekar
---
 drivers/input/serio/Kconfig |9 ++
 drivers/input/serio/Makefile|1 +
 drivers/input/serio/sunxi-ps2.c |  305 +++
 3 files changed, 315 insertions(+)
 create mode 100644 drivers/input/serio/sunxi-ps2.c

diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index bc2d474..1a86e41 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -281,4 +281,13 @@ config HYPERV_KEYBOARD
  To compile this driver as a module, choose M here: the module will
  be called hyperv_keyboard.
 
+config SERIO_SUNXI_PS2
+   tristate "Allwinner Sun7i-A20 PS/2 controller"
+   default m
+   help
+ Say Y here if you have Sun7i-A20 Allwinner PS/2 ports.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sunxi-ps2.
+
 endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 815d874..0fa0f78 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_SERIO_ARC_PS2)   += arc_ps2.o
 obj-$(CONFIG_SERIO_APBPS2) += apbps2.o
 obj-$(CONFIG_SERIO_OLPC_APSP)  += olpc_apsp.o
 obj-$(CONFIG_HYPERV_KEYBOARD)  += hyperv-keyboard.o
+obj-$(CONFIG_SERIO_SUNXI_PS2)  += sunxi-ps2.o
diff --git a/drivers/input/serio/sunxi-ps2.c b/drivers/input/serio/sunxi-ps2.c
new file mode 100644
index 000..ccd7b29
--- /dev/null
+++ b/drivers/input/serio/sunxi-ps2.c
@@ -0,0 +1,305 @@
+/*
+ * sunxi-ps2.c Support for Allwinner A20 PS2 host controller
+ *
+ * Author: Aaron.maoye 
+ *Vishnu Patekar 
+ * Based on sunxi-ps2.c 3.0 kernel
+ *
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME"sunxi-ps2"
+
+#define RESSIZE(res)(((res)->end - (res)->start)+1)
+
+#define SW_PS2_GCTRL(0x00)
+#define SW_PS2_DATA (0x04)
+#define SW_PS2_LCTRL(0x08)
+#define SW_PS2_LSTAT(0x0c)
+#define SW_PS2_FCTRL(0x10)
+#define SW_PS2_FSTAT(0x14)
+#define SW_PS2_CLKDR(0x18)
+
+/* SW_PS2_GCTRL */
+#define SWPS2_BUSEN (1 << 0)
+#define SWPS2_MASTER(1 << 1)
+#define SWPS2_RESET (1 << 2)
+#define SWPS2_INTEN (1 << 3)
+#define SWPS2_INTFLAG   (1 << 3)
+
+/* SW_PS2_LCTRL */
+#define SWPS2_LCTL_NOACK(0x0 << 18)
+#define SWPS2_LCTL_TXDTOEN  (0x1 << 8)
+#define SWPS2_LCTL_STOPERREN(0x1 << 3)
+#define SWPS2_LCTL_ACKERREN (0x1 << 2)
+#define SWPS2_LCTL_PARERREN (0x1 << 1)
+#define SWPS2_LCTL_RXDTOEN  (0x1 << 0)
+
+/* SW_PS2_FSTAT */
+#define SWPS2_FSTA_RXRDY(1 << 0)
+#define SWPS2_FSTA_RXOF (1 << 1)
+#define SWPS2_FSTA_RXUF (1 << 2)
+#define SWPS2_FSTA_TXRDY(1 << 8)
+#define SWPS2_FSTA_TXOF (1 << 9)
+#define SWPS2_FSTA_TXUF (1 << 10)
+
+#define SW_PS2_SAMPLE_CLK  (100)
+#define SW_PS2_SCLK(125000)
+
+struct sunxips2data {
+   int irq;
+   spinlock_t ps2_lock;
+   void __iomem *base_address; /* virt address of control registers*/
+   struct serio *serio;/* serio*/
+   struct device *dev;
+   struct  clk *pclk;
+};
+
+/*/
+/* Interrupt handler */
+/*/
+static irqreturn_t sunxips2_interrupt(int irq, void *dev_id)
+{
+   struct sunxips2data *drvdata = dev_id;
+   u32 intr_status;
+   u32 fifo_status;
+   unsigned char byte;
+   u32 rval;
+   u32 error = 0;
+
+   spin_lock(&drvdata->ps2_lock);
+
+   /* Get the PS/2 interrupts and clear them */
+   intr_status  = readl(drvdata->base_address + SW_PS2_LSTAT);
+   fifo_status  = readl(drvdata->base_address + SW_PS2_FSTAT);
+
+   /*Check Line Status Register*/
+   if (intr_status & 0x10f) {
+   if (intr_status & 0x08)
+   dev_info(drvdata->dev, "PS/2 Stop Bit Error!");
+   if (intr_status & 0x04)
+   dev_info(drvdata->dev, "PS/2 Acknowledge Error!\n");
+   if (intr_status & 0x02)
+   dev_info(drvdata->dev, "PS/2 Parity Error!\n");
+   if (intr_status & 0x100)
+   dev_info(drvdata->dev, "PS/2 Transmit Data Timeout!\n");
+   if (intr_status & 0x01)
+   dev_info(drvdata->dev, "PS/2 Receive Data Timeout!\n");
+
+   writel(readl(drvdata->base_address + SW_PS2_GCTRL)|0x4, 
drvdata->base_address + SW_PS2_GCTRL);/*reset PS/2 controller*/
+   writel(0x10f, drvdata->base_address + SW_PS2_LSTAT);
+
+   error = 1;
+   }
+
+/*Check FIFO Status Register*/
+   if (fifo_status & 0x0606) {
+   if (fifo_status & 0x400)
+   dev_info(drvdata->dev, "PS/2 Tx FIFO Underflow!\n");
+   if (fifo_status & 0x200)
+   

[PATCHv3 0/5] ARM:sunxi:ps2 Added support for A10/A20 ps2 controller.

2014-12-12 Thread VishnuPatekar
v2 --> v3
1. changed config to SERIO_SUN4I_PS2 from SERIO_SUNXI_PS2
2. changed driver name to sun4i-ps2 from sunxi-ps2.
3. changed the function names to sun4i_ps2_*.
4. added locking in sun4i_ps2_open.
5. kept compatible "sun4i-a10-ps2" for A10 and A20, as A10 is earlier SOC.
6. corrected the style errors.
7. separated the dts patches.
8. removed commented ps2 notes from lime2 dts.
9. added note that ps2 pins confilt with hdmi.
10. corrected the interrupt property for A10.
11. moved dt-bindings to Documentation/devicetree/bindings/serio

v1 --> v2: 
1. added default n depends on ARCH_SUNXI || COMPILE_TEST in Kconfig. 
2. handled errors and free resources on errors. 
3. used BIT(x), DIV_ROUND_UP macros. 
4. corrected style errors. 
5. added support for A10 also, A10 and A2 have same properties of PS2 
controller. 
6. by default commented ps20 and ps21 nodes,as ps20 pins conflict with HDMI.
7. added compatible as allwinner,sun4i-a10-ps2. 
8. corrected the possible race condition. 


VishnuPatekar (5):
  sunxi:dts-bindings:input:ps2 bindings for A10/A20 ps2.
  ARM:sunxi:drivers:input Add support for A10/A20 PS2
  ARM: sunxi: dts: Add PS2 nodes to dtsi for A10 and A20
  ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options
  ARM: sunxi: dts: Add note ps2 pins conflict with hdmi

 .../bindings/serio/allwinner,sun4i-ps2.txt |   23 ++
 arch/arm/boot/dts/sun4i-a10.dtsi   |   31 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts|6 +-
 arch/arm/boot/dts/sun7i-a20.dtsi   |   32 ++
 drivers/input/serio/Kconfig|   11 +
 drivers/input/serio/Makefile   |1 +
 drivers/input/serio/sun4i-ps2.c|  362 
 7 files changed, 465 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
 create mode 100644 drivers/input/serio/sun4i-ps2.c

-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv3 1/5] sunxi:dts-bindings:input:ps2 bindings for A10/A20 ps2.

2014-12-12 Thread VishnuPatekar
1. dt bindings should use the compat string for the earliest version of the
hardware which has the relevant hardware block, unless there are differences,
the A10 and A20 ps2 controllers are identical, so for both sun4i-a10-ps2
should be used as compat string.
2. ps2 / serio bindings belong under Documentation/devicetree/bindings/serio

Signed-off-by: VishnuPatekar 
Signed-off-by: Hans de Goede 
---
 .../bindings/serio/allwinner,sun4i-ps2.txt |   23 
 1 file changed, 23 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt

diff --git a/Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt 
b/Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
new file mode 100644
index 000..0c30440
--- /dev/null
+++ b/Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
@@ -0,0 +1,23 @@
+* Device tree bindings for Allwinner A10, A20 PS2 host controller
+
+A20 PS2 is dual role controller(PS2 host and PS2 device). These bindings are
+for PS2 A10/A20 host controller. IBM compliant IBM PS2 and AT-compatible 
keyboard
+and mouse can be connected.
+
+Required properties:
+
+ - reg : Offset and length of the register set for the device.
+ - compatible  : Should be as of the following:
+ - "allwinner,sun4i-a10-ps2"
+ - interrupts  : The interrupt line connected to the PS2.
+ - clocks  : The gate clk connected to the PS2.
+
+
+Example:
+   ps20: ps2@0x01c2a000 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <0 62 4>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv3 2/5] ARM:sunxi:drivers:input Add support for A10/A20 PS2

2014-12-12 Thread VishnuPatekar

Signed-off-by: VishnuPatekar 
---
 drivers/input/serio/Kconfig |   11 ++
 drivers/input/serio/Makefile|1 +
 drivers/input/serio/sun4i-ps2.c |  362 +++
 3 files changed, 374 insertions(+)
 create mode 100644 drivers/input/serio/sun4i-ps2.c

diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index bc2d474..964afc5 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -281,4 +281,15 @@ config HYPERV_KEYBOARD
  To compile this driver as a module, choose M here: the module will
  be called hyperv_keyboard.
 
+config SERIO_SUN4I_PS2
+   tristate "Allwinner A10 PS/2 controller support"
+   default n
+   depends on ARCH_SUNXI || COMPILE_TEST
+   help
+ This selects support for the PS/2 Host Controller on
+ Allwinner A10.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sun4i-ps2.
+
 endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 815d874..c600089 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_SERIO_ARC_PS2)   += arc_ps2.o
 obj-$(CONFIG_SERIO_APBPS2) += apbps2.o
 obj-$(CONFIG_SERIO_OLPC_APSP)  += olpc_apsp.o
 obj-$(CONFIG_HYPERV_KEYBOARD)  += hyperv-keyboard.o
+obj-$(CONFIG_SERIO_SUN4I_PS2)  += sun4i-ps2.o
diff --git a/drivers/input/serio/sun4i-ps2.c b/drivers/input/serio/sun4i-ps2.c
new file mode 100644
index 000..e6d22ae
--- /dev/null
+++ b/drivers/input/serio/sun4i-ps2.c
@@ -0,0 +1,362 @@
+/*
+ * Driver for Allwinner A10 PS2 host controller
+ *
+ * Author: Vishnu Patekar 
+ * Aaron.maoye 
+ *
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRIVER_NAME"sun4i-ps2"
+
+/* register offset definitions */
+#define PS2_REG_GCTL   (0x00)  /*  PS2 Module Global Control Reg */
+#define PS2_REG_DATA   (0x04)  /*  PS2 Module Data Reg */
+#define PS2_REG_LCTL   (0x08)  /*  PS2 Module Line Control Reg */
+#define PS2_REG_LSTS   (0x0C)  /*  PS2 Module Line Status Reg  */
+#define PS2_REG_FCTL   (0x10)  /*  PS2 Module FIFO Control Reg */
+#define PS2_REG_FSTS   (0x14)  /*  PS2 Module FIFO Status Reg  */
+#define PS2_REG_CLKDR  (0x18)  /*  PS2 Module Clock Divider Reg*/
+
+/*  PS2 GLOBAL CONTROL REGISTER PS2_GCTL */
+#define PS2_GCTL_INTFLAG   BIT(4)
+#define PS2_GCTL_INTEN BIT(3)
+#define PS2_GCTL_RESET BIT(2)
+#define PS2_GCTL_MASTERBIT(1)
+#define PS2_GCTL_BUSEN BIT(0)
+
+/* PS2 LINE CONTROL REGISTER */
+#define PS2_LCTL_NOACK BIT(18)
+#define PS2_LCTL_TXDTOEN   BIT(8)
+#define PS2_LCTL_STOPERREN BIT(3)
+#define PS2_LCTL_ACKERREN  BIT(2)
+#define PS2_LCTL_PARERREN  BIT(1)
+#define PS2_LCTL_RXDTOEN   BIT(0)
+
+/* PS2 LINE STATUS REGISTER */
+#define PS2_LSTS_TXTDO BIT(8)
+#define PS2_LSTS_STOPERR   BIT(3)
+#define PS2_LSTS_ACKERRBIT(2)
+#define PS2_LSTS_PARERRBIT(1)
+#define PS2_LSTS_RXTDO BIT(0)
+
+#define PS2_LINE_ERROR_BIT \
+   (PS2_LSTS_TXTDO | PS2_LSTS_STOPERR | PS2_LSTS_ACKERR | \
+   PS2_LSTS_PARERR | PS2_LSTS_RXTDO)
+
+/* PS2 FIFO CONTROL REGISTER */
+#define PS2_FCTL_TXRST BIT(17)
+#define PS2_FCTL_RXRST BIT(16)
+#define PS2_FCTL_TXUFIEN   BIT(10)
+#define PS2_FCTL_TXOFIEN   BIT(9)
+#define PS2_FCTL_TXRDYIEN  BIT(8)
+#define PS2_FCTL_RXUFIEN   BIT(2)
+#define PS2_FCTL_RXOFIEN   BIT(1)
+#define PS2_FCTL_RXRDYIEN  BIT(0)
+
+/* PS2 FIFO STATUS REGISTER */
+#define PS2_FSTS_TXUF  BIT(10)
+#define PS2_FSTS_TXOF  BIT(9)
+#define PS2_FSTS_TXRDY BIT(8)
+#define PS2_FSTS_RXUF  BIT(2)
+#define PS2_FSTS_RXOF  BIT(1)
+#define PS2_FSTS_RXRDY BIT(0)
+
+#define PS2_FIFO_ERROR_BIT \
+   (PS2_FSTS_TXUF | PS2_FSTS_TXOF | PS2_FSTS_RXUF | PS2_FSTS_RXOF)
+
+#define PS2_SAMPLE_CLK (100)
+#define PS2_SCLK   (125000)
+
+struct sun4i_ps2data {
+   struct serio *serio;
+   struct device *dev;
+
+   /* IO mapping base */
+   void __iomem*reg_base;
+
+   /* clock management */
+   struct clk  *clk;
+
+   /* irq */
+   spinlock_t  lock;
+   int irq;
+};
+
+/*/
+/* Interrupt handler */
+/*/
+static irqreturn_t sun4i_ps2_interrupt(int irq, void *dev_id)
+{
+   struct sun4i_ps2data *drvdata = dev_id;
+   u32 intr_status;
+   u32 fifo_status;
+   unsigned char byte;
+   u32 rval;
+   u32 error = 0;
+
+   spin_lock(&drvdata->lock);
+
+   /* Get the PS/2 interrupts and clear them */
+   intr_status  = readl(drvdata->reg_base + PS2_REG_LSTS)

[PATCHv3 3/5] ARM: sunxi: dts: Add PS2 nodes to dtsi for A10 and A20

2014-12-12 Thread VishnuPatekar
1) Fixup the sun4i ps/2 nodes interrupt property, sun4i interrupts take
only 1 specifier

2) dt bindings should use the compat string for the earliest version of the
hardware which has the relevant hardware block, unless there are differences,
the A10 and A20 ps2 controllers are identical, so for both sun4i-a10-ps2
should be used as compat string, update the sun7i.dtsi ps2 entries to
use the sun4i-a10-ps2 compat string.



Signed-off-by: VishnuPatekar 
Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun4i-a10.dtsi |   17 +
 arch/arm/boot/dts/sun7i-a20.dtsi |   18 ++
 2 files changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 7b4099f..ef9a01c 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -629,6 +629,7 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
};
 
timer@01c20c00 {
@@ -795,5 +796,21 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+   ps20: ps2@01c2a000 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <62>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
+
+   ps21: ps2@01c2a400 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a400 0x400>;
+   interrupts = <63>;
+   clocks = <&apb1_gates 7>;
+   status = "disabled";
+   };
};
 };
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e21ce59..6ab7714 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -866,6 +866,7 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
};
 
timer@01c20c00 {
@@ -1093,5 +1094,22 @@
#interrupt-cells = <3>;
interrupts = <1 9 0xf04>;
};
+
+   ps20: ps2@01c2a000 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a000 0x400>;
+   interrupts = <0 62 4>;
+   clocks = <&apb1_gates 6>;
+   status = "disabled";
+   };
+
+   ps21: ps2@01c2a400 {
+   compatible = "allwinner,sun4i-a10-ps2";
+   reg = <0x01c2a400 0x400>;
+   interrupts = <0 63 4>;
+   clocks = <&apb1_gates 7>;
+   status = "disabled";
+   };
+
};
 };
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv3 4/5] ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options

2014-12-12 Thread VishnuPatekar
Added the pinmuxing options for Allwinner A10 and A20.

Signed-off-by: VishnuPatekar 
---
 arch/arm/boot/dts/sun4i-a10.dtsi |   14 ++
 arch/arm/boot/dts/sun7i-a20.dtsi |   14 ++
 2 files changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index ef9a01c..5a29039 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -630,6 +630,20 @@
allwinner,pull = <0>;
};
 
+   ps20_pins_a: ps20@0 {
+   allwinner,pins = "PI20", "PI21";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
+   ps21_pins_a: ps21@0 {
+   allwinner,pins = "PH12", "PH13";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
};
 
timer@01c20c00 {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 6ab7714..247def0 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -867,6 +867,20 @@
allwinner,pull = <0>;
};
 
+   ps20_pins_a: ps20@0 {
+   allwinner,pins = "PI20", "PI21";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
+   ps21_pins_a: ps21@0 {
+   allwinner,pins = "PH12", "PH13";
+   allwinner,function = "ps2";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
};
 
timer@01c20c00 {
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


[PATCHv3 5/5] ARM: sunxi: dts: Add note ps2 pins conflict with hdmi

2014-12-12 Thread VishnuPatekar
1. Please note that ps20 pins conflict with HDMI on Lime2 Board
so, by deault ps20 and ps21 are disabled for Lime2 Board.
There is no on board ps2 connector and these pins can be used
for different purpose.

Signed-off-by: VishnuPatekar 
---
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts |6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index ed364d5..951b615 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -112,7 +112,11 @@
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
-
+
+   /* PS2 0 and PS2 1 are disabled by default; Please note that
+   ps20 pins conflict with HDMI on Lime2 Board
+   */
+
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
-- 
1.7.9.5

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/