[tip:x86/platform] x86/platform/UV: Add Support for UV4 Hubless systems
Commit-ID: 74862b03b46a852662c1a30c859b985261ff5d5c
Gitweb: http://git.kernel.org/tip/74862b03b46a852662c1a30c859b985261ff5d5c
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:18 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:20:59 +0100
x86/platform/UV: Add Support for UV4 Hubless systems
Add recognition and support for UV4 hubless systems.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163517.398537...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/uv/uv.h | 2 ++
arch/x86/kernel/apic/x2apic_uv_x.c | 30 --
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index 062921e..6686820 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -10,6 +10,7 @@ struct mm_struct;
extern enum uv_system_type get_uv_system_type(void);
extern int is_uv_system(void);
+extern int is_uv_hubless(void);
extern void uv_cpu_init(void);
extern void uv_nmi_init(void);
extern void uv_system_init(void);
@@ -23,6 +24,7 @@ extern const struct cpumask *uv_flush_tlb_others(const struct
cpumask *cpumask,
static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
static inline int is_uv_system(void) { return 0; }
+static inline int is_uv_hubless(void) { return 0; }
static inline void uv_cpu_init(void) { }
static inline void uv_system_init(void){ }
static inline const struct cpumask *
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c
b/arch/x86/kernel/apic/x2apic_uv_x.c
index 656994a..d02cc7e 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -42,6 +42,7 @@
DEFINE_PER_CPU(int, x2apic_extra_bits);
static enum uv_system_type uv_system_type;
+static booluv_hubless_system;
static u64 gru_start_paddr, gru_end_paddr;
static u64 gru_dist_base, gru_first_node_paddr = -1LL,
gru_last_node_paddr;
static u64 gru_dist_lmask, gru_dist_umask;
@@ -225,8 +226,14 @@ static int __init uv_acpi_madt_oem_check(char *oem_id,
char *oem_table_id)
int pnodeid;
int uv_apic;
- if (strncmp(oem_id, "SGI", 3) != 0)
+ if (strncmp(oem_id, "SGI", 3) != 0) {
+ if (strncmp(oem_id, "NSGI", 4) == 0) {
+ uv_hubless_system = true;
+ pr_info("UV: OEM IDs %s/%s, HUBLESS\n",
+ oem_id, oem_table_id);
+ }
return 0;
+ }
if (numa_off) {
pr_err("UV: NUMA is off, disabling UV support\n");
@@ -300,6 +307,12 @@ int is_uv_system(void)
}
EXPORT_SYMBOL_GPL(is_uv_system);
+int is_uv_hubless(void)
+{
+ return uv_hubless_system;
+}
+EXPORT_SYMBOL_GPL(is_uv_hubless);
+
void **__uv_hub_info_list;
EXPORT_SYMBOL_GPL(__uv_hub_info_list);
@@ -1353,7 +1366,7 @@ static void __init build_socket_tables(void)
}
}
-void __init uv_system_init(void)
+static void __init uv_system_init_hub(void)
{
struct uv_hub_info_s hub_info = {0};
int bytes, cpu, nodeid;
@@ -1490,4 +1503,17 @@ void __init uv_system_init(void)
reboot_type = BOOT_ACPI;
}
+/*
+ * There is a small amount of UV specific code needed to initialize a
+ * UV system that does not have a "UV HUB" (referred to as "hubless").
+ */
+void __init uv_system_init(void)
+{
+ if (likely(!is_uv_system() && !is_uv_hubless()))
+ return;
+
+ if (is_uv_system())
+ uv_system_init_hub();
+}
+
apic_driver(apic_x2apic_uv_x);
[tip:x86/platform] x86/platform/UV: Add basic CPU NMI health check
Commit-ID: 278c9b099b2fc0cc0a51de95a1dcefcf54ca2183
Gitweb: http://git.kernel.org/tip/278c9b099b2fc0cc0a51de95a1dcefcf54ca2183
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:20 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:20:59 +0100
x86/platform/UV: Add basic CPU NMI health check
Add a low impact health check triggered by the system NMI command
that essentially checks which CPUs are responding to external NMI's.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Reviewed-by: Alex Thorlton
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163517.756690...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/platform/uv/uv_nmi.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index df7b092..8a4aa5b 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -176,6 +176,7 @@ module_param_named(debug, uv_nmi_debug, int, 0644);
* "kdump"- do crash dump
* "kdb" - enter KDB (default)
* "kgdb" - enter KGDB
+ * "health" - check if CPUs respond to NMI
*/
static char uv_nmi_action[8] = "kdb";
module_param_string(action, uv_nmi_action, sizeof(uv_nmi_action), 0644);
@@ -571,6 +572,22 @@ static void uv_nmi_sync_exit(int master)
}
}
+/* Current "health" check is to check which CPU's are responsive */
+static void uv_nmi_action_health(int cpu, struct pt_regs *regs, int master)
+{
+ if (master) {
+ int in = atomic_read(&uv_nmi_cpus_in_nmi);
+ int out = num_online_cpus() - in;
+
+ pr_alert("UV: NMI CPU health check (non-responding:%d)\n", out);
+ atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
+ } else {
+ while (!atomic_read(&uv_nmi_slave_continue))
+ cpu_relax();
+ }
+ uv_nmi_sync_exit(master);
+}
+
/* Walk through cpu list and dump state of each */
static void uv_nmi_dump_state(int cpu, struct pt_regs *regs, int master)
{
@@ -747,7 +764,9 @@ int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
uv_nmi_wait(master);
/* Process actions other than "kdump": */
- if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump")) {
+ if (uv_nmi_action_is("health")) {
+ uv_nmi_action_health(cpu, regs, master);
+ } else if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump")) {
uv_nmi_dump_state(cpu, regs, master);
} else if (uv_nmi_action_is("kdb") || uv_nmi_action_is("kgdb")) {
uv_call_kgdb_kdb(cpu, regs, master);
[tip:x86/platform] x86/platform/UV: Add Support for UV4 Hubless NMIs
Commit-ID: abdf1df6bc0416ec19b841e92b497ca55b23454c
Gitweb: http://git.kernel.org/tip/abdf1df6bc0416ec19b841e92b497ca55b23454c
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:19 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:20:59 +0100
x86/platform/UV: Add Support for UV4 Hubless NMIs
Merge new UV Hubless NMI support into existing UV NMI handler.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163517.585269...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/include/asm/uv/uv_hub.h | 3 +
arch/x86/kernel/apic/x2apic_uv_x.c | 2 +
arch/x86/platform/uv/uv_nmi.c | 193 -
3 files changed, 176 insertions(+), 22 deletions(-)
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 097b80c..72e8300 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -772,6 +772,7 @@ static inline int uv_num_possible_blades(void)
/* Per Hub NMI support */
extern void uv_nmi_setup(void);
+extern void uv_nmi_setup_hubless(void);
/* BMC sets a bit this MMR non-zero before sending an NMI */
#define UVH_NMI_MMRUVH_SCRATCH5
@@ -799,6 +800,8 @@ struct uv_hub_nmi_s {
atomic_tread_mmr_count; /* count of MMR reads */
atomic_tnmi_count; /* count of true UV NMIs */
unsigned long nmi_value; /* last value read from NMI MMR */
+ boolhub_present;/* false means UV hubless system */
+ boolpch_owner; /* indicates this hub owns PCH */
};
struct uv_cpu_nmi_s {
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c
b/arch/x86/kernel/apic/x2apic_uv_x.c
index d02cc7e..e9f8f8c 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1514,6 +1514,8 @@ void __init uv_system_init(void)
if (is_uv_system())
uv_system_init_hub();
+ else
+ uv_nmi_setup_hubless();
}
apic_driver(apic_x2apic_uv_x);
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 8410e7d..df7b092 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -67,6 +67,18 @@ static struct uv_hub_nmi_s **uv_hub_nmi_list;
DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
EXPORT_PER_CPU_SYMBOL_GPL(uv_cpu_nmi);
+/* UV hubless values */
+#define NMI_CONTROL_PORT 0x70
+#define NMI_DUMMY_PORT 0x71
+#define GPI_NMI_STS_GPP_D_00x164
+#define GPI_NMI_ENA_GPP_D_00x174
+#define STS_GPP_D_0_MASK 0x1
+#define PAD_CFG_DW0_GPP_D_00x4c0
+#define GPIROUTNMI (1ul << 17)
+#define PCH_PCR_GPIO_1_BASE0xfdaeul
+#define PCH_PCR_GPIO_ADDRESS(offset) (int *)((u64)(pch_base) | (u64)(offset))
+
+static u64 *pch_base;
static unsigned long nmi_mmr;
static unsigned long nmi_mmr_clear;
static unsigned long nmi_mmr_pending;
@@ -144,6 +156,19 @@ module_param_named(wait_count, uv_nmi_wait_count, int,
0644);
static int uv_nmi_retry_count = 500;
module_param_named(retry_count, uv_nmi_retry_count, int, 0644);
+static bool uv_pch_intr_enable = true;
+static bool uv_pch_intr_now_enabled;
+module_param_named(pch_intr_enable, uv_pch_intr_enable, bool, 0644);
+
+static int uv_nmi_debug;
+module_param_named(debug, uv_nmi_debug, int, 0644);
+
+#define nmi_debug(fmt, ...)\
+ do {\
+ if (uv_nmi_debug) \
+ pr_info(fmt, ##__VA_ARGS__);\
+ } while (0)
+
/*
* Valid NMI Actions:
* "dump" - dump process stack for each cpu
@@ -192,6 +217,77 @@ static inline void uv_local_mmr_clear_nmi(void)
}
/*
+ * UV hubless NMI handler functions
+ */
+static inline void uv_reassert_nmi(void)
+{
+ /* (from arch/x86/include/asm/mach_traps.h) */
+ outb(0x8f, NMI_CONTROL_PORT);
+ inb(NMI_DUMMY_PORT);/* dummy read */
+ outb(0x0f, NMI_CONTROL_PORT);
+ inb(NMI_DUMMY_PORT);/* dummy read */
+}
+
+static void uv_init_hubless_pch_io(int offset, int mask, int data)
+{
+ int *addr = PCH_PCR_GPIO_ADDRESS(offset);
+ int readd = readl(addr);
+
+ if (mask) { /* OR in new data */
+ int writed = (readd & ~mask) | data;
+
+ nmi_debug("UV:PCH: %p = %x & %x | %x (%x)\n",
+ addr, readd, ~mask, data, writed);
+ writel(writed, addr);
+ } else if (readd & data) { /* clear status bit */
+ nmi_debug("UV:PCH: %p = %x\n", addr, data);
+ writel(data, addr);
+ }
+
+ (void)readl(addr); /* flush write data */
+}
+
+static void uv_nmi_setup_hubless_intr(void)
+{
+ uv_pch_intr_now_enabled = uv_pch_intr_enabl
[tip:x86/platform] x86/platform/UV: Verify NMI action is valid, default is standard
Commit-ID: f550e4692749a909d3f5453ef11b4c8ab2071070
Gitweb: http://git.kernel.org/tip/f550e4692749a909d3f5453ef11b4c8ab2071070
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:21 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:21:00 +0100
x86/platform/UV: Verify NMI action is valid, default is standard
Verify that the NMI action being set is valid. The default NMI action
changes from the non-standard 'kdb' to the more standard 'dump'.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Reviewed-by: Alex Thorlton
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163517.922751...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/platform/uv/uv_nmi.c | 69 ---
1 file changed, 58 insertions(+), 11 deletions(-)
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 8a4aa5b..c10e00b 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -169,17 +169,64 @@ module_param_named(debug, uv_nmi_debug, int, 0644);
pr_info(fmt, ##__VA_ARGS__);\
} while (0)
-/*
- * Valid NMI Actions:
- * "dump" - dump process stack for each cpu
- * "ips" - dump IP info for each cpu
- * "kdump"- do crash dump
- * "kdb" - enter KDB (default)
- * "kgdb" - enter KGDB
- * "health" - check if CPUs respond to NMI
- */
-static char uv_nmi_action[8] = "kdb";
-module_param_string(action, uv_nmi_action, sizeof(uv_nmi_action), 0644);
+/* Valid NMI Actions */
+#defineACTION_LEN 16
+static struct nmi_action {
+ char*action;
+ char*desc;
+} valid_acts[] = {
+ { "kdump","do kernel crash dump" },
+ { "dump", "dump process stack for each cpu" },
+ { "ips", "dump Inst Ptr info for each cpu" },
+ { "kdb", "enter KDB (needs kgdboc= assignment)" },
+ { "kgdb", "enter KGDB (needs gdb target remote)" },
+ { "health", "check if CPUs respond to NMI" },
+};
+typedef char action_t[ACTION_LEN];
+static action_t uv_nmi_action = { "dump" };
+
+static int param_get_action(char *buffer, const struct kernel_param *kp)
+{
+ return sprintf(buffer, "%s\n", uv_nmi_action);
+}
+
+static int param_set_action(const char *val, const struct kernel_param *kp)
+{
+ int i;
+ int n = ARRAY_SIZE(valid_acts);
+ char arg[ACTION_LEN], *p;
+
+ /* (remove possible '\n') */
+ strncpy(arg, val, ACTION_LEN - 1);
+ arg[ACTION_LEN - 1] = '\0';
+ p = strchr(arg, '\n');
+ if (p)
+ *p = '\0';
+
+ for (i = 0; i < n; i++)
+ if (!strcmp(arg, valid_acts[i].action))
+ break;
+
+ if (i < n) {
+ strcpy(uv_nmi_action, arg);
+ pr_info("UV: New NMI action:%s\n", uv_nmi_action);
+ return 0;
+ }
+
+ pr_err("UV: Invalid NMI action:%s, valid actions are:\n", arg);
+ for (i = 0; i < n; i++)
+ pr_err("UV: %-8s - %s\n",
+ valid_acts[i].action, valid_acts[i].desc);
+ return -EINVAL;
+}
+
+static const struct kernel_param_ops param_ops_action = {
+ .get = param_get_action,
+ .set = param_set_action,
+};
+#define param_check_action(name, p) __param_check(name, p, action_t)
+
+module_param_named(action, uv_nmi_action, action, 0644);
static inline bool uv_nmi_action_is(const char *action)
{
[tip:x86/platform] x86/platform/UV: Initialize PCH GPP_D_0 NMI Pin to be NMI source
Commit-ID: 56e17ca2c5ed31f5812ed8e0694e7ef880068cfd
Gitweb: http://git.kernel.org/tip/56e17ca2c5ed31f5812ed8e0694e7ef880068cfd
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:22 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:21:00 +0100
x86/platform/UV: Initialize PCH GPP_D_0 NMI Pin to be NMI source
The initialize PCH NMI I/O function is separate and may be moved to BIOS
for security reasons. This function detects whether the PCH NMI config
has already been done and if not, it will then initialize the PCH here.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163518.089387...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/platform/uv/uv_nmi.c | 127 ++
1 file changed, 127 insertions(+)
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index c10e00b..6a71b08 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -70,6 +70,7 @@ EXPORT_PER_CPU_SYMBOL_GPL(uv_cpu_nmi);
/* UV hubless values */
#define NMI_CONTROL_PORT 0x70
#define NMI_DUMMY_PORT 0x71
+#define PAD_OWN_GPP_D_00x2c
#define GPI_NMI_STS_GPP_D_00x164
#define GPI_NMI_ENA_GPP_D_00x174
#define STS_GPP_D_0_MASK 0x1
@@ -160,6 +161,9 @@ static bool uv_pch_intr_enable = true;
static bool uv_pch_intr_now_enabled;
module_param_named(pch_intr_enable, uv_pch_intr_enable, bool, 0644);
+static bool uv_pch_init_enable = true;
+module_param_named(pch_init_enable, uv_pch_init_enable, bool, 0644);
+
static int uv_nmi_debug;
module_param_named(debug, uv_nmi_debug, int, 0644);
@@ -307,6 +311,127 @@ static void uv_nmi_setup_hubless_intr(void)
uv_pch_intr_now_enabled ? "enabled" : "disabled");
}
+static struct init_nmi {
+ unsigned intoffset;
+ unsigned intmask;
+ unsigned intdata;
+} init_nmi[] = {
+ { /* HOSTSW_OWN_GPP_D_0 */
+ .offset = 0x84,
+ .mask = 0x1,
+ .data = 0x0,/* ACPI Mode */
+ },
+
+/* clear status */
+ { /* GPI_INT_STS_GPP_D_0 */
+ .offset = 0x104,
+ .mask = 0x0,
+ .data = 0x1,/* Clear Status */
+ },
+ { /* GPI_GPE_STS_GPP_D_0 */
+ .offset = 0x124,
+ .mask = 0x0,
+ .data = 0x1,/* Clear Status */
+ },
+ { /* GPI_SMI_STS_GPP_D_0 */
+ .offset = 0x144,
+ .mask = 0x0,
+ .data = 0x1,/* Clear Status */
+ },
+ { /* GPI_NMI_STS_GPP_D_0 */
+ .offset = 0x164,
+ .mask = 0x0,
+ .data = 0x1,/* Clear Status */
+ },
+
+/* disable interrupts */
+ { /* GPI_INT_EN_GPP_D_0 */
+ .offset = 0x114,
+ .mask = 0x1,
+ .data = 0x0,/* disable interrupt generation */
+ },
+ { /* GPI_GPE_EN_GPP_D_0 */
+ .offset = 0x134,
+ .mask = 0x1,
+ .data = 0x0,/* disable interrupt generation */
+ },
+ { /* GPI_SMI_EN_GPP_D_0 */
+ .offset = 0x154,
+ .mask = 0x1,
+ .data = 0x0,/* disable interrupt generation */
+ },
+ { /* GPI_NMI_EN_GPP_D_0 */
+ .offset = 0x174,
+ .mask = 0x1,
+ .data = 0x0,/* disable interrupt generation */
+ },
+
+/* setup GPP_D_0 Pad Config */
+ { /* PAD_CFG_DW0_GPP_D_0 */
+ .offset = 0x4c0,
+ .mask = 0x,
+ .data = 0x82020100,
+/*
+ * 31:30 Pad Reset Config (PADRSTCFG): = 2h # PLTRST# (default)
+ *
+ * 29RX Pad State Select (RXPADSTSEL): = 0 # Raw RX pad state directly
+ *from RX buffer (default)
+ *
+ * 28RX Raw Override to '1' (RXRAW1): = 0 # No Override
+ *
+ * 26:25 RX Level/Edge Configuration (RXEVCFG):
+ * = 0h # Level
+ * = 1h # Edge
+ *
+ * 23RX Invert (RXINV): = 0 # No Inversion (signal active high)
+ *
+ * 20GPIO Input Route IOxAPIC (GPIROUTIOXAPIC):
+ * = 0 # Routing does not cause peripheral IRQ...
+ * # (we want an NMI not an IRQ)
+ *
+ * 19GPIO Input Route SCI (GPIROUTSCI): = 0 # Routing does not cause SCI.
+ * 18GPIO Input Route SMI (GPIROUTSMI): = 0 # Routing does not cause SMI.
+ * 17GPIO Input Route NMI (GPIROUTNMI): = 1 # Routing can cause NMI.
+ *
+ * 11:10 Pad Mode (PMODE1/0): = 0h = GPIO control the Pad.
+ * 9GPIO RX Disable (GPIORXDIS):
+ * = 0 # Enable the input buffer (active low enable)
+ *
+ * 8GPIO TX Disable (GPIOTXDIS):
+ * = 1 # Disable the output buffer; i.e. Hi-Z
+ *
+ * 1 GPIO RX State (GPIORXSTATE): This is the current internal RX pad state..
+ * 0 GPIO TX State (GPIOTXSTATE):
+ * = 0 # (Leave at default)
+ */
+ },
+
+/* Pad Config DW1 */
+ { /* PAD_CFG_DW1_GPP_D_0 */
+ .offset = 0x4c4,
+ .mask = 0x3c00,
+ .data
[tip:x86/platform] x86/platform/UV: Ensure uv_system_init is called when necessary
Commit-ID: 9ec808a0225aabab59fb2932b70784b087ac0f58
Gitweb: http://git.kernel.org/tip/9ec808a0225aabab59fb2932b70784b087ac0f58
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:23 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:21:00 +0100
x86/platform/UV: Ensure uv_system_init is called when necessary
Move the check to whether this is a UV system that needs initialization
from is_uv_system() to the internal uv_system_init() function. This is
because on a UV system without a HUB the is_uv_system() returns false.
But we still need some specific UV system initialization. See the
uv_system_init() for change to a quick check if UV is applicable. This
change should not increase overhead since is_uv_system() also called
into this same area.
Signed-off-by: Mike Travis
Reviewed-by: Russ Anderson
Acked-by: Thomas Gleixner
Acked-by: Dimitri Sivanich
Cc: Linus Torvalds
Cc: Peter Zijlstra
Link: http://lkml.kernel.org/r/20170125163518.256403...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/kernel/smpboot.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 46732dc..386c7f7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1341,8 +1341,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
pr_info("CPU0: ");
print_cpu_info(&cpu_data(0));
- if (is_uv_system())
- uv_system_init();
+ uv_system_init();
set_mtrr_aps_delayed_init();
[tip:x86/platform] x86/platform/UV: Clean up the NMI code to match current coding style
Commit-ID: 1e74016370ec3d552a7f5df18bb2b0f1c80b5a9f
Gitweb: http://git.kernel.org/tip/1e74016370ec3d552a7f5df18bb2b0f1c80b5a9f
Author: tra...@sgi.com
AuthorDate: Wed, 25 Jan 2017 10:35:24 -0600
Committer: Ingo Molnar
CommitDate: Wed, 1 Feb 2017 10:21:00 +0100
x86/platform/UV: Clean up the NMI code to match current coding style
Update UV NMI to current coding style.
Signed-off-by: Mike Travis
Acked-by: Thomas Gleixner
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Russ Anderson
Link: http://lkml.kernel.org/r/20170125163518.419094...@asylum.americas.sgi.com
Signed-off-by: Ingo Molnar
---
arch/x86/platform/uv/uv_nmi.c | 74 +--
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index 6a71b08..0ecd7bf 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -45,8 +45,8 @@
*
* Handle system-wide NMI events generated by the global 'power nmi' command.
*
- * Basic operation is to field the NMI interrupt on each cpu and wait
- * until all cpus have arrived into the nmi handler. If some cpus do not
+ * Basic operation is to field the NMI interrupt on each CPU and wait
+ * until all CPU's have arrived into the nmi handler. If some CPU's do not
* make it into the handler, try and force them in with the IPI(NMI) signal.
*
* We also have to lessen UV Hub MMR accesses as much as possible as this
@@ -56,7 +56,7 @@
* To do this we register our primary NMI notifier on the NMI_UNKNOWN
* chain. This reduces the number of false NMI calls when the perf
* tools are running which generate an enormous number of NMIs per
- * second (~4M/s for 1024 cpu threads). Our secondary NMI handler is
+ * second (~4M/s for 1024 CPU threads). Our secondary NMI handler is
* very short as it only checks that if it has been "pinged" with the
* IPI(NMI) signal as mentioned above, and does not read the UV Hub's MMR.
*
@@ -113,7 +113,7 @@ static int param_get_local64(char *buffer, const struct
kernel_param *kp)
static int param_set_local64(const char *val, const struct kernel_param *kp)
{
- /* clear on any write */
+ /* Clear on any write */
local64_set((local64_t *)kp->arg, 0);
return 0;
}
@@ -322,7 +322,7 @@ static struct init_nmi {
.data = 0x0,/* ACPI Mode */
},
-/* clear status */
+/* Clear status: */
{ /* GPI_INT_STS_GPP_D_0 */
.offset = 0x104,
.mask = 0x0,
@@ -344,29 +344,29 @@ static struct init_nmi {
.data = 0x1,/* Clear Status */
},
-/* disable interrupts */
+/* Disable interrupts: */
{ /* GPI_INT_EN_GPP_D_0 */
.offset = 0x114,
.mask = 0x1,
- .data = 0x0,/* disable interrupt generation */
+ .data = 0x0,/* Disable interrupt generation */
},
{ /* GPI_GPE_EN_GPP_D_0 */
.offset = 0x134,
.mask = 0x1,
- .data = 0x0,/* disable interrupt generation */
+ .data = 0x0,/* Disable interrupt generation */
},
{ /* GPI_SMI_EN_GPP_D_0 */
.offset = 0x154,
.mask = 0x1,
- .data = 0x0,/* disable interrupt generation */
+ .data = 0x0,/* Disable interrupt generation */
},
{ /* GPI_NMI_EN_GPP_D_0 */
.offset = 0x174,
.mask = 0x1,
- .data = 0x0,/* disable interrupt generation */
+ .data = 0x0,/* Disable interrupt generation */
},
-/* setup GPP_D_0 Pad Config */
+/* Setup GPP_D_0 Pad Config: */
{ /* PAD_CFG_DW0_GPP_D_0 */
.offset = 0x4c0,
.mask = 0x,
@@ -444,7 +444,7 @@ static int uv_nmi_test_hubless(struct uv_hub_nmi_s *hub_nmi)
return 0;
*pstat = STS_GPP_D_0_MASK; /* Is a UV NMI: clear GPP_D_0 status */
- (void)*pstat; /* flush write */
+ (void)*pstat; /* Flush write */
return 1;
}
@@ -461,8 +461,8 @@ static int uv_test_nmi(struct uv_hub_nmi_s *hub_nmi)
}
/*
- * If first cpu in on this hub, set hub_nmi "in_nmi" and "owner" values and
- * return true. If first cpu in on the system, set global "in_nmi" flag.
+ * If first CPU in on this hub, set hub_nmi "in_nmi" and "owner" values and
+ * return true. If first CPU in on the system, set global "in_nmi" flag.
*/
static int uv_set_in_nmi(int cpu, struct uv_hub_nmi_s *hub_nmi)
{
@@ -496,7 +496,7 @@ static int uv_check_nmi(struct uv_hub_nmi_s *hub_nmi)
if (raw_spin_trylock(&hub_nmi->nmi_lock)) {
nmi_detected = uv_test_nmi(hub_nmi);
- /* check flag for UV external NMI */
+ /* Check flag for UV external NMI */
if (nmi_detected > 0) {
uv_set_in_nmi(cpu, hub_nmi);
nmi = 1;
@@ -516,7 +516,7 @@ static int
[tip:x86/platform] x86/platform/UV/NMI: Fix uneccessary kABI breakage
Commit-ID: d48085f0716f195ee7432de2dd110e2093c40fd5 Gitweb: http://git.kernel.org/tip/d48085f0716f195ee7432de2dd110e2093c40fd5 Author: tra...@sgi.com AuthorDate: Tue, 14 Feb 2017 18:11:29 -0600 Committer: Thomas Gleixner CommitDate: Thu, 16 Feb 2017 12:16:52 +0100 x86/platform/UV/NMI: Fix uneccessary kABI breakage The addition of support for UV Hubless systems unneccessarily broke the kABI for a symbol that is not used by external kernel modules. Remove the symbol from the EXPORT list. Signed-off-by: Mike Travis Reviewed-by: Russ Anderson Link: http://lkml.kernel.org/r/20170215001129.068078...@asylum.americas.sgi.com Signed-off-by: Thomas Gleixner --- arch/x86/platform/uv/uv_nmi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c index 0ecd7bf..9743d0c 100644 --- a/arch/x86/platform/uv/uv_nmi.c +++ b/arch/x86/platform/uv/uv_nmi.c @@ -65,7 +65,6 @@ static struct uv_hub_nmi_s **uv_hub_nmi_list; DEFINE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi); -EXPORT_PER_CPU_SYMBOL_GPL(uv_cpu_nmi); /* UV hubless values */ #define NMI_CONTROL_PORT 0x70
