RE: [PATCH v9 5/6] [media] s5p-mfc: MFCv6 register definitions
> From: Arun Kumar K [mailto:arun...@samsung.com] > Sent: 02 October 2012 16:56 > > From: Jeongtae Park > > Adds register definitions for MFC v6.x firmware > > Signed-off-by: Jeongtae Park > Signed-off-by: Janghyuck Kim > Signed-off-by: Jaeryul Oh > Signed-off-by: Naveen Krishna Chatradhi > Signed-off-by: Arun Kumar K Acked-by: Kamil Debski > --- > drivers/media/platform/s5p-mfc/regs-mfc-v6.h | 408 ++ > 1 files changed, 408 insertions(+), 0 deletions(-) > create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v6.h > > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v6.h > b/drivers/media/platform/s5p-mfc/regs-mfc-v6.h > new file mode 100644 > index 000..363a97c > --- /dev/null > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v6.h > @@ -0,0 +1,408 @@ > +/* > + * Register definition file for Samsung MFC V6.x Interface (FIMV) driver > + * > + * Copyright (c) 2012 Samsung Electronics Co., Ltd. > + * http://www.samsung.com/ > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#ifndef _REGS_FIMV_V6_H > +#define _REGS_FIMV_V6_H > + > +#include > +#include > + > +#define S5P_FIMV_REG_SIZE_V6 (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) > +#define S5P_FIMV_REG_COUNT_V6((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4) > + > +/* Number of bits that the buffer address should be shifted for particular > + * MFC buffers. */ > +#define S5P_FIMV_MEM_OFFSET_V6 0 > + > +#define S5P_FIMV_START_ADDR_V6 0x > +#define S5P_FIMV_END_ADDR_V6 0xfd80 > + > +#define S5P_FIMV_REG_CLEAR_BEGIN_V6 0xf000 > +#define S5P_FIMV_REG_CLEAR_COUNT_V6 1024 > + > +/* Codec Common Registers */ > +#define S5P_FIMV_RISC_ON_V6 0x > +#define S5P_FIMV_RISC2HOST_INT_V60x003C > +#define S5P_FIMV_HOST2RISC_INT_V60x0044 > +#define S5P_FIMV_RISC_BASE_ADDRESS_V60x0054 > + > +#define S5P_FIMV_MFC_RESET_V60x1070 > + > +#define S5P_FIMV_HOST2RISC_CMD_V60x1100 > +#define S5P_FIMV_H2R_CMD_EMPTY_V60 > +#define S5P_FIMV_H2R_CMD_SYS_INIT_V6 1 > +#define S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V62 > +#define S5P_FIMV_CH_SEQ_HEADER_V63 > +#define S5P_FIMV_CH_INIT_BUFS_V6 4 > +#define S5P_FIMV_CH_FRAME_START_V6 5 > +#define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6 6 > +#define S5P_FIMV_H2R_CMD_SLEEP_V67 > +#define S5P_FIMV_H2R_CMD_WAKEUP_V6 8 > +#define S5P_FIMV_CH_LAST_FRAME_V69 > +#define S5P_FIMV_H2R_CMD_FLUSH_V610 > +/* RMVME: REALLOC used? */ > +#define S5P_FIMV_CH_FRAME_START_REALLOC_V6 5 > + > +#define S5P_FIMV_RISC2HOST_CMD_V60x1104 > +#define S5P_FIMV_R2H_CMD_EMPTY_V60 > +#define S5P_FIMV_R2H_CMD_SYS_INIT_RET_V6 1 > +#define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET_V62 > +#define S5P_FIMV_R2H_CMD_SEQ_DONE_RET_V6 3 > +#define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET_V6 4 > + > +#define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET_V6 6 > +#define S5P_FIMV_R2H_CMD_SLEEP_RET_V67 > +#define S5P_FIMV_R2H_CMD_WAKEUP_RET_V6 8 > +#define S5P_FIMV_R2H_CMD_COMPLETE_SEQ_RET_V6 9 > +#define S5P_FIMV_R2H_CMD_DPB_FLUSH_RET_V610 > +#define S5P_FIMV_R2H_CMD_NAL_ABORT_RET_V611 > +#define S5P_FIMV_R2H_CMD_FW_STATUS_RET_V612 > +#define S5P_FIMV_R2H_CMD_FRAME_DONE_RET_V6 13 > +#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET_V6 14 > +#define S5P_FIMV_R2H_CMD_SLICE_DONE_RET_V6 15 > +#define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16 > +#define S5P_FIMV_R2H_CMD_ERR_RET_V6 32 > + > +#define S5P_FIMV_FW_VERSION_V6 0xf000 > + > +#define S5P_FIMV_INSTANCE_ID_V6 0xf008 > +#define S5P_FIMV_CODEC_TYPE_V6 0xf00c > +#define S5P_FIMV_CONTEXT_MEM_ADDR_V6 0xf014 > +#define S5P_FIMV_CONTEXT_MEM_SIZE_V6 0xf018 > +#define S5P_FIMV_PIXEL_FORMAT_V6 0xf020 > + > +#define S5P_FIMV_METADATA_ENABLE_V6 0xf024 > +#define S5P_FIMV_DBG_BUFFER_ADDR_V6 0xf030 > +#define S5P_FIMV_DBG_BUFFER_SIZE_V6 0xf034 > +#define S5P_FIMV_RET_INSTANCE_ID_V6 0xf070 > + > +#define S5P_FIMV_ERROR_CODE_V6 0xf074 > +#define S5P_FIMV_ERR_WARNINGS_START_V6 160 > +#define S5P_FIMV_ERR_DEC_MASK_V6 0x > +#define S5P_FIMV_ERR_DEC_SHIFT_V60 > +#define S5P_FIMV_ERR_DSPL_MASK_V60x > +#define S5P_FIMV_ERR_DSPL_SHIFT_V6 16 > + > +#define S5P_FIMV_DBG_BUFFER_OUTPUT_SIZE_V6 0xf078 > +#define S5P_FIMV_METADATA_STATUS_V6 0xf07C > +#define S5P_FIMV_METADATA_ADDR_MB_INFO_V60xf080 > +#define S5P_FIMV_METADATA_SIZE_MB_INFO_V60xf084 > + > +/* Decoder Registers */ > +#define S5P_FIM
[PATCH v9 5/6] [media] s5p-mfc: MFCv6 register definitions
From: Jeongtae Park Adds register definitions for MFC v6.x firmware Signed-off-by: Jeongtae Park Signed-off-by: Janghyuck Kim Signed-off-by: Jaeryul Oh Signed-off-by: Naveen Krishna Chatradhi Signed-off-by: Arun Kumar K --- drivers/media/platform/s5p-mfc/regs-mfc-v6.h | 408 ++ 1 files changed, 408 insertions(+), 0 deletions(-) create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v6.h diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v6.h b/drivers/media/platform/s5p-mfc/regs-mfc-v6.h new file mode 100644 index 000..363a97c --- /dev/null +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v6.h @@ -0,0 +1,408 @@ +/* + * Register definition file for Samsung MFC V6.x Interface (FIMV) driver + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _REGS_FIMV_V6_H +#define _REGS_FIMV_V6_H + +#include +#include + +#define S5P_FIMV_REG_SIZE_V6 (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) +#define S5P_FIMV_REG_COUNT_V6 ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4) + +/* Number of bits that the buffer address should be shifted for particular + * MFC buffers. */ +#define S5P_FIMV_MEM_OFFSET_V6 0 + +#define S5P_FIMV_START_ADDR_V6 0x +#define S5P_FIMV_END_ADDR_V6 0xfd80 + +#define S5P_FIMV_REG_CLEAR_BEGIN_V60xf000 +#define S5P_FIMV_REG_CLEAR_COUNT_V61024 + +/* Codec Common Registers */ +#define S5P_FIMV_RISC_ON_V60x +#define S5P_FIMV_RISC2HOST_INT_V6 0x003C +#define S5P_FIMV_HOST2RISC_INT_V6 0x0044 +#define S5P_FIMV_RISC_BASE_ADDRESS_V6 0x0054 + +#define S5P_FIMV_MFC_RESET_V6 0x1070 + +#define S5P_FIMV_HOST2RISC_CMD_V6 0x1100 +#define S5P_FIMV_H2R_CMD_EMPTY_V6 0 +#define S5P_FIMV_H2R_CMD_SYS_INIT_V6 1 +#define S5P_FIMV_H2R_CMD_OPEN_INSTANCE_V6 2 +#define S5P_FIMV_CH_SEQ_HEADER_V6 3 +#define S5P_FIMV_CH_INIT_BUFS_V6 4 +#define S5P_FIMV_CH_FRAME_START_V6 5 +#define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE_V6 6 +#define S5P_FIMV_H2R_CMD_SLEEP_V6 7 +#define S5P_FIMV_H2R_CMD_WAKEUP_V6 8 +#define S5P_FIMV_CH_LAST_FRAME_V6 9 +#define S5P_FIMV_H2R_CMD_FLUSH_V6 10 +/* RMVME: REALLOC used? */ +#define S5P_FIMV_CH_FRAME_START_REALLOC_V6 5 + +#define S5P_FIMV_RISC2HOST_CMD_V6 0x1104 +#define S5P_FIMV_R2H_CMD_EMPTY_V6 0 +#define S5P_FIMV_R2H_CMD_SYS_INIT_RET_V6 1 +#define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET_V6 2 +#define S5P_FIMV_R2H_CMD_SEQ_DONE_RET_V6 3 +#define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET_V6 4 + +#define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET_V6 6 +#define S5P_FIMV_R2H_CMD_SLEEP_RET_V6 7 +#define S5P_FIMV_R2H_CMD_WAKEUP_RET_V6 8 +#define S5P_FIMV_R2H_CMD_COMPLETE_SEQ_RET_V6 9 +#define S5P_FIMV_R2H_CMD_DPB_FLUSH_RET_V6 10 +#define S5P_FIMV_R2H_CMD_NAL_ABORT_RET_V6 11 +#define S5P_FIMV_R2H_CMD_FW_STATUS_RET_V6 12 +#define S5P_FIMV_R2H_CMD_FRAME_DONE_RET_V6 13 +#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET_V6 14 +#define S5P_FIMV_R2H_CMD_SLICE_DONE_RET_V6 15 +#define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16 +#define S5P_FIMV_R2H_CMD_ERR_RET_V632 + +#define S5P_FIMV_FW_VERSION_V6 0xf000 + +#define S5P_FIMV_INSTANCE_ID_V60xf008 +#define S5P_FIMV_CODEC_TYPE_V6 0xf00c +#define S5P_FIMV_CONTEXT_MEM_ADDR_V6 0xf014 +#define S5P_FIMV_CONTEXT_MEM_SIZE_V6 0xf018 +#define S5P_FIMV_PIXEL_FORMAT_V6 0xf020 + +#define S5P_FIMV_METADATA_ENABLE_V60xf024 +#define S5P_FIMV_DBG_BUFFER_ADDR_V60xf030 +#define S5P_FIMV_DBG_BUFFER_SIZE_V60xf034 +#define S5P_FIMV_RET_INSTANCE_ID_V60xf070 + +#define S5P_FIMV_ERROR_CODE_V6 0xf074 +#define S5P_FIMV_ERR_WARNINGS_START_V6 160 +#define S5P_FIMV_ERR_DEC_MASK_V6 0x +#define S5P_FIMV_ERR_DEC_SHIFT_V6 0 +#define S5P_FIMV_ERR_DSPL_MASK_V6 0x +#define S5P_FIMV_ERR_DSPL_SHIFT_V6 16 + +#define S5P_FIMV_DBG_BUFFER_OUTPUT_SIZE_V6 0xf078 +#define S5P_FIMV_METADATA_STATUS_V60xf07C +#define S5P_FIMV_METADATA_ADDR_MB_INFO_V6 0xf080 +#define S5P_FIMV_METADATA_SIZE_MB_INFO_V6 0xf084 + +/* Decoder Registers */ +#define S5P_FIMV_D_CRC_CTRL_V6 0xf0b0 +#define S5P_FIMV_D_DEC_OPTIONS_V6 0xf0b4 +#define S5P_FIMV_D_OPT_FMO_ASO_CTRL_MASK_V64 +#define S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6 3 +#define S5P_FIMV_D_OPT_LF_CTRL_SHIFT_V61 +#define S5P_FIMV_D_OPT_LF_CTRL_MASK_V6 0x3 +#define S5P_FIMV_D_OPT_TILE_M
