Re: [PATCH] Add support for interlaced format in detect cvt/gtf

2015-04-20 Thread Hans Verkuil
Hi Prashant, 

A few comments:

On 04/08/2015 02:57 PM, Prashant Laddha wrote:
 Extended detect_cvt/gtf API to indicate the scan type (interlaced
 or progressive). In case of interlaced, the vertical front and back
 porch and vsync values for both (odd,even) fields are considered to
 derive image height. Populated vsync, verical front, back porch
 values in bt timing structure for even and odd fields and updated
 the flags appropriately.
 
 Cc: Hans Verkuil hans.verk...@cisco.com
 Cc: Martin Bugge marbu...@cisco.com
 Cc: Mats Randgaard matra...@cisco.com
 Cc: Laurent Pinchart laurent.pinch...@ideasonboard.com
 Signed-off-by: Prashant Laddha prlad...@cisco.com
 ---
  drivers/media/i2c/adv7604.c  |  4 +++
  drivers/media/i2c/adv7842.c  |  8 --
  drivers/media/platform/vivid/vivid-vid-cap.c |  5 ++--
  drivers/media/v4l2-core/v4l2-dv-timings.c| 39 
 
  include/media/v4l2-dv-timings.h  |  6 +++--
  5 files changed, 51 insertions(+), 11 deletions(-)
 
 diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
 index 1e58537..bdc1d6d 100644
 --- a/drivers/media/i2c/adv7604.c
 +++ b/drivers/media/i2c/adv7604.c
 @@ -1304,11 +1304,15 @@ static int stdi2dv_timings(struct v4l2_subdev *sd,
   if (v4l2_detect_cvt(stdi-lcf + 1, hfreq, stdi-lcvs,
   (stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
   (stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 + stdi-interlaced ? V4L2_DV_INTERLACED :
 +V4L2_DV_PROGRESSIVE,
   timings))
   return 0;
   if (v4l2_detect_gtf(stdi-lcf + 1, hfreq, stdi-lcvs,
   (stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
   (stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 + stdi-interlaced ? V4L2_DV_INTERLACED :
 +V4L2_DV_PROGRESSIVE,
   state-aspect_ratio, timings))
   return 0;
  
 diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
 index 7c215ee..b93ad27 100644
 --- a/drivers/media/i2c/adv7842.c
 +++ b/drivers/media/i2c/adv7842.c
 @@ -1333,12 +1333,16 @@ static int stdi2dv_timings(struct v4l2_subdev *sd,
   if (v4l2_detect_cvt(stdi-lcf + 1, hfreq, stdi-lcvs,
   (stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
   (stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 - timings))
 + stdi-interlaced ? V4L2_DV_INTERLACED :
 +V4L2_DV_PROGRESSIVE,
 + timings))
   return 0;
   if (v4l2_detect_gtf(stdi-lcf + 1, hfreq, stdi-lcvs,
   (stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
   (stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 - state-aspect_ratio, timings))
 + stdi-interlaced ? V4L2_DV_INTERLACED :
 +V4L2_DV_PROGRESSIVE,
 + state-aspect_ratio, timings))
   return 0;
  
   v4l2_dbg(2, debug, sd,
 diff --git a/drivers/media/platform/vivid/vivid-vid-cap.c 
 b/drivers/media/platform/vivid/vivid-vid-cap.c
 index ede168a..5e2b712 100644
 --- a/drivers/media/platform/vivid/vivid-vid-cap.c
 +++ b/drivers/media/platform/vivid/vivid-vid-cap.c
 @@ -1620,7 +1620,7 @@ static bool valid_cvt_gtf_timings(struct 
 v4l2_dv_timings *timings)
  
   if (bt-standards == 0 || (bt-standards  V4L2_DV_BT_STD_CVT)) {
   if (v4l2_detect_cvt(total_v_lines, h_freq, bt-vsync,
 - bt-polarities, timings))
 + bt-polarities, bt-interlaced, timings))
   return true;
   }
  
 @@ -1631,7 +1631,8 @@ static bool valid_cvt_gtf_timings(struct 
 v4l2_dv_timings *timings)
 aspect_ratio.numerator,
 aspect_ratio.denominator);
   if (v4l2_detect_gtf(total_v_lines, h_freq, bt-vsync,
 - bt-polarities, aspect_ratio, timings))
 + bt-polarities, bt-interlaced,
 + aspect_ratio, timings))
   return true;
   }
   return false;
 diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c 
 b/drivers/media/v4l2-core/v4l2-dv-timings.c
 index b1d8dbb..80e4722 100644
 --- a/drivers/media/v4l2-core/v4l2-dv-timings.c
 +++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
 @@ -335,6 +335,7 @@ EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
   * @vsync - the height of the vertical sync in lines.
   * @polarities - the horizontal and vertical polarities (same as struct
   *   v4l2_bt_timings polarities).
 + * @scan - V4L2_DV_INTERLACED or V4L2_DV_PROGRESSIVE

This is a 

[PATCH] Add support for interlaced format in detect cvt/gtf

2015-04-08 Thread Prashant Laddha
Extended detect_cvt/gtf API to indicate the scan type (interlaced
or progressive). In case of interlaced, the vertical front and back
porch and vsync values for both (odd,even) fields are considered to
derive image height. Populated vsync, verical front, back porch
values in bt timing structure for even and odd fields and updated
the flags appropriately.

Cc: Hans Verkuil hans.verk...@cisco.com
Cc: Martin Bugge marbu...@cisco.com
Cc: Mats Randgaard matra...@cisco.com
Cc: Laurent Pinchart laurent.pinch...@ideasonboard.com
Signed-off-by: Prashant Laddha prlad...@cisco.com
---
 drivers/media/i2c/adv7604.c  |  4 +++
 drivers/media/i2c/adv7842.c  |  8 --
 drivers/media/platform/vivid/vivid-vid-cap.c |  5 ++--
 drivers/media/v4l2-core/v4l2-dv-timings.c| 39 
 include/media/v4l2-dv-timings.h  |  6 +++--
 5 files changed, 51 insertions(+), 11 deletions(-)

diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 1e58537..bdc1d6d 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1304,11 +1304,15 @@ static int stdi2dv_timings(struct v4l2_subdev *sd,
if (v4l2_detect_cvt(stdi-lcf + 1, hfreq, stdi-lcvs,
(stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
(stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
+   stdi-interlaced ? V4L2_DV_INTERLACED :
+  V4L2_DV_PROGRESSIVE,
timings))
return 0;
if (v4l2_detect_gtf(stdi-lcf + 1, hfreq, stdi-lcvs,
(stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
(stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
+   stdi-interlaced ? V4L2_DV_INTERLACED :
+  V4L2_DV_PROGRESSIVE,
state-aspect_ratio, timings))
return 0;
 
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index 7c215ee..b93ad27 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -1333,12 +1333,16 @@ static int stdi2dv_timings(struct v4l2_subdev *sd,
if (v4l2_detect_cvt(stdi-lcf + 1, hfreq, stdi-lcvs,
(stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
(stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
-   timings))
+   stdi-interlaced ? V4L2_DV_INTERLACED :
+  V4L2_DV_PROGRESSIVE,
+   timings))
return 0;
if (v4l2_detect_gtf(stdi-lcf + 1, hfreq, stdi-lcvs,
(stdi-hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
(stdi-vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
-   state-aspect_ratio, timings))
+   stdi-interlaced ? V4L2_DV_INTERLACED :
+  V4L2_DV_PROGRESSIVE,
+   state-aspect_ratio, timings))
return 0;
 
v4l2_dbg(2, debug, sd,
diff --git a/drivers/media/platform/vivid/vivid-vid-cap.c 
b/drivers/media/platform/vivid/vivid-vid-cap.c
index ede168a..5e2b712 100644
--- a/drivers/media/platform/vivid/vivid-vid-cap.c
+++ b/drivers/media/platform/vivid/vivid-vid-cap.c
@@ -1620,7 +1620,7 @@ static bool valid_cvt_gtf_timings(struct v4l2_dv_timings 
*timings)
 
if (bt-standards == 0 || (bt-standards  V4L2_DV_BT_STD_CVT)) {
if (v4l2_detect_cvt(total_v_lines, h_freq, bt-vsync,
-   bt-polarities, timings))
+   bt-polarities, bt-interlaced, timings))
return true;
}
 
@@ -1631,7 +1631,8 @@ static bool valid_cvt_gtf_timings(struct v4l2_dv_timings 
*timings)
  aspect_ratio.numerator,
  aspect_ratio.denominator);
if (v4l2_detect_gtf(total_v_lines, h_freq, bt-vsync,
-   bt-polarities, aspect_ratio, timings))
+   bt-polarities, bt-interlaced,
+   aspect_ratio, timings))
return true;
}
return false;
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c 
b/drivers/media/v4l2-core/v4l2-dv-timings.c
index b1d8dbb..80e4722 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -335,6 +335,7 @@ EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
  * @vsync - the height of the vertical sync in lines.
  * @polarities - the horizontal and vertical polarities (same as struct
  * v4l2_bt_timings polarities).
+ * @scan - V4L2_DV_INTERLACED or V4L2_DV_PROGRESSIVE
  * @fmt - the resulting timings.
  *
  * This function will attempt to detect if the given 

support for interlaced format in detect cvt/gtf

2015-04-08 Thread Prashant Laddha
While I was working with Hans on adding cvt/gtf modeline calculations
in v4l2 utils, we thought that it would be nice to extend the detect
cvt/gtf functionality in v4l2-dv-timings to handle interlaced format.

Please find the patch for the same.

Regards,
Prashant
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