Re: [PATCH] i2c: tea5761: New-style i2c driver

2008-03-28 Thread Tony Lindgren
* Eduardo Valentin <[EMAIL PROTECTED]> [080328 14:05]:
> From: Eduardo Valentin <[EMAIL PROTECTED]>
> 
> This patch updates the fm radio driver for tea5761 chip.
> It also moves board dependent code to its correct board
> file place.

Pushed.

Tony


> Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
> ---
>  arch/arm/mach-omap2/board-n800.c|   33 
>  drivers/media/radio/radio-tea5761.c |  140 ++
>  2 files changed, 42 insertions(+), 131 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/board-n800.c 
> b/arch/arm/mach-omap2/board-n800.c
> index 34f1c37..758e2c1 100644
> --- a/arch/arm/mach-omap2/board-n800.c
> +++ b/arch/arm/mach-omap2/board-n800.c
> @@ -258,6 +258,33 @@ static void tsc2301_dev_init(void)
>   }
>  }
>  
> +static int __init tea5761_dev_init(void)
> +{
> + const struct omap_tea5761_config *info;
> + int enable_gpio = 0;
> +
> + info = omap_get_config(OMAP_TAG_TEA5761, struct omap_tea5761_config);
> + if (info)
> + enable_gpio = info->enable_gpio;
> +
> + if (enable_gpio) {
> + pr_debug("Enabling tea5761 at GPIO %d\n",
> +  enable_gpio);
> +
> + if (omap_request_gpio(enable_gpio) < 0) {
> + printk(KERN_ERR "Can't request GPIO %d\n",
> +enable_gpio);
> + return -ENODEV;
> + }
> +
> + omap_set_gpio_direction(enable_gpio, 0);
> + udelay(50);
> + omap_set_gpio_dataout(enable_gpio, 1);
> + }
> +
> + return 0;
> +}
> +
>  static struct omap2_mcspi_device_config tsc2301_mcspi_config = {
>   .turbo_mode = 0,
>   .single_channel = 1,
> @@ -470,6 +497,11 @@ static struct i2c_board_info __initdata 
> n800_i2c_board_info_2[] = {
>   .platform_data = &n800_tcm825x_platform_data,
>   },
>  #endif
> +#if defined(CONFIG_RADIO_TEA5761) || defined(CONFIG_RADIO_TEA5761_MODULE)
> + {
> + I2C_BOARD_INFO("tea5761", 0x10),
> + },
> +#endif
>  };
>  
>  void __init nokia_n800_common_init(void)
> @@ -500,6 +532,7 @@ static void __init nokia_n800_init(void)
>   n800_audio_init(&tsc2301_config);
>   n800_ts_set_config();
>   tsc2301_dev_init();
> + tea5761_dev_init();
>   omap_register_gpio_switches(n800_gpio_switches,
>   ARRAY_SIZE(n800_gpio_switches));
>  }
> diff --git a/drivers/media/radio/radio-tea5761.c 
> b/drivers/media/radio/radio-tea5761.c
> index ac0f621..0fb0cdc 100644
> --- a/drivers/media/radio/radio-tea5761.c
> +++ b/drivers/media/radio/radio-tea5761.c
> @@ -23,8 +23,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
> -#include 
>  
>  #define DRIVER_NAME "tea5761"
>  
> @@ -74,14 +72,6 @@
>  #define TEA5761_FREQ_LOW 87500
>  #define TEA5761_FREQ_HIGH108000
>  
> -/* Probe for TEA5761 twice since the version N4B seems to be
> - * broken and needs two probes to be found */
> -static unsigned short normal_i2c[] = {
> - TEA5761_I2C_ADDR, TEA5761_I2C_ADDR, I2C_CLIENT_END
> -};
> -
> -I2C_CLIENT_INSMOD;
> -
>  struct tea5761_regs {
>   u16 intreg;
>   u16 frqset;
> @@ -423,67 +413,22 @@ static struct video_device tea5761_video_device = {
>   .release   = video_device_release
>  };
>  
> -static int tea5761_probe(struct i2c_adapter *adapter, int address,
> -   int kind)
> +static int tea5761_i2c_driver_probe(struct i2c_client *client)
>  {
> - struct i2c_client *client;
>   struct video_device *video_dev;
>   int err = 0;
> - static const char *client_name = "TEA5761 FM-Radio";
>   struct tea5761_device *tea = &tea5761;
> - struct tea5761_regs   *r = &tea->regs;
>  
>   mutex_init(&tea->mutex);
> -/* I2C detection and initialization */
> - client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
> - if (client == NULL) {
> - dev_err(&adapter->dev, DRIVER_NAME
> - ": couldn't allocate memory\n");
> - return -ENOMEM;
> - }
> - tea->i2c_dev = client;
>  
> - client->addr = address;
> - client->adapter = adapter;
> - client->driver = &tea5761_driver;
> - client->dev.driver = &tea5761_driver.driver;
> - client->flags = 0;
> - strlcpy(client->name, client_name, I2C_NAME_SIZE);
> -
> - if (kind < 0) {
> - if (tea5761_read_regs(tea) < 0) {
> - dev_info(&client->dev,
> -  "chip read failed for %d-%04x\n",
> -  adapter->nr, address);
> - goto err_tea_dev;
> - }
> - if (r->chipid != TEA5761_CHIPID) {
> - dev_info(&client->dev,
> -  "bad chipid (0x%04x) at %d-%04x\n",
> -  r->chipid, adapter->nr, address);
> - goto err_tea_dev;
> - }
> - if ((r->manid 

Re: [PATCH] OMAPFB: Check in suspend/resume if framebuffer device is initialized.

2008-03-28 Thread Tony Lindgren
* Jouni Högander <[EMAIL PROTECTED]> [080328 15:13]:
> Check wether fbdev is NULL in suspend / resume functions. Fbdev is
> NULL, if there is no lcd or it is not enabled in configuration.

Thanks, pushing today.

Tony

> Signed-off-by: Jouni Högander <[EMAIL PROTECTED]>
> ---
>  drivers/video/omap/omapfb_main.c |7 ---
>  1 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/video/omap/omapfb_main.c 
> b/drivers/video/omap/omapfb_main.c
> index f66b81a..139c84c 100644
> --- a/drivers/video/omap/omapfb_main.c
> +++ b/drivers/video/omap/omapfb_main.c
> @@ -1839,8 +1839,8 @@ static int omapfb_suspend(struct platform_device *pdev, 
> pm_message_t mesg)
>  {
>   struct omapfb_device *fbdev = platform_get_drvdata(pdev);
>  
> - omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
> -
> + if (fbdev != NULL)
> + omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
>   return 0;
>  }
>  
> @@ -1849,7 +1849,8 @@ static int omapfb_resume(struct platform_device *pdev)
>  {
>   struct omapfb_device *fbdev = platform_get_drvdata(pdev);
>  
> - omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
> + if (fbdev != NULL)
> + omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
>   return 0;
>  }
>  
> -- 
> 1.5.3.5
> 
> --
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[PATCH] OMAPFB: Check in suspend/resume if framebuffer device is initialized.

2008-03-28 Thread Jouni Högander
Check wether fbdev is NULL in suspend / resume functions. Fbdev is
NULL, if there is no lcd or it is not enabled in configuration.

Signed-off-by: Jouni Högander <[EMAIL PROTECTED]>
---
 drivers/video/omap/omapfb_main.c |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index f66b81a..139c84c 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -1839,8 +1839,8 @@ static int omapfb_suspend(struct platform_device *pdev, 
pm_message_t mesg)
 {
struct omapfb_device *fbdev = platform_get_drvdata(pdev);
 
-   omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
-
+   if (fbdev != NULL)
+   omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
return 0;
 }
 
@@ -1849,7 +1849,8 @@ static int omapfb_resume(struct platform_device *pdev)
 {
struct omapfb_device *fbdev = platform_get_drvdata(pdev);
 
-   omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
+   if (fbdev != NULL)
+   omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
return 0;
 }
 
-- 
1.5.3.5

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[PATCH] 34XX: Fix to use correct shift values for gpio2-6 fclks

2008-03-28 Thread Jouni Högander
Wrong shift values were used for gpio2-6  fclks (gpt2-6 shift).

Signed-off-by: Jouni Högander <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/clock34xx.h |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 3fda2c5..a6a3ed5 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2357,7 +2357,7 @@ static struct clk gpio6_fck = {
.name   = "gpio6_fck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-   .enable_bit = OMAP3430_EN_GPT6_SHIFT,
+   .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
.flags  = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
 };
@@ -2366,7 +2366,7 @@ static struct clk gpio5_fck = {
.name   = "gpio5_fck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-   .enable_bit = OMAP3430_EN_GPT5_SHIFT,
+   .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
.flags  = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
 };
@@ -2375,7 +2375,7 @@ static struct clk gpio4_fck = {
.name   = "gpio4_fck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-   .enable_bit = OMAP3430_EN_GPT4_SHIFT,
+   .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
.flags  = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
 };
@@ -2384,7 +2384,7 @@ static struct clk gpio3_fck = {
.name   = "gpio3_fck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-   .enable_bit = OMAP3430_EN_GPT3_SHIFT,
+   .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
.flags  = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
 };
@@ -2393,7 +2393,7 @@ static struct clk gpio2_fck = {
.name   = "gpio2_fck",
.parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-   .enable_bit = OMAP3430_EN_GPT2_SHIFT,
+   .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
.flags  = CLOCK_IN_OMAP343X,
.recalc = &followparent_recalc,
 };
-- 
1.5.3.5

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Re: [PATCH 16/17] ARM: OMAP2: Add 34xx clock code

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080318 17:05]:
> From: Paul Walmsley <[EMAIL PROTECTED]>
> 
> This patch add 34xx clock code.

Here's an updated version of this patch. I've folded in two more patches
from Paul [1][2]. Patches change to use __ffs() instead of
mask_to_shift,
and clean up clock register defines.

Regards,

Tony

[1] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=f417e171cd2d2bd0302c8f420ee97295a165a39c
[2] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=70d19cc5c7999445b84e6ffea8e025512b877e8c
>From e37c21222372325d7c0409d875999a567d852ea3 Mon Sep 17 00:00:00 2001
From: Paul Walmsley <[EMAIL PROTECTED]>
Date: Tue, 18 Mar 2008 15:09:51 +0200
Subject: [PATCH] ARM: OMAP2: Add 34xx clock code

This patch add 34xx clock code.

Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/Makefile|1 +
 arch/arm/mach-omap2/clock34xx.c |  235 +++
 2 files changed, 236 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/clock34xx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2eabadc..2feb687 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_PM) += pm.o sleep.o
 
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)		+= clock24xx.o
+obj-$(CONFIG_ARCH_OMAP3)		+= clock34xx.o
 
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_GENERIC)		+= board-generic.o
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
new file mode 100644
index 000..1e206d8
--- /dev/null
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -0,0 +1,235 @@
+/*
+ * OMAP3-specific clock framework functions
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Copyright (C) 2007 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * Parts of this code are based on code written by
+ * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "memory.h"
+#include "clock.h"
+#include "clock34xx.h"
+#include "prm.h"
+#include "prm-regbits-34xx.h"
+#include "cm.h"
+#include "cm-regbits-34xx.h"
+
+/* CM_CLKEN_PLL*.EN* bit values */
+#define DPLL_LOCKED		0x7
+
+/**
+ * omap3_dpll_recalc - recalculate DPLL rate
+ * @clk: DPLL struct clk
+ *
+ * Recalculate and propagate the DPLL rate.
+ */
+static void omap3_dpll_recalc(struct clk *clk)
+{
+	clk->rate = omap2_get_dpll_rate(clk);
+
+	propagate_rate(clk);
+}
+
+/**
+ * omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate
+ * @clk: DPLL output struct clk
+ *
+ * Using parent clock DPLL data, look up DPLL state.  If locked, set our
+ * rate to the dpll_clk * 2; otherwise, just use dpll_clk.
+ */
+static void omap3_clkoutx2_recalc(struct clk *clk)
+{
+	const struct dpll_data *dd;
+	u32 v;
+	struct clk *pclk;
+
+	/* Walk up the parents of clk, looking for a DPLL */
+	pclk = clk->parent;
+	while (pclk && !pclk->dpll_data)
+		pclk = pclk->parent;
+
+	/* clk does not have a DPLL as a parent? */
+	WARN_ON(!pclk);
+
+	dd = pclk->dpll_data;
+
+	WARN_ON(!dd->control_reg || !dd->enable_mask);
+
+	v = cm_read_reg(dd->control_reg) & dd->enable_mask;
+	v >>= __ffs(dd->enable_mask);
+	if (v != DPLL_LOCKED)
+		clk->rate = clk->parent->rate;
+	else
+		clk->rate = clk->parent->rate * 2;
+
+	if (clk->flags & RATE_PROPAGATES)
+		propagate_rate(clk);
+}
+
+/*
+ * As it is structured now, this will prevent an OMAP2/3 multiboot
+ * kernel from compiling.  This will need further attention.
+ */
+#if defined(CONFIG_ARCH_OMAP3)
+
+static struct clk_functions omap2_clk_functions = {
+	.clk_enable		= omap2_clk_enable,
+	.clk_disable		= omap2_clk_disable,
+	.clk_round_rate		= omap2_clk_round_rate,
+	.clk_set_rate		= omap2_clk_set_rate,
+	.clk_set_parent		= omap2_clk_set_parent,
+	.clk_disable_unused	= omap2_clk_disable_unused,
+};
+
+/*
+ * Set clocks for bypass mode for reboot to work.
+ */
+void omap2_clk_prepare_for_reboot(void)
+{
+	/* REVISIT: Not ready for 343x */
+#if 0
+	u32 rate;
+
+	if (vclk == NULL || sclk == NULL)
+		return;
+
+	rate = clk_get_rate(sclk);
+	clk_set_rate(vclk, rate);
+#endif
+}
+
+/* REVISIT: Move this init stuff out into clock.c */
+
+/*
+ * Switch the MPU rate if specified on cmdline.
+ * We cannot do this early until cmdline is parsed.
+ */
+static int __init omap2_clk_arch_init(void)
+{
+	if (!mpurate)
+		return -EINVAL;
+
+	/* REVISIT: not yet ready for 343x */
+#if 0
+	if (omap2_select_table_rate(&virt_prcm_set, mpurate))
+		printk(KERN_ERR "Could not find matching MPU rate\n");
+#endif
+
+	recalculat

Re: [PATCH 17/17] ARM: OMAP2: New DPLL clock framework

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080318 17:05]:
> From: Roman Tereshonkov <[EMAIL PROTECTED]>
> 
> These changes is the result of the discussion with Paul Walmsley.
> His ideas are included into this patch.
> 
> Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
> and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk).
> omap2_get_dpll_rate() now returns the correct DPLL rate, as represented
> by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along
> with high-frequency bypass support.
> 
> Add support for DPLLs function in locked and bypass clock modes.

Here's an updated version of this patch. I've folded in two more patches
from Paul [1][2]. Patches change to use __ffs() instead of
mask_to_shift,
and clean up clock register defines.

Regards,

Tony

[1] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=f417e171cd2d2bd0302c8f420ee97295a165a39c
[2] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=70d19cc5c7999445b84e6ffea8e025512b877e8c
>From 6ca053417fd22134398c67dae78952d1749f72ad Mon Sep 17 00:00:00 2001
From: Roman Tereshonkov <[EMAIL PROTECTED]>
Date: Thu, 13 Mar 2008 21:35:09 +0200
Subject: [PATCH] ARM: OMAP2: New DPLL clock framework

These changes is the result of the discussion with Paul Walmsley.
His ideas are included into this patch.

Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk).
omap2_get_dpll_rate() now returns the correct DPLL rate, as represented
by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along
with high-frequency bypass support.

Add support for DPLLs function in locked and bypass clock modes.

Signed-off-by: Roman Tereshonkov <[EMAIL PROTECTED]>
Acked-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/clock.c   |8 -
 arch/arm/mach-omap2/clock34xx.c   |4 +-
 arch/arm/mach-omap2/clock34xx.h   |  503 ++---
 arch/arm/mach-omap2/cm-regbits-34xx.h |4 +
 include/asm-arm/arch-omap/clock.h |2 -
 5 files changed, 410 insertions(+), 111 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 4eeb02c..5661cb8 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -111,14 +111,6 @@ u32 omap2_get_dpll_rate(struct clk *clk)
 	dpll_clk = (long long)clk->parent->rate * dpll_mult;
 	do_div(dpll_clk, dpll_div + 1);
 
-	/* 34XX only */
-	if (dd->div2_reg) {
-		dpll = cm_read_reg(dd->div2_reg);
-		dpll_div = dpll & dd->div2_mask;
-		dpll_div >>= __ffs(dd->div2_mask);
-		do_div(dpll_clk, dpll_div + 1);
-	}
-
 	return dpll_clk;
 }
 
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1e206d8..c0ea2f4 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -212,10 +212,10 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/MPU): "
+	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
 	   "%ld.%01ld/%ld/%ld MHz\n",
 	   (osc_sys_ck.rate / 100), (osc_sys_ck.rate / 10) % 10,
-	   (core_ck.rate / 100), (dpll1_fck.rate / 100)) ;
+	   (core_ck.rate / 100), (arm_fck.rate / 100));
 
 	/*
 	 * Only enable those clocks we will need, let the drivers
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 1d871a8..43da320 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1,6 +1,10 @@
 /*
  * OMAP3 clock framework
  *
+ * Virtual clocks are introduced as a convenient tools.
+ * They are sources for other clocks and not supposed
+ * to be requested from drivers directly.
+ *
  * Copyright (C) 2007-2008 Texas Instruments, Inc.
  * Copyright (C) 2007-2008 Nokia Corporation
  *
@@ -203,6 +207,36 @@ static struct clk sys_clkout1 = {
 
 /* CM CLOCKS */
 
+static const struct clksel_rate dpll_bypass_rates[] = {
+	{ .div = 1, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE },
+	{ .div = 0 }
+};
+
+static const struct clksel_rate dpll_locked_rates[] = {
+	{ .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE },
+	{ .div = 0 }
+};
+
+static const struct clksel_rate div16_dpll_rates[] = {
+	{ .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE },
+	{ .div = 2, .val = 2, .flags = RATE_IN_343X },
+	{ .div = 3, .val = 3, .flags = RATE_IN_343X },
+	{ .div = 4, .val = 4, .flags = RATE_IN_343X },
+	{ .div = 5, .val = 5, .flags = RATE_IN_343X },
+	{ .div = 6, .val = 6, .flags = RATE_IN_343X },
+	{ .div = 7, .val = 7, .flags = RATE_IN_343X },
+	{ .div = 8, .val = 8, .flags = RATE_IN_343X },
+	{ .div = 9, .val = 9, .flags = RATE_IN_343X },
+	{ .div = 10, .val = 10, .flags = RATE_IN_343X },
+	{ .div = 11, .val = 11, .flags = RATE_IN_343X },
+	{ .div = 12, .v

Re: [PATCH 10/17] ARM: OMAP2: Change 24xx to use shared clock code and new reg access

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080318 17:04]:
> From: Paul Walmsley <[EMAIL PROTECTED]>
> 
> This patch changes 24xx to use shared clock code and new register
> access.
> 
> Note that patch adds some temporary OLD_CK defines to keep patch
> more readable. These temporary defines will be removed in the next
> patch. Also not all clocks are changed in this patch to limit the
> size.
> 
> Also, the patch fixes few incorrect clock defines in clock24xx.h.

Here's an updated version of this patch. I've folded in two more patches
from Paul [1][2]. Patches change to use __ffs() instead of
mask_to_shift,
and clean up clock register defines.

Regards,

Tony

[1] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=f417e171cd2d2bd0302c8f420ee97295a165a39c
[2] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=70d19cc5c7999445b84e6ffea8e025512b877e8c
>From 383e0cd34328f994436ae8f295677e0aee9445e2 Mon Sep 17 00:00:00 2001
From: Paul Walmsley <[EMAIL PROTECTED]>
Date: Tue, 18 Mar 2008 10:35:15 +0200
Subject: [PATCH] ARM: OMAP2: Change 24xx to use shared clock code and new reg access

This patch changes 24xx to use shared clock code and new register
access.

Note that patch adds some temporary OLD_CK defines to keep patch
more readable. These temporary defines will be removed in the next
patch. Also not all clocks are changed in this patch to limit the
size.

Also, the patch fixes few incorrect clock defines in clock24xx.h.

Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/Makefile  |2 +-
 arch/arm/mach-omap2/clock.c   |2 +-
 arch/arm/mach-omap2/clock24xx.c   |  319 +++--
 arch/arm/mach-omap2/clock24xx.h   |  320 
 arch/arm/mach-omap2/memory.c  |   48 ++
 arch/arm/mach-omap2/memory.h  |2 +
 arch/arm/plat-omap/clock.c|   42 +
 include/asm-arm/arch-omap/clock.h |   65 ++--
 8 files changed, 562 insertions(+), 238 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index be2b671..a3b2507 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := irq.o id.o io.o sram-fn.o memory.o control.o prcm.o mux.o \
+obj-y := irq.o id.o io.o sram-fn.o memory.o control.o prcm.o clock.o mux.o \
 		devices.o serial.o gpmc.o timer-gp.o
 
 # Power Management
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 0c5181f..8e3e54b 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -122,7 +122,7 @@ u32 omap2_get_dpll_rate(struct clk *clk)
 	if (dd->div2_reg) {
 		dpll = cm_read_reg(dd->div2_reg);
 		dpll_div = dpll & dd->div2_mask;
-		dpll_div >>= __fss(dd->div2_mask);
+		dpll_div >>= __ffs(dd->div2_mask);
 		do_div(dpll_clk, dpll_div + 1);
 	}
 
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 5c24781..20e19c2 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -15,6 +15,8 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#undef DEBUG
+
 #include 
 #include 
 #include 
@@ -23,29 +25,64 @@
 #include 
 #include 
 
-#include 
+#include 
+#include 
 
 #include 
 #include 
 #include 
+#include 
 
-#include "prcm-regs.h"
 #include "memory.h"
+#include "clock.h"
 #include "clock24xx.h"
+#include "prm.h"
+#include "prm-regbits-24xx.h"
+#include "cm.h"
+#include "cm-regbits-24xx.h"
 
-#undef DEBUG
+/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
+#define EN_APLL_STOPPED			0
+#define EN_APLL_LOCKED			3
 
-//#define DOWN_VARIABLE_DPLL 1			/* Experimental */
+/* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */
+#define APLLS_CLKIN_19_2MHZ		0
+#define APLLS_CLKIN_13MHZ		2
+#define APLLS_CLKIN_12MHZ		3
+
+/* #define DOWN_VARIABLE_DPLL 1 */		/* Experimental */
 
 static struct prcm_config *curr_prcm_set;
-static u32 curr_perf_level = PRCM_FULL_SPEED;
 static struct clk *vclk;
 static struct clk *sclk;
 
 /*-
- * Omap2 specific clock functions
+ * Omap24xx specific clock functions
  *-*/
 
+static int omap2_enable_osc_ck(struct clk *clk)
+{
+	u32 pcc;
+
+	pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
+
+	prm_write_reg(pcc & ~OMAP_AUTOEXTCLKMODE_MASK,
+		  OMAP24XX_PRCM_CLKSRC_CTRL);
+
+	return 0;
+}
+
+static void omap2_disable_osc_ck(struct clk *clk)
+{
+	u32 pcc;
+
+	pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
+
+	prm_write_reg(pcc | OMAP_AUTOEXTCLKMODE_MASK,
+		  OMAP24XX_PRCM_CLKSRC_CTRL);
+}
+
+#ifdef OLD_CK
 /* Recalculate SYST_CLK */
 static void omap2_sys_clk_recalc(struct clk * clk)
 {
@@ -55,17 +92,18 @@ static void omap2_sys_clk_recalc(

Re: [PATCH 9/17] ARM: OMAP2: Add common clock framework for 24xx and 34xx

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080318 17:04]:
> From: Paul Walmsley <[EMAIL PROTECTED]>
> 
> This patch adds a common clock framework for 24xx and 34xx.
> Note that this patch does not add it to Makefile until in
> next patch. Some functions are modified from earlier 24xx
> clock framework code.

Here's an updated version of this patch. I've folded in two more patches
from Paul [1][2]. Patches change to use __ffs() instead of
mask_to_shift,
and clean up clock register defines.

Regards,

Tony

[1] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=f417e171cd2d2bd0302c8f420ee97295a165a39c
[2] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=70d19cc5c7999445b84e6ffea8e025512b877e8c
>From 9004fec034e0ac088d81a653357e7b285e46fc90 Mon Sep 17 00:00:00 2001
From: Paul Walmsley <[EMAIL PROTECTED]>
Date: Tue, 18 Mar 2008 10:22:06 +0200
Subject: [PATCH] ARM: OMAP2: Add common clock framework for 24xx and 34xx

This patch adds a common clock framework for 24xx and 34xx.
Note that this patch does not add it to Makefile until in
next patch. Some functions are modified from earlier 24xx
clock framework code.

Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/clock.c |  758 +++
 arch/arm/mach-omap2/clock.h |   73 
 2 files changed, 831 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/clock.c
 create mode 100644 arch/arm/mach-omap2/clock.h

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
new file mode 100644
index 000..0c5181f
--- /dev/null
+++ b/arch/arm/mach-omap2/clock.c
@@ -0,0 +1,758 @@
+/*
+ *  linux/arch/arm/mach-omap2/clock.c
+ *
+ *  Copyright (C) 2005 Texas Instruments Inc.
+ *  Richard Woodruff <[EMAIL PROTECTED]>
+ *  Created for OMAP2.
+ *
+ *  Cleaned up and modified to use omap shared clock framework by
+ *  Tony Lindgren <[EMAIL PROTECTED]>
+ *
+ *  Copyright (C) 2007 Texas Instruments, Inc.
+ *  Copyright (C) 2007 Nokia Corporation
+ *  Paul Walmsley
+ *
+ *  Based on omap1 clock.c, Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "memory.h"
+#include "sdrc.h"
+#include "clock.h"
+#include "prm.h"
+#include "prm-regbits-24xx.h"
+#include "cm.h"
+#include "cm-regbits-24xx.h"
+#include "cm-regbits-34xx.h"
+
+#define MAX_CLOCK_ENABLE_WAIT		10
+
+u8 cpu_mask;
+
+/*-
+ * Omap2 specific clock functions
+ *-*/
+
+/**
+ * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware
+ * @clk: OMAP clock struct ptr to use
+ *
+ * Given a pointer to a source-selectable struct clk, read the hardware
+ * register and determine what its parent is currently set to.  Update the
+ * clk->parent field with the appropriate clk ptr.
+ */
+void omap2_init_clksel_parent(struct clk *clk)
+{
+	const struct clksel *clks;
+	const struct clksel_rate *clkr;
+	u32 r, found = 0;
+
+	if (!clk->clksel)
+		return;
+
+	r = __raw_readl(clk->clksel_reg) & clk->clksel_mask;
+	r >>= __ffs(clk->clksel_mask);
+
+	for (clks = clk->clksel; clks->parent && !found; clks++) {
+		for (clkr = clks->rates; clkr->div && !found; clkr++) {
+			if ((clkr->flags & cpu_mask) && (clkr->val == r)) {
+if (clk->parent != clks->parent) {
+	pr_debug("clock: inited %s parent "
+		 "to %s (was %s)\n",
+		 clk->name, clks->parent->name,
+		 ((clk->parent) ?
+		  clk->parent->name : "NULL"));
+	clk->parent = clks->parent;
+};
+found = 1;
+			}
+		}
+	}
+
+	if (!found)
+		printk(KERN_ERR "clock: init parent: could not find "
+		   "regval %0x for clock %s\n", r,  clk->name);
+
+	return;
+}
+
+/* Returns the DPLL rate */
+u32 omap2_get_dpll_rate(struct clk *clk)
+{
+	long long dpll_clk;
+	u32 dpll_mult, dpll_div, dpll;
+	const struct dpll_data *dd;
+
+	dd = clk->dpll_data;
+	/* REVISIT: What do we return on error? */
+	if (!dd)
+		return 0;
+
+	dpll = cm_read_reg(dd->mult_div1_reg);
+	dpll_mult = dpll & dd->mult_mask;
+	dpll_mult >>= __ffs(dd->mult_mask);
+	dpll_div = dpll & dd->div1_mask;
+	dpll_div >>= __ffs(dd->div1_mask);
+
+	dpll_clk = (long long)clk->parent->rate * dpll_mult;
+	do_div(dpll_clk, dpll_div + 1);
+
+	/* 34XX only */
+	if (dd->div2_reg) {
+		dpll = cm_read_reg(dd->div2_reg);
+		dpll_div = dpll & dd->div2_mask;
+		dpll_div >>= __fss(dd->div2_mask);
+		do_div(dpll_clk, dpll_div + 1);
+	}
+
+	r

Re: [PATCH 4/17] ARM: OMAP2: Add register access for 34xx

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080318 17:03]:
> This patch adds register access for 34xx power and clock management.

Here's an updated version of this patch. I've folded in two more patches
from Paul [1][2]. Patches change to use __ffs() instead of
mask_to_shift,
and clean up clock register defines.

Regards,

Tony

[1] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=f417e171cd2d2bd0302c8f420ee97295a165a39c
[2] 
http://master.kernel.org/git/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=70d19cc5c7999445b84e6ffea8e025512b877e8c
>From e32923c7408d8731f5d6c551e39d7e49058034bb Mon Sep 17 00:00:00 2001
From: Tony Lindgren <[EMAIL PROTECTED]>
Date: Tue, 18 Mar 2008 14:53:17 +0200
Subject: [PATCH] ARM: OMAP2: Add register access for 34xx

This patch adds register access for 34xx power and clock management.

Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/cm-regbits-34xx.h  |  669 
 arch/arm/mach-omap2/prm-regbits-34xx.h |  582 +++
 2 files changed, 1251 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/cm-regbits-34xx.h
 create mode 100644 arch/arm/mach-omap2/prm-regbits-34xx.h

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
new file mode 100644
index 000..3170408
--- /dev/null
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -0,0 +1,669 @@
+#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H
+#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H
+
+/*
+ * OMAP3430 Clock Management register bits
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "cm.h"
+
+/* Bits shared between registers */
+
+/* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */
+#define OMAP3430ES2_EN_MMC3_MASK			(1 << 30)
+#define OMAP3430ES2_EN_MMC3_SHIFT			30
+#define OMAP3430_EN_MSPRO(1 << 23)
+#define OMAP3430_EN_MSPRO_SHIFT23
+#define OMAP3430_EN_HDQ	(1 << 22)
+#define OMAP3430_EN_HDQ_SHIFT22
+#define OMAP3430ES1_EN_FSHOSTUSB			(1 << 5)
+#define OMAP3430ES1_EN_FSHOSTUSB_SHIFT			5
+#define OMAP3430ES1_EN_D2D(1 << 3)
+#define OMAP3430ES1_EN_D2D_SHIFT			3
+#define OMAP3430_EN_SSI	(1 << 0)
+#define OMAP3430_EN_SSI_SHIFT0
+
+/* CM_FCLKEN3_CORE and CM_ICLKEN3_CORE shared bits */
+#define OMAP3430ES2_EN_USBTLL_SHIFT			2
+#define OMAP3430ES2_EN_USBTLL_MASK			(1 << 2)
+
+/* CM_FCLKEN_WKUP and CM_ICLKEN_WKUP shared bits */
+#define OMAP3430_EN_WDT2(1 << 5)
+#define OMAP3430_EN_WDT2_SHIFT5
+
+/* CM_ICLKEN_CAM, CM_FCLKEN_CAM shared bits */
+#define OMAP3430_EN_CAM	(1 << 0)
+#define OMAP3430_EN_CAM_SHIFT0
+
+/* CM_FCLKEN_PER, CM_ICLKEN_PER shared bits */
+#define OMAP3430_EN_WDT3(1 << 12)
+#define OMAP3430_EN_WDT3_SHIFT12
+
+/* CM_CLKSEL2_EMU, CM_CLKSEL3_EMU shared bits */
+#define OMAP3430_OVERRIDE_ENABLE			(1 << 19)
+
+
+/* Bits specific to each register */
+
+/* CM_FCLKEN_IVA2 */
+#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2			(1 << 0)
+
+/* CM_CLKEN_PLL_IVA2 */
+#define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT		8
+#define OMAP3430_IVA2_DPLL_RAMPTIME_MASK		(0x3 << 8)
+#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT		4
+#define OMAP3430_IVA2_DPLL_FREQSEL_MASK			(0xf << 4)
+#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT		3
+#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_MASK		(1 << 3)
+#define OMAP3430_EN_IVA2_DPLL_SHIFT			0
+#define OMAP3430_EN_IVA2_DPLL_MASK			(0x7 << 0)
+
+/* CM_IDLEST_IVA2 */
+#define OMAP3430_ST_IVA2(1 << 0)
+
+/* CM_IDLEST_PLL_IVA2 */
+#define OMAP3430_ST_IVA2_CLK(1 << 0)
+
+/* CM_AUTOIDLE_PLL_IVA2 */
+#define OMAP3430_AUTO_IVA2_DPLL_SHIFT			0
+#define OMAP3430_AUTO_IVA2_DPLL_MASK			(0x7 << 0)
+
+/* CM_CLKSEL1_PLL_IVA2 */
+#define OMAP3430_IVA2_CLK_SRC_SHIFT			19
+#define OMAP3430_IVA2_CLK_SRC_MASK			(0x3 << 19)
+#define OMAP3430_IVA2_DPLL_MULT_SHIFT			8
+#define OMAP3430_IVA2_DPLL_MULT_MASK			(0x7ff << 8)
+#define OMAP3430_IVA2_DPLL_DIV_SHIFT			0
+#define OMAP3430_IVA2_DPLL_DIV_MASK			(0x7f << 0)
+
+/* CM_CLKSEL2_PLL_IVA2 */
+#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_SHIFT		0
+#define OMAP3430_IVA2_DPLL_CLKOUT_DIV_MASK		(0x1f << 0)
+
+/* CM_CLKSTCTRL_IVA2 */
+#define OMAP3430_CLKTRCTRL_IVA2_SHIFT			0
+#define OMAP3430_CLKTRCTRL_IVA2_MASK			(0x3 << 0)
+
+/* CM_CLKSTST_IVA2 */
+#define OMAP3430_CLKACTIVITY_IVA2			(1 << 0)
+
+/* CM_REVISION specific bits */
+
+/* CM_SYSCONFIG specific bits */
+
+/* CM_CLKEN_PLL_MPU */
+#define OMAP3430_MPU_DPLL_RAMPTIME_SHIFT		8
+#define OMAP3430_MPU_DPLL_RAMPTIME_MASK			(0x3 << 8)
+#define OMAP3430_MPU_DPLL_FREQSEL_SHIFT			4
+#define OMAP3430_MPU_DPLL_FREQSEL_MASK			(0xf << 4)
+#define OMAP3430_EN_MPU_DPLL_DRIFTGUARD_SHIFT		3
+#d

Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2

2008-03-28 Thread Tony Lindgren
* Russell King - ARM Linux <[EMAIL PROTECTED]> [080326 00:16]:
> On Tue, Mar 25, 2008 at 12:09:41PM +0200, Tony Lindgren wrote:
> > * Russell King - ARM Linux <[EMAIL PROTECTED]> [080321 14:05]:
> > > Or just omit the bogus change from the original patch.
> > 
> > OK, here's the fixed patch.
> 
> Yup, is ok.

I've posted this series as 4879/1 to the patch system.

Tony
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Re: [PATCH] i2c: tea5761: New-style i2c driver

2008-03-28 Thread Eduardo Valentin
Hi Jarkko,

Thanks for the review.

>On Thu, 27 Mar 2008 11:31:20 -0400
>"ext Eduardo Valentin" <[EMAIL PROTECTED]> wrote:
>
>> From: Eduardo Valentin <[EMAIL PROTECTED]>
>> 
>> This patch updates the fm radio driver for tea5761 chip.
>> It also moves board dependent code to its correct board
>> file place.
>> 
>Good move forward!
>
>Any plans to send this driver with Kconfig & Makefile modifications to
>relevant V4L etc mailing list?

Yes, I can send them to V4L2 mailing list after we have them in a good shape.

>
>Note there are three minor warnings if you run your patch with
>scripts/checkpatch.pl.

Yes, thanks. I'm sending an updated version.

>
>You could also remove these two headers files below since they are not
>needed anymore.

Already done in this new version.

>
>> diff --git a/drivers/media/radio/radio-tea5761.c
>> b/drivers/media/radio/radio-tea5761.c index ac0f621..2341e66 100644
>> --- a/drivers/media/radio/radio-tea5761.c
>> +++ b/drivers/media/radio/radio-tea5761.c
>@@ -23,8 +23,8 @@
> #include 
> #include 
> #include 
>-#include 
>-#include 
>
>
>-- 
>Jarkko

Cheers,

Eduardo Valentin


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[PATCH] i2c: tea5761: New-style i2c driver

2008-03-28 Thread Eduardo Valentin
From: Eduardo Valentin <[EMAIL PROTECTED]>

This patch updates the fm radio driver for tea5761 chip.
It also moves board dependent code to its correct board
file place.

Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/board-n800.c|   33 
 drivers/media/radio/radio-tea5761.c |  140 ++
 2 files changed, 42 insertions(+), 131 deletions(-)

diff --git a/arch/arm/mach-omap2/board-n800.c b/arch/arm/mach-omap2/board-n800.c
index 34f1c37..758e2c1 100644
--- a/arch/arm/mach-omap2/board-n800.c
+++ b/arch/arm/mach-omap2/board-n800.c
@@ -258,6 +258,33 @@ static void tsc2301_dev_init(void)
}
 }
 
+static int __init tea5761_dev_init(void)
+{
+   const struct omap_tea5761_config *info;
+   int enable_gpio = 0;
+
+   info = omap_get_config(OMAP_TAG_TEA5761, struct omap_tea5761_config);
+   if (info)
+   enable_gpio = info->enable_gpio;
+
+   if (enable_gpio) {
+   pr_debug("Enabling tea5761 at GPIO %d\n",
+enable_gpio);
+
+   if (omap_request_gpio(enable_gpio) < 0) {
+   printk(KERN_ERR "Can't request GPIO %d\n",
+  enable_gpio);
+   return -ENODEV;
+   }
+
+   omap_set_gpio_direction(enable_gpio, 0);
+   udelay(50);
+   omap_set_gpio_dataout(enable_gpio, 1);
+   }
+
+   return 0;
+}
+
 static struct omap2_mcspi_device_config tsc2301_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,
@@ -470,6 +497,11 @@ static struct i2c_board_info __initdata 
n800_i2c_board_info_2[] = {
.platform_data = &n800_tcm825x_platform_data,
},
 #endif
+#if defined(CONFIG_RADIO_TEA5761) || defined(CONFIG_RADIO_TEA5761_MODULE)
+   {
+   I2C_BOARD_INFO("tea5761", 0x10),
+   },
+#endif
 };
 
 void __init nokia_n800_common_init(void)
@@ -500,6 +532,7 @@ static void __init nokia_n800_init(void)
n800_audio_init(&tsc2301_config);
n800_ts_set_config();
tsc2301_dev_init();
+   tea5761_dev_init();
omap_register_gpio_switches(n800_gpio_switches,
ARRAY_SIZE(n800_gpio_switches));
 }
diff --git a/drivers/media/radio/radio-tea5761.c 
b/drivers/media/radio/radio-tea5761.c
index ac0f621..0fb0cdc 100644
--- a/drivers/media/radio/radio-tea5761.c
+++ b/drivers/media/radio/radio-tea5761.c
@@ -23,8 +23,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 
 #define DRIVER_NAME "tea5761"
 
@@ -74,14 +72,6 @@
 #define TEA5761_FREQ_LOW   87500
 #define TEA5761_FREQ_HIGH  108000
 
-/* Probe for TEA5761 twice since the version N4B seems to be
- * broken and needs two probes to be found */
-static unsigned short normal_i2c[] = {
-   TEA5761_I2C_ADDR, TEA5761_I2C_ADDR, I2C_CLIENT_END
-};
-
-I2C_CLIENT_INSMOD;
-
 struct tea5761_regs {
u16 intreg;
u16 frqset;
@@ -423,67 +413,22 @@ static struct video_device tea5761_video_device = {
.release   = video_device_release
 };
 
-static int tea5761_probe(struct i2c_adapter *adapter, int address,
- int kind)
+static int tea5761_i2c_driver_probe(struct i2c_client *client)
 {
-   struct i2c_client *client;
struct video_device *video_dev;
int err = 0;
-   static const char *client_name = "TEA5761 FM-Radio";
struct tea5761_device *tea = &tea5761;
-   struct tea5761_regs   *r = &tea->regs;
 
mutex_init(&tea->mutex);
-/* I2C detection and initialization */
-   client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
-   if (client == NULL) {
-   dev_err(&adapter->dev, DRIVER_NAME
-   ": couldn't allocate memory\n");
-   return -ENOMEM;
-   }
-   tea->i2c_dev = client;
 
-   client->addr = address;
-   client->adapter = adapter;
-   client->driver = &tea5761_driver;
-   client->dev.driver = &tea5761_driver.driver;
-   client->flags = 0;
-   strlcpy(client->name, client_name, I2C_NAME_SIZE);
-
-   if (kind < 0) {
-   if (tea5761_read_regs(tea) < 0) {
-   dev_info(&client->dev,
-"chip read failed for %d-%04x\n",
-adapter->nr, address);
-   goto err_tea_dev;
-   }
-   if (r->chipid != TEA5761_CHIPID) {
-   dev_info(&client->dev,
-"bad chipid (0x%04x) at %d-%04x\n",
-r->chipid, adapter->nr, address);
-   goto err_tea_dev;
-   }
-   if ((r->manid & 0x0fff) != TEA5761_MANID) {
-   dev_info(&client->dev,
-"bad manid (0x%04x) at %d-%04x\n",
-r->manid, adapter->nr, address);
-  

Re: [PATCH] I2C: Fix twl4030 timeouts on omap3430

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080328 13:47]:
> ARM: OMAP: Use posted mode for dmtimer
> 
> This patch adds the use of write posting for the timer.  Previously, every
> write could lock the requestor for almost 3x32KHz cycles.  This patch only
> synchronizes before writes and reads instead of after them and it does
> it on per register basis.  Doing it this way there is some chance to hide
> some of the sync latency.  It also removes some needless reads when
> non-posted mode is there.  With out this fix the read/writes take almost
> 2% CPU load @500MHz just waiting on tick timer registers.
> 
> Also define new 34xx only registers.

Please ignore this patch too.

Tony

> 
> Signed-off-by: Richard Woodruff <[EMAIL PROTECTED]>
> Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
> 
> --- a/arch/arm/plat-omap/dmtimer.c
> +++ b/arch/arm/plat-omap/dmtimer.c
> @@ -38,34 +38,113 @@
>  #include 
>  
>  /* register offsets */
> -#define OMAP_TIMER_ID_REG0x00
> -#define OMAP_TIMER_OCP_CFG_REG   0x10
> -#define OMAP_TIMER_SYS_STAT_REG  0x14
> -#define OMAP_TIMER_STAT_REG  0x18
> -#define OMAP_TIMER_INT_EN_REG0x1c
> -#define OMAP_TIMER_WAKEUP_EN_REG 0x20
> -#define OMAP_TIMER_CTRL_REG  0x24
> -#define OMAP_TIMER_COUNTER_REG   0x28
> -#define OMAP_TIMER_LOAD_REG  0x2c
> -#define OMAP_TIMER_TRIGGER_REG   0x30
> -#define OMAP_TIMER_WRITE_PEND_REG0x34
> -#define OMAP_TIMER_MATCH_REG 0x38
> -#define OMAP_TIMER_CAPTURE_REG   0x3c
> -#define OMAP_TIMER_IF_CTRL_REG   0x40
> -
> -/* timer control reg bits */
> -#define OMAP_TIMER_CTRL_GPOCFG   (1 << 14)
> -#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
> -#define OMAP_TIMER_CTRL_PT   (1 << 12)
> -#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH(0x1 << 8)
> -#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW(0x2 << 8)
> -#define OMAP_TIMER_CTRL_TCM_BOTHEDGES(0x3 << 8)
> -#define OMAP_TIMER_CTRL_SCPWM(1 << 7)
> -#define OMAP_TIMER_CTRL_CE   (1 << 6)/* compare enable */
> -#define OMAP_TIMER_CTRL_PRE  (1 << 5)/* prescaler enable */
> -#define OMAP_TIMER_CTRL_PTV_SHIFT2   /* how much to shift 
> the prescaler value */
> -#define OMAP_TIMER_CTRL_AR   (1 << 1)/* auto-reload enable */
> -#define OMAP_TIMER_CTRL_ST   (1 << 0)/* start timer */
> +#define _OMAP_TIMER_ID_OFFSET0x00
> +#define _OMAP_TIMER_OCP_CFG_OFFSET   0x10
> +#define _OMAP_TIMER_SYS_STAT_OFFSET  0x14
> +#define _OMAP_TIMER_STAT_OFFSET  0x18
> +#define _OMAP_TIMER_INT_EN_OFFSET0x1c
> +#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20
> +#define _OMAP_TIMER_CTRL_OFFSET  0x24
> +#define  OMAP_TIMER_CTRL_GPOCFG  (1 << 14)
> +#define  OMAP_TIMER_CTRL_CAPTMODE(1 << 13)
> +#define  OMAP_TIMER_CTRL_PT  (1 << 12)
> +#define  OMAP_TIMER_CTRL_TCM_LOWTOHIGH   (0x1 << 8)
> +#define  OMAP_TIMER_CTRL_TCM_HIGHTOLOW   (0x2 << 8)
> +#define  OMAP_TIMER_CTRL_TCM_BOTHEDGES   (0x3 << 8)
> +#define  OMAP_TIMER_CTRL_SCPWM   (1 << 7)
> +#define  OMAP_TIMER_CTRL_CE  (1 << 6) /* compare 
> enable */
> +#define  OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler 
> enable */
> +#define  OMAP_TIMER_CTRL_PTV_SHIFT   2 /* prescaler value 
> shift */
> +#define  OMAP_TIMER_CTRL_POSTED  (1 << 2)
> +#define  OMAP_TIMER_CTRL_AR  (1 << 1) /* auto-reload 
> enable */
> +#define  OMAP_TIMER_CTRL_ST  (1 << 0) /* start timer 
> */
> +#define _OMAP_TIMER_COUNTER_OFFSET   0x28
> +#define _OMAP_TIMER_LOAD_OFFSET  0x2c
> +#define _OMAP_TIMER_TRIGGER_OFFSET   0x30
> +#define _OMAP_TIMER_WRITE_PEND_OFFSET0x34
> +#define  WP_NONE 0   /* no write pending bit 
> */
> +#define  WP_TCLR (1 << 0)
> +#define  WP_TCRR (1 << 1)
> +#define  WP_TLDR (1 << 2)
> +#define  WP_TTGR (1 << 3)
> +#define  WP_TMAR (1 << 4)
> +#define  WP_TPIR (1 << 5)
> +#define  WP_TNIR (1 << 6)
> +#define  WP_TCVR (1 << 7)
> +#define  WP_TOCR (1 << 8)
> +#define  WP_TOWR (1 << 9)
> +#define _OMAP_TIMER_MATCH_OFFSET 0x38
> +#define _OMAP_TIMER_CAPTURE_OFFSET   0x3c
> +#define _OMAP_TIMER_IF_CTRL_OFFSET   0x40
> +#define _OMAP_TIMER_CAPTURE2_OFFSET  0x44/* TCAR2, 34xx only */
> +#define _OMAP_TIMER_TICK_POS_OFFSET  0x48/* TPIR, 34xx only */
> +#define _OMAP_TIMER_TICK_NEG_OFFSET  0x4c/* TNIR, 34xx only *

[PATCH] I2C: Fix twl4030 timeouts on omap3430

2008-03-28 Thread Tony Lindgren
ARM: OMAP: Use posted mode for dmtimer

This patch adds the use of write posting for the timer.  Previously, every
write could lock the requestor for almost 3x32KHz cycles.  This patch only
synchronizes before writes and reads instead of after them and it does
it on per register basis.  Doing it this way there is some chance to hide
some of the sync latency.  It also removes some needless reads when
non-posted mode is there.  With out this fix the read/writes take almost
2% CPU load @500MHz just waiting on tick timer registers.

Also define new 34xx only registers.

Signed-off-by: Richard Woodruff <[EMAIL PROTECTED]>
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>

--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -38,34 +38,113 @@
 #include 
 
 /* register offsets */
-#define OMAP_TIMER_ID_REG  0x00
-#define OMAP_TIMER_OCP_CFG_REG 0x10
-#define OMAP_TIMER_SYS_STAT_REG0x14
-#define OMAP_TIMER_STAT_REG0x18
-#define OMAP_TIMER_INT_EN_REG  0x1c
-#define OMAP_TIMER_WAKEUP_EN_REG   0x20
-#define OMAP_TIMER_CTRL_REG0x24
-#define OMAP_TIMER_COUNTER_REG 0x28
-#define OMAP_TIMER_LOAD_REG0x2c
-#define OMAP_TIMER_TRIGGER_REG 0x30
-#define OMAP_TIMER_WRITE_PEND_REG  0x34
-#define OMAP_TIMER_MATCH_REG   0x38
-#define OMAP_TIMER_CAPTURE_REG 0x3c
-#define OMAP_TIMER_IF_CTRL_REG 0x40
-
-/* timer control reg bits */
-#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
-#define OMAP_TIMER_CTRL_CAPTMODE   (1 << 13)
-#define OMAP_TIMER_CTRL_PT (1 << 12)
-#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH  (0x1 << 8)
-#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW  (0x2 << 8)
-#define OMAP_TIMER_CTRL_TCM_BOTHEDGES  (0x3 << 8)
-#define OMAP_TIMER_CTRL_SCPWM  (1 << 7)
-#define OMAP_TIMER_CTRL_CE (1 << 6)/* compare enable */
-#define OMAP_TIMER_CTRL_PRE(1 << 5)/* prescaler enable */
-#define OMAP_TIMER_CTRL_PTV_SHIFT  2   /* how much to shift 
the prescaler value */
-#define OMAP_TIMER_CTRL_AR (1 << 1)/* auto-reload enable */
-#define OMAP_TIMER_CTRL_ST (1 << 0)/* start timer */
+#define _OMAP_TIMER_ID_OFFSET  0x00
+#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10
+#define _OMAP_TIMER_SYS_STAT_OFFSET0x14
+#define _OMAP_TIMER_STAT_OFFSET0x18
+#define _OMAP_TIMER_INT_EN_OFFSET  0x1c
+#define _OMAP_TIMER_WAKEUP_EN_OFFSET   0x20
+#define _OMAP_TIMER_CTRL_OFFSET0x24
+#defineOMAP_TIMER_CTRL_GPOCFG  (1 << 14)
+#defineOMAP_TIMER_CTRL_CAPTMODE(1 << 13)
+#defineOMAP_TIMER_CTRL_PT  (1 << 12)
+#defineOMAP_TIMER_CTRL_TCM_LOWTOHIGH   (0x1 << 8)
+#defineOMAP_TIMER_CTRL_TCM_HIGHTOLOW   (0x2 << 8)
+#defineOMAP_TIMER_CTRL_TCM_BOTHEDGES   (0x3 << 8)
+#defineOMAP_TIMER_CTRL_SCPWM   (1 << 7)
+#defineOMAP_TIMER_CTRL_CE  (1 << 6) /* compare 
enable */
+#defineOMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler 
enable */
+#defineOMAP_TIMER_CTRL_PTV_SHIFT   2 /* prescaler value 
shift */
+#defineOMAP_TIMER_CTRL_POSTED  (1 << 2)
+#defineOMAP_TIMER_CTRL_AR  (1 << 1) /* auto-reload 
enable */
+#defineOMAP_TIMER_CTRL_ST  (1 << 0) /* start timer 
*/
+#define _OMAP_TIMER_COUNTER_OFFSET 0x28
+#define _OMAP_TIMER_LOAD_OFFSET0x2c
+#define _OMAP_TIMER_TRIGGER_OFFSET 0x30
+#define _OMAP_TIMER_WRITE_PEND_OFFSET  0x34
+#defineWP_NONE 0   /* no write pending bit 
*/
+#defineWP_TCLR (1 << 0)
+#defineWP_TCRR (1 << 1)
+#defineWP_TLDR (1 << 2)
+#defineWP_TTGR (1 << 3)
+#defineWP_TMAR (1 << 4)
+#defineWP_TPIR (1 << 5)
+#defineWP_TNIR (1 << 6)
+#defineWP_TCVR (1 << 7)
+#defineWP_TOCR (1 << 8)
+#defineWP_TOWR (1 << 9)
+#define _OMAP_TIMER_MATCH_OFFSET   0x38
+#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c
+#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40
+#define _OMAP_TIMER_CAPTURE2_OFFSET0x44/* TCAR2, 34xx only */
+#define _OMAP_TIMER_TICK_POS_OFFSET0x48/* TPIR, 34xx only */
+#define _OMAP_TIMER_TICK_NEG_OFFSET0x4c/* TNIR, 34xx only */
+#define _OMAP_TIMER_TICK_COUNT_OFFSET  0x50/* TCVR, 34xx only */
+#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET   0x54/* TOCR, 34xx only */
+#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58/* TOWR, 34xx only */
+
+/* register off

Re: [PATCH] I2C: Fix twl4030 timeouts on omap3430

2008-03-28 Thread Tony Lindgren
* Tony Lindgren <[EMAIL PROTECTED]> [080328 13:47]:
> For some reason doing a twl4030 write-read cycle can hang the I2C bus
> on omap3430. And doing the write and read separately in twl4030_i2c_read()
> seems to fix the problem...
> 
> Not intended for applying, just a temporary workaround.

Uh, please ignore this one, git-send-email weirdness where it sends
all files ending in .patch.. The series should only contain two patches.

Tony

> 
> diff --git a/drivers/i2c/chips/twl4030-core.c 
> b/drivers/i2c/chips/twl4030-core.c
> index ded86e7..62868b0 100644
> --- a/drivers/i2c/chips/twl4030-core.c
> +++ b/drivers/i2c/chips/twl4030-core.c
> @@ -327,6 +327,7 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 
> num_bytes)
>   return -EPERM;
>   }
>   mutex_lock(&twl->xfer_lock);
> +
>   /* [MSG1] fill the register address data */
>   msg = &twl->xfer_msg[0];
>   msg->addr = twl->address;
> @@ -334,18 +335,25 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 
> num_bytes)
>   msg->flags = 0; /* Read the register value */
>   val = twl4030_map[mod_no].base + reg;
>   msg->buf = &val;
> + ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
> + if (ret < 0)
> + goto out;
> + 
>   /* [MSG2] fill the data rx buffer */
>   msg = &twl->xfer_msg[1];
>   msg->addr = twl->address;
>   msg->flags = I2C_M_RD;  /* Read the register value */
>   msg->len = num_bytes;   /* only n bytes */
>   msg->buf = value;
> - ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 2);
> + ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
> +
> +out:
>   mutex_unlock(&twl->xfer_lock);
>  
>   /* i2cTransfer returns num messages.translate it pls.. */
>   if (ret >= 0)
>   ret = 0;
> +
>   return ret;
>  }
>  
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[PATCH 2/2] ARCH: OMAP3: Make SRAM code from TI CDP compile and work

2008-03-28 Thread Tony Lindgren
Make SRAM code from TI CDP compile and work.

Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/sram34xx.S   |  112 ++
 arch/arm/plat-omap/sram.c|   63 +
 include/asm-arm/arch-omap/sdrc.h |2 +
 include/asm-arm/arch-omap/sram.h |   19 +++
 4 files changed, 136 insertions(+), 60 deletions(-)

diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 803f60d..74873df 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -28,21 +28,12 @@
  */
 #include 
 #include 
-#include 
 #include 
 
-#include "prcm-regs.h"
-
-#define CM_CLKSEL1_PLL_V   IO_ADDRESS(CM_BASE + 0xD40)
-#defineCM_ICLKEN1_CORE_V   IO_ADDRESS(CM_BASE + 0xA10)
-#define CM_IDLEST1_CORE_V  IO_ADDRESS(CM_BASE + 0xA20)
+#include 
 
-#defineSDRC_POWER_VIO_ADDRESS(SDRC_BASE + 0x070)
-#define SDRC_RFR_CTRL  IO_ADDRESS(SDRC_BASE + 0x0A4)
-#define SDRC_ACTIM_CTRL_A  IO_ADDRESS(SDRC_BASE + 0x09C)
-#defineSDRC_ACTIM_CTRL_B   IO_ADDRESS(SDRC_BASE + 0x0A0)
-#defineSDRC_DLLA_STATUSIO_ADDRESS(SDRC_BASE + 0x064)
-#defineSDRC_DLLA_CTRL  IO_ADDRESS(SDRC_BASE + 0x060)
+#include "sdrc.h"
+#include "cm.h"
 
.text
 
@@ -68,7 +59,7 @@ ENTRY(omap34xx_sram_set_prcm_sz)
 
 /*
  * Change frequency of core dpll
- * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla  r2 = sdrc_actim_ctrlb r3 = M2
+ * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla r2 = sdrc_actim_ctrlb r3 = M2
  */
 ENTRY(omap34xx_sram_configure_core_dpll)
stmfd   sp!, {r1-r12, lr}   @ store regs to stack
@@ -90,37 +81,37 @@ ENTRY(omap34xx_sram_configure_core_dpll)
mov r0, #0  @ return value
ldmfd   sp!, {r1-r12, pc}   @ restore regs and return
 unlock_dll:
-   ldr r4, sdrc_dlla_ctrl
-   ldr r5, [r4]
+   ldr r4, omap34xx_sdrc_dlla_ctrl
+   ldr r5, [r4]
orr r5, r5, #0x4
str r5, [r4]
bx  lr
 lock_dll:
-   ldr r4, sdrc_dlla_ctrl
-   ldr r5, [r4]
+   ldr r4, omap34xx_sdrc_dlla_ctrl
+   ldr r5, [r4]
bic r5, r5, #0x4
-   str r5, [r4]
-   bx  lr
+   str r5, [r4]
+   bx  lr
 sdram_in_selfrefresh:
mov r5, #0x0@ Move 0 to R5
-   mcr p15, 0, r5, c7, c10, 5  @ memory barrier
-   ldr r4, sdrc_power  @ read the SDRC_POWER register
-   ldr r5, [r4]@ read the contents of SDRC_POWER
+   mcr p15, 0, r5, c7, c10, 5  @ memory barrier
+   ldr r4, omap34xx_sdrc_power @ read the SDRC_POWER register
+   ldr r5, [r4]@ read the contents of SDRC_POWER
orr r5, r5, #0x40   @ enable self refresh on idle req
str r5, [r4]@ write back to SDRC_POWER register
-   ldr r4, cm_iclken1_core @ read the CM_ICLKEN1_CORE reg
+   ldr r4, omap34xx_cm_iclken1_core@ read the CM_ICLKEN1_CORE reg
ldr r5, [r4]
bic r5, r5, #0x2@ disable iclk bit for SRDC
str r5, [r4]
 wait_sdrc_idle:
-   ldr r4, cm_idlest1_core
+   ldr r4, omap34xx_cm_idlest1_core
ldr r5, [r4]
and r5, r5, #0x2@ check for SDRC idle
cmp r5, #2
bne wait_sdrc_idle
bx  lr
 configure_core_dpll:
-   ldr r4, cm_clksel1_pll
+   ldr r4, omap34xx_cm_clksel1_pll
ldr r5, [r4]
ldr r6, core_m2_mask_val@ modify m2 for core dpll
and r5, r5, r6
@@ -145,61 +136,62 @@ wait_clk_stable:
nop
bx  lr
 enable_sdrc:
-   ldr r4, cm_iclken1_core
+   ldr r4, omap34xx_cm_iclken1_core
ldr r5, [r4]
orr r5, r5, #0x2@ enable iclk bit for SDRC
str r5, [r4]
 wait_sdrc_idle1:
-   ldr r4, cm_idlest1_core
+   ldr r4, omap34xx_cm_idlest1_core
ldr r5, [r4]
and r5, r5, #0x2
cmp r5, #0
bne wait_sdrc_idle1
-   ldr r4, sdrc_power
+   ldr r4, omap34xx_sdrc_power
ldr r5, [r4]
bic r5, r5, #0x40
str r5, [r4]
bx  lr
 wait_dll_lock:
-   ldr r4, sdrc_dlla_status
+   ldr r4, omap34xx_sdrc_dlla_status
ldr r5, [r4]
and r5, r5, #0x4
cmp r5, #0x4
bne wait_dll_lock
bx  lr
 wait_dll_unlock:
-   ldr r4, sdrc_dlla_status
-   ldr r5, [r4]
-   and r5, r5, #0x4
-   cmp r5, #0x0
-   bne wait_dll_unlock
-   bx  lr
+   ldr r4, omap34xx_sdrc_dlla_status
+   ldr r5, [r4]
+   and r5, r5, #0x4
+   cmp r5, #0x0
+   bne wait_dll_unlock
+   bx  lr
 configure_sdrc:
-   ldr r4, sdrc_rf

[PATCH] I2C: Fix twl4030 timeouts on omap3430

2008-03-28 Thread Tony Lindgren
For some reason doing a twl4030 write-read cycle can hang the I2C bus
on omap3430. And doing the write and read separately in twl4030_i2c_read()
seems to fix the problem...

Not intended for applying, just a temporary workaround.

diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
index ded86e7..62868b0 100644
--- a/drivers/i2c/chips/twl4030-core.c
+++ b/drivers/i2c/chips/twl4030-core.c
@@ -327,6 +327,7 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 
num_bytes)
return -EPERM;
}
mutex_lock(&twl->xfer_lock);
+
/* [MSG1] fill the register address data */
msg = &twl->xfer_msg[0];
msg->addr = twl->address;
@@ -334,18 +335,25 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 
num_bytes)
msg->flags = 0; /* Read the register value */
val = twl4030_map[mod_no].base + reg;
msg->buf = &val;
+   ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
+   if (ret < 0)
+   goto out;
+ 
/* [MSG2] fill the data rx buffer */
msg = &twl->xfer_msg[1];
msg->addr = twl->address;
msg->flags = I2C_M_RD;  /* Read the register value */
msg->len = num_bytes;   /* only n bytes */
msg->buf = value;
-   ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 2);
+   ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
+
+out:
mutex_unlock(&twl->xfer_lock);
 
/* i2cTransfer returns num messages.translate it pls.. */
if (ret >= 0)
ret = 0;
+
return ret;
 }
 
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[PATCH 0/2] Add sram34xx.S

2008-03-28 Thread Tony Lindgren
Hi all,

Following two patches add sram34xx.S based on Karthik's patch and what's
at [1]. Looks like the sram code in [1] is newer so I've used that.
Let me know if that's not the case.

Karthik, can you please check and ack? I've only compile tested them.

Regards,

Tony

[1] http://linux.omap.com/pub/kernel/3430zoom/linux-ldp-v1.0b.tar.gz
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[PATCH 1/2] ARM: OMAP3: Add 34xx SRAM functions

2008-03-28 Thread Tony Lindgren
This adds sram34xx.S From TI CDP.

NOTE: This patch breaks compile for 34xx, the compile will be fixed in
the next patch. This and next patch will eventually get merged into
a single patch for linux-omap to keep git-bisect working.
---
 arch/arm/mach-omap2/Makefile   |1 +
 arch/arm/mach-omap2/sram34xx.S |  217 
 2 files changed, 218 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/sram34xx.S

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 45f4b4e..0a6df8e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,6 +8,7 @@ obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o 
mux.o \
 
 # Functions loaded to SRAM
 obj-$(CONFIG_ARCH_OMAP2)   += sram24xx.o
+obj-$(CONFIG_ARCH_OMAP3)   += sram34xx.o
 
 # Power Management
 obj-$(CONFIG_PM) += pm.o sleep.o
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
new file mode 100644
index 000..803f60d
--- /dev/null
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -0,0 +1,217 @@
+/*
+ * linux/arch/arm/mach-omap3/sram.S
+ *
+ * Omap3 specific functions that need to be run in internal SRAM
+ *
+ * (C) Copyright 2007
+ * Texas Instruments Inc.
+ * Rajendra Nayak <[EMAIL PROTECTED]>
+ *
+ * (C) Copyright 2004
+ * Texas Instruments, 
+ * Richard Woodruff <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include "prcm-regs.h"
+
+#define CM_CLKSEL1_PLL_V   IO_ADDRESS(CM_BASE + 0xD40)
+#defineCM_ICLKEN1_CORE_V   IO_ADDRESS(CM_BASE + 0xA10)
+#define CM_IDLEST1_CORE_V  IO_ADDRESS(CM_BASE + 0xA20)
+
+#defineSDRC_POWER_VIO_ADDRESS(SDRC_BASE + 0x070)
+#define SDRC_RFR_CTRL  IO_ADDRESS(SDRC_BASE + 0x0A4)
+#define SDRC_ACTIM_CTRL_A  IO_ADDRESS(SDRC_BASE + 0x09C)
+#defineSDRC_ACTIM_CTRL_B   IO_ADDRESS(SDRC_BASE + 0x0A0)
+#defineSDRC_DLLA_STATUSIO_ADDRESS(SDRC_BASE + 0x064)
+#defineSDRC_DLLA_CTRL  IO_ADDRESS(SDRC_BASE + 0x060)
+
+   .text
+
+ENTRY(omap34xx_sram_ddr_init)
+   stmfd   sp!, {r0 - r12, lr} @ save registers on stack
+   ldmfd   sp!, {r0 - r12, pc} @ restore regs and return
+ENTRY(omap34xx_sram_ddr_init_sz)
+   .word   . - omap34xx_sram_ddr_init
+
+ENTRY(omap34xx_sram_reprogram_sdrc)
+   stmfd   sp!, {r0 - r10, lr} @ save registers on stack
+   ldmfd   sp!, {r0 - r10, pc} @ restore regs and return
+ENTRY(omap34xx_sram_reprogram_sdrc_sz)
+   .word   . - omap34xx_sram_reprogram_sdrc
+
+/*
+ * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
+ */
+ENTRY(omap34xx_sram_set_prcm)
+   stmfd   sp!, {r0-r12, lr}   @ regs to stack
+ENTRY(omap34xx_sram_set_prcm_sz)
+   .word   . - omap34xx_sram_set_prcm
+
+/*
+ * Change frequency of core dpll
+ * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla  r2 = sdrc_actim_ctrlb r3 = M2
+ */
+ENTRY(omap34xx_sram_configure_core_dpll)
+   stmfd   sp!, {r1-r12, lr}   @ store regs to stack
+   cmp r3, #0x2
+   blneconfigure_sdrc
+   cmp r3, #0x2
+   blnelock_dll
+   cmp r3, #0x1
+   blneunlock_dll
+   bl  sdram_in_selfrefresh@ put the SDRAM in self refresh
+   bl  configure_core_dpll
+   bl  enable_sdrc
+   cmp r3, #0x1
+   blnewait_dll_unlock
+   cmp r3, #0x2
+   blnewait_dll_lock
+   cmp r3, #0x1
+   blneconfigure_sdrc
+   mov r0, #0  @ return value
+   ldmfd   sp!, {r1-r12, pc}   @ restore regs and return
+unlock_dll:
+   ldr r4, sdrc_dlla_ctrl
+   ldr r5, [r4]
+   orr r5, r5, #0x4
+   str r5, [r4]
+   bx  lr
+lock_dll:
+   ldr r4, sdrc_dlla_ctrl
+   ldr r5, [r4]
+   bic r5, r5, #0x4
+   str r5, [r4]
+   bx  lr
+sdram_in_selfrefresh:
+   mov r5, #0x0@ Move 0 to R5
+   mcr p15, 0, r5, c7, c10, 5  @ memory barrier
+   ldr r4, sdrc_power  @ read the SDRC_POWER register
+   ldr r5, [r4]@ read the contents of SDRC_POWER
+   orr r5, r5, #0x40   @ enable 

Re: [PATCH] Keymap fix for palmte and palmz71.

2008-03-28 Thread Tony Lindgren
* andrzej zaborowski <[EMAIL PROTECTED]> [080328 13:40]:
> On 28/03/2008, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> > * Eduardo Valentin <[EMAIL PROTECTED]> [080327 21:16]:
> >  > It may  disappeared in a merge. However, this patch was based on:
> >  > 
> > http://linux.omap.com/pipermail/linux-omap-open-source/2007-August/011225.html
> >  >
> >  > That's why I thought the remotion was intended.
> >
> >
> > Andrzej, can you please check this? If patching for the input.h is
> >  needed, we should get it merged via LKML.
> 
> I think Eduardo's fix is the way to go regardless of what happened
> with KEY_CENTER.  I was only wondering why there was this change in
> input.h and why it wouldn't appear in gitweb.  I didn't realise that
> that key code was local to omap tree.

Thanks, will push Eduardo's patch today.

Tony
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Re: [PATCH] i2c: tea5761: New-style i2c driver

2008-03-28 Thread Jarkko Nikula
On Thu, 27 Mar 2008 11:31:20 -0400
"ext Eduardo Valentin" <[EMAIL PROTECTED]> wrote:

> From: Eduardo Valentin <[EMAIL PROTECTED]>
> 
> This patch updates the fm radio driver for tea5761 chip.
> It also moves board dependent code to its correct board
> file place.
> 
Good move forward!

Any plans to send this driver with Kconfig & Makefile modifications to
relevant V4L etc mailing list?

Note there are three minor warnings if you run your patch with
scripts/checkpatch.pl.

You could also remove these two headers files below since they are not
needed anymore.

> diff --git a/drivers/media/radio/radio-tea5761.c
> b/drivers/media/radio/radio-tea5761.c index ac0f621..2341e66 100644
> --- a/drivers/media/radio/radio-tea5761.c
> +++ b/drivers/media/radio/radio-tea5761.c
@@ -23,8 +23,8 @@
 #include 
 #include 
 #include 
-#include 
-#include 


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Re: [PATCH] Keymap fix for palmte and palmz71.

2008-03-28 Thread andrzej zaborowski
On 28/03/2008, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> * Eduardo Valentin <[EMAIL PROTECTED]> [080327 21:16]:
>  > It may  disappeared in a merge. However, this patch was based on:
>  > 
> http://linux.omap.com/pipermail/linux-omap-open-source/2007-August/011225.html
>  >
>  > That's why I thought the remotion was intended.
>
>
> Andrzej, can you please check this? If patching for the input.h is
>  needed, we should get it merged via LKML.

I think Eduardo's fix is the way to go regardless of what happened
with KEY_CENTER.  I was only wondering why there was this change in
input.h and why it wouldn't appear in gitweb.  I didn't realise that
that key code was local to omap tree.

Cheers
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Re: [PATCH] ARM: OMAP: Update Nokia N800 defconfig

2008-03-28 Thread Tony Lindgren
* Jarkko Nikula <[EMAIL PROTECTED]> [080328 13:01]:
> This is just "make n800_defconfig" with following manual changes:
> 
> - # CONFIG_DAB is not set (we don't have such a HW...)
> + CONFIG_RADIO_TEA5761=y
> + CONFIG_CBUS_RETU_HEADSET=y

Pushing today.

Tony

> 
> Signed-off-by: Jarkko Nikula <[EMAIL PROTECTED]>
> ---
>  arch/arm/configs/n800_defconfig |  156 
> +++
>  1 files changed, 124 insertions(+), 32 deletions(-)
> 
> diff --git a/arch/arm/configs/n800_defconfig b/arch/arm/configs/n800_defconfig
> index 4dac8bd..ea687ff 100644
> --- a/arch/arm/configs/n800_defconfig
> +++ b/arch/arm/configs/n800_defconfig
> @@ -1,7 +1,7 @@
>  #
>  # Automatically generated make config: don't edit
> -# Linux kernel version: 2.6.24-omap1
> -# Fri Jan 25 10:16:40 2008
> +# Linux kernel version: 2.6.25-rc6-omap1
> +# Fri Mar 28 10:53:25 2008
>  #
>  CONFIG_ARM=y
>  CONFIG_SYS_SUPPORTS_APM_EMULATION=y
> @@ -21,6 +21,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
>  # CONFIG_ARCH_HAS_ILOG2_U64 is not set
>  CONFIG_GENERIC_HWEIGHT=y
>  CONFIG_GENERIC_CALIBRATE_DELAY=y
> +CONFIG_ARCH_SUPPORTS_AOUT=y
>  CONFIG_ZONE_DMA=y
>  CONFIG_VECTORS_BASE=0x
>  CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> @@ -39,17 +40,23 @@ CONFIG_SYSVIPC_SYSCTL=y
>  CONFIG_POSIX_MQUEUE=y
>  # CONFIG_BSD_PROCESS_ACCT is not set
>  # CONFIG_TASKSTATS is not set
> -# CONFIG_USER_NS is not set
> -# CONFIG_PID_NS is not set
>  # CONFIG_AUDIT is not set
>  # CONFIG_IKCONFIG is not set
>  CONFIG_LOG_BUF_SHIFT=14
>  # CONFIG_CGROUPS is not set
> +CONFIG_GROUP_SCHED=y
>  CONFIG_FAIR_GROUP_SCHED=y
> -CONFIG_FAIR_USER_SCHED=y
> -# CONFIG_FAIR_CGROUP_SCHED is not set
> +# CONFIG_RT_GROUP_SCHED is not set
> +CONFIG_USER_SCHED=y
> +# CONFIG_CGROUP_SCHED is not set
>  CONFIG_SYSFS_DEPRECATED=y
> +CONFIG_SYSFS_DEPRECATED_V2=y
>  # CONFIG_RELAY is not set
> +CONFIG_NAMESPACES=y
> +# CONFIG_UTS_NS is not set
> +# CONFIG_IPC_NS is not set
> +# CONFIG_USER_NS is not set
> +# CONFIG_PID_NS is not set
>  CONFIG_BLK_DEV_INITRD=y
>  CONFIG_INITRAMFS_SOURCE=""
>  CONFIG_CC_OPTIMIZE_FOR_SIZE=y
> @@ -64,17 +71,26 @@ CONFIG_HOTPLUG=y
>  CONFIG_PRINTK=y
>  CONFIG_BUG=y
>  CONFIG_ELF_CORE=y
> +CONFIG_COMPAT_BRK=y
>  CONFIG_BASE_FULL=y
>  CONFIG_FUTEX=y
>  CONFIG_ANON_INODES=y
>  CONFIG_EPOLL=y
>  CONFIG_SIGNALFD=y
> +CONFIG_TIMERFD=y
>  CONFIG_EVENTFD=y
>  CONFIG_SHMEM=y
>  CONFIG_VM_EVENT_COUNTERS=y
>  CONFIG_SLAB=y
>  # CONFIG_SLUB is not set
>  # CONFIG_SLOB is not set
> +# CONFIG_PROFILING is not set
> +# CONFIG_MARKERS is not set
> +CONFIG_HAVE_OPROFILE=y
> +# CONFIG_KPROBES is not set
> +CONFIG_HAVE_KPROBES=y
> +CONFIG_HAVE_KRETPROBES=y
> +CONFIG_PROC_PAGE_MONITOR=y
>  CONFIG_SLABINFO=y
>  CONFIG_RT_MUTEXES=y
>  # CONFIG_TINY_SHMEM is not set
> @@ -103,6 +119,7 @@ CONFIG_IOSCHED_NOOP=y
>  # CONFIG_DEFAULT_CFQ is not set
>  CONFIG_DEFAULT_NOOP=y
>  CONFIG_DEFAULT_IOSCHED="noop"
> +CONFIG_CLASSIC_RCU=y
>  
>  #
>  # System Type
> @@ -131,6 +148,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
>  # CONFIG_ARCH_KS8695 is not set
>  # CONFIG_ARCH_NS9XXX is not set
>  # CONFIG_ARCH_MXC is not set
> +# CONFIG_ARCH_ORION is not set
>  # CONFIG_ARCH_PNX4008 is not set
>  # CONFIG_ARCH_PXA is not set
>  # CONFIG_ARCH_RPC is not set
> @@ -140,6 +158,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
>  # CONFIG_ARCH_LH7A40X is not set
>  # CONFIG_ARCH_DAVINCI is not set
>  CONFIG_ARCH_OMAP=y
> +# CONFIG_ARCH_MSM7X00A is not set
>  
>  #
>  # TI OMAP Implementations
> @@ -159,8 +178,6 @@ CONFIG_OMAP_BOOT_REASON=y
>  CONFIG_OMAP_COMPONENT_VERSION=y
>  CONFIG_OMAP_GPIO_SWITCH=y
>  # CONFIG_OMAP_MUX is not set
> -CONFIG_OMAP_STI=y
> -CONFIG_OMAP_STI_CONSOLE=y
>  # CONFIG_OMAP_MCBSP is not set
>  CONFIG_OMAP_MMU_FWK=y
>  CONFIG_OMAP_MBOX_FWK=y
> @@ -188,7 +205,6 @@ CONFIG_MACH_NOKIA_N810=y
>  CONFIG_MACH_OMAP2_TUSB6010=y
>  # CONFIG_MACH_OMAP_H4 is not set
>  # CONFIG_MACH_OMAP_APOLLON is not set
> -# CONFIG_MACH_OMAP_APOLLON_PLUS is not set
>  # CONFIG_MACH_OMAP_2430OSK is not set
>  
>  #
> @@ -301,9 +317,10 @@ CONFIG_PM=y
>  # CONFIG_PM_LEGACY is not set
>  # CONFIG_PM_DEBUG is not set
>  CONFIG_PM_SLEEP=y
> -CONFIG_SUSPEND_UP_POSSIBLE=y
>  CONFIG_SUSPEND=y
> +CONFIG_SUSPEND_FREEZER=y
>  # CONFIG_APM_EMULATION is not set
> +CONFIG_ARCH_SUSPEND_POSSIBLE=y
>  
>  #
>  # Networking
> @@ -320,6 +337,7 @@ CONFIG_XFRM=y
>  # CONFIG_XFRM_USER is not set
>  # CONFIG_XFRM_SUB_POLICY is not set
>  # CONFIG_XFRM_MIGRATE is not set
> +# CONFIG_XFRM_STATISTICS is not set
>  # CONFIG_NET_KEY is not set
>  CONFIG_INET=y
>  CONFIG_IP_MULTICAST=y
> @@ -354,33 +372,36 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
>  # CONFIG_NETWORK_SECMARK is not set
>  CONFIG_NETFILTER=y
>  # CONFIG_NETFILTER_DEBUG is not set
> +CONFIG_NETFILTER_ADVANCED=y
>  
>  #
>  # Core Netfilter Configuration
>  #
> -CONFIG_NETFILTER_NETLINK=y
>  # CONFIG_NETFILTER_NETLINK_QUEUE is not set
>  # CONFIG_NETFILTER_NETLINK_LOG is not set
> -# CONFIG_NF_CONNTRACK_ENABLED is not set
>  # CONFIG_NF_CONNTRACK is not set
>  CONF

[PATCH] ARM: OMAP: Update Nokia N800 defconfig

2008-03-28 Thread Jarkko Nikula
This is just "make n800_defconfig" with following manual changes:

- # CONFIG_DAB is not set (we don't have such a HW...)
+ CONFIG_RADIO_TEA5761=y
+ CONFIG_CBUS_RETU_HEADSET=y

Signed-off-by: Jarkko Nikula <[EMAIL PROTECTED]>
---
 arch/arm/configs/n800_defconfig |  156 +++
 1 files changed, 124 insertions(+), 32 deletions(-)

diff --git a/arch/arm/configs/n800_defconfig b/arch/arm/configs/n800_defconfig
index 4dac8bd..ea687ff 100644
--- a/arch/arm/configs/n800_defconfig
+++ b/arch/arm/configs/n800_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-omap1
-# Fri Jan 25 10:16:40 2008
+# Linux kernel version: 2.6.25-rc6-omap1
+# Fri Mar 28 10:53:25 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -21,6 +21,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
 CONFIG_ZONE_DMA=y
 CONFIG_VECTORS_BASE=0x
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -39,17 +40,23 @@ CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -64,17 +71,26 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
@@ -103,6 +119,7 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
 
 #
 # System Type
@@ -131,6 +148,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -140,6 +158,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 CONFIG_ARCH_OMAP=y
+# CONFIG_ARCH_MSM7X00A is not set
 
 #
 # TI OMAP Implementations
@@ -159,8 +178,6 @@ CONFIG_OMAP_BOOT_REASON=y
 CONFIG_OMAP_COMPONENT_VERSION=y
 CONFIG_OMAP_GPIO_SWITCH=y
 # CONFIG_OMAP_MUX is not set
-CONFIG_OMAP_STI=y
-CONFIG_OMAP_STI_CONSOLE=y
 # CONFIG_OMAP_MCBSP is not set
 CONFIG_OMAP_MMU_FWK=y
 CONFIG_OMAP_MBOX_FWK=y
@@ -188,7 +205,6 @@ CONFIG_MACH_NOKIA_N810=y
 CONFIG_MACH_OMAP2_TUSB6010=y
 # CONFIG_MACH_OMAP_H4 is not set
 # CONFIG_MACH_OMAP_APOLLON is not set
-# CONFIG_MACH_OMAP_APOLLON_PLUS is not set
 # CONFIG_MACH_OMAP_2430OSK is not set
 
 #
@@ -301,9 +317,10 @@ CONFIG_PM=y
 # CONFIG_PM_LEGACY is not set
 # CONFIG_PM_DEBUG is not set
 CONFIG_PM_SLEEP=y
-CONFIG_SUSPEND_UP_POSSIBLE=y
 CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 
 #
 # Networking
@@ -320,6 +337,7 @@ CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
@@ -354,33 +372,36 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETWORK_SECMARK is not set
 CONFIG_NETFILTER=y
 # CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
 
 #
 # Core Netfilter Configuration
 #
-CONFIG_NETFILTER_NETLINK=y
 # CONFIG_NETFILTER_NETLINK_QUEUE is not set
 # CONFIG_NETFILTER_NETLINK_LOG is not set
-# CONFIG_NF_CONNTRACK_ENABLED is not set
 # CONFIG_NF_CONNTRACK is not set
 CONFIG_NETFILTER_XTABLES=y
 # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
 # CONFIG_NETFILTER_XT_TARGET_MARK is not set
 # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
 # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
 # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
 # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
 

Re: [PATCH] I2C: Fix OMAP I2C status register handling in IRQ processing

2008-03-28 Thread Tony Lindgren
* Seth Forshee <[EMAIL PROTECTED]> [080318 05:39]:
> On Wed, Mar 12, 2008 at 12:56:10PM -0500, Seth Forshee wrote:
> > The IRQ handler in omap-i2c.c can sometimes clear status bits without
> > actually processing them.  In particular, error status bits will be
> > ignored if any of the ARDY, RRDY, RDR, XRDY, or XDR bits are
> > concurrently set.
> 
> Are there any more comments on the patch below?  If there is a problem
> with style or implementation details I will fix them and submit a new
> patch, as long as the functionality isn't affected as with the
> previous comments.  But it is possible for the error status bits to go
> unhandled and unreported (in fact it always happens for me with any
> address for which there is no slave present on a given bus), so I would
> think that it would be desirable to get a fix applied.

Pushing today.

Tony

> 
> Cheers,
> Seth
> 
> > 
> > Signed-off-by: Seth Forshee <[EMAIL PROTECTED]>
> > ---
> > 
> > More information:
> > 
> > I originally noticed this problem on a custom 2430 board I am working
> > with.  Whenever an i2c chip driver calls i2c_probe() the device would
> > be found on both i2c busses at each of the possible addresses for the
> > device.  I discovered that NACK was being set in the status register
> > but omap_i2c_xfer() still returned success because ARDY was also set.
> > 
> > This patch fixes this issue on my board and hasn't caused any problems
> > (in my admittedly light i2c usage).  I don't have immediate access to
> > an SDP board however, so it has not been tested on that platform.
> > 
> >  drivers/i2c/busses/i2c-omap.c |   28 +---
> >  1 files changed, 13 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> > index 4777466..a16d513 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -590,7 +590,7 @@ omap_i2c_isr(int this_irq, void *dev_id)
> > struct omap_i2c_dev *dev = dev_id;
> > u16 bits;
> > u16 stat, w;
> > -   int count = 0;
> > +   int err, count = 0;
> >  
> > if (dev->idle)
> > return IRQ_NONE;
> > @@ -605,10 +605,19 @@ omap_i2c_isr(int this_irq, void *dev_id)
> >  
> > omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
> >  
> > -   if (stat & OMAP_I2C_STAT_ARDY) {
> > -   omap_i2c_complete_cmd(dev, 0);
> > -   continue;
> > +   err = 0;
> > +   if (stat & OMAP_I2C_STAT_NACK) {
> > +   err |= OMAP_I2C_STAT_NACK;
> > +   omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
> > +  OMAP_I2C_CON_STP);
> > }
> > +   if (stat & OMAP_I2C_STAT_AL) {
> > +   dev_err(dev->dev, "Arbitration lost\n");
> > +   err |= OMAP_I2C_STAT_AL;
> > +   }
> > +   if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
> > +   OMAP_I2C_STAT_AL))
> > +   omap_i2c_complete_cmd(dev, err);
> > if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
> > u8 num_bytes = 1;
> > if (dev->fifo_size) {
> > @@ -640,7 +649,6 @@ omap_i2c_isr(int this_irq, void *dev_id)
> > }
> > }
> > omap_i2c_ack_stat(dev, stat & (OMAP_I2C_STAT_RRDY | 
> > OMAP_I2C_STAT_RDR));
> > -   continue;
> > }
> > if (stat & (OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)) {
> > u8 num_bytes = 1;
> > @@ -674,7 +682,6 @@ omap_i2c_isr(int this_irq, void *dev_id)
> > omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w);
> > }
> > omap_i2c_ack_stat(dev, stat & (OMAP_I2C_STAT_XRDY | 
> > OMAP_I2C_STAT_XDR));
> > -   continue;
> > }
> > if (stat & OMAP_I2C_STAT_ROVR) {
> > dev_err(dev->dev, "Receive overrun\n");
> > @@ -684,15 +691,6 @@ omap_i2c_isr(int this_irq, void *dev_id)
> > dev_err(dev->dev, "Transmit overflow\n");
> > dev->cmd_err |= OMAP_I2C_STAT_XUDF;
> > }
> > -   if (stat & OMAP_I2C_STAT_NACK) {
> > -   omap_i2c_complete_cmd(dev, OMAP_I2C_STAT_NACK);
> > -   omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
> > -  OMAP_I2C_CON_STP);
> > -   }
> > -   if (stat & OMAP_I2C_STAT_AL) {
> > -   dev_err(dev->dev, "Arbitration lost\n");
> > -   omap_i2c_complete_cmd(dev, OMAP_I2C_STAT_AL);
> > -   }
> > }
> >  
> > return count ? IRQ_HANDLED : IRQ_NONE;
> > -- 
> > 1.5.2.5
> > 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [EMAIL PROTECTED]
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Re: [PATCH] Keymap fix for palmte and palmz71.

2008-03-28 Thread Tony Lindgren
* Eduardo Valentin <[EMAIL PROTECTED]> [080327 21:16]:
> Hi andrzej,
> 
> It may  disappeared in a merge. However, this patch was based on:
> http://linux.omap.com/pipermail/linux-omap-open-source/2007-August/011225.html
> 
> That's why I thought the remotion was intended.

Andrzej, can you please check this? If patching for the input.h is
needed, we should get it merged via LKML.

Tony

> 
> 
> Cheers,
> 
> 
> On Thu, Mar 27, 2008 at 1:48 PM, andrzej zaborowski <[EMAIL PROTECTED]> wrote:
> > Hi,
> >
> >
> >  On 27/03/2008, Eduardo Valentin <[EMAIL PROTECTED]> wrote:
> >  > From: Eduardo Valentin <[EMAIL PROTECTED]>
> >  >
> >  >  Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
> >  >  ---
> >  >   arch/arm/mach-omap1/board-palmte.c  |2 +-
> >  >   arch/arm/mach-omap1/board-palmz71.c |2 +-
> >  >   2 files changed, 2 insertions(+), 2 deletions(-)
> >  >
> >  >  diff --git a/arch/arm/mach-omap1/board-palmte.c 
> > b/arch/arm/mach-omap1/board-palmte.c
> >  >  index 63c3131..f4860b0 100644
> >  >  --- a/arch/arm/mach-omap1/board-palmte.c
> >  >  +++ b/arch/arm/mach-omap1/board-palmte.c
> >  >  @@ -64,7 +64,7 @@ static const int palmte_keymap[] = {
> >  > KEY(1, 1, KEY_DOWN),
> >  > KEY(1, 2, KEY_UP),
> >  > KEY(1, 3, KEY_RIGHT),
> >  >  -   KEY(1, 4, KEY_CENTER),
> >  >  +   KEY(1, 4, KEY_ENTER),
> >
> >  I'm not sure if the disappearance of KEY_CENTER in
> >  include/linux/input.h was intended or accidental. I can't find the
> >  exact commitdiff that removed it, in either gitweb or gitview. It can
> >  be seen in gitweb that the tree in this commit still has it (after a
> >  bit merge) 
> > http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=dd1d9a62f7cd60b544013eb429d6a3137617f0b2
> >  and the following commit:
> >  
> > http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=5517853712f1f6daac8a7b2590f9b821e767aa13
> >  has no KEY_CENTER. Is that a merge conflict?
> >  --
> >  Please do not print this email unless absolutely necessary. Spread
> >  environmental awareness.
> >
> 
> 
> 
> -- 
> Eduardo Bezerra Valentin
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [EMAIL PROTECTED]
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Re: [PATCH] OMAP: MMU_FWK: Changed Kconfig entry from tristate to bool.

2008-03-28 Thread Tony Lindgren
* Eduardo Valentin <[EMAIL PROTECTED]> [080326 16:49]:
> From: Eduardo Valentin <[EMAIL PROTECTED]>
> 
> As this code uses unexported symbols, it must be always
> built-in. For this reason, a better type of its Kconfig entry
> is bool.
> 
> Fixed also defconfig which sets this entry as module.
> 
> Compile test only.

Pushing today.

Tony

> Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
> ---
>  arch/arm/configs/ams_delta_defconfig |2 +-
>  arch/arm/plat-omap/Kconfig   |2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/configs/ams_delta_defconfig 
> b/arch/arm/configs/ams_delta_defconfig
> index a6b77ab..2c4aa11 100644
> --- a/arch/arm/configs/ams_delta_defconfig
> +++ b/arch/arm/configs/ams_delta_defconfig
> @@ -164,7 +164,7 @@ CONFIG_OMAP_MUX=y
>  # CONFIG_OMAP_MUX_DEBUG is not set
>  CONFIG_OMAP_MUX_WARNINGS=y
>  CONFIG_OMAP_MCBSP=y
> -CONFIG_OMAP_MMU_FWK=m
> +CONFIG_OMAP_MMU_FWK=y
>  CONFIG_OMAP_MBOX_FWK=m
>  CONFIG_OMAP_MPU_TIMER=y
>  # CONFIG_OMAP_32K_TIMER is not set
> diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
> index 50291ed..536f8aa 100644
> --- a/arch/arm/plat-omap/Kconfig
> +++ b/arch/arm/plat-omap/Kconfig
> @@ -122,7 +122,7 @@ config OMAP_MCBSP
> Buffered Serial Port.
>  
>  config OMAP_MMU_FWK
> - tristate "MMU framework support"
> + bool "MMU framework support"
>   depends on ARCH_OMAP
>   default n
>   help
> -- 
> 1.5.4.2
> 
> --
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Re: [PATCH] OMAPFB: Check in suspend/resume if framebuffer device is initialized.

2008-03-28 Thread Tony Lindgren
* Jouni Högander <[EMAIL PROTECTED]> [080326 13:59]:
> Check wether fbdev is NULL in suspend / resume functions. Fbdev is
> NULL, if there is no lcd or it is not enabled in configuration.

This one is missing Signed-off-by also.

Tony

> ---
>  drivers/video/omap/omapfb_main.c |7 ---
>  1 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/video/omap/omapfb_main.c 
> b/drivers/video/omap/omapfb_main.c
> index f66b81a..139c84c 100644
> --- a/drivers/video/omap/omapfb_main.c
> +++ b/drivers/video/omap/omapfb_main.c
> @@ -1839,8 +1839,8 @@ static int omapfb_suspend(struct platform_device *pdev, 
> pm_message_t mesg)
>  {
>   struct omapfb_device *fbdev = platform_get_drvdata(pdev);
>  
> - omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
> -
> + if (fbdev != NULL)
> + omapfb_blank(VESA_POWERDOWN, fbdev->fb_info[0]);
>   return 0;
>  }
>  
> @@ -1849,7 +1849,8 @@ static int omapfb_resume(struct platform_device *pdev)
>  {
>   struct omapfb_device *fbdev = platform_get_drvdata(pdev);
>  
> - omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
> + if (fbdev != NULL)
> + omapfb_blank(VESA_NO_BLANKING, fbdev->fb_info[0]);
>   return 0;
>  }
>  
> -- 
> 1.5.3.5
> 
> --
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Re: [PATCH] 34XX: Fix to use correct shift values for gpio2-6 fclks

2008-03-28 Thread Tony Lindgren
* Paul Walmsley <[EMAIL PROTECTED]> [080326 22:33]:
> On Wed, 26 Mar 2008, Jouni Högander wrote:
> 
> > Wrong shift values were used for gpio2-6  fclks (gpt2-6 shift).
> > ---
> >  arch/arm/mach-omap2/clock34xx.h |   10 +-
> >  1 files changed, 5 insertions(+), 5 deletions(-)
> 
> Acked-by: Paul Walmsley <[EMAIL PROTECTED]> 
> 
> thanks Jouni,

Jouni, can you please repost with proper Signed-off-by?

Thanks,

Tony
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Re: [PATCH] OMAP: MMC: Add several missing line breaks.

2008-03-28 Thread Tony Lindgren
* Eduardo Valentin <[EMAIL PROTECTED]> [080326 20:19]:
> Hi Balbi,
> 
> On Wed, Mar 26, 2008 at 1:39 PM, Felipe Balbi <[EMAIL PROTECTED]> wrote:
> > On Wed, Mar 26, 2008 at 11:33:45AM -0400, Eduardo Valentin wrote:
> >  > From: Felipe Balbi <[EMAIL PROTECTED]>
> >  >
> >  > Misc clean up in omap_hsmmc.c to beautify debugging output.
> >  >
> >  > Signed-off-by: Felipe Balbi <[EMAIL PROTECTED]>
> >
> >  Here you should put what you changed just to ease the comparisson :-)
> 
> That's true. But the change was just to remove part of your patch that 
> modified
> something that was already removed. And it still keeps adding missing
> line breaks :-).
> 
> >  But ok... thanks for checking it :-)

Pushing today.

Tony


> >
> >
> >
> >  > Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
> >  > ---
> >  >  drivers/mmc/host/omap_hsmmc.c |   14 +++---
> >  >  1 files changed, 7 insertions(+), 7 deletions(-)
> >  >
> >  > diff --git a/drivers/mmc/host/omap_hsmmc.c 
> > b/drivers/mmc/host/omap_hsmmc.c
> >  > index 3d4a7d1..70f6895 100644
> >  > --- a/drivers/mmc/host/omap_hsmmc.c
> >  > +++ b/drivers/mmc/host/omap_hsmmc.c
> >  > @@ -146,7 +146,7 @@ static void omap_mmc_stop_clock(struct mmc_omap_host 
> > *host)
> >  >   OMAP_HSMMC_WRITE(host->base, SYSCTL,
> >  >   OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN);
> >  >   if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0)
> >  > - dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped");
> >  > + dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n");
> >  >  }
> >  >
> >  >  /*
> >  > @@ -401,7 +401,7 @@ static int omap_mmc_switch_opcond(struct 
> > mmc_omap_host *host, int vdd)
> >  >
> >  >   return 0;
> >  >  err:
> >  > - dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage 
> > \n");
> >  > + dev_dbg(mmc_dev(host->mmc), "Unable to switch operating 
> > voltage\n");
> >  >   return ret;
> >  >  }
> >  >
> >  > @@ -760,11 +760,11 @@ static int __init omap_mmc_probe(struct 
> > platform_device *pdev)
> >  >* MMC can still work without debounce clock.
> >  >*/
> >  >   if (IS_ERR(host->dbclk))
> >  > - dev_dbg(mmc_dev(host->mmc), "Failed to get debounce clock 
> > \n");
> >  > + dev_dbg(mmc_dev(host->mmc), "Failed to get debounce 
> > clock\n");
> >  >   else
> >  >   if (clk_enable(host->dbclk) != 0)
> >  >   dev_dbg(mmc_dev(host->mmc), "Enabling debounce"
> >  > - "clk failed\n");
> >  > + " clk failed\n");
> >  >   else
> >  >   host->dbclk_enabled = 1;
> >  >
> >  > @@ -793,7 +793,7 @@ static int __init omap_mmc_probe(struct 
> > platform_device *pdev)
> >  >   ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 
> > pdev->name,
> >  >host);
> >  >   if (ret) {
> >  > - dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ");
> >  > + dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
> >  >   goto irq_err;
> >  >   }
> >  >
> >  > @@ -820,7 +820,7 @@ err:
> >  >   return ret;
> >  >
> >  >  irq_err:
> >  > - dev_dbg(mmc_dev(host->mmc), "Unable to configure MMC IRQs");
> >  > + dev_dbg(mmc_dev(host->mmc), "Unable to configure MMC IRQs\n");
> >  >   clk_disable(host->fclk);
> >  >   clk_disable(host->iclk);
> >  >   clk_put(host->fclk);
> >  > @@ -881,7 +881,7 @@ static int omap_mmc_suspend(struct platform_device 
> > *pdev, pm_message_t state)
> >  >   if (ret)
> >  >   dev_dbg(mmc_dev(host->mmc),
> >  >   "Unable to handle MMC board"
> >  > - "level suspend\n");
> >  > + " level suspend\n");
> >  >
> >  >   if (!(OMAP_HSMMC_READ(host->base, HCTL) & 
> > SDVSDET)) {
> >  >   OMAP_HSMMC_WRITE(host->base, HCTL,
> >  > --
> >  > 1.5.4.2
> >  >
> >  > --
> >  > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> >  > the body of a message to [EMAIL PROTECTED]
> >  > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >
> >  --
> >  Best Regards,
> >
> >  Felipe Balbi
> >  [EMAIL PROTECTED]
> >  http://blog.felipebalbi.com
> >
> 
> 
> 
> -- 
> Eduardo Bezerra Valentin
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Re: Unnecessary line in omapfb_main.c

2008-03-28 Thread Tony Lindgren
* arun c <[EMAIL PROTECTED]> [080325 11:11]:
> Hi all,
> 
> While grepping through the sources i found one unnecessary line in
> omapfb_main.c
> 
> The patch is pasted below.
> 
> diff --git a/drivers/video/omap/omapfb_main.c 
> b/drivers/video/omap/omapfb_main.c
> index f66b81a..07eb3f0 100644
> --- a/drivers/video/omap/omapfb_main.c
> +++ b/drivers/video/omap/omapfb_main.c
> @@ -559,7 +559,6 @@ static int set_fb_var(struct fb_info *fbi,
>   var->xoffset = var->xres_virtual - var->xres;
>   if (var->yres + var->yoffset > var->yres_virtual)
>   var->yoffset = var->yres_virtual - var->yres;
> - line_size = var->xres * bpp / 8;
> 
>   if (plane->color_mode == OMAPFB_COLOR_RGB444) {
>   var->red.offset   = 8; var->red.length   = 4;

Indeed looks like dead code as line_size is not used after that line
:) Can you please send the patch with proper Signed-off-by?

Thanks,

Tony
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Re: [PATCH 1/1] PLAT: OMAP: Add device configuration to support second HSMMC slot on OMAP 2430 and 3430 boards.

2008-03-28 Thread Tony Lindgren
* Seth Forshee <[EMAIL PROTECTED]> [080324 04:12]:
> On Thu, Mar 20, 2008 at 07:44:02PM -0500, Seth Forshee wrote:
> > Shouldn't you only register each device if enabled in the corresponding
> > configuration, i.e.:
> > 
> > if (mmc_conf->mmc[1].enabled)
> > (void) platform_device_register(&mmc_omap_device1);
> > if (mmc_conf->mmc[2].enabled)
> > (void) platform_device_register(&mmc_omap_device2);
> 
> Of course that should be 0 and 1, not 1 and 2.

This sounds like a valid comment to me, so not pushing.

Tony
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Re: [PATCH] Support for OMAP3 SDTI (Serial Debug Trace Interface).

2008-03-28 Thread Tony Lindgren
* Woodruff, Richard <[EMAIL PROTECTED]> [080325 16:22]:
> Hi,
> 
> > -Original Message-
> > From: [EMAIL PROTECTED] [mailto:linux-omap-
> > [EMAIL PROTECTED] On Behalf Of Roman Tereshonkov
> > Sent: Tuesday, March 25, 2008 8:48 AM
> > To: linux-omap@vger.kernel.org
> > Cc: Roman Tereshonkov
> > Subject: [PATCH] Support for OMAP3 SDTI (Serial Debug Trace
> Interface).

Pushing today.


> By chance do you use any of this in conjunction with semi-hosting on
> Lauterbach?  If so is there a wiki or other with some basic information?
> Having a jtag console is kind of handy if you don't have a real serial
> port.
> 
> Regards,
> Richard W.
>  
> 
> --
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Re: [PATCH 1/1] MMC: OMAP: Fix HSMMC driver name at host driver.

2008-03-28 Thread Tony Lindgren
* Carlos Aguiar <[EMAIL PROTECTED]> [080326 21:16]:
> ext Madhusudhan Chikkature Rajashekar wrote:
> >  
> >
> >   
> >> -Original Message-
> >> From: [EMAIL PROTECTED] 
> >> [mailto:[EMAIL PROTECTED] On Behalf Of Felipe Balbi
> >> Sent: Friday, March 21, 2008 4:25 AM
> >> To: Carlos Aguiar
> >> Cc: Tony Lindgren; linux-omap@vger.kernel.org
> >> Subject: Re: [PATCH 1/1] MMC: OMAP: Fix HSMMC driver name at 
> >> host driver.
> >>
> >> On Thu, Mar 20, 2008 at 04:24:30PM -0400, Carlos Aguiar wrote:
> >> 
> >>> From: Carlos Eduardo Aguiar <[EMAIL PROTECTED]>
> >>>
> >>> This patch fixes the HSMMC driver name at host driver.
> >>>
> >>> Signed-off-by: Carlos Eduardo Aguiar <[EMAIL PROTECTED]>
> >>> ---
> >>>  drivers/mmc/host/omap_hsmmc.c |2 +-
> >>>  1 files changed, 1 insertions(+), 1 deletions(-)
> >>>
> >>> diff --git a/drivers/mmc/host/omap_hsmmc.c 
> >>>   
> >> b/drivers/mmc/host/omap_hsmmc.c
> >> 
> >>> index 047c64d..0e7ee20 100644
> >>> --- a/drivers/mmc/host/omap_hsmmc.c
> >>> +++ b/drivers/mmc/host/omap_hsmmc.c
> >>> @@ -92,7 +92,7 @@
> >>>  #define OMAP_MMC_DATADIR_WRITE   2
> >>>  #define MMC_TIMEOUT_MS   20
> >>>  #define OMAP_MMC_MASTER_CLOCK9600
> >>> -#define DRIVER_NAME  "mmci-omap"
> >>> +#define DRIVER_NAME  "hsmmc-omap"
> >>>   
> >> stupid question :-p
> >> what does the 'i' means?
> >> 
> > I think it is a simple mistake. The change you have done makes sense for 
> > the HSMMC driver.
> >
> >   
> >> -- 
> >> Best Regards,
> >>
> >> Felipe Balbi
> >> [EMAIL PROTECTED]
> >> http://blog.felipebalbi.com
> >> --
> >> To unsubscribe from this list: send the line "unsubscribe 
> >> linux-omap" in
> >> the body of a message to [EMAIL PROTECTED]
> >> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> >>
> >> 
> >
> >
> >   
> Hi Tony,
> 
> Please, don't apply this patch into the tree due some conflicts with
> such driver host names for 2420 (mmci-omap) and 2430 and 3430
> (hsmmc-omap) boards. Explaining: on arch/arm/plat-omap/devices.c, I sent
> a patch [1] that proposes the following change:
> 
> ...
> #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
> #define OMAP_MMC_NAME "hsmmc-omap"
> 
> #define OMAP_MMC1_BASE 0x4809c000
> #define OMAP_MMC1_END OMAP_MMC1_BASE + 0x1fc
> #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
> 
> #define OMAP_MMC2_BASE 0x480b4000
> #define OMAP_MMC2_END OMAP_MMC2_BASE + 0x1fc
> #define OMAP_MMC2_INT INT_24XX_MMC_IRQ
> 
> #else
> 
> #define OMAP_MMC_NAME "mmci-omap"
> ...
> 
> But, the host driver name is mmci-omap for 2420 boards (like N800), so
> that images compiled with this patch will not start the MMC slots :(
> 
> Anyway, I think for now let's keep all driver hosts with name
> 'mmci-omap' in order keep all working and I'm going to resend this patch
> removing the defines OMAP_MMC_NAME and make some corrections into such
> patch.
> 
> I hope I was clear and thanks for the comprehension.

OK, so let's forget this patch then.

Tony


> 
> BR,
> 
> Carlos.
> 
> [1] http://marc.info/?l=linux-omap&m=120602333813488&w=2
> 
> -- 
> Carlos Eduardo Aguiar
> Nokia Institute of Technology - INdT
> Open Source Mobile Research Center - OSMRC - Manaus
> Core Team
> Phone: +55 92 2126-1079
> Mobile: +55 92 8127-1797
> E-mail: [EMAIL PROTECTED]
> 
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Re: [PATCH 0/7] twl4030 changes

2008-03-28 Thread Tony Lindgren
* Felipe Balbi <[EMAIL PROTECTED]> [080328 12:16]:
> 
> 
> On Fri, 28 Mar 2008 09:49:00 +0200, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> > * Felipe Balbi <[EMAIL PROTECTED]> [080327 19:20]:
> >> Hi Tony,
> >>
> >> I'm resending this series cuz I changed a bit patch #5 to set
> >> session bit on musb_platform_set_mode so musb core will really
> >> go to a_host mode when we echo sysfs.
> >>
> >> Without this small change the sysfs interface will work only with
> >> a few devices, most likely usb sticks.
> >>
> >> Below is a shortlog and diffstat of the changes.
> > 
> > Pushing this series today.
> 
> Hi tony,
> 
> You missed the attached patch: Let board specific codee handle clock
> initialization

Oops, sorry pushing.

Tony

> 
> -- 
> Best Regards,
> 
> Felipe Balbi
> http://felipebalbi.com
> [EMAIL PROTECTED]
> From ad7a01e97dadbde2ef6c43b46182272ccc201683 Mon Sep 17 00:00:00 2001
> From: Felipe Balbi <[EMAIL PROTECTED]>
> Date: Tue, 18 Mar 2008 20:26:30 +0200
> Subject: [PATCH 1/2] USB: MUSB: Let board specific code handle clock 
> initialization
> 
> Instead of clk_get() in omap2430.c driver, we can let
> musb_core.c do it by setting the clock id in
> musb_platform_data structure.
> 
> Signed-off-by: Felipe Balbi <[EMAIL PROTECTED]>
> ---
>  arch/arm/mach-omap2/board-2430sdp-usb.c |   27 +++
>  arch/arm/mach-omap2/board-3430sdp-usb.c |   29 +++--
>  drivers/usb/musb/omap2430.c |8 
>  3 files changed, 54 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/board-2430sdp-usb.c 
> b/arch/arm/mach-omap2/board-2430sdp-usb.c
> index 908a0c0..7f4e017 100644
> --- a/arch/arm/mach-omap2/board-2430sdp-usb.c
> +++ b/arch/arm/mach-omap2/board-2430sdp-usb.c
> @@ -13,9 +13,11 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
> +#include 
>  #include 
>  
>  static struct resource musb_resources[] = {
> @@ -34,6 +36,29 @@ static struct resource musb_resources[] = {
>   },
>  };
>  
> +static int usbhs_ick_on;
> +
> +static int musb_set_clock(struct clk *clk, int state)
> +{
> +   if (state) {
> +   if (usbhs_ick_on > 0)
> +   return -ENODEV;
> +
> +   omap2_block_sleep();
> +   clk_enable(clk);
> +   usbhs_ick_on = 1;
> +   } else {
> +   if (usbhs_ick_on == 0)
> +   return -ENODEV;
> +
> +   clk_disable(clk);
> +   usbhs_ick_on = 0;
> +   omap2_allow_sleep();
> +   }
> +
> +   return 0;
> +}
> +
>  static struct musb_hdrc_platform_data musb_plat = {
>  #ifdef CONFIG_USB_MUSB_OTG
>   .mode   = MUSB_OTG,
> @@ -43,6 +68,8 @@ static struct musb_hdrc_platform_data musb_plat = {
>   .mode   = MUSB_PERIPHERAL,
>  #endif
>   .multipoint = 1,
> + .clock  = "usbhs_ick",
> + .set_clock  = musb_set_clock,
>  };
>  
>  static u64 musb_dmamask = ~(u32)0;
> diff --git a/arch/arm/mach-omap2/board-3430sdp-usb.c 
> b/arch/arm/mach-omap2/board-3430sdp-usb.c
> index 77088b4..81c9af7 100644
> --- a/arch/arm/mach-omap2/board-3430sdp-usb.c
> +++ b/arch/arm/mach-omap2/board-3430sdp-usb.c
> @@ -16,11 +16,13 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  
>  #include 
> +#include 
>  #include 
>  
>  #ifdef CONFIG_USB_MUSB_SOC
> @@ -40,6 +42,29 @@ static struct resource musb_resources[] = {
>   },
>  };
>  
> +static int hsotgusb_ick_on;
> +
> +static int musb_set_clock(struct clk *clk, int state)
> +{
> + if (state) {
> + if (hsotgusb_ick_on > 0)
> + return -ENODEV;
> +
> + omap2_block_sleep();
> + clk_enable(clk);
> + hsotgusb_ick_on = 1;
> + } else {
> + if (hsotgusb_ick_on == 0)
> + return -ENODEV;
> +
> + clk_disable(clk);
> + hsotgusb_ick_on = 0;
> + omap2_allow_sleep();
> + }
> +
> + return 0;
> +}
> +
>  static struct musb_hdrc_platform_data musb_plat = {
>  #ifdef CONFIG_USB_MUSB_OTG
>   .mode   = MUSB_OTG,
> @@ -49,8 +74,8 @@ static struct musb_hdrc_platform_data musb_plat = {
>   .mode   = MUSB_PERIPHERAL,
>  #endif
>   .multipoint = 1,
> - .clock  = NULL,
> - .set_clock  = NULL,
> + .clock  = "hsotgusb_ick",
> + .set_clock  = musb_set_clock,
>  };
>  
>  static u64 musb_dmamask = ~(u32)0;
> diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
> index caae81b..364d746 100644
> --- a/drivers/usb/musb/omap2430.c
> +++ b/drivers/usb/musb/omap2430.c
> @@ -219,13 +219,7 @@ int __init musb_platform_init(struct musb *musb)
>  
>  #if defined(CONFIG_ARCH_OMAP2430)
>   omap_cfg_reg(AE5_2430_USB0HS_STP);
> - /* get the clock */
> - musb->clock = clk_get((struct device *)musb->controller, "usbhs_ick");
> -#else
>

Re: [PATCH] i2c: tea5761: New-style i2c driver

2008-03-28 Thread Tony Lindgren
* Eduardo Valentin <[EMAIL PROTECTED]> [080327 17:32]:
> From: Eduardo Valentin <[EMAIL PROTECTED]>
> 
> This patch updates the fm radio driver for tea5761 chip.
> It also moves board dependent code to its correct board
> file place.

Pushing today. You might want to start discussing this driver on V4L list
too.

Tony


> Signed-off-by: Eduardo Valentin <[EMAIL PROTECTED]>
> ---
>  arch/arm/mach-omap2/board-n800.c|   34 +
>  drivers/media/radio/radio-tea5761.c |  138 ++
>  2 files changed, 43 insertions(+), 129 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/board-n800.c 
> b/arch/arm/mach-omap2/board-n800.c
> index 34f1c37..907198a 100644
> --- a/arch/arm/mach-omap2/board-n800.c
> +++ b/arch/arm/mach-omap2/board-n800.c
> @@ -258,6 +258,34 @@ static void tsc2301_dev_init(void)
>   }
>  }
>  
> +static int __init tea5761_dev_init(void)
> +{
> + const struct omap_tea5761_config *info;
> + int enable_gpio = 0;
> +
> + info = omap_get_config(OMAP_TAG_TEA5761, struct omap_tea5761_config);
> + if (info) {
> + enable_gpio = info->enable_gpio;
> + }
> +
> + if (enable_gpio) {
> + pr_debug("Enabling tea5761 at GPIO %d\n",
> +  enable_gpio);
> +
> + if (omap_request_gpio(enable_gpio) < 0) {
> + printk(KERN_ERR "Can't request GPIO %d\n",
> +enable_gpio);
> + return -ENODEV;
> + }
> +
> + omap_set_gpio_direction(enable_gpio, 0);
> + udelay(50);
> + omap_set_gpio_dataout(enable_gpio, 1);
> + }
> +
> + return 0;
> +}
> +
>  static struct omap2_mcspi_device_config tsc2301_mcspi_config = {
>   .turbo_mode = 0,
>   .single_channel = 1,
> @@ -470,6 +498,11 @@ static struct i2c_board_info __initdata 
> n800_i2c_board_info_2[] = {
>   .platform_data = &n800_tcm825x_platform_data,
>   },
>  #endif
> +#if defined (CONFIG_RADIO_TEA5761) || defined (CONFIG_RADIO_TEA5761_MODULE)
> + {
> + I2C_BOARD_INFO("tea5761", 0x10),
> + },
> +#endif
>  };
>  
>  void __init nokia_n800_common_init(void)
> @@ -500,6 +533,7 @@ static void __init nokia_n800_init(void)
>   n800_audio_init(&tsc2301_config);
>   n800_ts_set_config();
>   tsc2301_dev_init();
> + tea5761_dev_init();
>   omap_register_gpio_switches(n800_gpio_switches,
>   ARRAY_SIZE(n800_gpio_switches));
>  }
> diff --git a/drivers/media/radio/radio-tea5761.c 
> b/drivers/media/radio/radio-tea5761.c
> index ac0f621..2341e66 100644
> --- a/drivers/media/radio/radio-tea5761.c
> +++ b/drivers/media/radio/radio-tea5761.c
> @@ -74,14 +74,6 @@
>  #define TEA5761_FREQ_LOW 87500
>  #define TEA5761_FREQ_HIGH108000
>  
> -/* Probe for TEA5761 twice since the version N4B seems to be
> - * broken and needs two probes to be found */
> -static unsigned short normal_i2c[] = {
> - TEA5761_I2C_ADDR, TEA5761_I2C_ADDR, I2C_CLIENT_END
> -};
> -
> -I2C_CLIENT_INSMOD;
> -
>  struct tea5761_regs {
>   u16 intreg;
>   u16 frqset;
> @@ -423,67 +415,22 @@ static struct video_device tea5761_video_device = {
>   .release   = video_device_release
>  };
>  
> -static int tea5761_probe(struct i2c_adapter *adapter, int address,
> -   int kind)
> +static int tea5761_i2c_driver_probe(struct i2c_client *client)
>  {
> - struct i2c_client *client;
>   struct video_device *video_dev;
>   int err = 0;
> - static const char *client_name = "TEA5761 FM-Radio";
>   struct tea5761_device *tea = &tea5761;
> - struct tea5761_regs   *r = &tea->regs;
>  
>   mutex_init(&tea->mutex);
> -/* I2C detection and initialization */
> - client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
> - if (client == NULL) {
> - dev_err(&adapter->dev, DRIVER_NAME
> - ": couldn't allocate memory\n");
> - return -ENOMEM;
> - }
> - tea->i2c_dev = client;
>  
> - client->addr = address;
> - client->adapter = adapter;
> - client->driver = &tea5761_driver;
> - client->dev.driver = &tea5761_driver.driver;
> - client->flags = 0;
> - strlcpy(client->name, client_name, I2C_NAME_SIZE);
> -
> - if (kind < 0) {
> - if (tea5761_read_regs(tea) < 0) {
> - dev_info(&client->dev,
> -  "chip read failed for %d-%04x\n",
> -  adapter->nr, address);
> - goto err_tea_dev;
> - }
> - if (r->chipid != TEA5761_CHIPID) {
> - dev_info(&client->dev,
> -  "bad chipid (0x%04x) at %d-%04x\n",
> -  r->chipid, adapter->nr, address);
> - goto err_tea_dev;
> - }
> - if ((r->manid & 0x0fff) != TEA5761_MANID) {
> -   

Re: RFC: moving twl4030-gpio.c to gpiolib

2008-03-28 Thread Tony Lindgren
* Felipe Balbi <[EMAIL PROTECTED]> [080328 12:13]:
> 
> 
> On Fri, 28 Mar 2008 10:06:16 +0200, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> > * Felipe Balbi <[EMAIL PROTECTED]> [080320 15:48]:
> >>
> >> After the patch from Kevin Hilman, I had to rebase my gpiolib patch
> >>
> >> Here an updated version of it.
> > 
> > Can you repost with Signed-off-by?
> 
> This one shouldn't be applied yet, it breaks mmc card detection :-(
> I sent as RFC to get comments from anyone interested.
> 
> After moving to gpiolib I can't request_irq() for the gpio_irq used on
> the card detection.

OK, let's wait on this one then :)

> 
> > 
> > Tony
> > 
> > 
> >> == CUT HERE ==
> >>
> >> diff --git a/arch/arm/mach-omap2/board-sdp-hsmmc.c
> >> b/arch/arm/mach-omap2/board-sdp-hsmmc.c
> >> index 3ae5b20..df24be6 100644
> >> --- a/arch/arm/mach-omap2/board-sdp-hsmmc.c
> >> +++ b/arch/arm/mach-omap2/board-sdp-hsmmc.c
> >> @@ -14,6 +14,7 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> +#include 
> >>  #include 
> >>  #include 
> >>  #include 
> >> @@ -36,8 +37,9 @@
> >>  #define MMC2_CD_IRQ   1
> >>
> >>  static int sdp_mmc_card_detect(int irq)
> >> +
> >>  {
> >> -  return twl4030_get_gpio_datain(irq - IH_TWL4030_GPIO_BASE);
> >> +  return gpio_get_value(irq - IH_TWL4030_GPIO_BASE);
> >>  }
> >>
> >>  /*
> >> @@ -50,11 +52,11 @@ static int sdp_mmc_late_init(struct device *dev)
> >>/*
> >> * Configure TWL4030 GPIO parameters for MMC hotplug irq
> >> */
> >> -  ret = twl4030_request_gpio(MMC1_CD_IRQ);
> >> +  ret = gpio_request(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ), "mmc1_cd_irq");
> >>if (ret != 0)
> >>goto err;
> >>
> >> -  ret = twl4030_set_gpio_edge_ctrl(MMC1_CD_IRQ,
> >> +  ret = twl4030_set_gpio_edge_ctrl(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
> >>TWL4030_GPIO_EDGE_RISING | TWL4030_GPIO_EDGE_FALLING);
> >>if (ret != 0)
> >>goto err;
> >> @@ -64,7 +66,8 @@ static int sdp_mmc_late_init(struct device *dev)
> >>if (ret != 0)
> >>goto err;
> >>
> >> -  ret = twl4030_set_gpio_debounce(MMC1_CD_IRQ, TWL4030_GPIO_IS_ENABLE);
> >> +  ret = twl4030_set_gpio_debounce(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
> >> +  TWL4030_GPIO_IS_ENABLE);
> >>if (ret != 0)
> >>goto err;
> >>
> >> @@ -77,11 +80,7 @@ err:
> >>
> >>  static void sdp_mmc_cleanup(struct device *dev)
> >>  {
> >> -  int ret = 0;
> >> -
> >> -  ret = twl4030_free_gpio(MMC1_CD_IRQ);
> >> -  if (ret != 0)
> >> -  dev_err(dev, "Failed to configure TWL4030 GPIO IRQ\n");
> >> +  gpio_free(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ));
> >>  }
> >>
> >>  #ifdef CONFIG_PM
> >> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> >> index bbd2834..c340333 100644
> >> --- a/drivers/gpio/Kconfig
> >> +++ b/drivers/gpio/Kconfig
> >> @@ -61,6 +61,12 @@ config GPIO_PCF857X
> >>  This driver provides an in-kernel interface to those GPIOs using
> >>  platform-neutral GPIO calls.
> >>
> >> +config GPIO_TWL4030
> >> +  bool "TWL4030 GPIO Driver"
> >> +  depends on I2C && TWL4030_CORE
> >> +  help
> >> +Say yes here to provide support for twl4030 gpio submodule.
> >> +
> >>  comment "SPI GPIO expanders:"
> >>
> >>  config GPIO_MCP23S08
> >> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> >> index fdde992..346187e 100644
> >> --- a/drivers/gpio/Makefile
> >> +++ b/drivers/gpio/Makefile
> >> @@ -7,3 +7,4 @@ obj-$(CONFIG_HAVE_GPIO_LIB)+= gpiolib.o
> >>  obj-$(CONFIG_GPIO_MCP23S08)   += mcp23s08.o
> >>  obj-$(CONFIG_GPIO_PCA953X)+= pca953x.o
> >>  obj-$(CONFIG_GPIO_PCF857X)+= pcf857x.o
> >> +obj-$(CONFIG_GPIO_TWL4030)+= twl4030-gpio.o
> >> diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
> >> new file mode 100644
> >> index 000..81ab4ce
> >> --- /dev/null
> >> +++ b/drivers/gpio/twl4030-gpio.c
> >> @@ -0,0 +1,510 @@
> >> +/*
> >> + * drivers/gpio/tlw4030-gpio.c - driver for TWL4030 GPIO MODULE
> >> + *
> >> + * Copyright (C) 2006-2007 Texas Instruments, Inc.
> >> + * Copyright (C) 2006 MontaVista Software, Inc.
> >> + * Copyright (C) 2008 Nokia Corporation
> >> + *
> >> + * Moved to gpiolib by:
> >> + *Felipe Balbi <[EMAIL PROTECTED]>
> >> + *
> >> + * Code re-arranged and cleaned up by:
> >> + *Syed Mohammed Khasim <[EMAIL PROTECTED]>
> >> + *
> >> + * Initial Code:
> >> + *Andy Lowe / Nishanth Menon
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License as published by
> >> + * the Free Software Foundation; either version 2 of the License, or
> >> + * (at your option) any later version.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + * GNU General Public License for more details.
> >> + *
> >> +

Re: [PATCH] OMAP2/3 CM: clean up 3430ES2-only defines

2008-03-28 Thread Tony Lindgren
* Paul Walmsley <[EMAIL PROTECTED]> [080328 08:32]:
> 
> This patch marks several CM register bit fields that are only valid on
> 3430ES2 and beyond to be 3430ES2 defines.  
> 
> While we're here, clean up the register defines in cm.h, and improve
> documentation slightly.  Also, since CM_AUTOIDLE3 is now in use on
> both OMAP24xx and OMAP34xx, remove the platform-specific prefix from
> its name.

Pushing today & folding into omap2-upstream series.

Tony


> Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
> 
> ---
>  arch/arm/mach-omap2/clock34xx.h   |2 -
>  arch/arm/mach-omap2/cm-regbits-34xx.h |   22 +++--
>  arch/arm/mach-omap2/cm.h  |   55 
> --
>  arch/arm/mach-omap2/pm.c  |2 -
>  arch/arm/mach-omap2/prm.h |4 +-
>  drivers/usb/host/ehci-omap.c  |   10 +++---
>  6 files changed, 48 insertions(+), 47 deletions(-)
> 
> Index: linux-omap/arch/arm/mach-omap2/clock34xx.h
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/clock34xx.h   2008-03-28 
> 00:27:00.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/clock34xx.h2008-03-28 
> 00:27:02.0 -0600
> @@ -851,7 +851,7 @@
>   .parent = &dpll5_m2_ck,
>   .init   = &omap2_init_clksel_parent,
>   .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
> - .clksel_mask= OMAP3430_ST_PERIPH2_CLK,
> + .clksel_mask= OMAP3430ES2_ST_PERIPH2_CLK_MASK,
>   .clksel = omap_120m_fck_clksel,
>   .flags  = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES |
>   PARENT_CONTROLS_CLOCK,
> Index: linux-omap/arch/arm/mach-omap2/cm-regbits-34xx.h
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/cm-regbits-34xx.h 2008-03-28 
> 00:26:50.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/cm-regbits-34xx.h  2008-03-28 
> 00:27:02.0 -0600
> @@ -203,8 +203,8 @@
>  #define OMAP3430_ST_DES1 (1 << 0)
>  
>  /* CM_IDLEST3_CORE */
> -#define OMAP3430_ST_USBTLL   (1 << 2)
> -#define OMAP3430_ST_USBTLL_SHIFT 2
> +#define OMAP3430ES2_ST_USBTLL_SHIFT  2
> +#define OMAP3430ES2_ST_USBTLL_MASK   (1 << 2)
>  
>  /* CM_AUTOIDLE1_CORE */
>  #define OMAP3430_AUTO_AES2   (1 << 28)
> @@ -275,8 +275,8 @@
>  #define OMAP3430_AUTO_DES1_SHIFT 0
>  
>  /* CM_AUTOIDLE3_CORE */
> -#define OMAP3430_AUTO_USBTLL (1 << 2)
> -#define OMAP3430_AUTO_USBTLL_SHIFT   2
> +#define OMAP3430ES2_AUTO_USBTLL_SHIFT2
> +#define OMAP3430ES2_AUTO_USBTLL_MASK (1 << 2)
>  
>  /* CM_CLKSEL_CORE */
>  #define OMAP3430_CLKSEL_SSI_SHIFT8
> @@ -411,8 +411,10 @@
>  #define OMAP3430_ST_CORE_CLK (1 << 0)
>  
>  /* CM_IDLEST2_CKGEN */
> -#define OMAP3430_ST_120M_CLK (1 << 1)
> -#define OMAP3430_ST_PERIPH2_CLK  (1 << 0)
> +#define OMAP3430ES2_ST_120M_CLK_SHIFT1
> +#define OMAP3430ES2_ST_120M_CLK_MASK (1 << 1)
> +#define OMAP3430ES2_ST_PERIPH2_CLK_SHIFT 0
> +#define OMAP3430ES2_ST_PERIPH2_CLK_MASK  (1 << 0)
>  
>  /* CM_AUTOIDLE_PLL */
>  #define OMAP3430_AUTO_PERIPH_DPLL_SHIFT  3
> @@ -654,17 +656,17 @@
>  
>  /* CM_AUTOIDLE_USBHOST */
>  #define OMAP3430ES2_AUTO_USBHOST_SHIFT   0
> -#define OMAP3430ES2_AUTO_USBHOST_MASK(1<<0)
> +#define OMAP3430ES2_AUTO_USBHOST_MASK(1 << 0)
>  
>  /* CM_SLEEPDEP_USBHOST */
>  #define OMAP3430ES2_EN_MPU_SHIFT 1
> -#define OMAP3430ES2_EN_MPU_MASK  (1<<1)
> +#define OMAP3430ES2_EN_MPU_MASK  (1 << 1)
>  #define OMAP3430ES2_EN_IVA2_SHIFT2
> -#define OMAP3430ES2_EN_IVA2_MASK (1<<2)
> +#define OMAP3430ES2_EN_IVA2_MASK (1 << 2)
>  
>  /* CM_CLKSTCTRL_USBHOST */
>  #define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT  0
> -#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK   (3<<0)
> +#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK   (3 << 0)
>  
>  
>  
> Index: linux-omap/arch/arm/mach-omap2/cm.h
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/cm.h  2008-03-28 00:26:50.0 
> -0600
> +++ linux-omap/arch/arm/mach-omap2/cm.h   2008-03-28 00:27:02.0 
> -0600
> @@ -31,6 +31,7 @@
>  /*
>   * Architecture-specific global CM registers
>   * Use cm_{read,write}_reg() with these registers.
> + * These registers appear once per CM module.
>   */
>  
>  #define OMAP3430_CM_REVISION OMAP_CM_RE

Re: [PATCH] OMAP2/3 clock: convert mask_to_shift() to __ffs()

2008-03-28 Thread Tony Lindgren
* Paul Walmsley <[EMAIL PROTECTED]> [080328 08:26]:
> 
> In OMAP2/3 clock code, we've used mask_to_shift() to convert bitmasks
> into shift values, via "ffs(mask) - 1".  It turns out that there is
> already a Linux idiom for this in asm/bitops.h: __ffs().  (Not to be
> confused with ffs(), of course.  You wouldn't do that, would you?)
> When in Rome, do as the Romans.

Pushing today & folding this into the omap2-upstream series.

Tony


> 
> Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
> 
> ---
>  arch/arm/mach-omap2/clock.c |   18 +++---
>  arch/arm/mach-omap2/clock.h |1 -
>  arch/arm/mach-omap2/clock24xx.c |5 +++--
>  arch/arm/mach-omap2/clock34xx.c |4 ++--
>  4 files changed, 12 insertions(+), 16 deletions(-)
> 
> Index: linux-omap/arch/arm/mach-omap2/clock.c
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/clock.c   2008-03-27 
> 19:06:55.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/clock.c2008-03-27 19:11:41.0 
> -0600
> @@ -21,6 +21,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  
> @@ -46,11 +47,6 @@
>   * Omap2 specific clock functions
>   *-*/
>  
> -u8 mask_to_shift(u32 mask)
> -{
> - return ffs(mask) - 1;
> -}
> -
>  /**
>   * omap2_init_clksel_parent - set a clksel clk's parent field from the 
> hardware
>   * @clk: OMAP clock struct ptr to use
> @@ -69,7 +65,7 @@
>   return;
>  
>   r = __raw_readl(clk->clksel_reg) & clk->clksel_mask;
> - r >>= mask_to_shift(clk->clksel_mask);
> + r >>= __ffs(clk->clksel_mask);
>  
>   for (clks = clk->clksel; clks->parent && !found; clks++) {
>   for (clkr = clks->rates; clkr->div && !found; clkr++) {
> @@ -108,9 +104,9 @@
>  
>   dpll = cm_read_reg(dd->mult_div1_reg);
>   dpll_mult = dpll & dd->mult_mask;
> - dpll_mult >>= mask_to_shift(dd->mult_mask);
> + dpll_mult >>= __ffs(dd->mult_mask);
>   dpll_div = dpll & dd->div1_mask;
> - dpll_div >>= mask_to_shift(dd->div1_mask);
> + dpll_div >>= __ffs(dd->div1_mask);
>  
>   dpll_clk = (long long)clk->parent->rate * dpll_mult;
>   do_div(dpll_clk, dpll_div + 1);
> @@ -574,7 +570,7 @@
>   return 0;
>  
>   field_val = cm_read_reg(div_addr) & field_mask;
> - field_val >>= mask_to_shift(field_mask);
> + field_val >>= __ffs(field_mask);
>  
>   return omap2_clksel_to_divisor(clk, field_val);
>  }
> @@ -598,7 +594,7 @@
>  
>   reg_val = cm_read_reg(div_addr);
>   reg_val &= ~field_mask;
> - reg_val |= (field_val << mask_to_shift(field_mask));
> + reg_val |= (field_val << __ffs(field_mask));
>   cm_write_reg(reg_val, div_addr);
>   wmb();
>  
> @@ -696,7 +692,7 @@
>  
>   /* Set new source value (previous dividers if any in effect) */
>   reg_val = __raw_readl(src_addr) & ~field_mask;
> - reg_val |= (field_val << mask_to_shift(field_mask));
> + reg_val |= (field_val << __ffs(field_mask));
>   __raw_writel(reg_val, src_addr);
>   wmb();
>  
> Index: linux-omap/arch/arm/mach-omap2/clock.h
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/clock.h   2008-03-27 
> 19:06:55.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/clock.h2008-03-27 19:10:08.0 
> -0600
> @@ -42,7 +42,6 @@
>  int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
>  u32 omap2_get_dpll_rate(struct clk *clk);
>  int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
> -u8 mask_to_shift(u32 mask);
>  
>  extern u8 cpu_mask;
>  
> Index: linux-omap/arch/arm/mach-omap2/clock24xx.c
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/clock24xx.c   2008-03-27 
> 19:01:32.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/clock24xx.c2008-03-27 
> 19:13:29.0 -0600
> @@ -31,6 +31,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "memory.h"
>  #include "clock.h"
> @@ -224,8 +225,8 @@
>   mult = (rate / 100);
>   done_rate = CORE_CLK_SRC_DPLL;
>   }
> - tmpset.cm_clksel1_pll |= (div << mask_to_shift(dd->mult_mask));
> - tmpset.cm_clksel1_pll |= (mult << mask_to_shift(dd->div1_mask));
> + tmpset.cm_clksel1_pll |= (div << __ffs(dd->mult_mask));
> + tmpset.cm_clksel1_pll |= (mult << __ffs(dd->div1_mask));
>  
>   /* Worst case */
>   tmpset.base_sdrc_rfr = SDRC_RFR_CTRL_BYPASS;
> Index: linux-omap/arch/arm/mach-omap2/clock34xx.c
> ===
> --- linux-omap.orig/arch/arm/mach-omap2/clock34xx.c   2008-03-27 
> 18:01:36.0 -0600
> +++ linux-omap/arch/arm/mach-omap2/clock34xx.c2008-03-27 
> 19

Re: [PATCH 0/7] twl4030 changes

2008-03-28 Thread Felipe Balbi


On Fri, 28 Mar 2008 09:49:00 +0200, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> * Felipe Balbi <[EMAIL PROTECTED]> [080327 19:20]:
>> Hi Tony,
>>
>> I'm resending this series cuz I changed a bit patch #5 to set
>> session bit on musb_platform_set_mode so musb core will really
>> go to a_host mode when we echo sysfs.
>>
>> Without this small change the sysfs interface will work only with
>> a few devices, most likely usb sticks.
>>
>> Below is a shortlog and diffstat of the changes.
> 
> Pushing this series today.

Hi tony,

You missed the attached patch: Let board specific codee handle clock
initialization

-- 
Best Regards,

Felipe Balbi
http://felipebalbi.com
[EMAIL PROTECTED]From ad7a01e97dadbde2ef6c43b46182272ccc201683 Mon Sep 17 00:00:00 2001
From: Felipe Balbi <[EMAIL PROTECTED]>
Date: Tue, 18 Mar 2008 20:26:30 +0200
Subject: [PATCH 1/2] USB: MUSB: Let board specific code handle clock initialization

Instead of clk_get() in omap2430.c driver, we can let
musb_core.c do it by setting the clock id in
musb_platform_data structure.

Signed-off-by: Felipe Balbi <[EMAIL PROTECTED]>
---
 arch/arm/mach-omap2/board-2430sdp-usb.c |   27 +++
 arch/arm/mach-omap2/board-3430sdp-usb.c |   29 +++--
 drivers/usb/musb/omap2430.c |8 
 3 files changed, 54 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/board-2430sdp-usb.c b/arch/arm/mach-omap2/board-2430sdp-usb.c
index 908a0c0..7f4e017 100644
--- a/arch/arm/mach-omap2/board-2430sdp-usb.c
+++ b/arch/arm/mach-omap2/board-2430sdp-usb.c
@@ -13,9 +13,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
+#include 
 #include 
 
 static struct resource musb_resources[] = {
@@ -34,6 +36,29 @@ static struct resource musb_resources[] = {
 	},
 };
 
+static int usbhs_ick_on;
+
+static int musb_set_clock(struct clk *clk, int state)
+{
+   if (state) {
+   if (usbhs_ick_on > 0)
+   return -ENODEV;
+
+   omap2_block_sleep();
+   clk_enable(clk);
+   usbhs_ick_on = 1;
+   } else {
+   if (usbhs_ick_on == 0)
+   return -ENODEV;
+
+   clk_disable(clk);
+   usbhs_ick_on = 0;
+   omap2_allow_sleep();
+   }
+
+   return 0;
+}
+
 static struct musb_hdrc_platform_data musb_plat = {
 #ifdef CONFIG_USB_MUSB_OTG
 	.mode		= MUSB_OTG,
@@ -43,6 +68,8 @@ static struct musb_hdrc_platform_data musb_plat = {
 	.mode		= MUSB_PERIPHERAL,
 #endif
 	.multipoint	= 1,
+	.clock		= "usbhs_ick",
+	.set_clock	= musb_set_clock,
 };
 
 static u64 musb_dmamask = ~(u32)0;
diff --git a/arch/arm/mach-omap2/board-3430sdp-usb.c b/arch/arm/mach-omap2/board-3430sdp-usb.c
index 77088b4..81c9af7 100644
--- a/arch/arm/mach-omap2/board-3430sdp-usb.c
+++ b/arch/arm/mach-omap2/board-3430sdp-usb.c
@@ -16,11 +16,13 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 #include 
+#include 
 #include 
 
 #ifdef CONFIG_USB_MUSB_SOC
@@ -40,6 +42,29 @@ static struct resource musb_resources[] = {
 	},
 };
 
+static int hsotgusb_ick_on;
+
+static int musb_set_clock(struct clk *clk, int state)
+{
+	if (state) {
+		if (hsotgusb_ick_on > 0)
+			return -ENODEV;
+
+		omap2_block_sleep();
+		clk_enable(clk);
+		hsotgusb_ick_on = 1;
+	} else {
+		if (hsotgusb_ick_on == 0)
+			return -ENODEV;
+
+		clk_disable(clk);
+		hsotgusb_ick_on = 0;
+		omap2_allow_sleep();
+	}
+
+	return 0;
+}
+
 static struct musb_hdrc_platform_data musb_plat = {
 #ifdef CONFIG_USB_MUSB_OTG
 	.mode		= MUSB_OTG,
@@ -49,8 +74,8 @@ static struct musb_hdrc_platform_data musb_plat = {
 	.mode		= MUSB_PERIPHERAL,
 #endif
 	.multipoint	= 1,
-	.clock		= NULL,
-	.set_clock	= NULL,
+	.clock		= "hsotgusb_ick",
+	.set_clock	= musb_set_clock,
 };
 
 static u64 musb_dmamask = ~(u32)0;
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index caae81b..364d746 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -219,13 +219,7 @@ int __init musb_platform_init(struct musb *musb)
 
 #if defined(CONFIG_ARCH_OMAP2430)
 	omap_cfg_reg(AE5_2430_USB0HS_STP);
-	/* get the clock */
-	musb->clock = clk_get((struct device *)musb->controller, "usbhs_ick");
-#else
-	musb->clock = clk_get((struct device *)musb->controller, "hsotgusb_ick");
 #endif
-	if(IS_ERR(musb->clock))
-		return PTR_ERR(musb->clock);
 
 	musb->xceiv = *xceiv;
 	musb_platform_resume(musb);
@@ -261,13 +255,11 @@ int musb_platform_suspend(struct musb *musb)
 	OTG_SYSCONFIG_REG |= AUTOIDLE;		/* enable auto idle */
 
 	musb->xceiv.set_suspend(&musb->xceiv, 1);
-	clk_disable(musb->clock);
 	return 0;
 }
 
 int musb_platform_resume(struct musb *musb)
 {
-	clk_enable(musb->clock);
 	musb->xceiv.set_suspend(&musb->xceiv, 0);
 
 	OTG_FORCESTDBY_REG &= ~ENABLEFORCE; /* disable MSTANDBY */
-- 
1.5.5.rc1.12.g660b9



Re: RFC: moving twl4030-gpio.c to gpiolib

2008-03-28 Thread Felipe Balbi


On Fri, 28 Mar 2008 10:06:16 +0200, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> * Felipe Balbi <[EMAIL PROTECTED]> [080320 15:48]:
>>
>> After the patch from Kevin Hilman, I had to rebase my gpiolib patch
>>
>> Here an updated version of it.
> 
> Can you repost with Signed-off-by?

This one shouldn't be applied yet, it breaks mmc card detection :-(
I sent as RFC to get comments from anyone interested.

After moving to gpiolib I can't request_irq() for the gpio_irq used on
the card detection.

> 
> Tony
> 
> 
>> == CUT HERE ==
>>
>> diff --git a/arch/arm/mach-omap2/board-sdp-hsmmc.c
>> b/arch/arm/mach-omap2/board-sdp-hsmmc.c
>> index 3ae5b20..df24be6 100644
>> --- a/arch/arm/mach-omap2/board-sdp-hsmmc.c
>> +++ b/arch/arm/mach-omap2/board-sdp-hsmmc.c
>> @@ -14,6 +14,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -36,8 +37,9 @@
>>  #define MMC2_CD_IRQ 1
>>
>>  static int sdp_mmc_card_detect(int irq)
>> +
>>  {
>> -return twl4030_get_gpio_datain(irq - IH_TWL4030_GPIO_BASE);
>> +return gpio_get_value(irq - IH_TWL4030_GPIO_BASE);
>>  }
>>
>>  /*
>> @@ -50,11 +52,11 @@ static int sdp_mmc_late_init(struct device *dev)
>>  /*
>>   * Configure TWL4030 GPIO parameters for MMC hotplug irq
>>   */
>> -ret = twl4030_request_gpio(MMC1_CD_IRQ);
>> +ret = gpio_request(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ), "mmc1_cd_irq");
>>  if (ret != 0)
>>  goto err;
>>
>> -ret = twl4030_set_gpio_edge_ctrl(MMC1_CD_IRQ,
>> +ret = twl4030_set_gpio_edge_ctrl(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
>>  TWL4030_GPIO_EDGE_RISING | TWL4030_GPIO_EDGE_FALLING);
>>  if (ret != 0)
>>  goto err;
>> @@ -64,7 +66,8 @@ static int sdp_mmc_late_init(struct device *dev)
>>  if (ret != 0)
>>  goto err;
>>
>> -ret = twl4030_set_gpio_debounce(MMC1_CD_IRQ, TWL4030_GPIO_IS_ENABLE);
>> +ret = twl4030_set_gpio_debounce(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
>> +TWL4030_GPIO_IS_ENABLE);
>>  if (ret != 0)
>>  goto err;
>>
>> @@ -77,11 +80,7 @@ err:
>>
>>  static void sdp_mmc_cleanup(struct device *dev)
>>  {
>> -int ret = 0;
>> -
>> -ret = twl4030_free_gpio(MMC1_CD_IRQ);
>> -if (ret != 0)
>> -dev_err(dev, "Failed to configure TWL4030 GPIO IRQ\n");
>> +gpio_free(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ));
>>  }
>>
>>  #ifdef CONFIG_PM
>> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
>> index bbd2834..c340333 100644
>> --- a/drivers/gpio/Kconfig
>> +++ b/drivers/gpio/Kconfig
>> @@ -61,6 +61,12 @@ config GPIO_PCF857X
>>This driver provides an in-kernel interface to those GPIOs using
>>platform-neutral GPIO calls.
>>
>> +config GPIO_TWL4030
>> +bool "TWL4030 GPIO Driver"
>> +depends on I2C && TWL4030_CORE
>> +help
>> +  Say yes here to provide support for twl4030 gpio submodule.
>> +
>>  comment "SPI GPIO expanders:"
>>
>>  config GPIO_MCP23S08
>> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
>> index fdde992..346187e 100644
>> --- a/drivers/gpio/Makefile
>> +++ b/drivers/gpio/Makefile
>> @@ -7,3 +7,4 @@ obj-$(CONFIG_HAVE_GPIO_LIB)  += gpiolib.o
>>  obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
>>  obj-$(CONFIG_GPIO_PCA953X)  += pca953x.o
>>  obj-$(CONFIG_GPIO_PCF857X)  += pcf857x.o
>> +obj-$(CONFIG_GPIO_TWL4030)  += twl4030-gpio.o
>> diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
>> new file mode 100644
>> index 000..81ab4ce
>> --- /dev/null
>> +++ b/drivers/gpio/twl4030-gpio.c
>> @@ -0,0 +1,510 @@
>> +/*
>> + * drivers/gpio/tlw4030-gpio.c - driver for TWL4030 GPIO MODULE
>> + *
>> + * Copyright (C) 2006-2007 Texas Instruments, Inc.
>> + * Copyright (C) 2006 MontaVista Software, Inc.
>> + * Copyright (C) 2008 Nokia Corporation
>> + *
>> + * Moved to gpiolib by:
>> + *  Felipe Balbi <[EMAIL PROTECTED]>
>> + *
>> + * Code re-arranged and cleaned up by:
>> + *  Syed Mohammed Khasim <[EMAIL PROTECTED]>
>> + *
>> + * Initial Code:
>> + *  Andy Lowe / Nishanth Menon
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
>> USA
>> + *
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#define gpio_to_tw

[PATCH] I2C: Fix twl4030 timeouts on omap3430

2008-03-28 Thread Tony Lindgren
Hi all,

This helps with the annoying I2C timeouts. Does anybody have an idea
why the twl4030 chip does not like doing multiple transfers in a row?

To me the only difference seems to be that clocks are idled between
writing the twl4030 register and reading the register value.

Regards,

Tony
>From 25c4c8f449819cb6f40b59ed1a9b25ebcc7cd72e Mon Sep 17 00:00:00 2001
From: Tony Lindgren <[EMAIL PROTECTED]>
Date: Thu, 27 Mar 2008 19:05:30 +0200
Subject: [PATCH] I2C: Fix twl4030 timeouts on omap3430

For some reason doing a twl4030 write-read cycle can hang the I2C bus
on omap3430. And doing the write and read separately in twl4030_i2c_read()
seems to fix the problem...

Not intended for applying, just a temporary workaround.

diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
index ded86e7..62868b0 100644
--- a/drivers/i2c/chips/twl4030-core.c
+++ b/drivers/i2c/chips/twl4030-core.c
@@ -327,6 +327,7 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 num_bytes)
 		return -EPERM;
 	}
 	mutex_lock(&twl->xfer_lock);
+
 	/* [MSG1] fill the register address data */
 	msg = &twl->xfer_msg[0];
 	msg->addr = twl->address;
@@ -334,18 +335,25 @@ int twl4030_i2c_read(u8 mod_no, u8 * value, u8 reg, u8 num_bytes)
 	msg->flags = 0;	/* Read the register value */
 	val = twl4030_map[mod_no].base + reg;
 	msg->buf = &val;
+	ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
+	if (ret < 0)
+		goto out;
+ 
 	/* [MSG2] fill the data rx buffer */
 	msg = &twl->xfer_msg[1];
 	msg->addr = twl->address;
 	msg->flags = I2C_M_RD;	/* Read the register value */
 	msg->len = num_bytes;	/* only n bytes */
 	msg->buf = value;
-	ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 2);
+	ret = i2c_transfer(twl->client.adapter, twl->xfer_msg, 1);
+
+out:
 	mutex_unlock(&twl->xfer_lock);
 
 	/* i2cTransfer returns num messages.translate it pls.. */
 	if (ret >= 0)
 		ret = 0;
+
 	return ret;
 }
 


Re: [PATCH 2/4] Add support for TWL4030 codec on 3430 platform

2008-03-28 Thread Tony Lindgren
* Jarkko Nikula <[EMAIL PROTECTED]> [080125 10:57]:
> On Thu, 24 Jan 2008 15:28:22 -0600
> "ext Lopez Cruz, Misael" <[EMAIL PROTECTED]> wrote:
> 
> > Hi,
> > 
> > This patch from OMAP3430 ALSA series was missing since the number of
> > characters in the patch is higher than the allowed by Majordomo.
> > 
> > The patch can be found at link shown below:
> > 
> > http://linux.omap.com/pub/patches/rfc/audio_34xx_support_20071220.patch
> > 
> Hi, my two sents
> 
> We shall stop growing the sound/arm/omap and switch to ASoC model as
> there is the embedded ALSA development going.
> 
> http://alsa-project.org/main/index.php/ASoC
> 
> I'm currently developing SoC support for OMAP. Very early stage still
> but I can start sharing the code when it is in that shape :-)
> 
> Idea is to have one generic OMAP platform driver for DMA engine
> (with non-chained and chained DMA support) and DAI link drivers for
> links we have (most common is McBSP-I2S I think) + machine drivers for
> board specifics and configuration data.
> 
> The platfrom I'm using for this is our N810 since it is the easiest
> platfrom to start with. E.g. there exist a SoC codec driver for AIC33:
> 
> http://mailman.alsa-project.org/pipermail/alsa-devel/2007-November/004148.html
> 
> But as I said, this is in very early stage but I'll share the code here
> first in order to cover most OMAPs but actual merging should go through
> the alsa-devel list.

Yeah, that's the way to go. Misael, can you take a look at Jarkko's
asoc patches and see what it would take to convert to that?

We should get rid of all the non-mainline audio stuff as soon as asoc is
merged.

Tony
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Re: [PATCH 1/3] Modified: Introduce seperate IRQs for the TWL4030 power block

2008-03-28 Thread Tony Lindgren
Hi,

* Peter 'p2' De Schrijver <[EMAIL PROTECTED]> [080214 17:30]:
> Please ignore the previous version of this patch.
> 
> This patch introduces seperate IRQs for the various interrupt sources of
> the TWL4030 power block. This is similar in spirit to the IRQs of the
> TWL4030 GPIO block.

Peter, can you please refresh this series one more time so it applies on
top of Felipe's twl4030 clean up I've just pushed?

Thanks,

Tony
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Re: [PATCH] TWL4030 keyboard driver enhancements

2008-03-28 Thread Tony Lindgren
* Klaus.K Pedersen (Nokia-M/Helsinki) <[EMAIL PROTECTED]> [080211 21:10]:
> On Tue, 2008-02-05 at 21:21 +0530, ext Girish wrote:
> > 
> > >Did the patch solve your problem? 
> 
> > Sorry for late reply. Well, I tried with that change but still I
> > find some suppurious keys coming in. Find the following log, this
> > might give a clear picture.
> > 
> > omap_twl4030keypad omap_twl4030keypad: Spurious key event 6-2
> > omap_twl4030keypad omap_twl4030keypad: Spurious key event 6-3
> > omap_twl4030keypad omap_twl4030keypad: Spurious key event 6-4
> 
> Strange, but as you have .col = 6, it must mean that you fall
> in this case:
> > >> if (col == 0xFF)
> > >> return (1 << n_cols);
> 
> But why could row-lines 2,3 and 4 (and only?) all be activated 
> at the same time? From the log the driver even got the same data
> from T2 twice (ie this data):
> 
>   R#  col data
>   0    
>   1    
>   2    
>   3    
>   4    
> 
> You haven't experienced problems without this patch? I would
> expect spurious pressing of all the keys on row's 2-4:
> 
> KEY(2, 0, KEY_ENTER),
> KEY(2, 1, KEY_I),
> KEY(2, 2, KEY_J),
> KEY(2, 3, KEY_K),
> KEY(2, 4, KEY_3),
> KEY(3, 0, KEY_M),
> KEY(3, 1, KEY_N),
> KEY(3, 2, KEY_O),
> KEY(3, 3, KEY_P),
> KEY(3, 4, KEY_Q),
> KEY(4, 0, KEY_R),
> KEY(4, 1, KEY_4),
> KEY(4, 2, KEY_T),
> KEY(4, 3, KEY_U),
> KEY(4, 4, KEY_D),
> KEY(5, 0, KEY_V),
> KEY(5, 1, KEY_W),
> KEY(5, 2, KEY_L),
> KEY(5, 3, KEY_S),
> KEY(5, 4, KEY_H),
> 
> 
> I will prepare a new patch without the non-matrix key support, then
> we can take it from there.

Any news on updating this patch?

Thanks,

Tony
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Re: RFC: moving twl4030-gpio.c to gpiolib

2008-03-28 Thread Tony Lindgren
* Felipe Balbi <[EMAIL PROTECTED]> [080320 15:48]:
> 
> After the patch from Kevin Hilman, I had to rebase my gpiolib patch
> 
> Here an updated version of it.

Can you repost with Signed-off-by?

Tony


> == CUT HERE ==
> 
> diff --git a/arch/arm/mach-omap2/board-sdp-hsmmc.c
> b/arch/arm/mach-omap2/board-sdp-hsmmc.c
> index 3ae5b20..df24be6 100644
> --- a/arch/arm/mach-omap2/board-sdp-hsmmc.c
> +++ b/arch/arm/mach-omap2/board-sdp-hsmmc.c
> @@ -14,6 +14,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -36,8 +37,9 @@
>  #define MMC2_CD_IRQ  1
>  
>  static int sdp_mmc_card_detect(int irq)
> +
>  {
> - return twl4030_get_gpio_datain(irq - IH_TWL4030_GPIO_BASE);
> + return gpio_get_value(irq - IH_TWL4030_GPIO_BASE);
>  }
>  
>  /*
> @@ -50,11 +52,11 @@ static int sdp_mmc_late_init(struct device *dev)
>   /*
>* Configure TWL4030 GPIO parameters for MMC hotplug irq
>*/
> - ret = twl4030_request_gpio(MMC1_CD_IRQ);
> + ret = gpio_request(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ), "mmc1_cd_irq");
>   if (ret != 0)
>   goto err;
>  
> - ret = twl4030_set_gpio_edge_ctrl(MMC1_CD_IRQ,
> + ret = twl4030_set_gpio_edge_ctrl(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
>   TWL4030_GPIO_EDGE_RISING | TWL4030_GPIO_EDGE_FALLING);
>   if (ret != 0)
>   goto err;
> @@ -64,7 +66,8 @@ static int sdp_mmc_late_init(struct device *dev)
>   if (ret != 0)
>   goto err;
>  
> - ret = twl4030_set_gpio_debounce(MMC1_CD_IRQ, TWL4030_GPIO_IS_ENABLE);
> + ret = twl4030_set_gpio_debounce(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ),
> + TWL4030_GPIO_IS_ENABLE);
>   if (ret != 0)
>   goto err;
>  
> @@ -77,11 +80,7 @@ err:
>  
>  static void sdp_mmc_cleanup(struct device *dev)
>  {
> - int ret = 0;
> -
> - ret = twl4030_free_gpio(MMC1_CD_IRQ);
> - if (ret != 0)
> - dev_err(dev, "Failed to configure TWL4030 GPIO IRQ\n");
> + gpio_free(TWL4030_GPIO_IRQ_NO(MMC1_CD_IRQ));
>  }
>  
>  #ifdef CONFIG_PM
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index bbd2834..c340333 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -61,6 +61,12 @@ config GPIO_PCF857X
> This driver provides an in-kernel interface to those GPIOs using
> platform-neutral GPIO calls.
>  
> +config GPIO_TWL4030
> + bool "TWL4030 GPIO Driver"
> + depends on I2C && TWL4030_CORE
> + help
> +   Say yes here to provide support for twl4030 gpio submodule.
> +
>  comment "SPI GPIO expanders:"
>  
>  config GPIO_MCP23S08
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index fdde992..346187e 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -7,3 +7,4 @@ obj-$(CONFIG_HAVE_GPIO_LIB)   += gpiolib.o
>  obj-$(CONFIG_GPIO_MCP23S08)  += mcp23s08.o
>  obj-$(CONFIG_GPIO_PCA953X)   += pca953x.o
>  obj-$(CONFIG_GPIO_PCF857X)   += pcf857x.o
> +obj-$(CONFIG_GPIO_TWL4030)   += twl4030-gpio.o
> diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
> new file mode 100644
> index 000..81ab4ce
> --- /dev/null
> +++ b/drivers/gpio/twl4030-gpio.c
> @@ -0,0 +1,510 @@
> +/*
> + * drivers/gpio/tlw4030-gpio.c - driver for TWL4030 GPIO MODULE
> + *
> + * Copyright (C) 2006-2007 Texas Instruments, Inc.
> + * Copyright (C) 2006 MontaVista Software, Inc.
> + * Copyright (C) 2008 Nokia Corporation
> + *
> + * Moved to gpiolib by:
> + *   Felipe Balbi <[EMAIL PROTECTED]>
> + *
> + * Code re-arranged and cleaned up by:
> + *   Syed Mohammed Khasim <[EMAIL PROTECTED]>
> + *
> + * Initial Code:
> + *   Andy Lowe / Nishanth Menon
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
> USA
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define gpio_to_twl(x)   container_of((x), struct twl4030_gpio, chip)
> +#define DATA_BANK_MAX8
> +#define GET_GPIO_DATA_BANK(x)((x)/DATA_BANK_MAX)
> +#define GET_GPIO_DATA_OFF(x) ((x)%DATA_BANK_MAX)
> +
> +/*
> + * GPIO Block Register definitions
> + */
> +
> +#define REG_GPIODATAIN1  0x0
> +#define REG_GPIODATAIN2  0x1
> +#define REG_GPIODATA

Re: [PATCH 0/7] twl4030 changes

2008-03-28 Thread Tony Lindgren
* Felipe Balbi <[EMAIL PROTECTED]> [080327 19:20]:
> Hi Tony,
> 
> I'm resending this series cuz I changed a bit patch #5 to set
> session bit on musb_platform_set_mode so musb core will really
> go to a_host mode when we echo sysfs.
> 
> Without this small change the sysfs interface will work only with
> a few devices, most likely usb sticks.
> 
> Below is a shortlog and diffstat of the changes.

Pushing this series today.

Tony



> Best regards,
> 
>   - Balbi
> 
> Felipe Balbi (7):
>   I2C: TWL4030: Move twl4030's headers under include/linux/i2c/
>   I2C: TWL4030: Move all *_*.c to *-*.c
>   I2C: TWL4030: General cleanup in twl4030-core.c
>   I2C: TWL4030: Cleanup twl4030-usb.c
>   I2C: TWL4030: Make twl4030-usb.c initialize otg_transceiver
>   I2C: TWL4030: Reorganize code in twl4030-usb.c
>   USB: MUSB: Let board specific code handle clock initialization
> 
>  arch/arm/mach-omap2/board-2430sdp-usb.c|   27 ++
>  arch/arm/mach-omap2/board-3430sdp-usb.c|   29 ++-
>  arch/arm/mach-omap2/board-3430sdp.c|2 +-
>  arch/arm/mach-omap2/board-sdp-hsmmc.c  |2 +-
>  drivers/i2c/chips/Makefile |8 +-
>  .../i2c/chips/{twl4030_core.c => twl4030-core.c}   |   80 ---
>  .../i2c/chips/{twl4030_gpio.c => twl4030-gpio.c}   |2 +-
>  .../{twl4030_poweroff.c => twl4030-poweroff.c} |2 +-
>  drivers/i2c/chips/{twl4030_usb.c => twl4030-usb.c} |  255 
> +---
>  drivers/input/keyboard/omap-twl4030keypad.c|2 +-
>  drivers/rtc/rtc-twl4030.c  |4 +-
>  drivers/usb/musb/musb_core.h   |4 +-
>  drivers/usb/musb/omap2430.c|   39 ++--
>  drivers/usb/musb/omap2430.h|8 -
>  .../{asm-arm/arch-omap => linux/i2c}/twl4030-rtc.h |0 
>  include/{asm-arm/arch-omap => linux/i2c}/twl4030.h |0 
>  16 files changed, 303 insertions(+), 161 deletions(-)
>  rename drivers/i2c/chips/{twl4030_core.c => twl4030-core.c} (93%)
>  rename drivers/i2c/chips/{twl4030_gpio.c => twl4030-gpio.c} (99%)
>  rename drivers/i2c/chips/{twl4030_poweroff.c => twl4030-poweroff.c} (98%)
>  rename drivers/i2c/chips/{twl4030_usb.c => twl4030-usb.c} (87%)
>  rename include/{asm-arm/arch-omap => linux/i2c}/twl4030-rtc.h (100%)
>  rename include/{asm-arm/arch-omap => linux/i2c}/twl4030.h (100%)
> 
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