Re: Git pull request for omap patches for post 2.6.26
* Tony Lindgren [EMAIL PROTECTED] [080716 10:18]: Russell, * Tony Lindgren [EMAIL PROTECTED] [080708 10:39]: * Russell King - ARM Linux [EMAIL PROTECTED] [080707 23:06]: On Thu, Jul 03, 2008 at 01:11:42PM +0300, Tony Lindgren wrote: Please pull the omap patches for post-2.6.26 from: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git omap2-upstream I pulled this some time back but never merged it - but I did look at it. However, I never got around to looking at your other patches on the mailing list I'm afraid. Yes, I think you've only commented on the patches in the first series so far. Let me know if you have any comments on the other patches and I'll fix them ASAP. If you are swamped with looking at the patches and want to only pull the first omap series out of the three, then you can pull only the omap-upstream branch. Unfortunately this option would then leave omap2-clock and omap2-upstream patches to the next merge window. Well looks like all omap-upstream and few omap2-clock patches have been merged. I've rebased the remaining omap2-clock and omap2-upstream patches. Will repost those two series. Basically once these patches are merged, we're a only missing board-*.c files under mach-omap2 to be again mostly in sync with mainline tree for mach-omap2. So hopefully only one more merge window of lots of patches after this merge window! Currently plat-omap and mach-omap1 are pretty close in sync with mainline tree except for some board-*.c under mach-omap1. Looking at what's in this git tree, there's at least a number of commits early on which are empty. I've not really looked much further. Looks like there were the two already merged fixed still there, I've run stg clean on the series and rebased against 2.6.26-rc9. I've also verified that the series applies against your current tree. The location to pull from is same as earlier. Since I've only just remembered about this, I think I'm going to have to say no more to further community PXA commits this side of the merge window to make sufficient time to look at your OMAP stuff properly. It would be nice to have merging mach-* patches more distributed so you don't have to spend so much time looking at that stuff. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/0] Refreshed omap2 clock and powerdomain patches
* Tony Lindgren [EMAIL PROTECTED] [080716 11:52]: This series contains the refreshed omap2 clock and powerdomain patches as some of the patches in this series have been already integrated. This patch series also available via git at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git omap2-clock Sounds like there's no need to resend these, so please ignore this email. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Git pull request for omap patches for post 2.6.26
* Russell King - ARM Linux [EMAIL PROTECTED] [080716 12:37]: On Wed, Jul 16, 2008 at 11:57:37AM +0300, Tony Lindgren wrote: * Russell King - ARM Linux [EMAIL PROTECTED] [080716 11:46]: On Wed, Jul 16, 2008 at 11:01:24AM +0300, Tony Lindgren wrote: Well looks like all omap-upstream and few omap2-clock patches have been merged. I've rebased the remaining omap2-clock and omap2-upstream patches. Will repost those two series. Don't bother rebasing them - I obviously already have them. Well I already rebased them, but you can you the ones you already have as there are no changes. I would have preferred you to have fixed those two _crap_ commits at the beginning of your entire OMAP series - the two which contained no patch whatsoever. I did remove the two empty commits: http://lists.arm.linux.org.uk/lurker/message/20080708.074007.cc2d62c0.en.html Commits that are just words describing an non-existent change are utterly useless. True, and they were promptly removed. I did point this out at the time but you ignored me. Not true. Sounds like you had an earlier pull in your tree that you used instead. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/0] Power domain and clock domain patches for omap
Hi all, This patch series contains power domain and clock domain specific patches for omap posted to linux-arm-kernel list during 2.6.25-rc5. I'm reposting the series to a wider audience as Russell King suspected that other archs may be interested in reviewing these too, or at least some parts of the code. Please take a look and comment the code. Also please point out the pieces of code that may be suitable for your arch too! This patch series also available via git at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git omap2-clock Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] ARM: OMAP2: Powerdomain: Add base OMAP2/3 powerdomain code
From: Paul Walmsley [EMAIL PROTECTED]
This patch creates an interface to the powerdomain registers in the
PRM/CM modules on OMAP2/3. This interface is intended to be used by
PM code, e.g., pm.c; not by device drivers directly.
Each powerdomain will be defined in later patches as static
structures. Also defined are dependencies between powerdomains,
used for adding and removing PM_WKDEP and CM_SLEEPDEP bits. The
powerdomain structures are linked into a list at boot by
pwrdm_register(), similar to the OMAP clock code.
The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_POWERDOMAIN, which
when enabled will emit verbose debug messages via pr_debug().
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 93ee990..1001d42 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
# Common support
obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
- devices.o serial.o gpmc.o timer-gp.o
+ devices.o serial.o gpmc.o timer-gp.o powerdomain.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 4263099..b008d35 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -62,11 +62,14 @@ static void omap3_dpll_recalc(struct clk *clk)
static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits)
{
const struct dpll_data *dd;
+ u32 v;
dd = clk-dpll_data;
- cm_rmw_reg_bits(dd-enable_mask, clken_bits __ffs(dd-enable_mask),
- dd-control_reg);
+ v = __raw_readl(dd-control_reg);
+ v = ~dd-enable_mask;
+ v |= clken_bits __ffs(dd-enable_mask);
+ __raw_writel(v, dd-control_reg);
}
/* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */
@@ -82,7 +85,7 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
state = dd-idlest_bit;
idlest_mask = 1 dd-idlest_bit;
- while (((cm_read_reg(dd-idlest_reg) idlest_mask) != state)
+ while (((__raw_readl(dd-idlest_reg) idlest_mask) != state)
i MAX_DPLL_WAIT_TRIES) {
i++;
udelay(1);
@@ -285,7 +288,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
dd = clk-dpll_data;
- v = cm_read_reg(dd-autoidle_reg);
+ v = __raw_readl(dd-autoidle_reg);
v = dd-autoidle_mask;
v = __ffs(dd-autoidle_mask);
@@ -304,6 +307,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
static void omap3_dpll_allow_idle(struct clk *clk)
{
const struct dpll_data *dd;
+ u32 v;
if (!clk || !clk-dpll_data)
return;
@@ -315,9 +319,10 @@ static void omap3_dpll_allow_idle(struct clk *clk)
* by writing 0x5 instead of 0x1. Add some mechanism to
* optionally enter this mode.
*/
- cm_rmw_reg_bits(dd-autoidle_mask,
- DPLL_AUTOIDLE_LOW_POWER_STOP
__ffs(dd-autoidle_mask),
- dd-autoidle_reg);
+ v = __raw_readl(dd-autoidle_reg);
+ v = ~dd-autoidle_mask;
+ v |= DPLL_AUTOIDLE_LOW_POWER_STOP __ffs(dd-autoidle_mask);
+ __raw_writel(v, dd-autoidle_reg);
}
/**
@@ -329,15 +334,17 @@ static void omap3_dpll_allow_idle(struct clk *clk)
static void omap3_dpll_deny_idle(struct clk *clk)
{
const struct dpll_data *dd;
+ u32 v;
if (!clk || !clk-dpll_data)
return;
dd = clk-dpll_data;
- cm_rmw_reg_bits(dd-autoidle_mask,
- DPLL_AUTOIDLE_DISABLE __ffs(dd-autoidle_mask),
- dd-autoidle_reg);
+ v = __raw_readl(dd-autoidle_reg);
+ v = ~dd-autoidle_mask;
+ v |= DPLL_AUTOIDLE_DISABLE __ffs(dd-autoidle_mask);
+ __raw_writel(v, dd-autoidle_reg);
}
/* Clock control for DPLL outputs */
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
new file mode 100644
index 000..2ae419e
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -0,0 +1,909 @@
+/*
+ * OMAP powerdomain control
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifdef CONFIG_OMAP_DEBUG_POWERDOMAIN
+# define DEBUG
+#endif
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/types.h
+#include linux/delay.h
+#include linux/spinlock.h
+#include linux/list.h
+#include linux/errno.h
+#include linux/err.h
+#include linux/io.h
+
+#include asm/atomic.h
+
+#include cm.h
+#include cm-regbits-34xx.h
+#include prm.h
+#include prm-regbits-34xx.h
+
+#include
[PATCH 02/10] ARM: OMAP2: Powerdomain: Add OMAP2/3 common powerdomains
From: Paul Walmsley [EMAIL PROTECTED]
Add powerdomains common to both OMAP2 and OMAP3 (WKUP and GFX/SGX).
Modify mach-omap2/io.c to initialize the powerdomain code on boot.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 69c8174..20ddfaa 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -24,6 +24,10 @@
#include asm/arch/mux.h
#include asm/arch/omapfb.h
+#include asm/arch/powerdomain.h
+
+#include powerdomains.h
+
extern void omap_sram_init(void);
extern int omap2_clk_init(void);
extern void omap2_check_revision(void);
@@ -101,6 +105,7 @@ void __init omap2_map_common_io(void)
void __init omap2_init_common_hw(void)
{
omap2_mux_init();
+ pwrdm_init(powerdomains_omap);
omap2_clk_init();
/*
* Need to Fix this for 2430
diff --git a/arch/arm/mach-omap2/powerdomains.h
b/arch/arm/mach-omap2/powerdomains.h
new file mode 100644
index 000..56c2a8f
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -0,0 +1,147 @@
+/*
+ * OMAP2/3 common powerdomain definitions
+ *
+ * Copyright (C) 2007-8 Texas Instruments, Inc.
+ * Copyright (C) 2007-8 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ * Debugging and integration fixes by Jouni Högander
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
+#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
+
+/*
+ * This file contains all of the powerdomains that have some element
+ * of software control for the OMAP24xx and OMAP34XX chips.
+ *
+ * A few notes:
+ *
+ * This is not an exhaustive listing of powerdomains on the chips; only
+ * powerdomains that can be controlled in software.
+ *
+ * A useful validation rule for struct powerdomain:
+ * Any powerdomain referenced by a wkdep_srcs or sleepdep_srcs array
+ * must have a dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really
+ * just software-controllable dependencies. Non-software-controllable
+ * dependencies do exist, but they are not encoded below (yet).
+ *
+ * 24xx does not support programmable sleep dependencies (SLEEPDEP)
+ *
+ */
+
+/*
+ * The names for the DSP/IVA2 powerdomains are confusing.
+ *
+ * Most OMAP chips have an on-board DSP.
+ *
+ * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its
+ * powerdomain is called the DSP power domain. On the 2430, the
+ * on-board DSP is a 'C64 DSP, now called the IVA2 or IVA2.1. Its
+ * powerdomain is still called the DSP power domain. On the 3430,
+ * the DSP is a 'C64 DSP like the 2430, also known as the IVA2; but
+ * its powerdomain is now called the IVA2 power domain.
+ *
+ * The 2420 also has something called the IVA, which is a separate ARM
+ * core, and has nothing to do with the DSP/IVA2.
+ *
+ * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
+ * address offset is different between the C55 and C64 DSPs.
+ *
+ * The overly-specific dep_bit names are due to a bit name collision
+ * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
+ * value are the same for all powerdomains: 2
+ */
+
+/*
+ * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
+ * sanity check?
+ * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
+ */
+
+#include asm/arch/powerdomain.h
+
+#include prcm-common.h
+#include prm.h
+#include cm.h
+
+/* OMAP2/3-common powerdomains and wakeup dependencies */
+
+/*
+ * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP
+ * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
+ * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
+ */
+static struct pwrdm_dep gfx_sgx_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = iva2_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
+ CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
+ CHIP_IS_OMAP3430)
+ },
+ { NULL },
+};
+
+/*
+ * OMAP2/3 common powerdomains
+ */
+
+/* XXX add sleepdeps for this powerdomain : 3430 */
+
+/*
+ * The GFX powerdomain is not present on 3430ES2, but currently we do not
+ * have a macro to filter it out at compile-time.
+ */
+static struct powerdomain gfx_pwrdm = {
+ .name = gfx_pwrdm,
+ .prcm_offs= GFX_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
+ CHIP_IS_OMAP3430ES1),
+ .wkdep_srcs =
[PATCH 03/10] ARM: OMAP2: Powerdomain: Add OMAP2 powerdomains
From: Paul Walmsley [EMAIL PROTECTED]
Add OMAP2-specific powerdomains.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/powerdomains.h
b/arch/arm/mach-omap2/powerdomains.h
index 56c2a8f..801e3b3 100644
--- a/arch/arm/mach-omap2/powerdomains.h
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -98,6 +98,10 @@ static struct pwrdm_dep gfx_sgx_wkdeps[] = {
{ NULL },
};
+
+#include powerdomains24xx.h
+
+
/*
* OMAP2/3 common powerdomains
*/
@@ -140,6 +144,16 @@ static struct powerdomain *powerdomains_omap[] __initdata
= {
gfx_pwrdm,
wkup_pwrdm,
+#ifdef CONFIG_ARCH_OMAP24XX
+ dsp_pwrdm,
+ mpu_24xx_pwrdm,
+ core_24xx_pwrdm,
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2430
+ mdm_pwrdm,
+#endif
+
NULL
};
diff --git a/arch/arm/mach-omap2/powerdomains24xx.h
b/arch/arm/mach-omap2/powerdomains24xx.h
new file mode 100644
index 000..6f97c91
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains24xx.h
@@ -0,0 +1,200 @@
+/*
+ * OMAP24XX powerdomain definitions
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ * Debugging and integration fixes by Jouni Högander
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX
+#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX
+
+/*
+ * N.B. If powerdomains are added or removed from this file, update
+ * the array in mach-omap2/powerdomains.h.
+ */
+
+#include asm/arch/powerdomain.h
+
+#include prcm-common.h
+#include prm.h
+#include prm-regbits-24xx.h
+#include cm.h
+#include cm-regbits-24xx.h
+
+/* 24XX powerdomains and dependencies */
+
+#ifdef CONFIG_ARCH_OMAP24XX
+
+
+/* Wakeup dependency source arrays */
+
+/*
+ * 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP
+ * 2430 PM_WKDEP_MDM: same as above
+ */
+static struct pwrdm_dep dsp_mdm_24xx_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ { NULL },
+};
+
+/*
+ * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP
+ * 2430 adds MDM
+ */
+static struct pwrdm_dep mpu_24xx_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = dsp_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = mdm_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+ },
+ { NULL },
+};
+
+/*
+ * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP
+ * 2430 adds MDM
+ */
+static struct pwrdm_dep core_24xx_wkdeps[] = {
+ {
+ .pwrdm_name = dsp_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = gfx_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
+ },
+ {
+ .pwrdm_name = mdm_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+ },
+ { NULL },
+};
+
+
+/* Powerdomains */
+
+static struct powerdomain dsp_pwrdm = {
+ .name = dsp_pwrdm,
+ .prcm_offs= OMAP24XX_DSP_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
+ .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
+ .wkdep_srcs = dsp_mdm_24xx_wkdeps,
+ .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts_logic_ret = PWRDM_POWER_RET,
+ .banks= 1,
+ .pwrsts_mem_ret = {
+ [0] = PWRDM_POWER_RET,
+ },
+ .pwrsts_mem_on= {
+ [0] = PWRDM_POWER_ON,
+ },
+};
+
+static struct powerdomain mpu_24xx_pwrdm = {
+ .name = mpu_pwrdm,
+ .prcm_offs= MPU_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
+ .dep_bit = OMAP24XX_EN_MPU_SHIFT,
+ .wkdep_srcs = mpu_24xx_wkdeps,
+ .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts_logic_ret = PWRSTS_OFF_RET,
+ .banks= 1,
+ .pwrsts_mem_ret = {
+ [0] = PWRDM_POWER_RET,
+
[PATCH 04/10] ARM: OMAP: Powerdomain: Add OMAP3 powerdomains
From: Paul Walmsley [EMAIL PROTECTED]
Add OMAP3-specific powerdomains.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/powerdomains.h
b/arch/arm/mach-omap2/powerdomains.h
index 801e3b3..5ad9cb0 100644
--- a/arch/arm/mach-omap2/powerdomains.h
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -98,16 +98,28 @@ static struct pwrdm_dep gfx_sgx_wkdeps[] = {
{ NULL },
};
+/*
+ * 3430: CM_SLEEPDEP_CAM: MPU
+ * 3430ES1: CM_SLEEPDEP_GFX: MPU
+ * 3430ES2: CM_SLEEPDEP_SGX: MPU
+ */
+static struct pwrdm_dep cam_gfx_sleepdeps[] = {
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ { NULL },
+};
+
#include powerdomains24xx.h
+#include powerdomains34xx.h
/*
* OMAP2/3 common powerdomains
*/
-/* XXX add sleepdeps for this powerdomain : 3430 */
-
/*
* The GFX powerdomain is not present on 3430ES2, but currently we do not
* have a macro to filter it out at compile-time.
@@ -118,6 +130,7 @@ static struct powerdomain gfx_pwrdm = {
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
CHIP_IS_OMAP3430ES1),
.wkdep_srcs = gfx_sgx_wkdeps,
+ .sleepdep_srcs= cam_gfx_sleepdeps,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRDM_POWER_RET,
.banks= 1,
@@ -154,6 +167,19 @@ static struct powerdomain *powerdomains_omap[] __initdata
= {
mdm_pwrdm,
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+ iva2_pwrdm,
+ mpu_34xx_pwrdm,
+ neon_pwrdm,
+ core_34xx_pwrdm,
+ cam_pwrdm,
+ dss_pwrdm,
+ per_pwrdm,
+ emu_pwrdm,
+ sgx_pwrdm,
+ usbhost_pwrdm,
+#endif
+
NULL
};
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h
b/arch/arm/mach-omap2/powerdomains34xx.h
new file mode 100644
index 000..1e1146a
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -0,0 +1,327 @@
+/*
+ * OMAP34XX powerdomain definitions
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ * Debugging and integration fixes by Jouni Högander
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX
+#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX
+
+/*
+ * N.B. If powerdomains are added or removed from this file, update
+ * the array in mach-omap2/powerdomains.h.
+ */
+
+#include asm/arch/powerdomain.h
+
+#include prcm-common.h
+#include prm.h
+#include prm-regbits-34xx.h
+#include cm.h
+#include cm-regbits-34xx.h
+
+/*
+ * 34XX-specific powerdomains, dependencies
+ */
+
+#ifdef CONFIG_ARCH_OMAP34XX
+
+/*
+ * 3430: PM_WKDEP_{PER,USBHOST}: CORE, IVA2, MPU, WKUP
+ * (USBHOST is ES2 only)
+ */
+static struct pwrdm_dep per_usbhost_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = iva2_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ { NULL },
+};
+
+/*
+ * 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER
+ */
+static struct pwrdm_dep mpu_34xx_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = iva2_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = dss_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = per_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ { NULL },
+};
+
+/*
+ * 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER
+ */
+static struct pwrdm_dep iva2_wkdeps[] = {
+ {
+ .pwrdm_name = core_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = mpu_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = wkup_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = dss_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ {
+ .pwrdm_name = per_pwrdm,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+ },
+ { NULL },
+};
+
+
+/* 3430 PM_WKDEP_{CAM,DSS}:
[PATCH 05/10] ARM: OMAP2: Clockdomain: Add base OMAP2/3 clockdomain code
From: Paul Walmsley [EMAIL PROTECTED]
This patch creates an interface to the clockdomain registers in the
PRM/CM modules on OMAP2/3. This interface is intended to be used by
PM code, e.g., pm.c; not by device drivers directly.
The patch also adds clockdomain usecount tracking. This is intended
to be called whenever the first clock in a clockdomain is enabled, or
when the last enabled clock in a clockdomain is disabled. If the
clockdomain is in software-supervised mode, the code will force-wakeup
or force-sleep the clockdomain. If the clockdomain is in
hardware-supervised mode, the first clock enable will add sleep and
wakeup dependencies on a user-selectable set of parent domains (usually
MPU IVA2), and the disable will remove them.
Each clockdomain will be defined in later patches as static
structures. The clockdomain structures are linked into a list at boot
by clkdm_register(), similar to the OMAP clock code.
The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_CLOCKDOMAIN, which
when enabled will emit verbose debug messages via pr_debug().
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1001d42..e7cf1b4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,8 @@
# Common support
obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
- devices.o serial.o gpmc.o timer-gp.o powerdomain.o
+ devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
+ clockdomain.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
new file mode 100644
index 000..c0cd872
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -0,0 +1,603 @@
+/*
+ * OMAP2/3 clockdomain framework functions
+ *
+ * Copyright (C) 2008 Texas Instruments, Inc.
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley and Jouni Högander
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifdef CONFIG_OMAP_DEBUG_CLOCKDOMAIN
+# define DEBUG
+#endif
+
+#include linux/module.h
+#include linux/kernel.h
+#include linux/device.h
+#include linux/list.h
+#include linux/errno.h
+#include linux/delay.h
+#include linux/clk.h
+#include linux/limits.h
+
+#include linux/io.h
+
+#include linux/bitops.h
+
+#include asm/arch/clock.h
+
+#include prm.h
+#include prm-regbits-24xx.h
+#include cm.h
+
+#include asm/arch/powerdomain.h
+#include asm/arch/clockdomain.h
+
+/* clkdm_list contains all registered struct clockdomains */
+static LIST_HEAD(clkdm_list);
+
+/* clkdm_mutex protects clkdm_list add and del ops */
+static DEFINE_MUTEX(clkdm_mutex);
+
+/* array of powerdomain deps to be added/removed when clkdm in hwsup mode */
+static struct clkdm_pwrdm_autodep *autodeps;
+
+
+/* Private functions */
+
+/*
+ * _autodep_lookup - resolve autodep pwrdm names to pwrdm pointers; store
+ * @autodep: struct clkdm_pwrdm_autodep * to resolve
+ *
+ * Resolve autodep powerdomain names to powerdomain pointers via
+ * pwrdm_lookup() and store the pointers in the autodep structure. An
+ * autodep is a powerdomain sleep/wakeup dependency that is
+ * automatically added and removed whenever clocks in the associated
+ * clockdomain are enabled or disabled (respectively) when the
+ * clockdomain is in hardware-supervised mode. Meant to be called
+ * once at clockdomain layer initialization, since these should remain
+ * fixed for a particular architecture. No return value.
+ */
+static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep)
+{
+ struct powerdomain *pwrdm;
+
+ if (!autodep)
+ return;
+
+ if (!omap_chip_is(autodep-omap_chip))
+ return;
+
+ pwrdm = pwrdm_lookup(autodep-pwrdm_name);
+ if (!pwrdm) {
+ pr_debug(clockdomain: _autodep_lookup: powerdomain %s
+does not exist\n, autodep-pwrdm_name);
+ WARN_ON(1);
+ return;
+ }
+ autodep-pwrdm = pwrdm;
+
+ return;
+}
+
+/*
+ * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable
+ * @clkdm: struct clockdomain *
+ *
+ * Add the autodep sleep wakeup dependencies to clockdomain 'clkdm'
+ * in hardware-supervised mode. Meant to be called from clock framework
+ * when a clock inside clockdomain 'clkdm' is enabled. No return value.
+ */
+static void _clkdm_add_autodeps(struct clockdomain *clkdm)
+{
+ struct clkdm_pwrdm_autodep *autodep;
+
+ for (autodep = autodeps; autodep-pwrdm_name; autodep++) {
+ if (!autodep-pwrdm)
+ continue;
+
+ pr_debug(clockdomain: adding %s sleepdep/wkdep for
+pwrdm %s\n, autodep-pwrdm_name,
+
Re: [PATCH 0/0] Refreshed omap2 clock and powerdomain patches
* Russell King - ARM Linux [EMAIL PROTECTED] [080716 12:41]: On Wed, Jul 16, 2008 at 11:53:20AM +0300, Tony Lindgren wrote: This series contains the refreshed omap2 clock and powerdomain patches as some of the patches in this series have been already integrated. I think the clock and power domain patches need much more review. They're introducing a couple of new management subsystems which may be of interest to other SoCs, maybe even different architectures. Sure the power domain and clock domain code can be worked into something more generic once we've figured out what can be shared. I've posted these patches to LKML and linux-pm for other arch people to look at too. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] PROTECT_KEY register is in the PM_MASTER module not in the PM_RECEIVER module
This patch fixes a write to the wrong address in the triton2 chip. Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED] --- drivers/i2c/chips/twl4030-usb.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/chips/twl4030-usb.c b/drivers/i2c/chips/twl4030-usb.c index ab335ca..20858b5 100644 --- a/drivers/i2c/chips/twl4030-usb.c +++ b/drivers/i2c/chips/twl4030-usb.c @@ -586,7 +586,7 @@ static void twl4030_usb_ldo_init(struct twl4030_usb *twl) twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE); /* disable access to power configuration registers */ - twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY); + twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY); } static irqreturn_t twl4030_usb_irq(int irq, void *_twl) -- 1.5.3.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Kernel oops when shutting down program using usb device
The program streams data from the USRP (Universal Software Radio Peripheral) and calculates a transfer rate. It looks like the test completes and the program ooops as it is exiting. Let me know if I can collect anything else. I am not much of a usb guy :( Philip [EMAIL PROTECTED]:~/gnuradio-3.1.2/usrp/host/apps# ./test_usrp_standard_rx -D 200rx_overrun eth0: set allmulti eth0: set allmulti eth0: set allmulti eth0: set allmulti xfered 1.34e+08 bytes in 116 seconds. 1.159e+06 bytes/sec. cpu time = 1.633 noverruns = 1 [ cut here ] WARNING: at lib/kref.c:43 kref_get+0x28/0x44() Modules linked in: ipv6 pegasus [c0037b88] (dump_stack+0x0/0x14) from [c0053c44] (warn_on_slowpath+0x4c/0x68) [c0053bf8] (warn_on_slowpath+0x0/0x68) from [c0176064] (kref_get+0x28/0x44) r6:c7cbd1c0 r5:c700a880 r4:c700a880 [c017603c] (kref_get+0x0/0x44) from [c01eac18] (usb_get_urb+0x18/0x20) r5:c700a880 r4:c700a880 [c01eac00] (usb_get_urb+0x0/0x20) from [c01e9fa0] (usb_hcd_flush_endpoint+0xa0/0xcc) r5:c700a880 r4:c7cbd1b8 [c01e9f00] (usb_hcd_flush_endpoint+0x0/0xcc) from [c01eb1a0] (usb_disable_endpoint+0x5c/0x6c) r7:c7c9e000 r6:c7cbd548 r5:c7c9e000 r4:c7cbd1c0 [c01eb144] (usb_disable_endpoint+0x0/0x6c) from [c01eb2dc] (usb_disable_interface+0x34/0x4c) r5:0028 r4:0001 [c01eb2a8] (usb_disable_interface+0x0/0x4c) from [c01edec0] (usb_unbind_interface+0x44/0xa0) r7: r6:c041a884 r5:c7fc6200 r4:c7fc6220 [c01ede7c] (usb_unbind_interface+0x0/0xa0) from [c01b99e4] (__device_release_driver+0x78/0x98) r9:c718c000 r8:c7c9e108 r7:0001 r6:c7fc6200 r5:c041a884 r4:c7fc6220 [c01b996c] (__device_release_driver+0x0/0x98) from [c01b9ab8] (device_release_driver+0x24/0x30) r5:c7fc62c8 r4:c7fc6220 [c01b9a94] (device_release_driver+0x0/0x30) from [c01eda20] (usb_driver_release_interface+0x54/0x90) r5:c7c9e060 r4:c7f91180 [c01ed9cc] (usb_driver_release_interface+0x0/0x90) from [c01f0e74] (releaseintf+0x58/0x64) r7:0001 r6:c7fc6200 r5:0002 r4:c7f91180 [c01f0e1c] (releaseintf+0x0/0x64) from [c01f1024] (usbdev_release+0x80/0xec) r7:0001 r6:c7c9e000 r5:0002 r4:c7f91180 [c01f0fa4] (usbdev_release+0x0/0xec) from [c00a1efc] (__fput+0xb8/0x170) r9:c718c000 r8:c78ec080 r7:0006 r6:c700ab80 r5:c707d3d0 r4:0008 [c00a1e44] (__fput+0x0/0x170) from [c00a2270] (fput+0x30/0x34) [c00a2240] (fput+0x0/0x34) from [c009ee78] (filp_close+0x74/0x80) [c009ee04] (filp_close+0x0/0x80) from [c00a0390] (sys_close+0x84/0xb8) r7:0006 r6: r5:c700ab80 r4:c7fefb40 [c00a030c] (sys_close+0x0/0xb8) from [c0033b00] (ret_fast_syscall+0x0/0x2c) r5:40050250 r4:00012668 ---[ end trace fa9f194ff0bebebb ]--- smime.p7s Description: S/MIME Cryptographic Signature
Re: Kernel oops when shutting down program using usb device
On Wed, 16 Jul 2008, Philip Balister wrote: The program streams data from the USRP (Universal Software Radio Peripheral) and calculates a transfer rate. It looks like the test completes and the program ooops as it is exiting. Let me know if I can collect anything else. I am not much of a usb guy :( Philip [EMAIL PROTECTED]:~/gnuradio-3.1.2/usrp/host/apps# ./test_usrp_standard_rx -D 200rx_overrun eth0: set allmulti eth0: set allmulti eth0: set allmulti eth0: set allmulti xfered 1.34e+08 bytes in 116 seconds. 1.159e+06 bytes/sec. cpu time = 1.633 noverruns = 1 [ cut here ] WARNING: at lib/kref.c:43 kref_get+0x28/0x44() This is just a warning, not an oops. Nevertheless, it should not happen. What version of the kernel were you running? On what hardware and using which USB host controller driver? Is the problem reproducible? Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Kernel oops when shutting down program using usb device
Alan Stern wrote: On Wed, 16 Jul 2008, Philip Balister wrote: The program streams data from the USRP (Universal Software Radio Peripheral) and calculates a transfer rate. It looks like the test completes and the program ooops as it is exiting. Let me know if I can collect anything else. I am not much of a usb guy :( Philip [EMAIL PROTECTED]:~/gnuradio-3.1.2/usrp/host/apps# ./test_usrp_standard_rx -D 200rx_overrun eth0: set allmulti eth0: set allmulti eth0: set allmulti eth0: set allmulti xfered 1.34e+08 bytes in 116 seconds. 1.159e+06 bytes/sec. cpu time = 1.633 noverruns = 1 [ cut here ] WARNING: at lib/kref.c:43 kref_get+0x28/0x44() This is just a warning, not an oops. Nevertheless, it should not happen. What version of the kernel were you running? On what hardware and using which USB host controller driver? Is the problem reproducible? Doh, silly me for leaving out details Beagle Board, OMAP3 based. Kernel is a fairly recent git + some patches. I can backtrack to an exact collection if necessary. I ran the test program several times and the system hangs when the program ends. I do not think I get the warning message every time though, the system does hang every time. Philip smime.p7s Description: S/MIME Cryptographic Signature
Re: Kernel oops when shutting down program using usb device
On Wed, Jul 16, 2008 at 05:59:01PM -0400, Philip Balister wrote: Alan Stern wrote: On Wed, 16 Jul 2008, Philip Balister wrote: The program streams data from the USRP (Universal Software Radio Peripheral) and calculates a transfer rate. It looks like the test completes and the program ooops as it is exiting. Let me know if I can collect anything else. I am not much of a usb guy :( Philip [EMAIL PROTECTED]:~/gnuradio-3.1.2/usrp/host/apps# ./test_usrp_standard_rx -D 200rx_overrun eth0: set allmulti eth0: set allmulti eth0: set allmulti eth0: set allmulti xfered 1.34e+08 bytes in 116 seconds. 1.159e+06 bytes/sec. cpu time = 1.633 noverruns = 1 [ cut here ] WARNING: at lib/kref.c:43 kref_get+0x28/0x44() This is just a warning, not an oops. Nevertheless, it should not happen. What version of the kernel were you running? On what hardware and using which USB host controller driver? Is the problem reproducible? Doh, silly me for leaving out details Beagle Board, OMAP3 based. Kernel is a fairly recent git + some patches. I can backtrack to an exact collection if necessary. I ran the test program several times and the system hangs when the program ends. I do not think I get the warning message every time though, the system does hang every time. Hmm... so it's musb. Please, recompile your kernel with CONFIG_USB_MUSB_LOGLEVEL set to 3 and enable also CONFIG_USB_DEBUG and CONFIG_USB_GADGET_DEBUG. Set sysrq-trigger to 8 (echo 8 /proc/sysrq-trigger) and musb debug messages will be written to you current console. Send that output in next mail :-) I'll try to look at it tomorrow with my beagle. Which gadget driver are you using ? Get me the output of uname -r. Which test program is that ? Tell me how to reproduce the WARNING if I don't have your test program. -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP PM interface, version 3
Hello everyone, this is the third version of the OMAP PM interface patch. Major changes since the second revision: 1. set_max_mpu_wakeup_lat() has been added. This is intended to limit the amount of time needed for the MPU to wake up and enter a device driver's interrupt handler. 2. set_max_dma_lat() has been renamed to set_max_sdma_lat() 3. omap_pm_dsp_get_opp_table() and struct omap_opp have been added for future DSPBridge/CPUFreq use. omap_pm_if_init() now takes pointers to struct omap_opp arrays that are intended to be passed in from the board-*.c files. 4. Interface documentation has been moved to the include/asm-arm/arch-omap/omap-pm.h file. 5. Documentation updated and moved into Documentation/arm/OMAP/omap_pm Further comments welcome, - Paul - This message proposes the third version of a power management interface (the OMAP PM interface) for the linux-omap kernel tree. It includes a general device driver PM interface, along with some specialized interfaces for CPUFreq, DSPBridge, and the powerdomain/clockdomain code. This message focuses on the general device driver portion, since it is most relevant to the larger community of OMAP device driver developers. The interface is intended to allow drivers to take advantage of OMAP power management features: - without locking drivers into a particular underlying implementation; - without adding constraints that are specific to particular OMAP variants; and - without affecting other architectures. The device driver portion of the interface covers four types of PM constraints: 1. Set the maximum MPU wakeup latency 2. Set the maximum device wakeup latency 3. Set the maximum system DMA transfer start latency (CORE pwrdm) 4. Set the minimum bus throughput needed by a device These are described in more detail in the patch. This interface is intended to be temporary, to survive only until the Linux PM QoS layer supports these features. This interface is a collaborative product of many people from Nokia and TI: Karthik Dasu, Jouni Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, and Richard Woodruff. Included in the patch is a 'no-op' implementation that documents the interface and emits debug messages. Rajendra Nayak at TI has developed an initial implementation of the OMAP PM interface that relies mostly on TI's Shared Resource Framework. Also under development is an implementation of the OMAP PM code that uses the existing Linux PM QoS code. Comments welcomed, - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] OMAP3 clock: fix 96MHz clocks, usbhost_120m_fclk enable
This series fixes a few bugs in the OMAP3 clock tree. The most noticeable difference is that the Clock usbhost_48m_fck didn't enable in 10 tries no longer appears during boot. --- textdata bss dec hex filename 3391587 157104 107136 3655827 37c893 vmlinux.3430sdp.orig 3391683 157104 107136 3655923 37c8f3 vmlinux.3430sdp.new arch/arm/mach-omap2/clock.c | 63 ++--- arch/arm/mach-omap2/clock34xx.h | 60 --- arch/arm/mach-omap2/cm-regbits-34xx.h | 10 - 3 files changed, 80 insertions(+), 53 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] OMAP3 clock: don't wait for USBHOST IDLEST bit on usbhost_120m_fclk enable
USBHOST on 3430ES2+ has both an initiator and a target CM_IDLEST bit.
Previously, usbhost_48m_fclk enable waited on the wrong bit -- now
fixed. Also, it appears that USBHOST module readiness (in terms of
CM_IDLEST) only depends on usbhost_48m_fclk and usbhost_iclk. So
don't wait on usbhost_120m_fck.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock.c | 63 ++---
arch/arm/mach-omap2/cm-regbits-34xx.h |2 +
2 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 577be44..5174892 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -222,8 +222,8 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask,
const char *name)
*/
static void omap2_clk_wait_ready(struct clk *clk)
{
- u32 bit;
- unsigned long reg, other_reg, st_reg, prcm_mod, prcm_regid;
+ u32 other_bit, idlest_bit;
+ unsigned long reg, other_reg, idlest_reg, prcm_mod, prcm_regid;
reg = (unsigned long)clk-enable_reg;
prcm_mod = reg ~0xff;
@@ -236,6 +236,10 @@ static void omap2_clk_wait_ready(struct clk *clk)
else
return;
+ /* Covers most of the cases - a few exceptions are below */
+ other_bit = 1 clk-enable_bit;
+ idlest_bit = other_bit;
+
/* 24xx: DSS and CAM have no idlest bits for their target agents */
if (cpu_is_omap24xx()
(prcm_mod == OMAP2420_CM_REGADDR(CORE_MOD, 0) ||
@@ -253,11 +257,15 @@ static void omap2_clk_wait_ready(struct clk *clk)
if (cpu_is_omap34xx()) {
/* SSI */
- if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)
- prcm_mod == OMAP34XX_CM_REGADDR(CORE_MOD, 0)
+ if (prcm_mod == OMAP34XX_CM_REGADDR(CORE_MOD, 0)
(reg 0x0f) == 0
- clk-enable_bit == OMAP3430_EN_SSI_SHIFT)
- return;
+ clk-enable_bit == OMAP3430_EN_SSI_SHIFT) {
+
+ if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
+ return;
+
+ idlest_bit = OMAP3430ES2_ST_SSI_IDLE;
+ }
/* DSS */
if (prcm_mod == OMAP34XX_CM_REGADDR(OMAP3430_DSS_MOD, 0)) {
@@ -272,38 +280,35 @@ static void omap2_clk_wait_ready(struct clk *clk)
*/
if (clk-enable_bit != OMAP3430_EN_DSS1_SHIFT)
return;
+
+ idlest_bit = OMAP3430ES2_ST_DSS_IDLE;
}
+ /* USBHOST */
+ if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)
+ prcm_mod == OMAP34XX_CM_REGADDR(OMAP3430ES2_USBHOST_MOD,
0)) {
+
+ /*
+* The 120MHz clock apparently has nothing to do with
+* USBHOST module accessibility
+*/
+ if (clk-enable_bit == OMAP3430ES2_EN_USBHOST2_SHIFT)
+ return;
+
+ idlest_bit = OMAP3430ES2_ST_USBHOST_IDLE;
+
+ }
}
/* Check if both functional and interface clocks
* are running. */
- bit = 1 clk-enable_bit;
- if (!(__raw_readl((void __iomem *)other_reg) bit))
+ if (!(__raw_readl((void __iomem *)other_reg) other_bit))
return;
- /*
-* OMAP3430ES2+ has target idlest bits at unusual offsets for
-* modules with both initiator and target agents
-*/
- if (cpu_is_omap34xx()) {
-
- /* SSI */
- if (prcm_mod == OMAP34XX_CM_REGADDR(CORE_MOD, 0)
- (reg 0x0f) == 0
- clk-enable_bit == OMAP3430_EN_SSI_SHIFT)
- bit = OMAP3430ES2_ST_SSI_IDLE;
-
- /* DSS */
- if (prcm_mod == OMAP34XX_CM_REGADDR(OMAP3430_DSS_MOD, 0)
- clk-enable_bit == OMAP3430_EN_DSS1_SHIFT)
- bit = OMAP3430ES2_ST_DSS_IDLE;
-
- }
-
- st_reg = ((other_reg ~0xf0) | 0x20); /* CM_IDLEST* */
+ idlest_reg = ((other_reg ~0xf0) | 0x20); /* CM_IDLEST* */
- omap2_wait_clock_ready((void __iomem *)st_reg, bit, clk-name);
+ omap2_wait_clock_ready((void __iomem *)idlest_reg, idlest_bit,
+ clk-name);
}
/* Enables clock without considering parent dependencies or use count
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h
b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 07ab180..ffb695b 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -690,6 +690,8 @@
#define OMAP3430ES2_EN_USBHOST_MASK(1 0)
/* CM_IDLEST_USBHOST */
+#define OMAP3430ES2_ST_USBHOST_IDLE(1 1)
+#define OMAP3430ES2_ST_USBHOST_STDBY
[PATCH 1/2] OMAP3 clock: fix 96MHz clocks
Fix some bugs in the OMAP3 clock tree pertaining to the 96MHz clocks.
The 96MHz portion of the clock tree should now have reasonable
fidelity to the 34xx TRM Rev I.
One remaining question mark: it's not clear exactly which 96MHz source
clock the USIM uses. This patch sticks with the previous setting, which
seems reasonable.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock34xx.h | 60 +
arch/arm/mach-omap2/cm-regbits-34xx.h |8 +++-
2 files changed, 44 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 161da12..962608f 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -661,6 +661,12 @@ static const struct clksel omap_96m_alwon_fck_clksel[] = {
{ .parent = NULL }
};
+/*
+ * DPLL4 generates DPLL4_M2X2_CLK which is then routed into the PRM as
+ * PRM_96M_ALWON_(F)CLK. Two clocks then emerge from the PRM:
+ * 96M_ALWON_FCLK (called omap_96m_alwon_fck below) and
+ * CM_96K_(F)CLK.
+ */
static struct clk omap_96m_alwon_fck = {
.name = omap_96m_alwon_fck,
.parent = dpll4_m2x2_ck,
@@ -669,31 +675,41 @@ static struct clk omap_96m_alwon_fck = {
.clksel_mask= OMAP3430_ST_PERIPH_CLK_MASK,
.clksel = omap_96m_alwon_fck_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
-PARENT_CONTROLS_CLOCK,
+ PARENT_CONTROLS_CLOCK,
.recalc = omap2_clksel_recalc,
};
-static struct clk omap_96m_fck = {
- .name = omap_96m_fck,
+static struct clk cm_96m_fck = {
+ .name = cm_96m_fck,
.parent = omap_96m_alwon_fck,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
.recalc = followparent_recalc,
};
-static const struct clksel cm_96m_fck_clksel[] = {
- { .parent = sys_ck,.rates = dpll_bypass_rates },
- { .parent = dpll4_m2x2_ck, .rates = dpll_locked_rates },
+static const struct clksel_rate omap_96m_dpll_rates[] = {
+ { .div = 1, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE },
+ { .div = 0 }
+};
+
+static const struct clksel_rate omap_96m_sys_rates[] = {
+ { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE },
+ { .div = 0 }
+};
+
+static const struct clksel omap_96m_fck_clksel[] = {
+ { .parent = cm_96m_fck, .rates = omap_96m_dpll_rates },
+ { .parent = sys_ck, .rates = omap_96m_sys_rates },
{ .parent = NULL }
};
-static struct clk cm_96m_fck = {
- .name = cm_96m_fck,
- .parent = dpll4_m2x2_ck,
+static struct clk omap_96m_fck = {
+ .name = omap_96m_fck,
+ .parent = sys_ck,
.init = omap2_init_clksel_parent,
- .clksel_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
- .clksel_mask= OMAP3430_ST_PERIPH_CLK_MASK,
- .clksel = cm_96m_fck_clksel,
+ .clksel_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
+ .clksel_mask= OMAP3430_SOURCE_96M_MASK,
+ .clksel = omap_96m_fck_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
.recalc = omap2_clksel_recalc,
@@ -761,14 +777,14 @@ static struct clk omap_54m_fck = {
.name = omap_54m_fck,
.init = omap2_init_clksel_parent,
.clksel_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
- .clksel_mask= OMAP3430_SOURCE_54M,
+ .clksel_mask= OMAP3430_SOURCE_54M_MASK,
.clksel = omap_54m_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
.recalc = omap2_clksel_recalc,
};
-static const struct clksel_rate omap_48m_96md2_rates[] = {
+static const struct clksel_rate omap_48m_cm96m_rates[] = {
{ .div = 2, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE },
{ .div = 0 }
};
@@ -779,7 +795,7 @@ static const struct clksel_rate omap_48m_alt_rates[] = {
};
static const struct clksel omap_48m_clksel[] = {
- { .parent = cm_96m_fck, .rates = omap_48m_96md2_rates },
+ { .parent = cm_96m_fck, .rates = omap_48m_cm96m_rates },
{ .parent = sys_altclk, .rates = omap_48m_alt_rates },
{ .parent = NULL }
};
@@ -788,7 +804,7 @@ static struct clk omap_48m_fck = {
.name = omap_48m_fck,
.init = omap2_init_clksel_parent,
.clksel_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
- .clksel_mask= OMAP3430_SOURCE_48M,
+ .clksel_mask= OMAP3430_SOURCE_48M_MASK,
.clksel = omap_48m_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
