Re: [PATCH] omap3-iommu: reorganize
From: ext Felipe Contreras felipe.contre...@gmail.com
Subject: [PATCH] omap3-iommu: reorganize
Date: Mon, 18 May 2009 18:43:00 +0200
No functional changes.
Signed-off-by: Felipe Contreras felipe.contre...@gmail.com
---
How about this?
What's the advantage of introducing a new structure here?
arch/arm/mach-omap2/omap3-iommu.c | 53
++---
1 files changed, 26 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap2/omap3-iommu.c
b/arch/arm/mach-omap2/omap3-iommu.c
index 91ee38a..50bd445 100644
--- a/arch/arm/mach-omap2/omap3-iommu.c
+++ b/arch/arm/mach-omap2/omap3-iommu.c
@@ -14,32 +14,30 @@
#include mach/iommu.h
-#define OMAP3_MMU1_BASE 0x480bd400
-#define OMAP3_MMU2_BASE 0x5d00
-#define OMAP3_MMU1_IRQ 24
-#define OMAP3_MMU2_IRQ 28
-
-
-static unsigned long iommu_base[] __initdata = {
- OMAP3_MMU1_BASE,
- OMAP3_MMU2_BASE,
-};
-
-static int iommu_irq[] __initdata = {
- OMAP3_MMU1_IRQ,
- OMAP3_MMU2_IRQ,
+struct iommu_device {
+ resource_size_t base;
+ int irq;
+ struct iommu_platform_data pdata;
};
-static const struct iommu_platform_data omap3_iommu_pdata[] __initconst = {
+static struct iommu_device devices[] __initdata = {
{
- .name = isp,
- .nr_tlb_entries = 8,
- .clk_name = cam_ick,
+ .base = 0x480bd400,
+ .irq = 24,
+ .pdata = {
+ .name = isp,
+ .nr_tlb_entries = 8,
+ .clk_name = cam_ick,
+ },
},
{
- .name = iva2,
- .nr_tlb_entries = 32,
- .clk_name = iva2_ck,
+ .base = 0x5d00,
+ .irq = 28,
+ .pdata = {
+ .name = iva2,
+ .nr_tlb_entries = 32,
+ .clk_name = iva2_ck,
+ },
},
};
#define NR_IOMMU_DEVICES ARRAY_SIZE(omap3_iommu_pdata)
@@ -52,6 +50,7 @@ static int __init omap3_iommu_init(void)
for (i = 0; i NR_IOMMU_DEVICES; i++) {
struct platform_device *pdev;
+ const struct iommu_device *d = devices[i];
struct resource res[2];
pdev = platform_device_alloc(omap-iommu, i);
@@ -60,19 +59,19 @@ static int __init omap3_iommu_init(void)
goto err_out;
}
- memset(res, 0, sizeof(res));
- res[0].start = iommu_base[i];
- res[0].end = iommu_base[i] + MMU_REG_SIZE - 1;
+ memset(res, 0, sizeof(res));
+ res[0].start = d-base;
+ res[0].end = d-base + MMU_REG_SIZE - 1;
res[0].flags = IORESOURCE_MEM;
- res[1].start = res[1].end = iommu_irq[i];
+ res[1].start = res[1].end = d-irq;
res[1].flags = IORESOURCE_IRQ;
err = platform_device_add_resources(pdev, res,
ARRAY_SIZE(res));
if (err)
goto err_out;
- err = platform_device_add_data(pdev, omap3_iommu_pdata[i],
-sizeof(omap3_iommu_pdata[0]));
+ err = platform_device_add_data(pdev, d-pdata,
+sizeof(d-pdata));
if (err)
goto err_out;
err = platform_device_add(pdev);
--
1.6.3.1
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Re: N810: latest linux-omap-2.6.git master
On Tue, 19 May 2009 00:09:20 -0500 Luke-Jr l...@dashjr.org wrote: Yes, that change seemed to get me booting... however, with rc6, the keyboard no longer works *at all*, and in neither rc4 nor rc6 does p54spi actually work. For me keyboard still works as partially (commit 0b2ce840c9fb58cf489bfdfc2d77f99a09a5dca3). I wonder what have caused it to break during 2.6.30-rc since at quick look I don't point any special from Tony's Extra omap code in linux-omap tree patches and patches before those are from February? git whatchanged arch/arm/mach-omap2/board-n800.c git whatchanged drivers/input/keyboard/lm8323.c Tried setting up g_ether, but for some reason I couldn't get it to auto- configure (via Gentoo's boot scripts) for rc6. For me it works but usually only if cable has been plugged in while booting. Same with Beagle as well. Any idea from MUSB guys? Is anyone actually trying to work on or maintain N8x0 support? I think N8x0 support is a little bit behind from other boards. Lot of active development is going around on newer and more open platforms like Beagle and not all patches are necessary tested on N8x0 (or other boards too!). Of course active hacker base helps to point out breakages. -- Jarkko -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] omap3-iommu: reorganize
On Tue, May 19, 2009 at 9:03 AM, Hiroshi DOYU hiroshi.d...@nokia.com wrote:
From: ext Felipe Contreras felipe.contre...@gmail.com
Subject: [PATCH] omap3-iommu: reorganize
Date: Mon, 18 May 2009 18:43:00 +0200
No functional changes.
Signed-off-by: Felipe Contreras felipe.contre...@gmail.com
---
How about this?
What's the advantage of introducing a new structure here?
That instead of having 3 arrays with potentially different sizes:
iommu_base
iommu_irq
omap3_iommu_pdata
You have one:
devices
Also, think about the hypothetical situation where you need 2 more
iommu devices (maybe OMAP4?). What would you need to do? You'll need
to add OMAP3_MMU3_BASE and OMAP3_MMU4_BASE add them to iommu_base,
then add OMAP3_MMU3_IRQ and OMAP3_MMU4_IRQ and put them to iommu_irq,
finally add the device data to omap3_iommu_pdata.
In the process a simple mistake would be easy to overlook:
static unsigned long iommu_base[] __initdata = {
OMAP3_MMU1_BASE,
OMAP3_MMU2_BASE,
+ OMAP3_MMU3_BASE,
+ OMAP3_MMU2_BASE,
};
With the 'devices' array you just need to add two more elements and
that's it. It leaves less room for mistakes.
However 'struct iommu_device' is a local structure, it could very well
be called __foobar__, nobody outside omap3-iommu.c will see it anyway.
--
Felipe Contreras
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Re: slap corruption
On Tue, May 19, 2009 at 4:56 AM, Guzman Lugo, Fernando x0095...@ti.com wrote: Hi everyone, We have been looking into the Slab Corruption error and we have found the problem occurs after an application has been terminated abnormally, e.g. Using CTL-C or Segmentation Fault or kill. The issue is observed not only for DMM test cases but for others test cases that don't use DMM. The problem is reported by 'slab.c' when a slab object which is inactive, it supposed to be filled with POISON_FREE (6b) and has some 00 within the object, this seems to be corrupted. Slab corruption: size-64 start=c6bc71e0, len=64 3Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. 3Last user: [bf063464]Last user: [bf063464](MEM_Free+0x9c/0xe0 [bridgedriv er])(MEM_Free+0x9c/0xe0 [bridgedriver]) 3010:010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 00 00 00 00 00 00 00 00 it seems it is not being freed correctly, because instead of being filled only with 6b it has 00 maybe other process is overwriting it. Does anyone have any idea of what can be happening? Looping Hiroshi who is working on a similar issue... perhaps the same? -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] DSPBRIDGE: Buffer size warning fixes
From: Ameya Palande ameya.pala...@nokia.com
Signed-off-by: Ameya Palande ameya.pala...@nokia.com
---
drivers/dsp/bridge/pmgr/cod.c|2 +-
drivers/dsp/bridge/rmgr/drv.c|2 +-
drivers/dsp/bridge/services/regsup.c |4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/cod.c b/drivers/dsp/bridge/pmgr/cod.c
index 6363f1e..5094201 100644
--- a/drivers/dsp/bridge/pmgr/cod.c
+++ b/drivers/dsp/bridge/pmgr/cod.c
@@ -628,7 +628,7 @@ DSP_STATUS COD_OpenBase(struct COD_MANAGER *hMgr, IN char
*pszCoffPath,
} else {
/* hang onto the library for subsequent sym table usage */
hMgr-baseLib = lib;
- strncpy(hMgr-szZLFile, pszCoffPath, COD_MAXPATHLENGTH);
+ strncpy(hMgr-szZLFile, pszCoffPath, COD_MAXPATHLENGTH - 1);
}
return status;
diff --git a/drivers/dsp/bridge/rmgr/drv.c b/drivers/dsp/bridge/rmgr/drv.c
index 256ce12..60ca054 100644
--- a/drivers/dsp/bridge/rmgr/drv.c
+++ b/drivers/dsp/bridge/rmgr/drv.c
@@ -1510,7 +1510,7 @@ DSP_STATUS DRV_RequestResources(u32 dwContext, u32
*pDevNodeString)
if (pszdevNode) {
LST_InitElem(pszdevNode-link);
strncpy((char *) pszdevNode-szString,
-(char *)dwContext, MAXREGPATHLENGTH);
+(char *)dwContext, MAXREGPATHLENGTH - 1);
/* Update the Driver Object List */
*pDevNodeString = (u32)pszdevNode-szString;
LST_PutTail(pDRVObject-devNodeString,
diff --git a/drivers/dsp/bridge/services/regsup.c
b/drivers/dsp/bridge/services/regsup.c
index 5251b68..b0c6e00 100644
--- a/drivers/dsp/bridge/services/regsup.c
+++ b/drivers/dsp/bridge/services/regsup.c
@@ -238,8 +238,8 @@ DSP_STATUS regsupSetValue(char *valName, void *pBuf, u32
dataSize)
/* No match, need to make a new entry */
/* First check to see if we can make any more entries. */
if (pRegKey-numValueEntries BRIDGE_MAX_NUM_REG_ENTRIES) {
- strncpy(pRegKey-values[pRegKey-numValueEntries].name,
- valName, BRIDGE_MAX_NAME_SIZE);
+ strncpy(pRegKey-values[pRegKey-numValueEntries].name,
+ valName, BRIDGE_MAX_NAME_SIZE - 1);
pRegKey-values[pRegKey-numValueEntries].pData =
MEM_Alloc(dataSize, MEM_NONPAGED);
if (pRegKey-values[pRegKey-numValueEntries].pData !=
--
1.6.2.4
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Re: slab corruption
Hi Fernand, From: ext Guzman Lugo, Fernando x0095...@ti.com Subject: slap corruption Date: Tue, 19 May 2009 03:56:08 +0200 Hi everyone, We have been looking into the Slab Corruption error and we have found the problem occurs after an application has been terminated abnormally, e.g. Using CTL-C or Segmentation Fault or kill. The issue is observed not only for DMM test cases but for others test cases that don't use DMM. The problem is reported by 'slab.c' when a slab object which is inactive, it supposed to be filled with POISON_FREE (6b) and has some 00 within the object, this seems to be corrupted. Slab corruption: size-64 start=c6bc71e0, len=64 3Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. 3Last user: [bf063464]Last user: [bf063464](MEM_Free+0x9c/0xe0 [bridgedriv er])(MEM_Free+0x9c/0xe0 [bridgedriver]) 3010:010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 00 00 00 00 00 00 00 00 it seems it is not being freed correctly, because instead of being filled only with 6b it has 00 maybe other process is overwriting it. Does anyone have any idea of what can be happening? We've seen this kind of problem with gst-launch. It seems that you can reproduce the problem with more simple operation. Would it be possible to tell us how to reproduce the problem? If you can with one of dsp sample applications, it's quite useful. Regards, Fernando. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] DSPBRIDGE: Removal of unreachable code
From: Ameya Palande ameya.pala...@nokia.com Signed-off-by: Ameya Palande ameya.pala...@nokia.com --- drivers/dsp/bridge/wmd/io_sm.c |3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c index 8d106e1..6f7e338 100644 --- a/drivers/dsp/bridge/wmd/io_sm.c +++ b/drivers/dsp/bridge/wmd/io_sm.c @@ -1742,9 +1742,6 @@ DSP_STATUS IO_SHMsetting(IN struct IO_MGR *hIOMgr, IN enum SHM_DESCTYPE desc, break; default: break; - - queue_work(bridge_workqueue, -(hIOMgr-io_workq)); } #endif return DSP_SOK; -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Smart Reflex pm patches causes a kernel panic
Hi Kevin, I get a kernel panic on my TI OMAP 3503 when I incorporate the SR patches. How can I trace and debug this to find the cause of this null pointer error ? Power Management for TI OMAP3. mmc0: mmc_rescan - card ocr from io_op=0x, err = -110 pm_dbg_init() Unable to handle kernel NULL pointer dereference at virtual address 001e pgd = c0004000 [001e] *pgd= Internal error: Oops: 5 [#1] PREEMPT Modules linked in: CPU: 0Not tainted (2.6.29-omap1 #1) PC is at sr_configure_vp+0x28/0x1bc LR is at sr_configure_vp+0x1c/0x1bc pc : [c01055f4]lr : [c01055e8]psr: 6113 sp : cf81ff28 ip : cf81ff28 fp : cf81ff3c r10: r9 : r8 : 0001 r7 : c0012b44 r6 : r5 : c05c8660 r4 : c05c8624 r3 : r2 : 0001 r1 : 8113 r0 : Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 80004019 DAC: 0017 Process swapper (pid: 1, stack limit = 0xcf81e2e8) Stack: (0xcf81ff28 to 0xcf82) ff20: c05c8660 c05c8624 cf81ff5c cf81ff40 c0012bc8 c01055d8 ff40: 08012954 c002d9d0 c002da20 cf81ffd4 cf81ff60 c00f52f8 c0012b50 ff60: cf81ff8c cf81ff70 c01cb9e4 c01cb6a8 cf81ff00 cf9a26e0 c01cbae4 cf81ff96 ff80: cf81ffbc cf81ff90 c014d408 c01cb970 c02fb2b4 35339600 0031 ffa0: 0192 c05d2034 cf81ffd4 c002d9d0 c002da20 ffc0: cf81fff4 cf81ffd8 c00083fc c00f52ac 0001 ffe0: cf81fff8 c011e2b8 c0008384 0836d404 5777f140 Backtrace: [c01055cc] (sr_configure_vp+0x0/0x1bc) from [c0012bc8] (omap3_sr_init+0x84/0x114) r4:c05c8624 [c0012b44] (omap3_sr_init+0x0/0x114) from [c00f52f8] (do_one_initcall+0x58/0x198) r5:c002da20 r4:c002d9d0 [c00f52a0] (do_one_initcall+0x0/0x198) from [c00083fc] (kernel_init +0x84/0xf4) r8: r7: r6: r5:c002da20 r4:c002d9d0 [c0008378] (kernel_init+0x0/0xf4) from [c011e2b8] (do_exit +0x0/0x7d0) r5: r4: Code: eb0024a7 e59f3180 e350 05933000 (01d301be) ---[ end trace eadc9c7cb4a7e9eb ]--- Kernel panic - not syncing: Attempted to kill init! I have extracted the pm patches by doing a git format-patch master on the pm branch. This generates 186 patch files, as of today. Since I don't know which particular patch is causing the problem, I need to fully exclude the following patch numbers to prevent the kernel panic. # file://omap-pm/0149-OMAP3-SR-Fix-init-voltage-on-OPP-change.patch ;patch=1 \ # file://omap-pm/0151-OMAP3-SR-Update-VDD1-2-voltages-at-boot.patch ;patch=1 \ # file://omap-pm/0152-OMAP3-SR-Use-sysclk-for-SR-CLKLENGTH-calc.patch ;patch=1 \ # file://omap-pm/0153-OMAP3-SR-Disable-SR-autocomp-only-for-CORE-trans.patch ;patch=1 \ # file://omap-pm/0154-OMAP3-SR-Reset-voltage-level-on-SR-disable.patch ;patch=1 \ # file://omap-pm/0155-OMAP3-SR-Replace-printk-s-with-pr_-calls.patch ;patch=1 \ # file://omap-pm/0156-OMAP3-SR-Remove-redundant- defines.patch;patch=1 \ # file://omap-pm/0157-OMAP3-SR-Replace-SR_PASS-FAIL-SR_TRUE-FALSE.patch ;patch=1 \ # file://omap-pm/0158-OMAP3-SR-Replace-0x1-n-with-BIT- n.patch;patch=1 \ # file://omap-pm/0159-OMAP3-clock-Remove-virt_vdd1-2_prcm_set.patch ;patch=1 \ The following patches (from 167 to 186) are more recent, and no necessary to reproduce the crash above: # file://omap-pm/0168-OMAP3-SR-Fix-SR-driver-to-check-for-omap-pm-return.patch ;patch=1 \ # file://omap-pm/0169-OMAP3-PM-Don-t-do-unnecessary-searches-in-omap_sr_.patch ;patch=1 \ # file://omap-pm/0181-OMAP-PM-SmartReflex-has-build-dependency-on-OMAP-P.patch ;patch=1 \ # file://omap-pm/0186-OMAP3-PM-Fix-Smartreflex-when-used-with-PM_NOOP-la.patch ;patch=1 \ Excluding the SR patches gives me a workable kernel that doesn't crash on startup. Best regards, Elvis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Removed SD card causes kernel panic when a transfer is on-going.
On Fri, 15 May 2009 16:45:06 +0800 yingchao li rjn...@gmail.com wrote: In my omap3430 board, when a transfer is on-going(i.e. reading from sd card), I unpluged directly sd card, then kernel panic. Known issue unfortunately. Something is not properly reference counting the block queue, but the handling in mmc_block is correct as far as I can gather. Your patch works around the problem by basically keeping a reference to the queue longer than the driver needs (hiding any missing references in other layers). I've been trying to find this bug without much success. The block layer isn't that easy to understand. :/ Rgds -- -- Pierre Ossman WARNING: This correspondence is being monitored by the Swedish government. Make sure your server uses encryption for SMTP traffic and consider using PGP for end-to-end encryption. signature.asc Description: PGP signature
RE: Smart Reflex pm patches causes a kernel panic
Hi Elvis, I think I saw something similar last week, and it was caused by not having CONFIG_OMAP_PM_SRF enabled. The actual culprit is the marked line in sr_configure_vp(): vpconfig = PRM_VP1_CONFIG_ERROROFFSET | PRM_VP1_CONFIG_ERRORGAIN | PRM_VP1_CONFIG_TIMEOUTEN | mpu_opps[resource_get_level(vdd1_opp)].vsel OMAP3430_INITVOLTAGE_SHIFT; SR2 has similar code a bit later. You will also get a failure if mpu_opps[] and/or l3_opps[] is not defined at all in your board files, this null pointer exception would actually indicate a problem like that more likely. -Tero -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of ext Elvis Dowson Sent: 19 May, 2009 14:21 To: Kevin Hilman Cc: Linux OMAP Users Subject: Smart Reflex pm patches causes a kernel panic Hi Kevin, I get a kernel panic on my TI OMAP 3503 when I incorporate the SR patches. How can I trace and debug this to find the cause of this null pointer error ? Power Management for TI OMAP3. mmc0: mmc_rescan - card ocr from io_op=0x, err = -110 pm_dbg_init() Unable to handle kernel NULL pointer dereference at virtual address 001e pgd = c0004000 [001e] *pgd= Internal error: Oops: 5 [#1] PREEMPT Modules linked in: CPU: 0Not tainted (2.6.29-omap1 #1) PC is at sr_configure_vp+0x28/0x1bc LR is at sr_configure_vp+0x1c/0x1bc pc : [c01055f4]lr : [c01055e8]psr: 6113 sp : cf81ff28 ip : cf81ff28 fp : cf81ff3c r10: r9 : r8 : 0001 r7 : c0012b44 r6 : r5 : c05c8660 r4 : c05c8624 r3 : r2 : 0001 r1 : 8113 r0 : Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 80004019 DAC: 0017 Process swapper (pid: 1, stack limit = 0xcf81e2e8) Stack: (0xcf81ff28 to 0xcf82) ff20: c05c8660 c05c8624 cf81ff5c cf81ff40 c0012bc8 c01055d8 ff40: 08012954 c002d9d0 c002da20 cf81ffd4 cf81ff60 c00f52f8 c0012b50 ff60: cf81ff8c cf81ff70 c01cb9e4 c01cb6a8 cf81ff00 cf9a26e0 c01cbae4 cf81ff96 ff80: cf81ffbc cf81ff90 c014d408 c01cb970 c02fb2b4 35339600 0031 ffa0: 0192 c05d2034 cf81ffd4 c002d9d0 c002da20 ffc0: cf81fff4 cf81ffd8 c00083fc c00f52ac 0001 ffe0: cf81fff8 c011e2b8 c0008384 0836d404 5777f140 Backtrace: [c01055cc] (sr_configure_vp+0x0/0x1bc) from [c0012bc8] (omap3_sr_init+0x84/0x114) r4:c05c8624 [c0012b44] (omap3_sr_init+0x0/0x114) from [c00f52f8] (do_one_initcall+0x58/0x198) r5:c002da20 r4:c002d9d0 [c00f52a0] (do_one_initcall+0x0/0x198) from [c00083fc] (kernel_init +0x84/0xf4) r8: r7: r6: r5:c002da20 r4:c002d9d0 [c0008378] (kernel_init+0x0/0xf4) from [c011e2b8] (do_exit +0x0/0x7d0) r5: r4: Code: eb0024a7 e59f3180 e350 05933000 (01d301be) ---[ end trace eadc9c7cb4a7e9eb ]--- Kernel panic - not syncing: Attempted to kill init! I have extracted the pm patches by doing a git format-patch master on the pm branch. This generates 186 patch files, as of today. Since I don't know which particular patch is causing the problem, I need to fully exclude the following patch numbers to prevent the kernel panic. # file://omap-pm/0149-OMAP3-SR-Fix-init-voltage-on-OPP-change.patch ;patch=1 \ # file://omap-pm/0151-OMAP3-SR-Update-VDD1-2-voltages-at-boot.patch ;patch=1 \ # file://omap-pm/0152-OMAP3-SR-Use-sysclk-for-SR-CLKLENGTH-calc.patch ;patch=1 \ # file://omap-pm/0153-OMAP3-SR-Disable-SR-autocomp-only-for-CORE- trans.patch ;patch=1 \ # file://omap-pm/0154-OMAP3-SR-Reset-voltage-level-on-SR-disable.patch ;patch=1 \ # file://omap-pm/0155-OMAP3-SR-Replace-printk-s-with-pr_-calls.patch ;patch=1 \ # file://omap-pm/0156-OMAP3-SR-Remove-redundant- defines.patch;patch=1 \ # file://omap-pm/0157-OMAP3-SR-Replace-SR_PASS-FAIL-SR_TRUE-FALSE.patch ;patch=1 \ # file://omap-pm/0158-OMAP3-SR-Replace-0x1-n-with-BIT- n.patch;patch=1 \ # file://omap-pm/0159-OMAP3-clock-Remove-virt_vdd1-2_prcm_set.patch ;patch=1 \ The following patches (from 167 to 186) are more recent, and no necessary to reproduce the crash above: # file://omap-pm/0168-OMAP3-SR-Fix-SR-driver-to-check-for-omap-pm -return.patch ;patch=1 \ # file://omap-pm/0169-OMAP3-PM-Don-t-do-unnecessary-searches-in-o map_sr_.patch ;patch=1 \ # file://omap-pm/0181-OMAP-PM-SmartReflex-has-build-dependency-on -OMAP-P.patch ;patch=1 \ # file://omap-pm/0186-OMAP3-PM-Fix-Smartreflex-when-used-with-PM_ NOOP-la.patch ;patch=1 \ Excluding the SR patches gives me a workable kernel that doesn't crash on startup. Best regards, Elvis -- To unsubscribe from this
Re: Smart Reflex pm patches causes a kernel panic
Thanks for the info, Roger! I'll wait for that patch! Elvis Currently Smartreflex (SR) is dependent on SRF to get OPP levels. Just make sure you select CONFIG_OMAP_PM_SRF when using SR. OR you can disable Smartreflex till this issue is fixed. I am working on a patch that will make Smartreflex independent of SRF. I will post this soon. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP3: PM: Make Smartreflex driver independent of SRF
This removes Smartreflex driver's dependency on SRF layer to get
OPPs for VDD1 and VDD2. Now Smartreflex is usable irrespective of the
underlying PM layer.
Signed-off-by: Roger Quadros ext-roger.quad...@nokia.com
---
arch/arm/mach-omap2/smartreflex.c | 74 -
1 files changed, 64 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index b032366..b66d237 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -143,6 +143,57 @@ static u32 cal_test_nvalue(u32 sennval, u32 senpval)
(rnsenn NVALUERECIPROCAL_RNSENN_SHIFT));
}
+/* determine the current OPP from the frequency
+ * we need to give this function last element of OPP rate table
+ * and the frequency
+ */
+static u16 get_opp(struct omap_opp *opp_freq_table,
+ unsigned long freq)
+{
+ struct omap_opp *prcm_config;
+
+ prcm_config = opp_freq_table;
+
+ if (prcm_config-rate = freq)
+ return prcm_config-opp_id; /* Return the Highest OPP */
+ for (; prcm_config-rate; prcm_config--)
+ if (prcm_config-rate freq)
+ return (prcm_config+1)-opp_id;
+ else if (prcm_config-rate == freq)
+ return prcm_config-opp_id;
+ /* Return the least OPP */
+ return (prcm_config+1)-opp_id;
+}
+
+static u16 get_vdd1_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll1_ck);
+
+ if (clk == NULL || IS_ERR(clk) || mpu_opps == NULL)
+ return 0;
+
+ opp = get_opp(mpu_opps + MAX_VDD1_OPP, clk-rate);
+ return opp;
+}
+
+static u16 get_vdd2_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll3_m2_ck);
+
+ if (clk == NULL || IS_ERR(clk) || l3_opps == NULL)
+ return 0;
+
+ opp = get_opp(l3_opps + MAX_VDD2_OPP, clk-rate);
+ return opp;
+}
+
+
static void sr_set_clk_length(struct omap_sr *sr)
{
struct clk *sys_ck;
@@ -248,13 +299,15 @@ static void sr_configure_vp(int srid)
{
u32 vpconfig;
u32 vsel;
+ u32 target_opp_no;
if (srid == SR1) {
- if (!omap_pm_vdd1_get_opp())
+ target_opp_no = get_vdd1_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP as current OPP unknown */
vsel = mpu_opps[VDD1_OPP3].vsel;
else
- vsel = mpu_opps[omap_pm_vdd1_get_opp()].vsel;
+ vsel = mpu_opps[target_opp_no].vsel;
vpconfig = PRM_VP1_CONFIG_ERROROFFSET |
PRM_VP1_CONFIG_ERRORGAIN |
@@ -295,11 +348,12 @@ static void sr_configure_vp(int srid)
OMAP3_PRM_VP1_CONFIG_OFFSET);
} else if (srid == SR2) {
- if (!omap_pm_vdd2_get_opp())
+ target_opp_no = get_vdd2_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP */
vsel = l3_opps[VDD2_OPP3].vsel;
else
- vsel = l3_opps[omap_pm_vdd2_get_opp()].vsel;
+ vsel = l3_opps[target_opp_no].vsel;
vpconfig = PRM_VP2_CONFIG_ERROROFFSET |
PRM_VP2_CONFIG_ERRORGAIN |
@@ -397,7 +451,7 @@ static int sr_reset_voltage(int srid)
u32 vc_bypass_value;
if (srid == SR1) {
- target_opp_no = omap_pm_vdd1_get_opp();
+ target_opp_no = get_vdd1_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -405,7 +459,7 @@ static int sr_reset_voltage(int srid)
vsel = mpu_opps[target_opp_no].vsel;
reg_addr = R_VDD1_SR_CONTROL;
} else if (srid == SR2) {
- target_opp_no = omap_pm_vdd2_get_opp();
+ target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -641,9 +695,9 @@ void enable_smartreflex(int srid)
sr_clk_enable(sr);
if (srid == SR1)
- target_opp_no = omap_pm_vdd1_get_opp();
+ target_opp_no = get_vdd1_opp();
else if (srid == SR2)
- target_opp_no = omap_pm_vdd2_get_opp();
+ target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown \
@@ -786,7 +840,7 @@ static ssize_t omap_sr_vdd1_autocomp_store(struct kobject
*kobj,
if (value == 0) {
sr_stop_vddautocomap(SR1);
Re: Smart Reflex pm patches causes a kernel panic
ext Elvis Dowson wrote:
Thanks for the info, Roger! I'll wait for that patch!
Elvis
Currently Smartreflex (SR) is dependent on SRF to get OPP levels. Just
make sure you select CONFIG_OMAP_PM_SRF when using SR. OR you can
disable Smartreflex till this issue is fixed.
I am working on a patch that will make Smartreflex independent of SRF.
I will post this soon.
Elvis,
Can you please try and verify if the problem goes away with the attached patch.
Thanks.
-roger
From: Roger Quadros ext-roger.quad...@nokia.com
Date: Tue, 19 May 2009 14:15:56 +0300
Subject: [PATCH] OMAP3: PM: Make Smartreflex driver independent of SRF
This removes Smartreflex driver's dependency on SRF layer to get
OPPs for VDD1 and VDD2. Now Smartreflex is usable irrespective of the
underlying PM layer.
Signed-off-by: Roger Quadros ext-roger.quad...@nokia.com
---
arch/arm/mach-omap2/smartreflex.c | 74 -
1 files changed, 64 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index b032366..b66d237 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -143,6 +143,57 @@ static u32 cal_test_nvalue(u32 sennval, u32 senpval)
(rnsenn NVALUERECIPROCAL_RNSENN_SHIFT));
}
+/* determine the current OPP from the frequency
+ * we need to give this function last element of OPP rate table
+ * and the frequency
+ */
+static u16 get_opp(struct omap_opp *opp_freq_table,
+ unsigned long freq)
+{
+ struct omap_opp *prcm_config;
+
+ prcm_config = opp_freq_table;
+
+ if (prcm_config-rate = freq)
+ return prcm_config-opp_id; /* Return the Highest OPP */
+ for (; prcm_config-rate; prcm_config--)
+ if (prcm_config-rate freq)
+ return (prcm_config+1)-opp_id;
+ else if (prcm_config-rate == freq)
+ return prcm_config-opp_id;
+ /* Return the least OPP */
+ return (prcm_config+1)-opp_id;
+}
+
+static u16 get_vdd1_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll1_ck);
+
+ if (clk == NULL || IS_ERR(clk) || mpu_opps == NULL)
+ return 0;
+
+ opp = get_opp(mpu_opps + MAX_VDD1_OPP, clk-rate);
+ return opp;
+}
+
+static u16 get_vdd2_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll3_m2_ck);
+
+ if (clk == NULL || IS_ERR(clk) || l3_opps == NULL)
+ return 0;
+
+ opp = get_opp(l3_opps + MAX_VDD2_OPP, clk-rate);
+ return opp;
+}
+
+
static void sr_set_clk_length(struct omap_sr *sr)
{
struct clk *sys_ck;
@@ -248,13 +299,15 @@ static void sr_configure_vp(int srid)
{
u32 vpconfig;
u32 vsel;
+ u32 target_opp_no;
if (srid == SR1) {
- if (!omap_pm_vdd1_get_opp())
+ target_opp_no = get_vdd1_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP as current OPP unknown */
vsel = mpu_opps[VDD1_OPP3].vsel;
else
- vsel = mpu_opps[omap_pm_vdd1_get_opp()].vsel;
+ vsel = mpu_opps[target_opp_no].vsel;
vpconfig = PRM_VP1_CONFIG_ERROROFFSET |
PRM_VP1_CONFIG_ERRORGAIN |
@@ -295,11 +348,12 @@ static void sr_configure_vp(int srid)
OMAP3_PRM_VP1_CONFIG_OFFSET);
} else if (srid == SR2) {
- if (!omap_pm_vdd2_get_opp())
+ target_opp_no = get_vdd2_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP */
vsel = l3_opps[VDD2_OPP3].vsel;
else
- vsel = l3_opps[omap_pm_vdd2_get_opp()].vsel;
+ vsel = l3_opps[target_opp_no].vsel;
vpconfig = PRM_VP2_CONFIG_ERROROFFSET |
PRM_VP2_CONFIG_ERRORGAIN |
@@ -397,7 +451,7 @@ static int sr_reset_voltage(int srid)
u32 vc_bypass_value;
if (srid == SR1) {
- target_opp_no = omap_pm_vdd1_get_opp();
+ target_opp_no = get_vdd1_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -405,7 +459,7 @@ static int sr_reset_voltage(int srid)
vsel = mpu_opps[target_opp_no].vsel;
reg_addr = R_VDD1_SR_CONTROL;
} else if (srid == SR2) {
- target_opp_no = omap_pm_vdd2_get_opp();
+ target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -641,9 +695,9 @@ void enable_smartreflex(int srid)
sr_clk_enable(sr);
if (srid == SR1)
-target_opp_no = omap_pm_vdd1_get_opp();
+target_opp_no = get_vdd1_opp();
else if (srid == SR2)
-target_opp_no = omap_pm_vdd2_get_opp();
+target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown \
@@ -786,7 +840,7 @@ static ssize_t omap_sr_vdd1_autocomp_store(struct kobject *kobj,
if (value == 0) {
sr_stop_vddautocomap(SR1);
} else {
- u32 current_vdd1opp_no = omap_pm_vdd1_get_opp();
+ u32 current_vdd1opp_no = get_vdd1_opp();
if (!current_vdd1opp_no) {
pr_err(sr_vdd1_autocomp: Current VDD1 opp unknown\n);
return -EINVAL;
@@ -826,7 +880,7 @@ static ssize_t omap_sr_vdd2_autocomp_store(struct kobject *kobj,
if (value == 0) {
sr_stop_vddautocomap(SR2);
} else {
- u32 current_vdd2opp_no = omap_pm_vdd2_get_opp();
+ u32 current_vdd2opp_no = get_vdd2_opp();
Re: how to configure android-2.6.27 kernel for an LCD display other than Zoom2 display
On Fri, May 15, 2009 at 3:18 PM, twebb taliaferr...@gmail.com wrote: I'm using the L25.6/android-2.6.27 kernel and am adapting it as necessary to OMAP3530-based hardware. However, I don't see how to configure the kernel for an LCD display other than the NEC display defined for ZOOM2 (which is an SPI-based display?). I'm using an LG display via the dss_data[17:0] interface of the 35xx - and this is working with a slightly modified version of lcd_omap3evm.c on the linux-omap-2.6.27-omap1 kernel. I'm not familiar with the new DSS that appears to be in android-2.6.27. The LG display is WSVGA, but I'd be happy getting WVGA or VGA working on it for now. How can I configure the kernel to support a non-SPI-based LCD panel? How does this DSS differ with what appears in android-2.6.29/drivers/video/omap2 ? Any help here would be appreciated. Thanks, twebb Any suggestions on this? -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: Smart Reflex pm patches causes a kernel panic
-Original Message- From: ext Elvis Dowson [mailto:elvis.dow...@mac.com] Sent: 19 May, 2009 14:49 To: Kristo Tero (Nokia-D/Tampere) Cc: Linux OMAP Users Subject: Re: Smart Reflex pm patches causes a kernel panic Hi Tero, Thanks for the reply. I'll try this out. I don't think mpu_opps is defined for my board_overo.c file. I guess I should look at the board_sdp3430.c as an example for this? Yes, take a look at it. You are basically missing some parameters in a call to omap2_init_common_hw(), at least the version I am looking at here has a few NULL pointers passed. The rate tables (mpu + l3) should be posted as parameters in that. -Tero Thanks and do let me know! Best regards, Elvis On May 19, 2009, at 3:41 PM, tero.kri...@nokia.com wrote: Hi Elvis, I think I saw something similar last week, and it was caused by not having CONFIG_OMAP_PM_SRF enabled. The actual culprit is the marked line in sr_configure_vp(): vpconfig = PRM_VP1_CONFIG_ERROROFFSET | PRM_VP1_CONFIG_ERRORGAIN | PRM_VP1_CONFIG_TIMEOUTEN | mpu_opps[resource_get_level(vdd1_opp)].vsel OMAP3430_INITVOLTAGE_SHIFT; SR2 has similar code a bit later. You will also get a failure if mpu_opps[] and/or l3_opps[] is not defined at all in your board files, this null pointer exception would actually indicate a problem like that more likely. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP3: PM: Do not Enable SmartReflex if OPP tables not defined
Prevent SmartReflex driver driver from loading if OPP tables are
not defined by platform. This removes possibility of NULL pointer
reference in SmartReflex driver code.
Signed-off-by: Roger Quadros ext-roger.quad...@nokia.com
---
arch/arm/mach-omap2/smartreflex.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index b032366..4823ce8 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -852,6 +852,12 @@ static int __init omap3_sr_init(void)
int ret = 0;
u8 RdReg;
+ /* Exit if OPP tables are not defined */
+if (!(mpu_opps l3_opps)) {
+pr_err(SR: OPP rate tables not defined for platform, not
enabling SmartReflex\n);
+ return -ENODEV;
+}
+
/* Enable SR on T2 */
ret = twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, RdReg,
R_DCDC_GLOBAL_CFG);
--
1.6.0.4
--
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[PATCH 0/4] OMAP: Cleanup series.
Recent OMAP4 patch reviews brought out some clean-up/reorganization on generic OMAP2/3 software. This patch series addresses those comments. It's based on 2.6.30-rc6 (commit:22ef37eed673587ac984965dc88ba94c68873291) and tested on OMAP3430 SDP platform. [PATCH 1/4] ARM: OMAP2/3: Reorganize Makefile to add omap4 support [PATCH 2/4] ARM: OMAP: Remove unwanted type casts and fix the compiler warning. [PATCH 3/4] ARM: OMAP: Remove useless omap_sram_error function. [PATCH 4/4] ARM: OMAP: Remove unnecessary omap2_globals. Regards, Santosh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] ARM: OMAP: Remove useless omap_sram_error function.
This patch removes fixes omap_sram_error() function and replace the
error paths with BUG_ON.
The proposed fix was suggested by Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/sram.c | 25 +
1 files changed, 5 insertions(+), 20 deletions(-)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index fa5297d..e1493d8 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -242,20 +242,13 @@ void * omap_sram_push(void * start, unsigned long size)
return (void *)omap_sram_ceil;
}
-static void omap_sram_error(void)
-{
- panic(Uninitialized SRAM function\n);
-}
-
#ifdef CONFIG_ARCH_OMAP1
static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
{
- if (!_omap_sram_reprogram_clock)
- omap_sram_error();
-
+ BUG_ON(!_omap_sram_reprogram_clock);
_omap_sram_reprogram_clock(dpllctl, ckctl);
}
@@ -280,9 +273,7 @@ static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32
fast_dll_ctrl,
void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
u32 base_cs, u32 force_unlock)
{
- if (!_omap2_sram_ddr_init)
- omap_sram_error();
-
+ BUG_ON(!_omap2_sram_ddr_init);
_omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
base_cs, force_unlock);
}
@@ -292,9 +283,7 @@ static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level,
u32 dll_val,
void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
{
- if (!_omap2_sram_reprogram_sdrc)
- omap_sram_error();
-
+ BUG_ON(!_omap2_sram_reprogram_sdrc);
_omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
}
@@ -302,9 +291,7 @@ static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32
sdrc_rfr_val, int bypass);
u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
{
- if (!_omap2_set_prcm)
- omap_sram_error();
-
+ BUG_ON(!_omap2_set_prcm);
return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
}
#endif
@@ -360,9 +347,7 @@ static u32 (*_omap3_sram_configure_core_dpll)(u32
sdrc_rfr_ctrl,
u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla,
u32 sdrc_actim_ctrlb, u32 m2)
{
- if (!_omap3_sram_configure_core_dpll)
- omap_sram_error();
-
+ BUG_ON(!_omap3_sram_configure_core_dpll);
return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl,
sdrc_actim_ctrla,
sdrc_actim_ctrlb, m2);
--
1.5.4.7
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[PATCH 2/4] ARM: OMAP: Remove unwanted type casts and fix the compiler warning.
This patch fixes the compiler warning assignment from incompatible
pointer type in dmtimer.c and removes the tye casts. These warnings
were suppressed by type catsing.
The proposed fix was suggested by Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 55bb996..ee20612 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -214,7 +214,7 @@ static const char *omap2_dm_source_names[] __initdata = {
NULL
};
-static struct clk **omap2_dm_source_clocks[3];
+static struct clk *omap2_dm_source_clocks[3];
static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers);
#elif defined(CONFIG_ARCH_OMAP3)
@@ -247,7 +247,7 @@ static const char *omap3_dm_source_names[] __initdata = {
NULL
};
-static struct clk **omap3_dm_source_clocks[2];
+static struct clk *omap3_dm_source_clocks[2];
static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
#else
@@ -257,7 +257,7 @@ static const int dm_timer_count =
ARRAY_SIZE(omap3_dm_timers);
#endif
static struct omap_dm_timer *dm_timers;
-static char **dm_source_names;
+static const char **dm_source_names;
static struct clk **dm_source_clocks;
static spinlock_t dm_timer_lock;
@@ -705,12 +705,12 @@ int __init omap_dm_timer_init(void)
dm_timers = omap1_dm_timers;
else if (cpu_is_omap24xx()) {
dm_timers = omap2_dm_timers;
- dm_source_names = (char **)omap2_dm_source_names;
- dm_source_clocks = (struct clk **)omap2_dm_source_clocks;
+ dm_source_names = omap2_dm_source_names;
+ dm_source_clocks = omap2_dm_source_clocks;
} else if (cpu_is_omap34xx()) {
dm_timers = omap3_dm_timers;
- dm_source_names = (char **)omap3_dm_source_names;
- dm_source_clocks = (struct clk **)omap3_dm_source_clocks;
+ dm_source_names = omap3_dm_source_names;
+ dm_source_clocks = omap3_dm_source_clocks;
}
if (cpu_class_is_omap2())
--
1.5.4.7
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[PATCH 4/4] ARM: OMAP: Remove unnecessary omap2_globals.
This patch removes unnecessary omap2_globals and pass the global structures
directly as function argument.
The proposed cleanup was suggested by Russell King rmk+ker...@arm.linux.org.uk
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/common.c | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 433021f..cee12c6 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -240,9 +240,7 @@ arch_initcall(omap_init_clocksource_32k);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-static struct omap_globals *omap2_globals;
-
-static void __init __omap2_set_globals(void)
+static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
{
omap2_set_globals_tap(omap2_globals);
omap2_set_globals_sdrc(omap2_globals);
@@ -266,8 +264,7 @@ static struct omap_globals omap242x_globals = {
void __init omap2_set_globals_242x(void)
{
- omap2_globals = omap242x_globals;
- __omap2_set_globals();
+ __omap2_set_globals(omap242x_globals);
}
#endif
@@ -285,8 +282,7 @@ static struct omap_globals omap243x_globals = {
void __init omap2_set_globals_243x(void)
{
- omap2_globals = omap243x_globals;
- __omap2_set_globals();
+ __omap2_set_globals(omap243x_globals);
}
#endif
@@ -304,8 +300,7 @@ static struct omap_globals omap343x_globals = {
void __init omap2_set_globals_343x(void)
{
- omap2_globals = omap343x_globals;
- __omap2_set_globals();
+ __omap2_set_globals(omap343x_globals);
}
#endif
--
1.5.4.7
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Re: [RESUBMIT][PATCH 2/7 v2] OMAP4: Create board support for OMAP_4430SDP.
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch creates the bare minimal board files to support
OMAP_4430SDP. Additinaly new omap44xx.h is created which contains
the base addresses for OMAP4430. File omap34xx.h is adapted to avoid
multiple definitions of common omap base address definitions.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c| 94
arch/arm/plat-omap/include/mach/hardware.h |1 +
arch/arm/plat-omap/include/mach/omap34xx.h | 10 ++--
arch/arm/plat-omap/include/mach/omap44xx.h | 61 ++
4 files changed, 161 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-4430sdp.c
create mode 100644 arch/arm/plat-omap/include/mach/omap44xx.h
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
new file mode 100644
index 000..57e477b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -0,0 +1,94 @@
+/*
+ * Board support file for OMAP4430 SDP.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * Author: Santosh Shilimkar santosh.shilim...@ti.com
+ *
+ * Based on mach-omap2/board-3430sdp.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/platform_device.h
+#include linux/io.h
+#include linux/gpio.h
+
+#include mach/hardware.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+
+#include mach/board.h
+#include mach/common.h
+#include mach/control.h
+#include mach/timer-gp.h
+#include asm/hardware/gic.h
+
+static struct platform_device sdp4430_lcd_device = {
+ .name = sdp4430_lcd,
+ .id = -1,
+};
+
+static struct platform_device *sdp4430_devices[] __initdata = {
+ sdp4430_lcd_device,
+};
+
+static struct omap_uart_config sdp4430_uart_config __initdata = {
+ .enabled_uarts = (1 0) | (1 1) | (1 2),
+};
+
+static struct omap_lcd_config sdp4430_lcd_config __initdata = {
+ .ctrl_name = internal,
+};
+
+static struct omap_board_config_kernel sdp4430_config[] __initdata = {
+ { OMAP_TAG_UART,sdp4430_uart_config },
+ { OMAP_TAG_LCD, sdp4430_lcd_config },
+};
+
+static void __init gic_init_irq(void)
+{
+ gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
+ gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+}
+
+static void __init omap_4430sdp_init_irq(void)
+{
+ omap2_init_common_hw(NULL);
+#ifdef CONFIG_OMAP_32K_TIMER
+ omap2_gp_clockevent_set_gptimer(1);
+#endif
+ gic_init_irq();
+ omap_gpio_init();
+}
+
+
+static void __init omap_4430sdp_init(void)
+{
+ platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
+ omap_board_config = sdp4430_config;
+ omap_board_config_size = ARRAY_SIZE(sdp4430_config);
+ omap_serial_init();
+}
+
+static void __init omap_4430sdp_map_io(void)
+{
+ omap2_set_globals_443x();
+ omap2_map_common_io();
+}
+
+MACHINE_START(OMAP_4430SDP, OMAP4430 4430SDP board)
+ /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
+ .phys_io= 0x4800,
+ .io_pg_offst= ((0xd800) 18) 0xfffc,
+ .boot_params= 0x8100,
+ .map_io = omap_4430sdp_map_io,
+ .init_irq = omap_4430sdp_init_irq,
+ .init_machine = omap_4430sdp_init,
+ .timer = omap_timer,
+MACHINE_END
diff --git a/arch/arm/plat-omap/include/mach/hardware.h
b/arch/arm/plat-omap/include/mach/hardware.h
index 3dc423e..26c1fbf 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -285,5 +285,6 @@
#include omap16xx.h
#include omap24xx.h
#include omap34xx.h
+#include omap44xx.h
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h
b/arch/arm/plat-omap/include/mach/omap34xx.h
index ab64015..4cf9859 100644
--- a/arch/arm/plat-omap/include/mach/omap34xx.h
+++ b/arch/arm/plat-omap/include/mach/omap34xx.h
@@ -3,7 +3,7 @@
*
* This file contains the processor specific definitions of the TI OMAP34XX.
*
- * Copyright (C) 2007 Texas Instruments.
+ * Copyright (C) 2007-2009 Texas Instruments.
* Copyright (C) 2007 Nokia Corporation.
*
* This program is free software; you can redistribute it and/or modify
@@ -31,13 +31,9 @@
#define L4_34XX_BASE 0x4800
#define L4_WK_34XX_BASE0x4830
-#define L4_WK_OMAP_BASEL4_WK_34XX_BASE
#define L4_PER_34XX_BASE 0x4900
-#define L4_PER_OMAP_BASE L4_PER_34XX_BASE
#define L4_EMU_34XX_BASE 0x5400
-#define L4_EMU_BASEL4_EMU_34XX_BASE
#define L3_34XX_BASE 0x6800
-#define L3_OMAP_BASE
Re: [RESUBMIT][PATCH 3/7 v2] OMAP4: Update common omap platform headers.
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch updates the common platform headers files for OMAP4430.
On OMAP4, GIC is used instead of INTC, hence all the private peripheral
interrupts are shifted by an offset of 32. So if the hardcoding is not
done for IRQ lines in drivers, then this change won't impact any driver.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/include/mach/clock.h |8 ++-
arch/arm/plat-omap/include/mach/common.h |1 +
arch/arm/plat-omap/include/mach/control.h |7 +-
arch/arm/plat-omap/include/mach/debug-macro.S |2 +-
arch/arm/plat-omap/include/mach/dma.h |1 +
arch/arm/plat-omap/include/mach/entry-macro.S | 46 -
arch/arm/plat-omap/include/mach/io.h | 37 ++
arch/arm/plat-omap/include/mach/irqs.h| 89 +
arch/arm/plat-omap/include/mach/memory.h |3 +-
arch/arm/plat-omap/include/mach/serial.h | 16 -
10 files changed, 198 insertions(+), 12 deletions(-)
diff --git a/arch/arm/plat-omap/include/mach/clock.h
b/arch/arm/plat-omap/include/mach/clock.h
index 073a2c5..058a808 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -22,7 +22,8 @@ struct clkops {
void(*disable)(struct clk *);
};
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
struct clksel_rate {
u32 val;
@@ -51,7 +52,7 @@ struct dpll_data {
u8 max_divider;
u32 max_tolerance;
u16 max_multiplier;
-# if defined(CONFIG_ARCH_OMAP3)
+# if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
u8 modes;
void __iomem*autoidle_reg;
void __iomem*idlest_reg;
@@ -83,7 +84,8 @@ struct clk {
void(*init)(struct clk *);
__u8enable_bit;
__s8usecount;
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
u8 fixed_div;
void __iomem*clksel_reg;
u32 clksel_mask;
diff --git a/arch/arm/plat-omap/include/mach/common.h
b/arch/arm/plat-omap/include/mach/common.h
index 0ecf36d..4b18833 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -62,6 +62,7 @@ struct omap_globals {
void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_343x(void);
+void omap2_set_globals_443x(void);
/* These get called from omap2_set_globals_(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
diff --git a/arch/arm/plat-omap/include/mach/control.h
b/arch/arm/plat-omap/include/mach/control.h
index 269147f..f45ec62 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -1,9 +1,9 @@
/*
* arch/arm/plat-omap/include/mach/control.h
*
- * OMAP2/3 System Control Module definitions
+ * OMAP2/3/4 System Control Module definitions
*
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009 Texas Instruments, Inc.
* Copyright (C) 2007-2008 Nokia Corporation
*
* Written by Paul Walmsley
@@ -190,7 +190,8 @@
#define OMAP2_PBIASLITEVMODE0 (1 0)
#ifndef __ASSEMBLY__
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
extern void __iomem *omap_ctrl_base_get(void);
extern u8 omap_ctrl_readb(u16 offset);
extern u16 omap_ctrl_readw(u16 offset);
diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S
b/arch/arm/plat-omap/include/mach/debug-macro.S
index 1b11f5c..ac24050 100644
--- a/arch/arm/plat-omap/include/mach/debug-macro.S
+++ b/arch/arm/plat-omap/include/mach/debug-macro.S
@@ -36,7 +36,7 @@
add \rx, \rx, #0x4000 @ UART 3
#endif
-#elif CONFIG_ARCH_OMAP3
+#elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
moveq \rx, #0x4800@ physical base address
movne \rx, #0xd800@ virtual base
orr \rx, \rx, #0x0006a000
diff --git a/arch/arm/plat-omap/include/mach/dma.h
b/arch/arm/plat-omap/include/mach/dma.h
index 54fe966..8e05b6a 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -48,6 +48,7 @@
/* Hardware registers for omap2 and omap3 */
#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
#define OMAP34XX_DMA4_BASE
Re: [RESUBMIT][PATCH 4/7 v2] OMAP4: Update common omap platform common sources.
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch updates the common platform source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/common.c | 23 +++-
arch/arm/plat-omap/devices.c |2 +
arch/arm/plat-omap/dma.c | 23 ++--
arch/arm/plat-omap/dmtimer.c | 59 +-
arch/arm/plat-omap/gpio.c| 134 +++---
arch/arm/plat-omap/io.c | 29 +-
arch/arm/plat-omap/mux.c |3 +
arch/arm/plat-omap/sram.c| 21 +++
8 files changed, 250 insertions(+), 44 deletions(-)
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index cee12c6..63b7af8 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -2,6 +2,10 @@
* linux/arch/arm/plat-omap/common.c
*
* Code common to all OMAP machines.
+ * The file is created by Tony Lindgren t...@atomide.com
+ *
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -177,7 +181,8 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
-#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP4)
#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
#endif
@@ -304,3 +309,19 @@ void __init omap2_set_globals_343x(void)
}
#endif
+#if defined(CONFIG_ARCH_OMAP4)
+static struct omap_globals omap4_globals = {
+ .class = OMAP443X_CLASS,
+ .tap= OMAP2_IO_ADDRESS(0x4830a000),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
+ .prm= OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
+};
+
+void __init omap2_set_globals_443x(void)
+{
+ omap2_set_globals_tap(omap4_globals);
+ omap2_set_globals_control(omap4_globals);
+}
+#endif
+
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 87fb7ff..a64b692 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -311,6 +311,8 @@ static void omap_init_wdt(void)
wdt_resources[0].start = 0x49016000; /* WDT2 */
else if (cpu_is_omap343x())
wdt_resources[0].start = 0x48314000; /* WDT2 */
+ else if (cpu_is_omap44xx())
+ wdt_resources[0].start = 0x4a314000;
else
return;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7fc8c04..a1b88fb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -10,6 +10,9 @@
* Merged to support both OMAP1 and OMAP2 by Tony Lindgren t...@atomide.com
* Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
+ *
* Support functions for the OMAP internal DMA channels.
*
* This program is free software; you can redistribute it and/or modify
@@ -851,7 +854,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
}
l = dma_read(CCR(lch));
l = ~((1 6) | (1 26));
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
l |= ((read_prio 0x1) 6) | ((write_prio 0x1) 26);
else
l |= ((read_prio 0x1) 6);
@@ -1823,7 +1826,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void
*dev_id)
#define omap1_dma_irq_handler NULL
#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
static int omap2_dma_handle_ch(int ch)
{
@@ -2318,6 +2322,9 @@ static int __init omap_init_dma(void)
} else if (cpu_is_omap34xx()) {
omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
+ } else if (cpu_is_omap44xx()) {
+ omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+ dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
} else {
pr_err(DMA init failed for unsupported omap\n);
return -ENODEV;
@@ -2416,12 +2423,18 @@ static int __init omap_init_dma(void)
}
}
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
DMA_DEFAULT_FIFO_DEPTH, 0);
Re: [RESUBMIT][PATCH 5/7 v2] OMAP4: Update common omap machine specific sources.
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch updates the common machine specific source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture. Lot of code
gets re-used because of this.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/gpmc.c |6
arch/arm/mach-omap2/id.c |8 +-
arch/arm/mach-omap2/io.c | 52 ++-
arch/arm/mach-omap2/serial.c |7 +
arch/arm/mach-omap2/timer-gp.c |9 +-
5 files changed, 77 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2249049..f91934b 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -5,6 +5,9 @@
*
* Author: Juha Yrjola
*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
@@ -424,6 +427,9 @@ void __init gpmc_init(void)
} else if (cpu_is_omap34xx()) {
ck = gpmc_fck;
l = OMAP34XX_GPMC_BASE;
+ } else if (cpu_is_omap44xx()) {
+ ck = gpmc_fck;
+ l = OMAP44XX_GPMC_BASE;
}
gpmc_l3_clk = clk_get(NULL, ck);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 34b5914..458990e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -6,6 +6,9 @@
* Copyright (C) 2005 Nokia Corporation
* Written by Tony Lindgren t...@atomide.com
*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
@@ -200,7 +203,10 @@ void __init omap2_check_revision(void)
omap24xx_check_revision();
else if (cpu_is_omap34xx())
omap34xx_check_revision();
- else
+ else if (cpu_is_omap44xx()) {
+ printk(KERN_INFO FIXME: CPU revision = OMAP4430\n);
+ return;
+ } else
pr_err(OMAP revision unknown, please fix!\n);
/*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 916fcd3..32afd94 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -4,12 +4,14 @@
* OMAP2 I/O mapping code
*
* Copyright (C) 2005 Nokia Corporation
- * Copyright (C) 2007 Texas Instruments
+ * Copyright (C) 2007-2009 Texas Instruments
*
* Author:
* Juha Yrjola juha.yrj...@nokia.com
* Syed Khasim x0kha...@ti.com
*
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
@@ -30,6 +32,7 @@
#include mach/sdrc.h
#include mach/gpmc.h
+#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
#include clock.h
#include mach/powerdomain.h
@@ -38,7 +41,7 @@
#include mach/clockdomain.h
#include clockdomains.h
-
+#endif
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
@@ -166,6 +169,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
},
};
#endif
+#ifdef CONFIG_ARCH_OMAP4
+static struct map_desc omap44xx_io_desc[] __initdata = {
+ {
+ .virtual= L3_44XX_VIRT,
+ .pfn= __phys_to_pfn(L3_44XX_PHYS),
+ .length = L3_44XX_SIZE,
+ .type = MT_DEVICE,
+ },
+ {
+ .virtual= L4_44XX_VIRT,
+ .pfn= __phys_to_pfn(L4_44XX_PHYS),
+ .length = L4_44XX_SIZE,
+ .type = MT_DEVICE,
+ },
+ {
+ .virtual= L4_WK_44XX_VIRT,
+ .pfn= __phys_to_pfn(L4_WK_44XX_PHYS),
+ .length = L4_WK_44XX_SIZE,
+ .type = MT_DEVICE,
+ },
+ {
+ .virtual= OMAP44XX_GPMC_VIRT,
+ .pfn= __phys_to_pfn(OMAP44XX_GPMC_PHYS),
+ .length = OMAP44XX_GPMC_SIZE,
+ .type = MT_DEVICE,
+ },
+ {
+ .virtual= L4_PER_44XX_VIRT,
+ .pfn= __phys_to_pfn(L4_PER_44XX_PHYS),
+ .length = L4_PER_44XX_SIZE,
+ .type = MT_DEVICE,
+ },
+ {
+ .virtual= L4_EMU_44XX_VIRT,
+ .pfn=
Re:[RESUBMIT][PATCH 6/7 v2] OMAP4: Clock stubs since clock management framework not in.
(Patches are rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch update the common clock.c file for OMAP4. The clk_get() and
clk_put() sunctions are moved to common place in arch/arm/common/clkdev.c
Since on current OMAP4 platform clk management is still not supported, the
platform file is stubbed with those functions.
Once the framework is ready, this WILL be replaced with a full
clkdev implementation.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/clock.c | 33 +
1 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 29efc27..0fcfcd6 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,10 +36,40 @@ static struct clk_functions *arch_clock;
* Standard clock functions defined in include/linux/clk.h
*-*/
+/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
+ * clock framework is not up , it is defined here to avoid rework in
+ * every driver. Also dummy prcm reset function is added */
+
+/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
+#if defined(CONFIG_ARCH_OMAP4)
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ return NULL;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+void omap2_clk_prepare_for_reboot(void)
+{
+}
+EXPORT_SYMBOL(omap2_clk_prepare_for_reboot);
+
+void omap_prcm_arch_reset(char mode)
+{
+}
+EXPORT_SYMBOL(omap_prcm_arch_reset);
+#endif
int clk_enable(struct clk *clk)
{
unsigned long flags;
int ret = 0;
+ if (cpu_is_omap44xx())
+ /* OMAP4 clk framework not supported yet */
+ return 0;
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
@@ -140,6 +170,9 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
unsigned long flags;
int ret = -EINVAL;
+ if (cpu_is_omap44xx())
+ /* OMAP4 clk framework not supported yet */
+ return 0;
if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
return ret;
--
1.5.4.7
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Does SmartReflex pm patches affect USB suspend resume operations
Hi, Does the SmartReflex pm patches affect the operation of USB suspend/resume functions? Without the SR patches, the TI OMAP 3503 does not go to suspend mode at the moment. Elvis Dowson -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Smart Reflex pm patches causes a kernel panic
Roger Quadros ext-roger.quad...@nokia.com writes: ext tero.kri...@nokia.com wrote: Hi Elvis, I think I saw something similar last week, and it was caused by not having CONFIG_OMAP_PM_SRF enabled. The actual culprit is the marked line in sr_configure_vp(): vpconfig = PRM_VP1_CONFIG_ERROROFFSET | PRM_VP1_CONFIG_ERRORGAIN | PRM_VP1_CONFIG_TIMEOUTEN | mpu_opps[resource_get_level(vdd1_opp)].vsel OMAP3430_INITVOLTAGE_SHIFT; SR2 has similar code a bit later. You will also get a failure if mpu_opps[] and/or l3_opps[] is not defined at all in your board files, this null pointer exception would actually indicate a problem like that more likely. -Tero -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of ext Elvis Dowson Sent: 19 May, 2009 14:21 To: Kevin Hilman Cc: Linux OMAP Users Subject: Smart Reflex pm patches causes a kernel panic Hi Kevin, I get a kernel panic on my TI OMAP 3503 when I incorporate the SR patches. How can I trace and debug this to find the cause of this null pointer error ? [...] Elvis, Currently Smartreflex (SR) is dependent on SRF to get OPP levels. Just make sure you select CONFIG_OMAP_PM_SRF when using SR. OR you can disable Smartreflex till this issue is fixed. I am working on a patch that will make Smartreflex independent of SRF. I will post this soon. Elvis, Where are you getting the PM branch? By this problem I'm pretty sure you're not using the current published PM branch. Since there are some fixes in place. The current PM branch has a Kconfig patch that makes SR dependent on SRF so you should not see this problem. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: MMC card corruption during suspend/resume operation
Elvis Dowson elvis.dow...@mac.com writes: Hi, I have a problem with my TI OMAP 3503 platform, where the microSD card that I have, gets corrupted during a suspend/resume operation. Do the existing power management drivers, cleanly unmount/ mount the mmc card during a suspend/resume operation? Is your rootfs on MMC? If so, be sure you have CONFIG_MMC_UNSAFE_RESUME=y in your .config. MMC on rootfs on PM branch works fine for me on OMAP3 Beagle. Kevin I am using the TI OMAP linux 2.6.29 kernel version, with the android-2.6.29 kernel updates. I have installed Doing a search for the mmc card corruption issues, it would appear that a lot of people are facing the same issues on other platforms as well. It appears to be a platform issue for both the older 1.1 and 1.5 android versions. http://forum.xda-developers.com/archive/index.php/t-495899.html http://androidforums.com/updates-cupcakes/5202-did-cupcake-eat-my-sd-card.html http://forums.t-mobile.com/tmbl/board/message?board.id=Android3message.id=10928 The problem might be because of the application or system not cleanly un-mounting the mmc card, thus causing it to get corrupted, e.g during a suspend/resume operation. So, I thought I'd ask if the existing power management drivers do a clean mount/unmount when it does a suspend/resume operation. Best regards, Elvis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/11] OMAP2/3: PM: push core PM code from linux-omap
Artem Bityutskiy artem.bityuts...@nokia.com writes: Kevin Hilman wrote: The problem here is that such an interface is extremely fragile. Consider what happens if a program disables HLT, and then gets killed off for some reason. How does this reference get balanced again? I think a better solution would be a char device driver which has to be kept open as long as a reference is held. When userspace closes it (be that because the program has exited, been killed, etc) you can drop any pending references. OK, this interface is not intended for users/applications. It is intended only for OMAP PM developers who are developing the PM code and want to prevent idle for various reasons during development. It is not intended for productions systems. What about leaving /sys/power/sleep_while_idle but only if CONFIG_PM_DEBUG=y? Sounds like debugfs is the good place for this then. Sound OK to me. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: MMC card corruption during suspend/resume operation
Hi, Yes, this solved the problem. Its working fine now!! :-) Thank you!! Best regards, Elvis On May 19, 2009, at 6:52 PM, Kevin Hilman wrote: Is your rootfs on MMC? If so, be sure you have CONFIG_MMC_UNSAFE_RESUME=y in your .config. MMC on rootfs on PM branch works fine for me on OMAP3 Beagle. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: slap corruption
Hi Hiroshi, Yes, I can reproduce this running the ping.out sample, this are the steps: # insmod dspbridge.ko # insmod bridgedriver.ko # ./cexec.out ddspbase_tiomap3430.dof64P # ./ping.out 100 ^C # ./ping.out 10 Thanks and regards, Fernando. -Original Message- From: Hiroshi DOYU [mailto:hiroshi.d...@nokia.com] Sent: Tuesday, May 19, 2009 6:27 AM To: felipe.contre...@gmail.com Cc: Guzman Lugo, Fernando; Kanigeri, Hari; Gupta, Ramesh; Menon, Nishanth; Ramirez Luna, Omar; Kargirwar, Pankaj; linux-omap@vger.kernel.org Subject: Re: slap corruption From: ext Felipe Contreras felipe.contre...@gmail.com Subject: Re: slap corruption Date: Tue, 19 May 2009 11:47:11 +0200 On Tue, May 19, 2009 at 4:56 AM, Guzman Lugo, Fernando x0095...@ti.com wrote: Hi everyone, We have been looking into the Slab Corruption error and we have found the problem occurs after an application has been terminated abnormally, e.g. Using CTL-C or Segmentation Fault or kill. The issue is observed not only for DMM test cases but for others test cases that don't use DMM. The problem is reported by 'slab.c' when a slab object which is inactive, it supposed to be filled with POISON_FREE (6b) and has some 00 within the object, this seems to be corrupted. Slab corruption: size-64 start=c6bc71e0, len=64 3Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. Redzone: 0x9f911029d74e35b/0x9f911029d74e35b. 3Last user: [bf063464]Last user: [bf063464](MEM_Free+0x9c/0xe0 [bridgedriv er])(MEM_Free+0x9c/0xe0 [bridgedriver]) 3010:010: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 00 00 00 00 00 00 00 00 it seems it is not being freed correctly, because instead of being filled only with 6b it has 00 maybe other process is overwriting it. Does anyone have any idea of what can be happening? Looping Hiroshi who is working on a similar issue... perhaps the same? Thanks;) Maybe the same one, I guess. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Kernel panic on ldp board
Hi, When booting on ldp (zoom1), I am seeing a kernel panic. I am using latest kernel built from L-O master at: OMAP: sDMA: Correct the the omap_request_dma_chain() signature 0b2ce840c9fb58cf489bfdfc2d77f99a09a5dca3 Any one having any idea as to why? Here's my boot trace ## Booting image at 8000 ... Image Name: Linux-2.6.30-rc6-omap1-05706-g0b Image Type: ARM Linux Kernel Image (uncompressed) Data Size:1843272 Bytes = 1.8 MB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK OK Starting kernel ... Uncompressing Linux don. 5Linux version 2.6.30-rc6-omap1-05706-g0b2ce84 (a0389...@a0389051-ubuntu) (gcc version 4.2.1 (CodeSourcery Sourcery G++ Lite 2007q3-51)) 9 CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=10c5387f CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache Machine: OMAP LDP board Memory policy: ECC disabled, Data cache writeback 7On node 0 totalpages: 65536 7free_area_init_node: node 0, pgdat c038daf8, node_mem_map c03aa000 7 Normal zone: 512 pages used for memmap 7 Normal zone: 0 pages reserved 7 Normal zone: 65024 pages, LIFO batch:15 6OMAP3430 ES2.1 6SRAM: Mapped pa 0x4020 to va 0xd700 size: 0x10 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 5Kernel command line: console=ttyS2,115200n8 noinitrd mem=256M root=/dev/nfs rw nfsroot=128.247.85.232:/home/a0389051/omap3430/filesystemp 6NR_IRQS:402 6Clocking rate (Crystal/DPLL/ARM core): 26.0/332/500 MHz 6GPMC revision 5.0 6IRQ: Found an INTC at 0xd820 (revision 4.0) with 96 interrupts 6Total of 96 interrupts on 1 active controller 6OMAP34xx GPIO hardware version 2.5 PID hash table entries: 1024 (order: 10, 4096 bytes) 6OMAP clockevent source: GPTIMER1 at 32768 Hz Console: colour dummy device 80x30 6Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) 6Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) 6Memory: 256MB = 256MB total 5Memory: 255872KB available (3176K code, 292K data, 132K init, 0K highmem) 1Unhandled fault: external abort on non-linefetch (0x1008) at 0xcf8c Internal error: : 1008 [#1] Modules linked in: CPU: 0Not tainted (2.6.30-rc6-omap1-05706-g0b2ce84 #1) PC is at cache_alloc_refill+0x3f4/0x4f4 LR is at 0x0 pc : [c00929e0]lr : []psr: 8153 sp : c035ff28 ip : 0002 fp : 80d0 r10: 00d0 r9 : 0010 r8 : c037612c r7 : c0023808 r6 : r5 : cf80 r4 : cf80 r3 : 0028 r2 : r1 : c059a020 r0 : c059a000 Flags: Nzcv IRQs on FIQs off Mode SVC_32 ISA ARM Segment kernel Control: 10c5387f Table: 80004019 DAC: 0017 Process swapper (pid: 0, stack limit = 0xc035e2e0) Stack: (0xc035ff28 to 0xc036) ff20: c037612c 0020 c00238a4 6153 c0376110 c037612c ff40: 80d0 0020 411fc082 0008 c0300876 c0092c10 c0376110 ff60: 0020 00042000 0020 c00937f4 c03b1540 fa25 0002 ff80: c038e378 c0022e6b c0361ca0 c0023808 c0376184 c0376110 c0376184 ffa0: 411fc082 001f c00129c4 c0376148 0040 ffc0: c0022eec c038e240 c0022ee8 c0361ca0 8002106c c0008a84 c00084e8 ffe0: c0022eec 10c5387d c038e324 80008034 [c00929e0] (cache_alloc_refill+0x3f4/0x4f4) from [c0092c10] (kmem_cache_alloc+0x5c/0x94) [c0092c10] (kmem_cache_alloc+0x5c/0x94) from [c00937f4] (kmem_cache_create+0x1ec/0x438) [c00937f4] (kmem_cache_create+0x1ec/0x438) from [c00129c4] (kmem_cache_init+0x14c/0x310) [c00129c4] (kmem_cache_init+0x14c/0x310) from [c0008a84] (start_kernel+0x1d0/0x284) [c0008a84] (start_kernel+0x1d0/0x284) from [80008034] (0x80008034) Code: e1a06003 e1a05004 ea09 e598203c (e594100c) 4---[ end trace 1b75b31a2719ed1c ]--- 0Kernel panic - not syncing: Attempted to kill the idle task! Best Regards Ulrik Bech Hald Wireless Terminals Software Development Texas Instruments Inc. Desk Phone: (1) 214-567-6943 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Does SmartReflex pm patches affect USB suspend resume operations
Elvis Dowson elvis.dow...@mac.com writes: Does the SmartReflex pm patches affect the operation of USB suspend/resume functions? Without the SR patches, the TI OMAP 3503 does not go to suspend mode at the moment. You're testing something that others are not: PM branch minus SR patches. I suggest you re-add the SR patches and try the suggestions of others: Roger's patches + fix your board file. Then try USB again. That being said, the USB driver is known to be not fully PM aware yet. On my SDP, I've tested MUSB in host mode with mass storage and a USB key and it can suspend/resume just fine. However, it does not work with off-mode. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Does SmartReflex pm patches affect USB suspend resume operations
Hi Kevin, On May 19, 2009, at 8:12 PM, Kevin Hilman wrote: You're testing something that others are not: PM branch minus SR patches. I suggest you re-add the SR patches and try the suggestions of others: Roger's patches + fix your board file. I've just finished the board-overo.c modifications and will try the SR patches now. I try it first without Roger's modifications and see what happens, and then apply his modifications. That being said, the USB driver is known to be not fully PM aware yet. On my SDP, I've tested MUSB in host mode with mass storage and a USB key and it can suspend/resume just fine. However, it does not work with off-mode. What is off-mode? Best regards, Elvis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP3: PM: Make Smartreflex driver independent of SRF
Roger Quadros ext-roger.quad...@nokia.com writes:
This removes Smartreflex driver's dependency on SRF layer to get
OPPs for VDD1 and VDD2. Now Smartreflex is usable irrespective of the
underlying PM layer.
Signed-off-by: Roger Quadros ext-roger.quad...@nokia.com
Thanks, I'll revert my Kconfig change that added the depenency and
push this instead.
Kevin
---
arch/arm/mach-omap2/smartreflex.c | 74
-
1 files changed, 64 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index b032366..b66d237 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -143,6 +143,57 @@ static u32 cal_test_nvalue(u32 sennval, u32 senpval)
(rnsenn NVALUERECIPROCAL_RNSENN_SHIFT));
}
+/* determine the current OPP from the frequency
+ * we need to give this function last element of OPP rate table
+ * and the frequency
+ */
+static u16 get_opp(struct omap_opp *opp_freq_table,
+ unsigned long freq)
+{
+ struct omap_opp *prcm_config;
+
+ prcm_config = opp_freq_table;
+
+ if (prcm_config-rate = freq)
+ return prcm_config-opp_id; /* Return the Highest OPP */
+ for (; prcm_config-rate; prcm_config--)
+ if (prcm_config-rate freq)
+ return (prcm_config+1)-opp_id;
+ else if (prcm_config-rate == freq)
+ return prcm_config-opp_id;
+ /* Return the least OPP */
+ return (prcm_config+1)-opp_id;
+}
+
+static u16 get_vdd1_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll1_ck);
+
+ if (clk == NULL || IS_ERR(clk) || mpu_opps == NULL)
+ return 0;
+
+ opp = get_opp(mpu_opps + MAX_VDD1_OPP, clk-rate);
+ return opp;
+}
+
+static u16 get_vdd2_opp(void)
+{
+ u16 opp;
+ struct clk *clk;
+
+ clk = clk_get(NULL, dpll3_m2_ck);
+
+ if (clk == NULL || IS_ERR(clk) || l3_opps == NULL)
+ return 0;
+
+ opp = get_opp(l3_opps + MAX_VDD2_OPP, clk-rate);
+ return opp;
+}
+
+
static void sr_set_clk_length(struct omap_sr *sr)
{
struct clk *sys_ck;
@@ -248,13 +299,15 @@ static void sr_configure_vp(int srid)
{
u32 vpconfig;
u32 vsel;
+ u32 target_opp_no;
if (srid == SR1) {
- if (!omap_pm_vdd1_get_opp())
+ target_opp_no = get_vdd1_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP as current OPP unknown */
vsel = mpu_opps[VDD1_OPP3].vsel;
else
- vsel = mpu_opps[omap_pm_vdd1_get_opp()].vsel;
+ vsel = mpu_opps[target_opp_no].vsel;
vpconfig = PRM_VP1_CONFIG_ERROROFFSET |
PRM_VP1_CONFIG_ERRORGAIN |
@@ -295,11 +348,12 @@ static void sr_configure_vp(int srid)
OMAP3_PRM_VP1_CONFIG_OFFSET);
} else if (srid == SR2) {
- if (!omap_pm_vdd2_get_opp())
+ target_opp_no = get_vdd2_opp();
+ if (!target_opp_no)
/* Assume Nominal OPP */
vsel = l3_opps[VDD2_OPP3].vsel;
else
- vsel = l3_opps[omap_pm_vdd2_get_opp()].vsel;
+ vsel = l3_opps[target_opp_no].vsel;
vpconfig = PRM_VP2_CONFIG_ERROROFFSET |
PRM_VP2_CONFIG_ERRORGAIN |
@@ -397,7 +451,7 @@ static int sr_reset_voltage(int srid)
u32 vc_bypass_value;
if (srid == SR1) {
- target_opp_no = omap_pm_vdd1_get_opp();
+ target_opp_no = get_vdd1_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -405,7 +459,7 @@ static int sr_reset_voltage(int srid)
vsel = mpu_opps[target_opp_no].vsel;
reg_addr = R_VDD1_SR_CONTROL;
} else if (srid == SR2) {
- target_opp_no = omap_pm_vdd2_get_opp();
+ target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown: Cannot reset voltage\n);
return 1;
@@ -641,9 +695,9 @@ void enable_smartreflex(int srid)
sr_clk_enable(sr);
if (srid == SR1)
- target_opp_no = omap_pm_vdd1_get_opp();
+ target_opp_no = get_vdd1_opp();
else if (srid == SR2)
- target_opp_no = omap_pm_vdd2_get_opp();
+ target_opp_no = get_vdd2_opp();
if (!target_opp_no) {
pr_info(Current OPP unknown \
@@ -786,7 +840,7 @@ static
Re: [PATCH] usb: disable OTG AUTOIDLE only with omap3430
Woodruff, Richard r-woodru...@ti.com writes: From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Niilo Minkkinen Sent: Monday, May 18, 2009 9:54 AM Omap3 MUSB AUTOIDLE functionality configured through OTG_SYSCONFIG register prevents the device from going into retention. This is a workaround (by Richard Woodruff/TI), as his comment : A new MUSB bug which is a match to data below was identified very recently (on hardware and in simulation). This bug is in 3430 and not 3630. As a priority test (and as new default) you should have engineers disable autoidle for MUSB block. This is the workaround which will show up in next errata. Signed-off-by: Niilo Minkkinen ext-niilo.1.minkki...@nokia.com Signed-off-by: Richard Woodruff r-woodru...@ti.com Yes this is needed for 34xx. Side note is this cost around 1mW of power during active mode of MUSB. When device is not active cost is not significant. System impact depends on duty cycle of MUSB in usecase. While this makes its way upstream, I'll pull into PM branch. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] OMAP: PM: UART: zero sleep_timeout will disable timeout feature
Writing zero to /sys/devices/platform/serial8250.uart/sleep_timeout
will disable the timeout feature and prevent UART clocks from being
disabled.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/serial.c | 13 +++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0762165..c9059fd 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -235,7 +235,10 @@ static void omap_uart_block_sleep(struct omap_uart_state
*uart)
omap_uart_smart_idle_enable(uart, 0);
uart-can_sleep = 0;
- mod_timer(uart-timer, jiffies + uart-timeout);
+ if (uart-timeout)
+ mod_timer(uart-timer, jiffies + uart-timeout);
+ else
+ del_timer(uart-timer);
}
static void omap_uart_allow_sleep(struct omap_uart_state *uart)
@@ -465,8 +468,14 @@ static ssize_t sleep_timeout_store(struct kobject *kobj,
return -EINVAL;
}
sleep_timeout = value * HZ;
- list_for_each_entry(uart, uart_list, node)
+ list_for_each_entry(uart, uart_list, node) {
uart-timeout = sleep_timeout;
+ if (uart-timeout)
+ mod_timer(uart-timer, jiffies + uart-timeout);
+ else
+ /* A zero value means disable timeout feature */
+ omap_uart_block_sleep(uart);
+ }
return n;
}
--
1.6.2.2
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[PATCH 2/2] OMAP2/3: PM: remove /sys/power/clocks_off_while_idle
The sysfs control /sys/power/clocks_off_while_idle only affects
the UART clocks. And these can now be controlled with a UART
specific timeout sysfs control. The system default behavior
is to have the equivalent of clocks_off_while_idle == 1 and
a UART inactivity timeout of 5 seconds.
Now one can use
/sys/devices/platform/serial8250.uart/sleep_timeout
to set the inactivity timer for the UART in seconds. Setting
this value to zero disables the timout and is the equivalent
of doing an
echo 0 /sys/power/clocks_off_while_idle
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm.c | 12
arch/arm/mach-omap2/pm.h |1 -
arch/arm/mach-omap2/serial.c |3 ---
3 files changed, 0 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 58ed520..8633f86 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -39,7 +39,6 @@
#include pm.h
unsigned short enable_dyn_sleep;
-unsigned short clocks_off_while_idle;
unsigned short enable_off_mode;
unsigned short voltage_off_while_idle;
unsigned short wakeup_timer_seconds;
@@ -52,9 +51,6 @@ static ssize_t idle_store(struct kobject *k, struct
kobj_attribute *,
static struct kobj_attribute sleep_while_idle_attr =
__ATTR(sleep_while_idle, 0644, idle_show, idle_store);
-static struct kobj_attribute clocks_off_while_idle_attr =
- __ATTR(clocks_off_while_idle, 0644, idle_show, idle_store);
-
static struct kobj_attribute enable_off_mode_attr =
__ATTR(enable_off_mode, 0644, idle_show, idle_store);
@@ -85,8 +81,6 @@ static ssize_t idle_show(struct kobject *kobj, struct
kobj_attribute *attr,
{
if (attr == sleep_while_idle_attr)
return sprintf(buf, %hu\n, enable_dyn_sleep);
- else if (attr == clocks_off_while_idle_attr)
- return sprintf(buf, %hu\n, clocks_off_while_idle);
else if (attr == enable_off_mode_attr)
return sprintf(buf, %hu\n, enable_off_mode);
else if (attr == voltage_off_while_idle_attr)
@@ -109,8 +103,6 @@ static ssize_t idle_store(struct kobject *kobj, struct
kobj_attribute *attr,
if (attr == sleep_while_idle_attr) {
enable_dyn_sleep = value;
- } else if (attr == clocks_off_while_idle_attr) {
- clocks_off_while_idle = value;
} else if (attr == enable_off_mode_attr) {
enable_off_mode = value;
omap3_pm_off_mode_enable(enable_off_mode);
@@ -255,10 +247,6 @@ static int __init omap_pm_init(void)
if (error)
printk(KERN_ERR sysfs_create_file failed: %d\n, error);
error = sysfs_create_file(power_kobj,
- clocks_off_while_idle_attr.attr);
- if (error)
- printk(KERN_ERR sysfs_create_file failed: %d\n, error);
- error = sysfs_create_file(power_kobj,
enable_off_mode_attr.attr);
if (error) {
printk(KERN_ERR sysfs_create_file failed: %d\n, error);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index e523d75..2547e1b 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -24,7 +24,6 @@ static inline int omap3_idle_init(void) { return 0; }
#endif
extern unsigned short enable_dyn_sleep;
-extern unsigned short clocks_off_while_idle;
extern unsigned short enable_off_mode;
extern unsigned short voltage_off_while_idle;
extern atomic_t sleep_block;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index c9059fd..8c27700 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -263,9 +263,6 @@ void omap_uart_prepare_idle(int num)
struct omap_uart_state *uart;
list_for_each_entry(uart, uart_list, node) {
- if (!clocks_off_while_idle)
- continue;
-
if (num == uart-num uart-can_sleep) {
omap_uart_disable_clocks(uart);
return;
--
1.6.2.2
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Re: [PATCH 2/2] OMAP2/3: PM: remove /sys/power/clocks_off_while_idle
* Kevin Hilman khil...@deeprootsystems.com [090519 10:15]:
The sysfs control /sys/power/clocks_off_while_idle only affects
the UART clocks. And these can now be controlled with a UART
specific timeout sysfs control. The system default behavior
is to have the equivalent of clocks_off_while_idle == 1 and
a UART inactivity timeout of 5 seconds.
Now one can use
/sys/devices/platform/serial8250.uart/sleep_timeout
to set the inactivity timer for the UART in seconds. Setting
this value to zero disables the timout and is the equivalent
of doing an
echo 0 /sys/power/clocks_off_while_idle
Sounds like a nice improvment to me!
Tony
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm.c | 12
arch/arm/mach-omap2/pm.h |1 -
arch/arm/mach-omap2/serial.c |3 ---
3 files changed, 0 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 58ed520..8633f86 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -39,7 +39,6 @@
#include pm.h
unsigned short enable_dyn_sleep;
-unsigned short clocks_off_while_idle;
unsigned short enable_off_mode;
unsigned short voltage_off_while_idle;
unsigned short wakeup_timer_seconds;
@@ -52,9 +51,6 @@ static ssize_t idle_store(struct kobject *k, struct
kobj_attribute *,
static struct kobj_attribute sleep_while_idle_attr =
__ATTR(sleep_while_idle, 0644, idle_show, idle_store);
-static struct kobj_attribute clocks_off_while_idle_attr =
- __ATTR(clocks_off_while_idle, 0644, idle_show, idle_store);
-
static struct kobj_attribute enable_off_mode_attr =
__ATTR(enable_off_mode, 0644, idle_show, idle_store);
@@ -85,8 +81,6 @@ static ssize_t idle_show(struct kobject *kobj, struct
kobj_attribute *attr,
{
if (attr == sleep_while_idle_attr)
return sprintf(buf, %hu\n, enable_dyn_sleep);
- else if (attr == clocks_off_while_idle_attr)
- return sprintf(buf, %hu\n, clocks_off_while_idle);
else if (attr == enable_off_mode_attr)
return sprintf(buf, %hu\n, enable_off_mode);
else if (attr == voltage_off_while_idle_attr)
@@ -109,8 +103,6 @@ static ssize_t idle_store(struct kobject *kobj, struct
kobj_attribute *attr,
if (attr == sleep_while_idle_attr) {
enable_dyn_sleep = value;
- } else if (attr == clocks_off_while_idle_attr) {
- clocks_off_while_idle = value;
} else if (attr == enable_off_mode_attr) {
enable_off_mode = value;
omap3_pm_off_mode_enable(enable_off_mode);
@@ -255,10 +247,6 @@ static int __init omap_pm_init(void)
if (error)
printk(KERN_ERR sysfs_create_file failed: %d\n, error);
error = sysfs_create_file(power_kobj,
- clocks_off_while_idle_attr.attr);
- if (error)
- printk(KERN_ERR sysfs_create_file failed: %d\n, error);
- error = sysfs_create_file(power_kobj,
enable_off_mode_attr.attr);
if (error) {
printk(KERN_ERR sysfs_create_file failed: %d\n, error);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index e523d75..2547e1b 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -24,7 +24,6 @@ static inline int omap3_idle_init(void) { return 0; }
#endif
extern unsigned short enable_dyn_sleep;
-extern unsigned short clocks_off_while_idle;
extern unsigned short enable_off_mode;
extern unsigned short voltage_off_while_idle;
extern atomic_t sleep_block;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index c9059fd..8c27700 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -263,9 +263,6 @@ void omap_uart_prepare_idle(int num)
struct omap_uart_state *uart;
list_for_each_entry(uart, uart_list, node) {
- if (!clocks_off_while_idle)
- continue;
-
if (num == uart-num uart-can_sleep) {
omap_uart_disable_clocks(uart);
return;
--
1.6.2.2
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--
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Re: N810: latest linux-omap-2.6.git master
* Jarkko Nikula jhnik...@gmail.com [090518 23:41]: On Tue, 19 May 2009 00:09:20 -0500 Luke-Jr l...@dashjr.org wrote: Yes, that change seemed to get me booting... however, with rc6, the keyboard no longer works *at all*, and in neither rc4 nor rc6 does p54spi actually work. For me keyboard still works as partially (commit 0b2ce840c9fb58cf489bfdfc2d77f99a09a5dca3). I wonder what have caused it to break during 2.6.30-rc since at quick look I don't point any special from Tony's Extra omap code in linux-omap tree patches and patches before those are from February? git whatchanged arch/arm/mach-omap2/board-n800.c git whatchanged drivers/input/keyboard/lm8323.c While waiting to get things in sync with mainline, something like this might be handy too: $ git diff omap-2.6.28..master -- arch/arm/mach-omap2/board-n800.c Tried setting up g_ether, but for some reason I couldn't get it to auto- configure (via Gentoo's boot scripts) for rc6. For me it works but usually only if cable has been plugged in while booting. Same with Beagle as well. Any idea from MUSB guys? Is anyone actually trying to work on or maintain N8x0 support? I think N8x0 support is a little bit behind from other boards. Lot of active development is going around on newer and more open platforms like Beagle and not all patches are necessary tested on N8x0 (or other boards too!). Of course active hacker base helps to point out breakages. We should try to get the board-n8x0 stuff in shape for mainline maybe the next merge window after this, anybody willing to spend some cycles on preparing the patches against the mainline tree? Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP3: PM: remove save/restore of exception handler state
The exception handler state for the various modes of the processor
(FIQ, IRQ, ABORT, UNDEF, SYSTEM) does not need a full context
save/restore. Only the stack pointers for the used modes need a
save/restore and this is done already in the ARM-generic cpu_init()
function.
So, this patch drops the full save/restore and calls cpu_init()
immiediately after returning from SRAM.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
Applies on current PM branch.
arch/arm/mach-omap2/pm34xx.c|1 +
arch/arm/mach-omap2/sleep34xx.S | 113 +-
2 files changed, 4 insertions(+), 110 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a32b18f..80992c5 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -420,6 +420,7 @@ void omap_sram_idle(void)
* location and restores them back.
*/
_omap_sram_idle(omap3_arm_context, save_state);
+ cpu_init();
/* Restore normal SDRAM settings */
if (omap_rev() = OMAP3430_REV_ES3_0
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index e8b5d5a..38aa3fd 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -335,58 +335,6 @@ logic_l1_restore:
/*normal memory remap register */
MCR p15, 0, r5, c10, c2, 1
- /* Restore registers for other modes from SDRAM */
- /* Save current mode */
- mrs r7, cpsr
-
- /* FIQ mode */
- bic r0, r7, #0x1F
- orr r0, r0, #0x11
- msr cpsr, r0
- ldmia r3!, {r8-r12}
- /* load the SP and LR from SDRAM */
- ldmia r3!,{r4-r6}
- movsp, r4 /*update the SP */
- movlr, r5 /*update the LR */
- msrspsr, r6 /*update the SPSR*/
-
- /* IRQ mode */
- bicr0, r7, #0x1F
- orrr0, r0, #0x12
- msrcpsr, r0 /*go into IRQ mode*/
- ldmia r3!,{r4-r6} /*load the SP and LR from SDRAM*/
- movsp, r4 /*update the SP */
- movlr, r5 /*update the LR */
- msrspsr, r6 /*update the SPSR */
-
- /* ABORT mode */
- bicr0, r7, #0x1F
- orrr0, r0, #0x17
- msrcpsr, r0 /* go into ABORT mode */
- ldmia r3!,{r4-r6} /*load the SP and LR from SDRAM */
- movsp, r4 /*update the SP */
- movlr, r5 /*update the LR */
- msrspsr, r6 /*update the SPSR */
-
- /* UNDEEF mode */
- bicr0, r7, #0x1F
- orrr0, r0, #0x1B
- msrcpsr, r0 /*go into UNDEF mode */
- ldmia r3!,{r4-r6} /*load the SP and LR from SDRAM */
- movsp, r4 /*update the SP*/
- movlr, r5 /*update the LR*/
- msrspsr, r6 /*update the SPSR*/
-
- /* SYSTEM (USER) mode */
- bicr0, r7, #0x1F
- orrr0, r0, #0x1F
- msrcpsr, r0 /*go into USR mode */
- ldmia r3!,{r4-r6} /*load the SP and LR from SDRAM*/
- movsp, r4 /*update the SP */
- movlr, r5 /*update the LR */
- msrspsr, r6 /*update the SPSR */
- msrcpsr, r7 /*back to original mode*/
-
/* Restore cpsr */
ldmia r3!,{r4}/*load CPSR from SDRAM*/
msr cpsr, r4/*store cpsr */
@@ -502,69 +450,14 @@ l1_logic_lost:
mrc p15, 0, r4, c10, c2, 0
mrc p15, 0, r5, c10, c2, 1
stmia r8!,{r4-r5}
- /* Store SP, LR, SPSR registers for SUP, FIQ, IRQ, ABORT and USER
- modes into SDRAM */
-
- /* move SDRAM address to r7 as r8 is banked in FIQ*/
- mov r7, r8
-
- /* Save current mode */
- mrs r2, cpsr
- /* FIQ mode */
- bic r0, r2, #0x1F
- orr r0, r0, #0x11
- msr cpsr, r0 /* go to FIQ mode */
- stmia r7!, {r8-r12}
- mov r4, r13 /* move SP into r4*/
- mov r5, r14
- mrs r6, spsr
- stmia r7!, {r4-r6}
-
- /* IRQ mode */
- bic r0, r2, #0x1F
- orr r0, r0, #0x12
- msr cpsr, r0
- mov r4, r13
- mov r5, r14
- mrs r6, spsr
- stmia r7!, {r4-r6}
-
- /* Abort mode */
- bic r0, r2, #0x1F
- orr r0, r0, #0x17
- msr cpsr, r0
- mov r4, r13
- mov r5, r14
- mrs r6, spsr
- stmia r7!, {r4-r6}
-
- /* UNDEF mode */
- bic r0, r2, #0x1F
- orr r0, r0, #0x1B
- msr cpsr, r0
- mov r4, r13
- mov r5, r14
- mrs r6, spsr
- stmia r7!, {r4-r6}
-
- /* System (USER mode) */
- bic r0, r2, #0x1F
- orr r0, r0, #0x1F
- msr cpsr, r0
- mov r4, r13
- mov r5, r14
- mrs r6, spsr
- stmia r7!, {r4-r6}
-
- /* Back
Re: [PATCH 0/5] More omap header clean-up for the merge window after 2.6.30
* Tony Lindgren t...@atomide.com [090514 16:22]: Hi, This series removes defines that are included from hardware.h via various processor specific headers. The series makes the defines processor specific where possible so they don't trigger recompile and cause blocks for multi-omap booting. After this series, pretty much the only remaining problem code is the clock24xx.h that should have clock registers set dynamically for 2420 and 2430. This series just makes the problem defines local to clock24xx.h. If no comments, I'll add these to the omap for-next branch to wait for the merge window. Tony Regards, Tony --- Tony Lindgren (5): ARM: OMAP2/3: Remove OMAP_CM_REGADDR ARM: OMAP2/3: Remove OMAP2_PRCM_BASE ARM: OMAP2/3: Move define of OMAP2_VA_IC_BASE to be local to entry-macro.S ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE ARM: OMAP2/3: Remove OMAP2_32KSYNCT_BASE arch/arm/mach-omap2/clock.c |4 arch/arm/mach-omap2/clock24xx.c | 21 +-- arch/arm/mach-omap2/clock24xx.h | 11 + arch/arm/mach-omap2/clock34xx.h |2 arch/arm/mach-omap2/cm.h |6 - arch/arm/mach-omap2/prm.h | 205 +++-- arch/arm/mach-omap2/sdrc2xxx.c|5 - arch/arm/mach-omap2/sram242x.S| 10 + arch/arm/mach-omap2/sram243x.S| 10 + arch/arm/plat-omap/common.c | 69 +++- arch/arm/plat-omap/include/mach/entry-macro.S |9 + arch/arm/plat-omap/include/mach/omap24xx.h| 18 -- arch/arm/plat-omap/include/mach/omap34xx.h|9 - 13 files changed, 232 insertions(+), 147 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Smart Reflex pm patches causes a kernel panic
I guess the answer is all three. Elvis On May 19, 2009, at 9:44 PM, Elvis Dowson wrote: Hi Roger, Which headers should I include for getting the mpu, dsp and l3 rate tables in for my board-overo.c file ? Just mach/omap-pm.h ? I see a couple of other headers file in the board-3430sdp.c file like pm.h and omap3-opp.h .. are those really required? Elvis On May 19, 2009, at 4:43 PM, Roger Quadros wrote: omap2_init_common_hw(NULL, omap3_mpu_rate_table, omap3_dsp_rate_table, omap3_l3_rate_table); -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Doesn't power management switch off the LCD's LED backlight?
Hi, I just applied all the 191 pm patches successfully. I was just wondering, doesn't the pm patches turn off the LCD LED backlight? I have a samsung lcd touschreen, and although the screen turns dark when it goes to suspend mode, I can still see the LED backlight on from if I look at it at an angle. Elvis Dowson -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Smart Reflex pm patches causes a kernel panic
Op 19 mei 2009, om 19:50 heeft Elvis Dowson het volgende geschreven: I guess the answer is all three. This works for me: http://cgit.openembedded.net/cgit.cgi?url=openembedded/tree/recipes/linux/linux-omap-pm/overo-cpufreq.diff regards, Koen PGP.sig Description: Dit deel van het bericht is digitaal ondertekend
Re: Smart Reflex pm patches causes a kernel panic
Hi Koen, Thanks I already got this to work! Best regards, Elvis On May 19, 2009, at 11:13 PM, Koen Kooi wrote: Op 19 mei 2009, om 19:50 heeft Elvis Dowson het volgende geschreven: I guess the answer is all three. This works for me: http://cgit.openembedded.net/cgit.cgi?url=openembedded/tree/recipes/linux/linux-omap-pm/overo-cpufreq.diff regards, Koen -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: SR1 / SR2 VDD autocomp is not active error cannot suspend due to USB
Hi, I managed to get USB suspend to work after enabling the appropriate USB suspend/resume option in the kernel. Now it works fine. However, I still get the SR1 and SR2 VDD autocomp not active errors. What could the reason for this be? Best regards, Elvis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP_LDP: Support LCD display as a FB device on ZOOM MDK (Re: LDP support)
Russell King - ARM Linux wrote: Moreover, I don't think forcing frame pointers to be enabled even with unwinding support is the right solution - if we have frame pointers there's no need for unwind support (so maybe the right answer is to force unwind support off for the time being?) Ok, so I have tested this and if we add the following to the omap defconfigs then this will enable frame pointers and disable unwinding support. Hence, this should avoid the problems seen with the 2007q3 code sourcery compiler. # CONFIG_ARM_UNWIND is not set Tony, would this be ok with you? Russell, sorry I did not see this thread earlier. Jon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/7] OMAP4: Create board support for OMAP_4430SDP, v3
Hi, I rebased these patches on top of the for-next branch in linux-omap tree, some comments and the updated patch below. * Santosh Shilimkar santosh.shilim...@ti.com [090519 06:32]: (patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2) This patch creates the bare minimal board files to support OMAP_4430SDP. Additinaly new omap44xx.h is created which contains the base addresses for OMAP4430. File omap34xx.h is adapted to avoid multiple definitions of common omap base address definitions. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com --- arch/arm/mach-omap2/board-4430sdp.c| 94 arch/arm/plat-omap/include/mach/hardware.h |1 + arch/arm/plat-omap/include/mach/omap34xx.h | 10 ++-- arch/arm/plat-omap/include/mach/omap44xx.h | 61 ++ 4 files changed, 161 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-omap2/board-4430sdp.c create mode 100644 arch/arm/plat-omap/include/mach/omap44xx.h In general, considering this whole series is less than 750 lines of changes, I suggest collapsing them into following three patches: 1. Add minimal support for omap4 This patch would be everything in your series, except what's in patches two and three below. 2. Add support for 4430 SDP This patch would be just the board-4430sdp.c the changes to mach-omap2/Makefile and mach-omap2/Kconfig. 3. Add defconfig for 4430 SDP This patch would just contain the defconfig. To make things easy, I rebased two of your patches on top of the for-next branch in the linux-omap tree. Some comments and the updated patch below. Please do any more changes on top of this version so we can get things queued up nicely for Russell. diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h index ab64015..4cf9859 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/mach/omap34xx.h @@ -3,7 +3,7 @@ * * This file contains the processor specific definitions of the TI OMAP34XX. * - * Copyright (C) 2007 Texas Instruments. + * Copyright (C) 2007-2009 Texas Instruments. * Copyright (C) 2007 Nokia Corporation. * * This program is free software; you can redistribute it and/or modify @@ -31,13 +31,9 @@ #define L4_34XX_BASE 0x4800 #define L4_WK_34XX_BASE 0x4830 -#define L4_WK_OMAP_BASE L4_WK_34XX_BASE #define L4_PER_34XX_BASE 0x4900 -#define L4_PER_OMAP_BASE L4_PER_34XX_BASE #define L4_EMU_34XX_BASE 0x5400 -#define L4_EMU_BASE L4_EMU_34XX_BASE #define L3_34XX_BASE 0x6800 -#define L3_OMAP_BASE L3_34XX_BASE #define OMAP3430_32KSYNCT_BASE 0x4832 #define OMAP3430_CM_BASE 0x48004800 @@ -85,6 +81,10 @@ #if defined(CONFIG_ARCH_OMAP3430) +#define L4_WK_OMAP_BASE L4_WK_34XX_BASE +#define L4_PER_OMAP_BASE L4_PER_34XX_BASE +#define L4_EMU_BASE L4_EMU_34XX_BASE +#define L3_OMAP_BASE L3_34XX_BASE #define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE #define OMAP2_CM_BASEOMAP3430_CM_BASE #define OMAP2_PRM_BASE OMAP3430_PRM_BASE The part above can be left out now when rebased on top of the earlier header clean-up. diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h new file mode 100644 index 000..fce4126 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap44xx.h + +/* Common macros between OMAPs */ + +#if defined(CONFIG_ARCH_OMAP4) + +#define L4_WK_OMAP_BASE L4_WK_44XX_BASE +#define L4_PER_OMAP_BASE L4_PER_44XX_BASE +#define L4_EMU_BASE L4_EMU_44XX_BASE +#define L3_OMAP_BASE L3_44XX_BASE +#define OMAP2_32KSYNCT_BASE OMAP4430_32KSYNCT_BASE +#define OMAP2_CM_BASEOMAP4430_CM_BASE +#define OMAP2_PRM_BASE OMAP4430_PRM_BASE +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP44XX_IC_BASE) + +#endif + And this part too can now be left out. See the related changes to plat-omap/common.c for the timer, I've only compile tested it :) Regards, Tony From b053e3239892fa088339db2eb0f33dbaa803f61d Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar santosh.shilim...@ti.com Date: Tue, 19 May 2009 13:51:45 -0700 Subject: [PATCH] ARM: OMAP4: Create board support for OMAP_4430SDP, v3 This patch creates the bare minimal board files to support OMAP_4430SDP. Additinaly new omap44xx.h is created which contains the base addresses for OMAP4430. File omap34xx.h is adapted to avoid multiple definitions of common omap base address definitions. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Signed-off-by: Tony Lindgren t...@atomide.com diff --git a/arch/arm/mach-omap2/board-4430sdp.c
Re: [RESUBMIT][PATCH 3/7 v2] OMAP4: Update common omap platform headers.
* Santosh Shilimkar santosh.shilim...@ti.com [090519 06:32]:
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch updates the common platform headers files for OMAP4430.
On OMAP4, GIC is used instead of INTC, hence all the private peripheral
interrupts are shifted by an offset of 32. So if the hardcoding is not
done for IRQ lines in drivers, then this change won't impact any driver.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/include/mach/clock.h |8 ++-
arch/arm/plat-omap/include/mach/common.h |1 +
arch/arm/plat-omap/include/mach/control.h |7 +-
arch/arm/plat-omap/include/mach/debug-macro.S |2 +-
arch/arm/plat-omap/include/mach/dma.h |1 +
arch/arm/plat-omap/include/mach/entry-macro.S | 46 -
arch/arm/plat-omap/include/mach/io.h | 37 ++
arch/arm/plat-omap/include/mach/irqs.h| 89
+
arch/arm/plat-omap/include/mach/memory.h |3 +-
arch/arm/plat-omap/include/mach/serial.h | 16 -
10 files changed, 198 insertions(+), 12 deletions(-)
diff --git a/arch/arm/plat-omap/include/mach/clock.h
b/arch/arm/plat-omap/include/mach/clock.h
index 073a2c5..058a808 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -22,7 +22,8 @@ struct clkops {
void(*disable)(struct clk *);
};
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
struct clksel_rate {
u32 val;
@@ -51,7 +52,7 @@ struct dpll_data {
u8 max_divider;
u32 max_tolerance;
u16 max_multiplier;
-# if defined(CONFIG_ARCH_OMAP3)
+# if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
u8 modes;
void __iomem*autoidle_reg;
void __iomem*idlest_reg;
Please get rid of the extra spaces in the #if defined above while at it.
Regards,
Tony
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Re: [PATCH 4/7] OMAP4: Update common omap platform common sources, v3
* Santosh Shilimkar santosh.shilim...@ti.com [090519 06:32]:
(patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2)
This patch updates the common platform source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture.
Here's this one rebased on top of the omap for-next branch.
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -177,7 +181,8 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
-#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
+ defined(CONFIG_ARCH_OMAP4)
#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
#endif
This part is no longer needed, so left out of the patch below.
Regards,
Tony
From 6b08f71ce43cdf034eb72f03ad2621462e389e15 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar santosh.shilim...@ti.com
Date: Tue, 19 May 2009 13:51:46 -0700
Subject: [PATCH] ARM: OMAP4: Update common omap platform common sources, v3
This patch updates the common platform source files for OMAP4430.
Few OMAP4 peripherals are common with OMAP3 architecture.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index febcacf..66738c3 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -2,6 +2,10 @@
* linux/arch/arm/plat-omap/common.c
*
* Code common to all OMAP machines.
+ * The file is created by Tony Lindgren t...@atomide.com
+ *
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -362,3 +366,19 @@ void __init omap2_set_globals_343x(void)
}
#endif
+#if defined(CONFIG_ARCH_OMAP4)
+static struct omap_globals omap4_globals = {
+ .class = OMAP443X_CLASS,
+ .tap = OMAP2_IO_ADDRESS(0x4830a000),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
+ .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
+};
+
+void __init omap2_set_globals_443x(void)
+{
+ omap2_set_globals_tap(omap4_globals);
+ omap2_set_globals_control(omap4_globals);
+}
+#endif
+
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 87fb7ff..a64b692 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -311,6 +311,8 @@ static void omap_init_wdt(void)
wdt_resources[0].start = 0x49016000; /* WDT2 */
else if (cpu_is_omap343x())
wdt_resources[0].start = 0x48314000; /* WDT2 */
+ else if (cpu_is_omap44xx())
+ wdt_resources[0].start = 0x4a314000;
else
return;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 06e9cbe..def14ec 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -10,6 +10,9 @@
* Merged to support both OMAP1 and OMAP2 by Tony Lindgren t...@atomide.com
* Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar santosh.shilim...@ti.com
+ *
* Support functions for the OMAP internal DMA channels.
*
* This program is free software; you can redistribute it and/or modify
@@ -872,7 +875,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
}
l = dma_read(CCR(lch));
l = ~((1 6) | (1 26));
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
l |= ((read_prio 0x1) 6) | ((write_prio 0x1) 26);
else
l |= ((read_prio 0x1) 6);
@@ -1844,7 +1847,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
#define omap1_dma_irq_handler NULL
#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+ defined(CONFIG_ARCH_OMAP4)
static int omap2_dma_handle_ch(int ch)
{
@@ -2339,6 +2343,9 @@ static int __init omap_init_dma(void)
} else if (cpu_is_omap34xx()) {
omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
+ } else if (cpu_is_omap44xx()) {
+ omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+ dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
} else {
pr_err(DMA init failed for unsupported omap\n);
return -ENODEV;
@@ -2437,12 +2444,18 @@ static int __init omap_init_dma(void)
}
}
- if (cpu_is_omap2430() || cpu_is_omap34xx())
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
DMA_DEFAULT_FIFO_DEPTH, 0);
- if (cpu_class_is_omap2())
- setup_irq(INT_24XX_SDMA_IRQ0, omap24xx_dma_irq);
+ if (cpu_class_is_omap2()) {
+ int irq;
+ if
[PATCH] ARM: OMAP2/3: Remove unused L4_WK_OMAP_BASE, L4_PER_OMAP_BASE, L4_EMU_BASE, L3_OMAP_BASE (Re: [PATCH 2/7] OMAP4: Create board support for OMAP_4430SDP, v3)
* Tony Lindgren t...@atomide.com [090519 14:18]: Hi, I rebased these patches on top of the for-next branch in linux-omap tree, some comments and the updated patch below. We can now get rid of these old defines too BTW. Tony From a64bb3a0bf0128ee4ae1d540c7482c186aff326b Mon Sep 17 00:00:00 2001 From: Tony Lindgren t...@atomide.com Date: Tue, 19 May 2009 13:51:44 -0700 Subject: [PATCH] ARM: OMAP2/3: Remove unused L4_WK_OMAP_BASE, L4_PER_OMAP_BASE, L4_EMU_BASE, L3_OMAP_BASE These are not being used right now, and the processor specific defines should be used instead by any code accessing these registers. Signed-off-by: Tony Lindgren t...@atomide.com diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h index cc25733..f8d186a 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/mach/omap34xx.h @@ -31,13 +31,9 @@ #define L4_34XX_BASE 0x4800 #define L4_WK_34XX_BASE 0x4830 -#define L4_WK_OMAP_BASE L4_WK_34XX_BASE #define L4_PER_34XX_BASE 0x4900 -#define L4_PER_OMAP_BASE L4_PER_34XX_BASE #define L4_EMU_34XX_BASE 0x5400 -#define L4_EMU_BASE L4_EMU_34XX_BASE #define L3_34XX_BASE 0x6800 -#define L3_OMAP_BASE L3_34XX_BASE #define OMAP3430_32KSYNCT_BASE 0x4832 #define OMAP3430_CM_BASE 0x48004800
RE: [PATCH 0/2] PM: drop clocks_off_while_idle
Kevin, From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Kevin Hilman echo 0 /sys/power/clocks_off_while_idle Kevin Hilman (2): For PM branch are you keeping any kind of running readme file for inclusion in Documentation directory? It would be pretty useful to capture interface changes. Regards, Richard W. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] PM: drop clocks_off_while_idle
Woodruff, Richard r-woodru...@ti.com writes: Kevin, From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Kevin Hilman echo 0 /sys/power/clocks_off_while_idle For PM branch are you keeping any kind of running readme file for inclusion in Documentation directory? It would be pretty useful to capture interface changes. No. Nothing in-kernel at the moment as this is all work-in-progress and changing. However, Vikram and company are mostly done with a Wiki page on omapzoom.org that documents all the sysfs knobs and other debugging techniques. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Doesn't power management switch off the LCD's LED backlight?
Elvis Dowson elvis.dow...@mac.com writes: I just applied all the 191 pm patches successfully. I was just wondering, doesn't the pm patches turn off the LCD LED backlight? I have a samsung lcd touschreen, and although the screen turns dark when it goes to suspend mode, I can still see the LED backlight on from if I look at it at an angle. As I've stated before, the PM branch currently focues on getting core PM infrastructure in place. There are lots of drivers that do not have proper PM support in place. In this case, the screen blanking is a feature of the framebuffer/display drivers and has yet to be implemented. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] Omap updates for merge window after 2.6.30
Hi all, This series contains omap updates for review. There will be one more series after this for omap3 specific patches. Regards, Tony --- Eero Nurkkala (1): ARM: OMAP: McBSP: Fix legacy interrupts to clear their status Imre Deak (1): ARM: OMAP2: 2430SDP: Add FB support to board file Jarkko Nikula (1): ARM: OMAP: Update contact address of I2C registration helper Juha Yrjola (1): ARM: OMAP2/3: Add generic onenand support when connected to GPMC Mans Rullgard (1): ARM: OMAP: Increase VMALLOC_END to allow 256MB RAM Santosh Shilimkar (1): ARM: OMAP2/3: sDMA: Correct omap_request_dma_chain() Tomi Valkeinen (1): ARM: OMAP2/3: DMA: implement trans copy and const fill Tony Lindgren (3): ARM: OMAP2/3: Add generic smc91x support when connected to GPMC ARM: OMAP1: Make 770 LCD work ARM: OMAP1: Misc clean-up arch/arm/configs/rx51_defconfig |2 arch/arm/mach-omap1/Kconfig |1 arch/arm/mach-omap1/Makefile |4 arch/arm/mach-omap1/board-nokia770.c | 17 + arch/arm/mach-omap2/Makefile |6 arch/arm/mach-omap2/board-2430sdp.c | 112 ++-- arch/arm/mach-omap2/board-3430sdp.c | 78 ++ arch/arm/mach-omap2/board-rx51-peripherals.c | 192 ++ arch/arm/mach-omap2/gpmc-onenand.c| 340 + arch/arm/mach-omap2/gpmc-smc91x.c | 189 ++ arch/arm/plat-omap/dma.c | 79 -- arch/arm/plat-omap/i2c.c |2 arch/arm/plat-omap/include/mach/dma.h |3 arch/arm/plat-omap/include/mach/gpmc-smc91x.h | 46 +++ arch/arm/plat-omap/include/mach/hwa742.h |5 arch/arm/plat-omap/include/mach/onenand.h | 29 ++ arch/arm/plat-omap/include/mach/vmalloc.h |2 arch/arm/plat-omap/mcbsp.c| 30 ++ arch/arm/plat-omap/sram.c |4 drivers/video/omap/hwa742.c | 26 +- 20 files changed, 851 insertions(+), 316 deletions(-) create mode 100644 arch/arm/mach-omap2/gpmc-onenand.c create mode 100644 arch/arm/mach-omap2/gpmc-smc91x.c create mode 100644 arch/arm/plat-omap/include/mach/gpmc-smc91x.h -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] ARM: OMAP: Increase VMALLOC_END to allow 256MB RAM
From: Mans Rullgard m...@mansr.com This increases VMALLOC_END to 0x1800, making room for 256MB RAM with the default 128MB vmalloc region. Note that after this patch there's no longer a hole between vmalloc space and the beginning of IO space on omap2 as the first virtual mapping starts at 0xd800. Also fold in a related change from Paul Walmsley p...@pwsan.com to change the OMAP2_SRAM addresses accordingly. Signed-off-by: Mans Rullgard m...@mansr.com Signed-off-by: Paul Walmsley p...@pwsan.com Acked-by: Kevin Hilman khil...@deeprootsystems.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/mach/vmalloc.h |2 +- arch/arm/plat-omap/sram.c |4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h index dc104cd..b97dfaf 100644 --- a/arch/arm/plat-omap/include/mach/vmalloc.h +++ b/arch/arm/plat-omap/include/mach/vmalloc.h @@ -17,5 +17,5 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#define VMALLOC_END (PAGE_OFFSET + 0x1000) +#define VMALLOC_END (PAGE_OFFSET + 0x1800) diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index e1493d8..102c9f7 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -38,8 +38,8 @@ #define OMAP1_SRAM_VA VMALLOC_END #define OMAP2_SRAM_PA 0x4020 #define OMAP2_SRAM_PUB_PA 0x4020f800 -#define OMAP2_SRAM_VA VMALLOC_END -#define OMAP2_SRAM_PUB_VA (VMALLOC_END + 0x800) +#define OMAP2_SRAM_VA 0xe300 +#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) #define OMAP3_SRAM_PA 0x4020 #define OMAP3_SRAM_VA 0xd700 #define OMAP3_SRAM_PUB_PA 0x40208000 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 03/10] ARM: OMAP: Update contact address of I2C registration helper
From: Jarkko Nikula jarkko.nik...@nokia.com This email address is going to expire soon so update it. Signed-off-by: Jarkko Nikula jarkko.nik...@nokia.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/i2c.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index a303071..8b84839 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -5,7 +5,7 @@ * * Copyright (C) 2007 Nokia Corporation. * - * Contact: Jarkko Nikula jarkko.nik...@nokia.com + * Contact: Jarkko Nikula jhnik...@gmail.com * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/3] OMAP3:zoom2: Add support for OMAP3 Zoom2 board
* Pandita, Vikram vikram.pand...@ti.com [090519 16:48]: Tony -Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Tuesday, May 19, 2009 11:30 AM To: Pandita, Vikram Cc: Christensen, Mikkel; linux-omap@vger.kernel.org Subject: Re: [PATCH v3 1/3] OMAP3:zoom2: Add support for OMAP3 Zoom2 board * Pandita, Vikram vikram.pand...@ti.com [090518 20:55]: Tony * Pandita, Vikram vikram.pand...@ti.com [090518 14:31]: Tony + +zoom2_init_smsc911x(); +zoom2_init_quaduart(); +return platform_add_devices(zoom2_devices, ARRAY_SIZE(zoom2_devices)); +} +arch_initcall(omap_zoom2_debugboard_init); Please just move all the related functions to board-zoom2.c. I don't see any reason to have a separate file for the debugboard features. The runtime detection should do the trick. Two reasons for keeping a separate debug board. a) debug board is detachable in h/w and hence we thought its better to keep the s/w also that way The quart chip on debug bard is a quard-uart and can support 4 different console outputs. All those we thought of adding in future. Well those you can easily optimize out by not compiling in those devices. b) we took reference from board-rx51-peripherals.c wherein some parts of the board file can be moved out to a new file If you still think we need to merge, then let us know. We are open to suggestions/changes. Well the reason for separate board-*-peripheral-whatever.c files is that they're intended to be shared with other board-*.c files. Currently n8x0 and rx51 share devices. In general, we should try to do generic platform init files, like gpmc-onenand.c and gpmc-smc91x.c. Then I see need for gpmc-sdp-flash.c that's shared between 2430 and 3430 sdp at least. So yeah, for zoom2, I'd rather see just board-zoom2.c for now. But if you create some other board that uses the same debug board functions, then there could be a separate zoom-debugboard.c. Yes. There is next generation of zoom boards that will re-use the Debug board. That way the debug board file will get re-used. OK, how about rename it to something that makes sense as a name for multiple zoom like boards and resubmit. I am planning on renaming debug board zoom2 file to board-zoom-debugboard.c That way it can be used by different Zoom family of boards. OK Also the arch_initcall() issue below still needs fixing. I have cleaned the issue by making the debug_board_init call as late_initcall(). There is a dependency on serial.c file and hence the need for arch_init/late_init calls. platform_device_register() should happen for serial.c file (8250) for the omap uarts first and this should be followed by platform_device_register() for the quard uart on debug board. So there is a dependency on order of registration of platform device for the same 8250 driver. If you ack, then I can post the patches with the changes. Well you still cannot have it as a late_initcall(), you should just call the function from board-zoom2.c. Otherwise it will run for all the boards. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3 1/3] OMAP3:zoom2: Add support for OMAP3 Zoom2 board
Tony
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of
Pandita, Vikram
Sent: Tuesday, May 19, 2009 7:01 PM
To: Tony Lindgren
Cc: Christensen, Mikkel; linux-omap@vger.kernel.org
Subject: RE: [PATCH v3 1/3] OMAP3:zoom2: Add support for OMAP3 Zoom2 board
snip
Well you still cannot have it as a late_initcall(), you should just call the
function from board-zoom2.c. Otherwise it will run for all the boards.
Way not execute the debug board function for other boards could be to put it
under
#ifdef CONFIG_MACH_OMAP_ZOOM2
static int __init omap_zoom2_debugboard_init(void)
{
#ifdef CONFIG_MACH_OMAP_ZOOM2
if (!omap_zoom2_debugboard_detect())
return 0;
zoom2_init_smsc911x();
zoom2_init_quaduart();
return platform_add_devices(zoom2_devices, ARRAY_SIZE(zoom2_devices));
#endif
}
late_initcall(omap_zoom2_debugboard_init);
The registration order of the UARTS with 8250 driver is all the reason we have
to do this _initcall()
The problem is that serial.c: platform_device_register() for UART1/2/3 happens
as arch_init().
We want that Quard/Dbg-board Uart console to appear as UART4(ttyS3) and so the
platform_device_register() has to happen after the arch_init() call from
serial.c
If we put the dbg-board init in .init_machine = omap_zoom2_init() function,
then this gets called
first before the serial.c:arch_init() and assigns ttyS0(UART0) to the debug
board uart.
This is not what we want to do.
Regards,
Tony
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Impact of SR reflex or pm patches on the ADS7846 touchscreen controller
Hi, I just noticed that after incorporating the SR reflex and the recent patches from 187 onwards (using git format patch master on the pm branch), my ADS7846 touchscreen controller's response has become modified. Any possible links or is there some dependency between the SR reflex patches and the pm patches for the ADS7846 touchscreen controller? Best regards, Elvis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[ANNOUNCE] Temporary L-B tree for bridge 2.6.29
Hi All, I have placed the latest set of TI DSP BRIDGE patches based on linux-omap-pm 2.6.29 branch on gitorious; this is just a temporarily tree until it can be hosted on omapzoom again. Special thanks to Hiroshi and Ameya, I took the logical set of patches which was ported long time back[1] along with the new stuff, I reworked what we had to migrate to this baseline and will be sending those patches to the list soon. In the mean time you can clone from: git://gitorious.org/ti-dspbridge/linux-bridge.git Best Regards, Omar --- [1] http://marc.info/?l=linux-omapm=121878286205991w=2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 2/7] OMAP4: Create board support for OMAP_4430SDP, v3
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Wednesday, May 20, 2009 2:48 AM To: Shilimkar, Santosh Cc: linux-arm-ker...@lists.arm.linux.org.uk; linux-omap@vger.kernel.org Subject: Re: [PATCH 2/7] OMAP4: Create board support for OMAP_4430SDP, v3 Hi, I rebased these patches on top of the for-next branch in linux-omap tree, some comments and the updated patch below. * Santosh Shilimkar santosh.shilim...@ti.com [090519 06:32]: (patch is rebased on 2.6.30-rc6. The older version was based on 2.6.30-rc2) This patch creates the bare minimal board files to support OMAP_4430SDP. Additinaly new omap44xx.h is created which contains the base addresses for OMAP4430. File omap34xx.h is adapted to avoid multiple definitions of common omap base address definitions. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com --- arch/arm/mach-omap2/board-4430sdp.c| 94 arch/arm/plat-omap/include/mach/hardware.h |1 + arch/arm/plat-omap/include/mach/omap34xx.h | 10 ++-- arch/arm/plat-omap/include/mach/omap44xx.h | 61 ++ 4 files changed, 161 insertions(+), 5 deletions(-) create mode 100644 arch/arm/mach-omap2/board-4430sdp.c create mode 100644 arch/arm/plat-omap/include/mach/omap44xx.h In general, considering this whole series is less than 750 lines of changes, I suggest collapsing them into following three patches: 1. Add minimal support for omap4 This patch would be everything in your series, except what's in patches two and three below. 2. Add support for 4430 SDP This patch would be just the board-4430sdp.c the changes to mach-omap2/Makefile and mach-omap2/Kconfig. 3. Add defconfig for 4430 SDP This patch would just contain the defconfig. To make things easy, I rebased two of your patches on top of the for-next branch in the linux-omap tree. Some comments and the updated patch below. Please do any more changes on top of this version so we can get things queued up nicely for Russell. Cool :) I am fine with merging the patches but the clock stub patch should be kept separate. This patch should be reverted once clkdev is ready and in that case it would be easy to remove it. Series would be like this 1. Add minimal support for omap4 2. Add support for 4430 SDP 3. Clock stubs 4. Add defconfig for 4430 SDP I will rebase on 'for-next branch' on linux-omap and test it. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 03/14] DSPBRIDGE: Fixed Double notification when a sys_error happens
There is no need to keep sending notifications once an mmu fault
or sys error was sent, one notification should be enough to
signal the reload of baseimage for recovery.
Signed-off-by: Omar Ramirez Luna x00o...@ti.com
Acked-by: Hari Kanigeri h-kanige...@ti.com
---
drivers/dsp/bridge/wmd/ue_deh.c | 13 +++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/ue_deh.c b/drivers/dsp/bridge/wmd/ue_deh.c
index d5551cb..278dae2 100644
--- a/drivers/dsp/bridge/wmd/ue_deh.c
+++ b/drivers/dsp/bridge/wmd/ue_deh.c
@@ -197,6 +197,7 @@ void WMD_DEH_Notify(struct DEH_MGR *hDehMgr, u32
ulEventMask,
struct DEH_MGR *pDehMgr = (struct DEH_MGR *)hDehMgr;
struct WMD_DEV_CONTEXT *pDevContext;
DSP_STATUS status = DSP_SOK;
+ DSP_STATUS status1 = DSP_EFAIL;
u32 memPhysical = 0;
u32 HW_MMU_MAX_TLB_COUNT = 31;
u32 extern faultAddr;
@@ -285,6 +286,11 @@ void WMD_DEH_Notify(struct DEH_MGR *hDehMgr, u32
ulEventMask,
0x%x\n, dwErrInfo);
break;
}
+
+ /* Filter subsequent notifications when an error occurs */
+ if (pDevContext-dwBrdState != BRD_ERROR)
+ status1 = DSP_SOK;
+
/* Set the Board state as ERROR */
pDevContext-dwBrdState = BRD_ERROR;
/* Disable all the clocks that were enabled by DSP */
@@ -292,8 +298,11 @@ void WMD_DEH_Notify(struct DEH_MGR *hDehMgr, u32
ulEventMask,
/* Call DSP Trace Buffer */
PrintDspTraceBuffer(hDehMgr-hWmdContext);
- /* Signal DSP error/exception event. */
- NTFY_Notify(pDehMgr-hNtfy, ulEventMask);
+ if (DSP_SUCCEEDED(status1)) {
+ /* Signal DSP error/exception event. */
+ NTFY_Notify(pDehMgr-hNtfy, ulEventMask);
+ }
+
}
DBG_Trace(DBG_LEVEL1, Exiting WMD_DEH_Notify\n);
--
1.6.2.4
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[PATCH 01/14] DSPBRIDGE: Remove SEEK_* redefinitions
From: Guzman Lugo Fernando x0095...@ti.com This patch removes the SEEK_* redefinitions in host_os.h Signed-off-by: Guzman Lugo Fernando x0095...@ti.com Acked-by: Omar Ramirez Luna x00o...@ti.com --- arch/arm/plat-omap/include/dspbridge/host_os.h |6 -- 1 files changed, 0 insertions(+), 6 deletions(-) diff --git a/arch/arm/plat-omap/include/dspbridge/host_os.h b/arch/arm/plat-omap/include/dspbridge/host_os.h index f539bd0..6fe1462 100644 --- a/arch/arm/plat-omap/include/dspbridge/host_os.h +++ b/arch/arm/plat-omap/include/dspbridge/host_os.h @@ -60,12 +60,6 @@ #include asm/cacheflush.h #include linux/dma-mapping.h -/* --- Macros */ - -#define SEEK_SET0 /* Seek from beginning of file. */ -#define SEEK_CUR1 /* Seek from current position. */ -#define SEEK_END2 /* Seek from end of file. */ - /* TODO -- Remove, once BP defines them */ #define INT_MAIL_MPU_IRQ26 #define INT_DSP_MMU_IRQ28 -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 07/14] DSPBRIDGE: base image reload suppor after DSP error
From: Fernando Guzman Lugo x0095...@ti.com
Added support for reloading the base image after DSP error
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
Signed-off-by: Omar Ramirez Luna x00o...@ti.com
---
arch/arm/plat-omap/include/dspbridge/wmddeh.h |2 +
drivers/dsp/bridge/rmgr/node.c| 72 +++--
drivers/dsp/bridge/rmgr/proc.c| 153 +++--
drivers/dsp/bridge/wmd/ue_deh.c | 37 +-
4 files changed, 188 insertions(+), 76 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/wmddeh.h
b/arch/arm/plat-omap/include/dspbridge/wmddeh.h
index dd50a3a..60704da 100644
--- a/arch/arm/plat-omap/include/dspbridge/wmddeh.h
+++ b/arch/arm/plat-omap/include/dspbridge/wmddeh.h
@@ -61,4 +61,6 @@
extern void WMD_DEH_Notify(struct DEH_MGR *hDehMgr,
u32 ulEventMask, u32 dwErrInfo);
+
+ extern void WMD_DEH_ReleaseDummyMem(void);
#endif /* WMDDEH_ */
diff --git a/drivers/dsp/bridge/rmgr/node.c b/drivers/dsp/bridge/rmgr/node.c
index af604f9..53a42bf 100644
--- a/drivers/dsp/bridge/rmgr/node.c
+++ b/drivers/dsp/bridge/rmgr/node.c
@@ -864,8 +864,7 @@ DBAPI NODE_AllocMsgBuf(struct NODE_OBJECT *hNode, u32 uSize,
if (!MEM_IsValidHandle(pNode, NODE_SIGNATURE))
status = DSP_EHANDLE;
-
- if (NODE_GetType(pNode) == NODE_DEVICE)
+ else if (NODE_GetType(pNode) == NODE_DEVICE)
status = DSP_ENODETYPE;
if (DSP_FAILED(status))
@@ -1337,6 +1336,10 @@ DSP_STATUS NODE_Create(struct NODE_OBJECT *hNode)
DBC_Require(cRefs 0);
GT_1trace(NODE_debugMask, GT_ENTER, NODE_Create: hNode: 0x%x\n,
hNode);
+ if (!MEM_IsValidHandle(pNode, NODE_SIGNATURE)) {
+ status = DSP_EHANDLE;
+ goto func_end;
+ }
hProcessor = hNode-hProcessor;
status = PROC_GetState(hProcessor, procStatus,
sizeof(struct DSP_PROCESSORSTATE));
@@ -1921,9 +1924,10 @@ DSP_STATUS NODE_FreeMsgBuf(struct NODE_OBJECT *hNode, IN
u8 *pBuffer,
DBC_Require(pNode-hXlator != NULL);
GT_3trace(NODE_debugMask, GT_ENTER, NODE_FreeMsgBuf: hNode: 0x%x\t
pBuffer: 0x%x\tpAttr: 0x%x\n, hNode, pBuffer, pAttr);
- if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE))
+ if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE)) {
status = DSP_EHANDLE;
-
+ goto func_end;
+ }
status = PROC_GetProcessorId(pNode-hProcessor, procId);
if (procId == DSP_UNIT) {
if (DSP_SUCCEEDED(status)) {
@@ -1946,6 +1950,7 @@ DSP_STATUS NODE_FreeMsgBuf(struct NODE_OBJECT *hNode, IN
u8 *pBuffer,
} else {
DBC_Assert(NULL); /* BUG */
}
+func_end:
return status;
}
@@ -2063,6 +2068,10 @@ DSP_STATUS NODE_GetMessage(struct NODE_OBJECT *hNode,
OUT struct DSP_MSG *pMsg,
GT_3trace(NODE_debugMask, GT_ENTER,
NODE_GetMessage: hNode: 0x%x\tpMsg:
0x%x\tuTimeout: 0x%x\n, hNode, pMsg, uTimeout);
+ if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE)) {
+ status = DSP_EHANDLE;
+ goto func_end;
+ }
hProcessor = hNode-hProcessor;
status = PROC_GetState(hProcessor, procStatus,
sizeof(struct DSP_PROCESSORSTATE));
@@ -2076,10 +2085,6 @@ DSP_STATUS NODE_GetMessage(struct NODE_OBJECT *hNode,
OUT struct DSP_MSG *pMsg,
status = DSP_EFAIL;
goto func_end;
}
- if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE)) {
- status = DSP_EHANDLE;
- goto func_end;
- }
hNodeMgr = hNode-hNodeMgr;
nodeType = NODE_GetType(hNode);
if (nodeType != NODE_MESSAGE nodeType != NODE_TASK
@@ -2295,12 +2300,14 @@ DSP_STATUS NODE_Pause(struct NODE_OBJECT *hNode)
if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE)) {
status = DSP_EHANDLE;
+ goto func_end;
} else {
nodeType = NODE_GetType(hNode);
if (nodeType != NODE_TASK nodeType != NODE_DAISSOCKET)
status = DSP_ENODETYPE;
-
}
+ if (DSP_FAILED(status))
+ goto func_end;
status = PROC_GetProcessorId(pNode-hProcessor, procId);
@@ -2387,6 +2394,10 @@ DSP_STATUS NODE_PutMessage(struct NODE_OBJECT *hNode,
GT_3trace(NODE_debugMask, GT_ENTER,
NODE_PutMessage: hNode: 0x%x\tpMsg:
0x%x\tuTimeout: 0x%x\n, hNode, pMsg, uTimeout);
+ if (!MEM_IsValidHandle(hNode, NODE_SIGNATURE)) {
+ status = DSP_EHANDLE;
+ goto func_end;
+ }
hProcessor = hNode-hProcessor;
status = PROC_GetState(hProcessor, procStatus,
[PATCH 14/14] DSPBRIDGE: Remove run_IdleBoot support
From: Hari Kanigeri h-kanige...@ti.com
Changed the Bridge boot process in order to avoid the
usage of the IDLE boot mode and the DSP ROM.
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
---
drivers/dsp/bridge/wmd/tiomap3430.c | 60 +++---
1 files changed, 6 insertions(+), 54 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/tiomap3430.c
b/drivers/dsp/bridge/wmd/tiomap3430.c
index afeeb2c..7a9603d 100644
--- a/drivers/dsp/bridge/wmd/tiomap3430.c
+++ b/drivers/dsp/bridge/wmd/tiomap3430.c
@@ -141,8 +141,6 @@ static DSP_STATUS PteSet(struct PgTableAttrs *pt, u32 pa,
u32 va,
static DSP_STATUS MemMapVmalloc(struct WMD_DEV_CONTEXT *hDevContext,
u32 ulMpuAddr, u32 ulVirtAddr,
u32 ulNumBytes, struct HW_MMUMapAttrs_t *hwAttrs);
-static DSP_STATUS run_IdleBoot(void __iomem *prcm_base, void __iomem *cm_base,
- void __iomem *sysctrl_base);
static void GetHWRegs(void __iomem *prcm_base, void __iomem *cm_base);
/* --- Globals */
@@ -341,8 +339,9 @@ static DSP_STATUS WMD_BRD_Monitor(struct WMD_DEV_CONTEXT
*hDevContext)
}
DBG_Trace(DBG_LEVEL6, WMD_BRD_Monitor - Middle ** \n);
GetHWRegs(resources.dwPrmBase, resources.dwCmBase);
- status = run_IdleBoot(resources.dwPrmBase, resources.dwCmBase,
- resources.dwSysCtrlBase);
+ HW_RST_UnReset(resources.dwPrmBase, HW_RST2_IVA2);
+ CLK_Enable(SERVICESCLK_iva2_ck);
+
if (DSP_SUCCEEDED(status)) {
/* set the device state to IDLE */
pDevContext-dwBrdState = BRD_IDLE;
@@ -811,8 +810,6 @@ static DSP_STATUS WMD_BRD_Stop(struct WMD_DEV_CONTEXT
*hDevContext)
CHNLSM_InterruptDSP2(pDevContext, MBX_PM_DSPIDLE);
mdelay(10);
GetHWRegs(resources.dwPrmBase, resources.dwCmBase);
- run_IdleBoot(resources.dwPrmBase, resources.dwCmBase,
- resources.dwSysCtrlBase);
udelay(50);
clk_status = CLK_Disable(SERVICESCLK_iva2_ck);
@@ -916,6 +913,9 @@ static DSP_STATUS WMD_BRD_Delete(struct WMD_DEV_CONTEXT
*hDevContext)
(pPtAttrs-L2NumPages * sizeof(struct PageInfo)));
}
DBG_Trace(DBG_LEVEL6, WMD_BRD_Stop - End ** \n);
+ HW_RST_Reset(resources.dwPrmBase, HW_RST1_IVA2);
+ HW_RST_Reset(resources.dwPrmBase, HW_RST2_IVA2);
+
return status;
}
@@ -2018,54 +2018,6 @@ static DSP_STATUS MemMapVmalloc(struct WMD_DEV_CONTEXT
*pDevContext,
return status;
}
-static DSP_STATUS run_IdleBoot(void __iomem *prm_base, void __iomem *cm_base,
- void __iomem *sysctrl_base)
-{
- u32 temp;
- DSP_STATUS status = DSP_SOK;
- enum HW_PwrState_tpwrState;
-
- /* Read PM_PWSTST_IVA2 */
- HW_PWRST_IVA2RegGet(prm_base, temp);
- if ((temp 0x03) != 0x03 || (temp 0x03) != 0x02) {
- /* IVA2 is not in ON state */
- /* Set PM_PWSTCTRL_IVA2 to ON */
- HW_PWR_IVA2PowerStateSet(prm_base, HW_PWR_DOMAIN_DSP,
- HW_PWR_STATE_ON);
- /* Set the SW supervised state transition */
- HW_PWR_CLKCTRL_IVA2RegSet(cm_base, HW_SW_SUP_WAKEUP);
- /* Wait until the state has moved to ON */
- HW_PWR_IVA2StateGet(prm_base, HW_PWR_DOMAIN_DSP, pwrState);
- }
- CLK_Disable(SERVICESCLK_iva2_ck);
- udelay(10);
- /* Assert IVA2-RST1 and IVA2-RST2 */
- __raw_writel((u32)0x07, (prm_base) + 0x50);
- udelay(30);
- /* set the SYSC for Idle Boot */
- __raw_writel((u32)0x01, (sysctrl_base) + 0x404);
- temp = (u32) *((REG_UWORD32 *)
- ((u32) (cm_base) + 0x34));
- temp = (temp 0xFFFE) | 0x1;
- *((REG_UWORD32 *) ((u32) (cm_base) + 0x34)) =
- (u32) temp;
- temp = (u32) *((REG_UWORD32 *)
- ((u32) (cm_base) + 0x4));
- temp = (temp 0xFC8) | 0x37;
- *((REG_UWORD32 *) ((u32) (cm_base) + 0x4)) =
- (u32) temp;
- CLK_Enable(SERVICESCLK_iva2_ck);
- udelay(20);
- GetHWRegs(prm_base, cm_base);
- /* Release Reset1 and Reset2 */
- __raw_writel((u32)0x05, (prm_base) + 0x50);
- udelay(20);
- __raw_writel((u32)0x04, (prm_base) + 0x50);
- udelay(30);
- return status;
-}
-
-
static void GetHWRegs(void __iomem *prm_base, void __iomem *cm_base)
{
u32 temp;
--
1.6.2.4
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[PATCH 06/14] DSPBRIDGE: Remove variables not used in cfgdefs.h
From: Guzman Lugo Fernando x0095...@ti.com
This patch removes some variables that are not used.
Signed-off-by: Guzman Lugo Fernando x0095...@ti.com
Signed-off-by: Omar Ramirez Luna x00o...@ti.com
---
arch/arm/plat-omap/include/dspbridge/cfgdefs.h | 10 --
drivers/dsp/bridge/rmgr/drv.c |2 --
2 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
index a2115f6..0155e13 100644
--- a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
@@ -77,15 +77,6 @@
u8 bIRQAttrib; /* IRQ Attribute */
u32 dwOffsetForMonitor; /* The Shared memory starts from
* dwMemBase + this offset */
- u32 dwBusType; /* Bus type for this device */
- u32 dwProgBase; /* DSP ProgBase */
- u32 dwProgLength; /* DSP ProgBase Length */
- u32 dwRegBase; /* DSP memory mapped register base */
- u32 dwRegLength;/* DSP Register Base Length */
- u32 ClientHandle; /* Client Handle */
- u32 SocketHandle; /* Socket and Function Pair */
- u32 CardInfo; /* This will be used as a context data in
-* in the CardRequestIRQ */
/*
* Info needed by NODE for allocating channels to communicate with RMS:
* dwChnlOffset: Offset of RMS channels. Lower channels are
@@ -104,7 +95,6 @@
void __iomem *dwWdTimerDspBase;
void __iomem *dwMboxBase;
void __iomem *dwDmmuBase;
- u32 *dwDipiBase;
void __iomem *dwSysCtrlBase;
} ;
diff --git a/drivers/dsp/bridge/rmgr/drv.c b/drivers/dsp/bridge/rmgr/drv.c
index ae6ea7f..e7da578 100644
--- a/drivers/dsp/bridge/rmgr/drv.c
+++ b/drivers/dsp/bridge/rmgr/drv.c
@@ -1736,7 +1736,6 @@ static DSP_STATUS RequestBridgeResources(u32 dwContext,
s32 bRequest)
/* Second window is for DSP external memory shared with MPU */
if (DSP_SUCCEEDED(status)) {
/* for Linux, these are hard-coded values */
- pResources-dwBusType = 0;
pResources-bIRQRegisters = 0;
pResources-bIRQAttrib = 0;
pResources-dwOffsetForMonitor = 0;
@@ -1863,7 +1862,6 @@ static DSP_STATUS RequestBridgeResourcesDSP(u32
dwContext, s32 bRequest)
}
if (DSP_SUCCEEDED(status)) {
/* for Linux, these are hard-coded values */
- pResources-dwBusType = 0;
pResources-bIRQRegisters = 0;
pResources-bIRQAttrib = 0;
pResources-dwOffsetForMonitor = 0;
--
1.6.2.4
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[PATCH 02/14] DSPBRIDGE: Removes wrappers funtions of readl and writel
From: Guzman Lugo Fernando x0095...@ti.com
This patch change the call to RD_MEM_32_VOLATILE and
WR_MEM_32_VOLATILE with __raw_readl and __raw_writel
Signed-off-by: Guzman Lugo Fernando x0095...@ti.com
Acked-by: Omar Ramirez Luna x00o...@ti.com
---
drivers/dsp/bridge/hw/MLBRegAcM.h| 41
drivers/dsp/bridge/hw/MMURegAcM.h| 62 ++--
drivers/dsp/bridge/hw/PRCMRegAcM.h | 181 +-
drivers/dsp/bridge/hw/hw_dspssC64P.c |5 +-
4 files changed, 146 insertions(+), 143 deletions(-)
diff --git a/drivers/dsp/bridge/hw/MLBRegAcM.h
b/drivers/dsp/bridge/hw/MLBRegAcM.h
index 747a2e1..29f6de3 100644
--- a/drivers/dsp/bridge/hw/MLBRegAcM.h
+++ b/drivers/dsp/bridge/hw/MLBRegAcM.h
@@ -18,6 +18,7 @@
#define _MLB_REG_ACM_H
#include GlobalTypes.h
+#include linux/io.h
#include EasiGlobal.h
#include MLBAccInt.h
@@ -25,7 +26,7 @@
#define MLBMAILBOX_SYSCONFIGReadRegister32(baseAddress)\
(_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGReadRegister32),\
- RD_MEM_32_VOLATILE(((u32)(baseAddress))+ \
+ __raw_readl(((baseAddress))+ \
MLB_MAILBOX_SYSCONFIG_OFFSET))
@@ -34,13 +35,13 @@
const u32 offset = MLB_MAILBOX_SYSCONFIG_OFFSET;\
register u32 newValue = ((u32)(value));\
_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGWriteRegister32);\
-WR_MEM_32_VOLATILE(((u32)(baseAddress))+offset, newValue);\
+__raw_writel(newValue, ((baseAddress))+offset);\
}
#define MLBMAILBOX_SYSCONFIGSIdleModeRead32(baseAddress)\
(_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGSIdleModeRead32),\
- (((RD_MEM_32_VOLATILEu32)(baseAddress))+\
+ (((__raw_readlu32)(baseAddress))+\
(MLB_MAILBOX_SYSCONFIG_OFFSET \
MLB_MAILBOX_SYSCONFIG_SIdleMode_MASK) \
MLB_MAILBOX_SYSCONFIG_SIdleMode_OFFSET))
@@ -49,7 +50,7 @@
#define MLBMAILBOX_SYSCONFIGSIdleModeWrite32(baseAddress, value)\
{\
const u32 offset = MLB_MAILBOX_SYSCONFIG_OFFSET;\
-register u32 data = RD_MEM_32_VOLATILE(((u32)(baseAddress)) +\
+register u32 data = __raw_readl(((u32)(baseAddress)) +\
offset);\
register u32 newValue = ((u32)(value));\
_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGSIdleModeWrite32);\
@@ -57,7 +58,7 @@
newValue = MLB_MAILBOX_SYSCONFIG_SIdleMode_OFFSET;\
newValue = MLB_MAILBOX_SYSCONFIG_SIdleMode_MASK;\
newValue |= data;\
-WR_MEM_32_VOLATILE((u32)(baseAddress)+offset, newValue);\
+__raw_writel(newValue, (u32)(baseAddress)+offset);\
}
@@ -65,20 +66,20 @@
{\
const u32 offset = MLB_MAILBOX_SYSCONFIG_OFFSET;\
register u32 data =\
-RD_MEM_32_VOLATILE(((u32)(baseAddress))+offset);\
+__raw_readl(((u32)(baseAddress))+offset);\
register u32 newValue = ((u32)(value));\
_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGSoftResetWrite32);\
data = ~(MLB_MAILBOX_SYSCONFIG_SoftReset_MASK);\
newValue = MLB_MAILBOX_SYSCONFIG_SoftReset_OFFSET;\
newValue = MLB_MAILBOX_SYSCONFIG_SoftReset_MASK;\
newValue |= data;\
-WR_MEM_32_VOLATILE((u32)(baseAddress)+offset, newValue);\
+__raw_writel(newValue, (u32)(baseAddress)+offset);\
}
#define MLBMAILBOX_SYSCONFIGAutoIdleRead32(baseAddress)\
(_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGAutoIdleRead32),\
- (((RD_MEM_32_VOLATILEu32)(baseAddress))+\
+ (((__raw_readlu32)(baseAddress))+\
(MLB_MAILBOX_SYSCONFIG_OFFSET \
MLB_MAILBOX_SYSCONFIG_AutoIdle_MASK) \
MLB_MAILBOX_SYSCONFIG_AutoIdle_OFFSET))
@@ -88,20 +89,20 @@
{\
const u32 offset = MLB_MAILBOX_SYSCONFIG_OFFSET;\
register u32 data =\
-RD_MEM_32_VOLATILE(((u32)(baseAddress))+offset);\
+__raw_readl(((u32)(baseAddress))+offset);\
register u32 newValue = ((u32)(value));\
_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSCONFIGAutoIdleWrite32);\
data = ~(MLB_MAILBOX_SYSCONFIG_AutoIdle_MASK);\
newValue = MLB_MAILBOX_SYSCONFIG_AutoIdle_OFFSET;\
newValue = MLB_MAILBOX_SYSCONFIG_AutoIdle_MASK;\
newValue |= data;\
-WR_MEM_32_VOLATILE((u32)(baseAddress)+offset, newValue);\
+__raw_writel(newValue, (u32)(baseAddress)+offset);\
}
#define MLBMAILBOX_SYSSTATUSResetDoneRead32(baseAddress)\
(_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_SYSSTATUSResetDoneRead32),\
- (((RD_MEM_32_VOLATILEu32)(baseAddress))+\
+ (((__raw_readlu32)(baseAddress))+\
(MLB_MAILBOX_SYSSTATUS_OFFSET \
MLB_MAILBOX_SYSSTATUS_ResetDone_MASK) \
MLB_MAILBOX_SYSSTATUS_ResetDone_OFFSET))
@@ -109,7 +110,7 @@
#define MLBMAILBOX_MESSAGE___0_15ReadRegister32(baseAddress, bank)\
(_DEBUG_LEVEL_1_EASI(EASIL1_MLBMAILBOX_MESSAGE___0_15ReadRegister32),\
- RD_MEM_32_VOLATILE(((u32)(baseAddress))+\
+ __raw_readl(((baseAddress))+\
(MLB_MAILBOX_MESSAGE___REGSET_0_15_OFFSET +\
MLB_MAILBOX_MESSAGE___0_15_OFFSET+(\
(bank)*MLB_MAILBOX_MESSAGE___REGSET_0_15_STEP
@@ -122,14 +123,14 @@
[PATCH 05/14] DSPBRIDGE: Change address resources to void __iomem *
From: Guzman Lugo Fernando x0095...@ti.com
This patch changes address resources to void __iomem *
Ported for linux-omap-pm bridge-2.6.29 branch.
Signed-off-by: Guzman Lugo Fernando x0095...@ti.com
Signed-off-by: Omar Ramirez Luna x00o...@ti.com
---
arch/arm/plat-omap/include/dspbridge/cfgdefs.h | 20 +-
drivers/dsp/bridge/hw/hw_dspssC64P.c |2 +-
drivers/dsp/bridge/hw/hw_dspssC64P.h |2 +-
drivers/dsp/bridge/hw/hw_mbox.c| 25 ++--
drivers/dsp/bridge/hw/hw_mbox.h| 16
drivers/dsp/bridge/hw/hw_mmu.c | 41 ++--
drivers/dsp/bridge/hw/hw_mmu.h | 28 +++---
drivers/dsp/bridge/hw/hw_prcm.c| 26 ++--
drivers/dsp/bridge/hw/hw_prcm.h| 17
drivers/dsp/bridge/rmgr/drv.c | 38 +-
drivers/dsp/bridge/rmgr/node.c |2 +-
drivers/dsp/bridge/wmd/_tiomap.h |2 +-
drivers/dsp/bridge/wmd/tiomap3430.c| 49
13 files changed, 135 insertions(+), 133 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
index 4f78d82..a2115f6 100644
--- a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
@@ -96,16 +96,16 @@
u32 dwChnlOffset;
u32 dwChnlBufSize;
u32 dwNumChnls;
- u32 dwPrmBase;
- u32 dwCmBase;
- u32 dwPerBase;
- u32 dwPerPmBase;
- u32 dwCorePmBase;
- u32 dwWdTimerDspBase;
- u32 dwMboxBase;
- u32 dwDmmuBase;
- u32 dwDipiBase;
- u32 dwSysCtrlBase;
+ void __iomem *dwPrmBase;
+ void __iomem *dwCmBase;
+ void __iomem *dwPerBase;
+ u32 dwPerPmBase;
+ u32 dwCorePmBase;
+ void __iomem *dwWdTimerDspBase;
+ void __iomem *dwMboxBase;
+ void __iomem *dwDmmuBase;
+ u32 *dwDipiBase;
+ void __iomem *dwSysCtrlBase;
} ;
struct CFG_DSPMEMDESC {
diff --git a/drivers/dsp/bridge/hw/hw_dspssC64P.c
b/drivers/dsp/bridge/hw/hw_dspssC64P.c
index d697871..c61af81 100644
--- a/drivers/dsp/bridge/hw/hw_dspssC64P.c
+++ b/drivers/dsp/bridge/hw/hw_dspssC64P.c
@@ -34,7 +34,7 @@
#include IPIAccInt.h
/* HW FUNCTIONS */
-HW_STATUS HW_DSPSS_BootModeSet(const u32 baseAddress,
+HW_STATUS HW_DSPSS_BootModeSet(const void __iomem *baseAddress,
enum HW_DSPSYSC_BootMode_t bootMode,
const u32 bootAddress)
{
diff --git a/drivers/dsp/bridge/hw/hw_dspssC64P.h
b/drivers/dsp/bridge/hw/hw_dspssC64P.h
index 493effd..50f9af4 100644
--- a/drivers/dsp/bridge/hw/hw_dspssC64P.h
+++ b/drivers/dsp/bridge/hw/hw_dspssC64P.h
@@ -41,7 +41,7 @@
#define HW_DSP_IDLEBOOT_ADDR 0x007E
- extern HW_STATUS HW_DSPSS_BootModeSet(const u32 baseAddress,
+ extern HW_STATUS HW_DSPSS_BootModeSet(const void __iomem *baseAddress,
enum HW_DSPSYSC_BootMode_t bootMode,
const u32 bootAddress);
diff --git a/drivers/dsp/bridge/hw/hw_mbox.c b/drivers/dsp/bridge/hw/hw_mbox.c
index 9f14f34..ee79032 100644
--- a/drivers/dsp/bridge/hw/hw_mbox.c
+++ b/drivers/dsp/bridge/hw/hw_mbox.c
@@ -36,7 +36,7 @@
struct MAILBOX_CONTEXT mboxsetting = {0x4, 0x1, 0x1};
/* Saves the mailbox context */
-HW_STATUS HW_MBOX_saveSettings(u32 baseAddress)
+HW_STATUS HW_MBOX_saveSettings(void __iomem *baseAddress)
{
HW_STATUS status = RET_OK;
@@ -50,7 +50,7 @@ HW_STATUS HW_MBOX_saveSettings(u32 baseAddress)
}
/* Restores the mailbox context */
-HW_STATUS HW_MBOX_restoreSettings(u32 baseAddress)
+HW_STATUS HW_MBOX_restoreSettings(void __iomem *baseAddress)
{
HW_STATUS status = RET_OK;
/* Restor IRQ enable status */
@@ -65,8 +65,8 @@ HW_STATUS HW_MBOX_restoreSettings(u32 baseAddress)
/* Reads a u32 from the sub module message box Specified. if there are no
* messages in the mailbox then and error is returned. */
-HW_STATUS HW_MBOX_MsgRead(const u32 baseAddress, const HW_MBOX_Id_t mailBoxId,
- u32 *const pReadValue)
+HW_STATUS HW_MBOX_MsgRead(const void __iomem *baseAddress,
+ const HW_MBOX_Id_t mailBoxId, u32 *const pReadValue)
{
HW_STATUS status = RET_OK;
@@ -86,8 +86,8 @@ HW_STATUS HW_MBOX_MsgRead(const u32 baseAddress, const
HW_MBOX_Id_t mailBoxId,
}
/* Writes a u32 from the sub module message box Specified. */
-HW_STATUS HW_MBOX_MsgWrite(const u32 baseAddress, const HW_MBOX_Id_t mailBoxId,
- const u32 writeValue)
+HW_STATUS HW_MBOX_MsgWrite(const void __iomem *baseAddress,
+ const HW_MBOX_Id_t
[PATCH 10/14] BRIDGE: Number of supported OPPs increased to 5
From: Armando Uribe de Leon x0095...@ti.com
This patch increases the supported opp numbers within bridge driver,
it will also fix the opp table to be fully populated in the shared memory;
before, it was causing the QOS test reported numbers to be inaccurate.
Signed-off-by: Armando Uribe de Leon x0095...@ti.com
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
---
drivers/dsp/bridge/rmgr/drv_interface.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
index c8af75c..e937766 100755
--- a/drivers/dsp/bridge/rmgr/drv_interface.c
+++ b/drivers/dsp/bridge/rmgr/drv_interface.c
@@ -210,7 +210,7 @@ static struct file_operations bridge_fops = {
static u32 timeOut = 1000;
#ifdef CONFIG_BRIDGE_DVFS
static struct clk *clk_handle;
-s32 dsp_max_opps = VDD1_OPP3;
+s32 dsp_max_opps = VDD1_OPP5;
#endif
/* Maximum Opps that can be requested by IVA*/
--
1.6.2.4
--
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[PATCH 04/14] DSPBRIDGE: Fixed typo in debug traces
From: Omar Ramirez Luna omar.rami...@ti.com
Fixed typo in Bridge traces for Msg and Nldr.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
Acked-by: Hari Kanigeri h-kanige...@ti.com
---
drivers/dsp/bridge/pmgr/msg.c |2 +-
drivers/dsp/bridge/rmgr/nldr.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/msg.c b/drivers/dsp/bridge/pmgr/msg.c
index bbf5174..be4acdb 100644
--- a/drivers/dsp/bridge/pmgr/msg.c
+++ b/drivers/dsp/bridge/pmgr/msg.c
@@ -158,7 +158,7 @@ bool MSG_Init(void)
if (cRefs == 0) {
DBC_Assert(!MSG_debugMask.flags);
- GT_create(MSG_debugMask, MG);/* MG for MsG */
+ GT_create(MSG_debugMask, MS);/* MS for MSg */
}
cRefs++;
diff --git a/drivers/dsp/bridge/rmgr/nldr.c b/drivers/dsp/bridge/rmgr/nldr.c
index f3c429c..79f7505 100644
--- a/drivers/dsp/bridge/rmgr/nldr.c
+++ b/drivers/dsp/bridge/rmgr/nldr.c
@@ -893,7 +893,7 @@ bool NLDR_Init(void)
if (cRefs == 0) {
DBC_Assert(!NLDR_debugMask.flags);
- GT_create(NLDR_debugMask, DL); /* DL for DLdr */
+ GT_create(NLDR_debugMask, NL); /* NL for NLdr */
RMM_init();
}
--
1.6.2.4
--
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[PATCH 08/14] DSPBRIDGE: trivial spacing cleanup for memory module
From: Omar Ramirez Luna omar.rami...@ti.com
trivial spacing cleanup for memory module
Signed-off-by: Omar Ramirez Luna x00o...@ti.com
---
drivers/dsp/bridge/services/mem.c | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/dsp/bridge/services/mem.c
b/drivers/dsp/bridge/services/mem.c
index 0a10304..47ec09b 100644
--- a/drivers/dsp/bridge/services/mem.c
+++ b/drivers/dsp/bridge/services/mem.c
@@ -281,11 +281,11 @@ void *MEM_Alloc(u32 cBytes, enum MEM_POOLATTRS type)
/* If non-paged memory required, see note at top of file. */
case MEM_PAGED:
#ifndef MEM_CHECK
- pMem = kmalloc(cBytes,
- (in_atomic()) ? GFP_ATOMIC :
GFP_KERNEL);
+ pMem = kmalloc(cBytes,
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL);
#else
pMem = kmalloc(cBytes + sizeof(struct memInfo),
- (in_atomic()) ? GFP_ATOMIC :
GFP_KERNEL);
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL);
if (pMem) {
pMem-size = cBytes;
pMem-caller = __builtin_return_address(0);
@@ -304,12 +304,12 @@ void *MEM_Alloc(u32 cBytes, enum MEM_POOLATTRS type)
case MEM_LARGEVIRTMEM:
#ifndef MEM_CHECK
/* FIXME - Replace with 'vmalloc' after BP fix */
- pMem = __vmalloc(cBytes,
- (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
+ pMem = __vmalloc(cBytes,
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
#else
/* FIXME - Replace with 'vmalloc' after BP fix */
pMem = __vmalloc((cBytes + sizeof(struct memInfo)),
- (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
if (pMem) {
pMem-size = cBytes;
pMem-caller = __builtin_return_address(0);
@@ -359,7 +359,7 @@ void *MEM_AllocPhysMem(u32 cBytes, u32 ulAlign, OUT u32
*pPhysicalAddress)
(u32 *)paMem);
} else
pVaMem = dma_alloc_coherent(NULL, cBytes, paMem,
- (in_atomic()) ? GFP_ATOMIC :
GFP_KERNEL);
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL);
if (pVaMem == NULL) {
*pPhysicalAddress = 0;
GT_1trace(MEM_debugMask, GT_6CLASS,
@@ -391,14 +391,14 @@ void *MEM_Calloc(u32 cBytes, enum MEM_POOLATTRS type)
/* If non-paged memory required, see note at top of file. */
case MEM_PAGED:
#ifndef MEM_CHECK
- pMem = kmalloc(cBytes,
- (in_atomic()) ? GFP_ATOMIC :
GFP_KERNEL);
+ pMem = kmalloc(cBytes,
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL);
if (pMem)
memset(pMem, 0, cBytes);
#else
pMem = kmalloc(cBytes + sizeof(struct memInfo),
- (in_atomic()) ? GFP_ATOMIC :
GFP_KERNEL);
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL);
if (pMem) {
memset((void *)((u32)pMem +
sizeof(struct memInfo)), 0, cBytes);
@@ -417,15 +417,15 @@ void *MEM_Calloc(u32 cBytes, enum MEM_POOLATTRS type)
case MEM_LARGEVIRTMEM:
#ifndef MEM_CHECK
/* FIXME - Replace with 'vmalloc' after BP fix */
- pMem = __vmalloc(cBytes,
- (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
+ pMem = __vmalloc(cBytes,
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
if (pMem)
memset(pMem, 0, cBytes);
#else
/* FIXME - Replace with 'vmalloc' after BP fix */
pMem = __vmalloc(cBytes + sizeof(struct memInfo),
- (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
+ (in_atomic()) ? GFP_ATOMIC : GFP_KERNEL,
PAGE_KERNEL);
if (pMem) {
memset((void *)((u32)pMem +
sizeof(struct memInfo)), 0, cBytes);
--
1.6.2.4
--
To
[PATCH 12/14] DSPBRIDGE: Remove all resources on driver exit
From: Omar Ramirez Luna omar.rami...@ti.com
There is no need to walk the process context list
on exit, remove all process instead without exception.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/rmgr/drv_interface.c | 32 +-
1 files changed, 6 insertions(+), 26 deletions(-)
mode change 100755 = 100644 drivers/dsp/bridge/rmgr/drv_interface.c
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
old mode 100755
new mode 100644
index e937766..d17d3cf
--- a/drivers/dsp/bridge/rmgr/drv_interface.c
+++ b/drivers/dsp/bridge/rmgr/drv_interface.c
@@ -451,44 +451,24 @@ static int __devexit omap34xx_bridge_remove(struct
platform_device *pdev)
HANDLE hDrvObject = NULL;
struct PROCESS_CONTEXT *pTmp = NULL;
struct PROCESS_CONTEXT*pCtxtclosed = NULL;
- struct PROCESS_CONTEXT*pCtxttraverse = NULL;
GT_0trace(driverTrace, GT_ENTER, - driver_exit\n);
dsp_status = CFG_GetObject((u32 *)hDrvObject, REG_DRV_OBJECT);
+ if (DSP_FAILED(dsp_status))
+ goto func_cont;
DRV_GetProcCtxtList(pCtxtclosed, (struct DRV_OBJECT *)hDrvObject);
while (pCtxtclosed != NULL) {
+ GT_1trace(driverTrace, GT_5CLASS, ***Cleanup of
+process***%d\n, pCtxtclosed-pid);
DRV_RemoveAllResources(pCtxtclosed);
- if (pCtxtclosed-hProcessor != NULL) {
- DRV_GetProcCtxtList(pCtxttraverse,
- (struct DRV_OBJECT *)hDrvObject);
- if (pCtxttraverse-next == NULL) {
- PROC_Detach(pCtxtclosed-hProcessor);
- goto func_cont;
- }
- if ((pCtxtclosed-pid == pCtxttraverse-pid)
- (pCtxttraverse-next != NULL)) {
- pCtxttraverse = pCtxttraverse-next;
- }
- while ((pCtxttraverse != NULL)
- (pCtxtclosed-hProcessor
- != pCtxttraverse-hProcessor)) {
- pCtxttraverse = pCtxttraverse-next;
- if ((pCtxttraverse != NULL)
- (pCtxtclosed-pid == pCtxttraverse-pid)) {
- pCtxttraverse = pCtxttraverse-next;
- }
- }
- if (pCtxttraverse == NULL)
- PROC_Detach(pCtxtclosed-hProcessor);
- }
-func_cont:
+ PROC_Detach(pCtxtclosed-hProcessor);
pTmp = pCtxtclosed-next;
DRV_RemoveProcContext((struct DRV_OBJECT *)hDrvObject,
pCtxtclosed, (void *)pCtxtclosed-pid);
pCtxtclosed = pTmp;
}
-
+func_cont:
/* unregister the clock notifier */
#ifdef CONFIG_BRIDGE_DVFS
if (!clk_notifier_unregister(clk_handle, iva_clk_notifier)) {
--
1.6.2.4
--
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[PATCH 11/14] DSPBRIDGE: New PWRERROR event notification
From: Omar Ramirez Luna omar.rami...@ti.com
This patch defines a new DSP_PWRERROR event which can be
registered for notification. It uses the same mechanism
as MMUFAULT or SYSERROR. And will notify to ayn client registered
if there was any error when entering forced sleep state.
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/dbdefs.h |7 +--
drivers/dsp/bridge/rmgr/proc.c| 11 ++-
drivers/dsp/bridge/wmd/tiomap3430_pwr.c |6 ++
drivers/dsp/bridge/wmd/ue_deh.c | 10 ++
4 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
index 9782693..78be880 100644
--- a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
@@ -101,6 +101,7 @@
#define DSP_MMUFAULT0x0010
#define DSP_SYSERROR0x0020
#define DSP_EXCEPTIONABORT 0x0300
+#define DSP_PWRERROR0x0080
/* IVA exception events (IVA MMU fault) */
#define IVA_MMUFAULT0x0040
@@ -174,7 +175,8 @@
DSP_STREAMDONE | \
DSP_STREAMIOCOMPLETION | \
DSP_MMUFAULT | \
- DSP_SYSERROR)) \
+ DSP_SYSERROR | \
+ DSP_PWRERROR)) \
!((x) ~(DSP_PROCESSORSTATECHANGE | \
DSP_PROCESSORATTACH | \
DSP_PROCESSORDETACH | \
@@ -183,7 +185,8 @@
DSP_STREAMDONE | \
DSP_STREAMIOCOMPLETION | \
DSP_MMUFAULT | \
- DSP_SYSERROR
+ DSP_SYSERROR | \
+ DSP_PWRERROR
#define IsValidNodeEvent(x)(((x) == 0) || (((x) (DSP_NODESTATECHANGE | \
DSP_NODEMESSAGEREADY)) \
diff --git a/drivers/dsp/bridge/rmgr/proc.c b/drivers/dsp/bridge/rmgr/proc.c
index bb8cff3..8a5dfa7 100644
--- a/drivers/dsp/bridge/rmgr/proc.c
+++ b/drivers/dsp/bridge/rmgr/proc.c
@@ -1499,7 +1499,7 @@ DSP_STATUS PROC_RegisterNotify(DSP_HPROCESSOR hProcessor,
u32 uEventMask,
/* Check if event mask is a valid processor related event */
if (uEventMask ~(DSP_PROCESSORSTATECHANGE | DSP_PROCESSORATTACH |
DSP_PROCESSORDETACH | DSP_PROCESSORRESTART | DSP_MMUFAULT |
- DSP_SYSERROR))
+ DSP_SYSERROR | DSP_PWRERROR))
status = DSP_EVALUE;
/* Check if notify type is valid */
@@ -1507,12 +1507,13 @@ DSP_STATUS PROC_RegisterNotify(DSP_HPROCESSOR
hProcessor, u32 uEventMask,
status = DSP_EVALUE;
if (DSP_SUCCEEDED(status)) {
- /* * If event mask is not DSP_SYSERROR or DSP_MMUFAULT,
-* then register event immediately. */
- if (uEventMask ~(DSP_SYSERROR | DSP_MMUFAULT)) {
+ /* If event mask is not DSP_SYSERROR, DSP_MMUFAULT,
+* or DSP_PWRERROR then register event immediately. */
+ if (uEventMask
+ ~(DSP_SYSERROR | DSP_MMUFAULT | DSP_PWRERROR)) {
status = NTFY_Register(pProcObject-hNtfy,
hNotification, uEventMask, uNotifyType);
- /* * Special case alert, special case alert!
+ /* Special case alert, special case alert!
* If we're trying to *deregister* (i.e. uEventMask
* is 0), a DSP_SYSERROR or DSP_MMUFAULT notification,
* we have to deregister with the DEH manager.
diff --git a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
index d9ee480..a651963 100644
--- a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
+++ b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
@@ -57,6 +57,9 @@
#include dspbridge/pwr_sh.h
+/* --- Mini Driver */
+#include dspbridge/wmddeh.h
+
/* --- specific to this file */
#include _tiomap.h
#include _tiomap_pwr.h
@@ -188,6 +191,7 @@ DSP_STATUS SleepDSP(struct WMD_DEV_CONTEXT *pDevContext, IN
u32 dwCmd,
DSP_STATUS status = DSP_SOK;
#ifdef CONFIG_PM
struct CFG_HOSTRES resources;
+ struct DEH_MGR *hDehMgr;
u16 usCount = TIHELEN_ACKTIMEOUT;
enum HW_PwrState_t pwrState;
enum HW_PwrState_t targetPwrState;
@@ -257,6 +261,8 @@ DSP_STATUS SleepDSP(struct WMD_DEV_CONTEXT *pDevContext, IN
u32 dwCmd,
if (usCount == 0) {
DBG_Trace(DBG_LEVEL7,
[PATCH 13/14] DSPBRIDGE: Stop and reset DSP before removing constraints
From: Omar Ramirez Luna omar.rami...@ti.com
This patch implements the DSP Reset procedure to be made
on bridge exit before unregistering the constraints set by dsp.
Signed-off-by: Hari Kanigeri h-kanige...@ti.com
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/rmgr/drv_interface.c | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
index d17d3cf..d14e663 100644
--- a/drivers/dsp/bridge/rmgr/drv_interface.c
+++ b/drivers/dsp/bridge/rmgr/drv_interface.c
@@ -469,6 +469,14 @@ static int __devexit omap34xx_bridge_remove(struct
platform_device *pdev)
pCtxtclosed = pTmp;
}
func_cont:
+ if (driverContext) {
+ /* Put the DSP in reset state */
+ ret = DSP_Deinit(driverContext);
+ driverContext = 0;
+ DBC_Assert(ret == true);
+ }
+ SERVICES_Exit();
+ GT_exit();
/* unregister the clock notifier */
#ifdef CONFIG_BRIDGE_DVFS
if (!clk_notifier_unregister(clk_handle, iva_clk_notifier)) {
@@ -483,15 +491,6 @@ func_cont:
clk_handle = NULL;
#endif /* #ifdef CONFIG_BRIDGE_DVFS */
- if (driverContext) {
- ret = DSP_Deinit(driverContext);
- driverContext = 0;
-
- DBC_Assert(ret == true);
- }
- SERVICES_Exit();
- GT_exit();
-
devno = MKDEV(driver_major, driver_minor);
if (bridge_device) {
cdev_del(bridge_device-cdev);
--
1.6.2.4
--
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[PATCH 09/14] DSPBRIDGE: Fixing indentation
From: Omar Ramirez Luna omar.rami...@ti.com
Trivial patch to change spaces for tabs, and a proper indentation
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/wmd/tiomap3430.c | 280 +++---
drivers/dsp/bridge/wmd/tiomap3430_pwr.c | 402 +++---
2 files changed, 337 insertions(+), 345 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/tiomap3430.c
b/drivers/dsp/bridge/wmd/tiomap3430.c
index 2c372fc..afeeb2c 100644
--- a/drivers/dsp/bridge/wmd/tiomap3430.c
+++ b/drivers/dsp/bridge/wmd/tiomap3430.c
@@ -188,7 +188,6 @@ struct PgTableAttrs {
*/
extern s32 dsp_debug;
-
/*
* This mini driver's function interface table.
*/
@@ -246,7 +245,7 @@ static struct WMD_DRV_INTERFACE drvInterfaceFxns = {
static inline void tlb_flush_all(const void __iomem *base)
{
-__raw_writeb(__raw_readb(base + MMU_GFLUSH) | 1, base + MMU_GFLUSH);
+ __raw_writeb(__raw_readb(base + MMU_GFLUSH) | 1, base + MMU_GFLUSH);
}
static inline void flush_all(struct WMD_DEV_CONTEXT *pDevContext)
@@ -254,7 +253,8 @@ static inline void flush_all(struct WMD_DEV_CONTEXT
*pDevContext)
struct CFG_HOSTRES resources;
u32 temp = 0;
- CFG_GetHostResources((struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
resources);
+ CFG_GetHostResources((struct CFG_DEVNODE *)DRV_GetFirstDevExtension(),
+ resources);
HW_PWRST_IVA2RegGet(resources.dwPrmBase, temp);
if ((temp HW_PWR_STATE_ON) == HW_PWR_STATE_OFF ||
@@ -291,9 +291,9 @@ void WMD_DRV_Entry(OUT struct WMD_DRV_INTERFACE
**ppDrvInterface,
DBC_Require(pstrWMDFileName != NULL);
DBG_Trace(DBG_ENTER, In the WMD_DRV_Entry \n);
- IO_SM_init(); /* Initialization of io_sm module */
+ IO_SM_init(); /* Initialization of io_sm module */
- if (strcmp(pstrWMDFileName, UMA) == 0)
+ if (strcmp(pstrWMDFileName, UMA) == 0)
*ppDrvInterface = drvInterfaceFxns;
else
DBG_Trace(DBG_LEVEL7, WMD_DRV_Entry Unknown WMD file name);
@@ -325,20 +325,19 @@ static DSP_STATUS WMD_BRD_Monitor(struct WMD_DEV_CONTEXT
*hDevContext)
GetHWRegs(resources.dwPrmBase, resources.dwCmBase);
HW_PWRST_IVA2RegGet(resources.dwPrmBase, temp);
-if ((temp 0x03) != 0x03 || (temp 0x03) != 0x02) {
+ if ((temp 0x03) != 0x03 || (temp 0x03) != 0x02) {
/* IVA2 is not in ON state */
/* Read and set PM_PWSTCTRL_IVA2 to ON */
HW_PWR_IVA2PowerStateSet(resources.dwPrmBase,
HW_PWR_DOMAIN_DSP,
HW_PWR_STATE_ON);
/* Set the SW supervised state transition */
- HW_PWR_CLKCTRL_IVA2RegSet(resources.dwCmBase,
- HW_SW_SUP_WAKEUP);
+ HW_PWR_CLKCTRL_IVA2RegSet(resources.dwCmBase, HW_SW_SUP_WAKEUP);
/* Wait until the state has moved to ON */
HW_PWR_IVA2StateGet(resources.dwPrmBase, HW_PWR_DOMAIN_DSP,
pwrState);
/* Disable Automatic transition */
- HW_PWR_CLKCTRL_IVA2RegSet(resources.dwCmBase, HW_AUTOTRANS_DIS);
+ HW_PWR_CLKCTRL_IVA2RegSet(resources.dwCmBase, HW_AUTOTRANS_DIS);
}
DBG_Trace(DBG_LEVEL6, WMD_BRD_Monitor - Middle ** \n);
GetHWRegs(resources.dwPrmBase, resources.dwCmBase);
@@ -347,7 +346,6 @@ static DSP_STATUS WMD_BRD_Monitor(struct WMD_DEV_CONTEXT
*hDevContext)
if (DSP_SUCCEEDED(status)) {
/* set the device state to IDLE */
pDevContext-dwBrdState = BRD_IDLE;
-
}
error_return:
DBG_Trace(DBG_LEVEL6, WMD_BRD_Monitor - End ** \n);
@@ -449,7 +447,7 @@ static DSP_STATUS WMD_BRD_Start(struct WMD_DEV_CONTEXT
*hDevContext,
DBG_Trace(DBG_ENTER, Entering WMD_BRD_Start:\n hDevContext: 0x%x\n\t
dwDSPAddr: 0x%x\n, hDevContext, dwDSPAddr);
-/* The device context contains all the mmu setup info from when the
+ /* The device context contains all the mmu setup info from when the
* last dsp base image was loaded. The first entry is always
* SHMMEM base. */
/* Get SHM_BEG - convert to byte address */
@@ -518,23 +516,23 @@ static DSP_STATUS WMD_BRD_Start(struct WMD_DEV_CONTEXT
*hDevContext,
for (iEntryNdx = 0; iEntryNdx WMDIOCTL_NUMOFMMUTLB;
iEntryNdx++) {
if ((pDevContext-aTLBEntry[iEntryNdx].ulGppPa != 0)
- (pDevContext-aTLBEntry[iEntryNdx].ulDspVa !=
0)) {
+ (pDevContext-aTLBEntry[iEntryNdx].ulDspVa != 0)) {
DBG_Trace(DBG_LEVEL4, ** (proc) MMU %d GppPa:
-0x%x DspVa 0x%x Size 0x%x\n,
-
Re: Tracking N770 breakage
Quoting Tony Lindgren t...@atomide.com: * Andrew de Quincey adq_...@lidskialf.net [090516 19:17]: Argh, my N770 seems to have just died; it has been behaving slightly oddly and now it simply won't turn on (black screen and no sign of life whatsoever). It is well out of warranty and frankly I don't see myself buying another one, so this effectively ends my hacking on it :( Bummer :( After a quick try, CONFIG_OMAP_RESET_CLOCKS was the first stopper, then it could not mount the MMC root. Ahh excellent, that was why I posted my progress, in case it rang a bell with anyone! I think the touchpad driver may be broken as well BTW. I think there was a patch posted for the omap1 MMC by Ladislav few months ago that probably fixes it. Cool - I hope I may be back in the running soon (I was rather annoyed when I posted that message!); I've ordered a new battery in case its just that. A kind person has also offered me one thats broken in a different way that I can probably cobble together with the remains of mine if its something more critical that has died. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [ANNOUNCE] Temporary L-B tree for bridge 2.6.29
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- In the mean time you can clone from: git://gitorious.org/ti-dspbridge/linux-bridge.git How does this stand with [1] - are we saying that the above will be new tidspbridge tree? Who is the maintainer? Regards, Nishanth Menon Ref: [1] http://gitorious.org/tidspbridge/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] McSPI Slave and DMA,FIFO support
This patch adds support for McSPI slave and FIFO. DMA and FIFO
could be enabled together for better throughput. Platform config
parameters have been added to enable these features on any particular
McSPI controller.
FIFO can be enabled by defining fifo_depth parameter. fifo_depth needs
to be a multiple of buffer size that is used for read/write.
These features are useful when you have high throughput devices
like WLAN or Modem connected over SPI.
Signed-off-by: Hemanth V heman...@ti.com
arch/arm/mach-omap2/devices.c |5
arch/arm/plat-omap/include/mach/mcspi.h | 16 +
drivers/spi/omap2_mcspi.c | 343
3 files changed, 325 insertions(+), 39 deletions(-)
---
Index: linux-omap-2.6/arch/arm/mach-omap2/devices.c
===
--- linux-omap-2.6.orig/arch/arm/mach-omap2/devices.c 2009-05-19
17:00:21.0 +0530
+++ linux-omap-2.6/arch/arm/mach-omap2/devices.c2009-05-20
11:02:41.0
+0530
@@ -259,6 +259,7 @@
static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
.num_cs = 4,
+ .force_cs_mode = 1,
};
static struct resource omap2_mcspi1_resources[] = {
@@ -281,6 +282,10 @@
static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
.num_cs = 2,
+ .mode = OMAP2_MCSPI_MASTER,
+ .dma_mode = 1,
+ .force_cs_mode = 0,
+ .fifo_depth = 0,
};
static struct resource omap2_mcspi2_resources[] = {
Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/mcspi.h
===
--- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/mcspi.h 2009-05-19
17:00:21.0 +0530
+++ linux-omap-2.6/arch/arm/plat-omap/include/mach/mcspi.h 2009-05-20
11:02:41.0 +0530
@@ -1,8 +1,24 @@
#ifndef _OMAP2_MCSPI_H
#define _OMAP2_MCSPI_H
+#define OMAP2_MCSPI_MASTER 0
+#define OMAP2_MCSPI_SLAVE 1
+
struct omap2_mcspi_platform_config {
unsigned short num_cs;
+
+ /* SPI is master or slave */
+ unsigned short mode;
+
+ /* Use only DMA for data transfers */
+ unsigned short dma_mode;
+
+ /* Force chip select mode */
+ unsigned short force_cs_mode;
+
+ /* FIFO depth in bytes, max value 64 */
+ unsigned short fifo_depth;
+
};
struct omap2_mcspi_device_config {
Index: linux-omap-2.6/drivers/spi/omap2_mcspi.c
===
--- linux-omap-2.6.orig/drivers/spi/omap2_mcspi.c 2009-05-19
17:00:21.0
+0530
+++ linux-omap-2.6/drivers/spi/omap2_mcspi.c2009-05-20 11:02:41.0
+0530
@@ -37,9 +37,11 @@
#include mach/dma.h
#include mach/clock.h
+#include mach/mcspi.h
#define OMAP2_MCSPI_MAX_FREQ 4800
+#define OMAP2_MCSPI_MAX_FIFODEPTH 64
#define OMAP2_MCSPI_REVISION 0x00
#define OMAP2_MCSPI_SYSCONFIG 0x10
@@ -49,6 +51,7 @@
#define OMAP2_MCSPI_WAKEUPENABLE 0x20
#define OMAP2_MCSPI_SYST 0x24
#define OMAP2_MCSPI_MODULCTRL 0x28
+#define OMAP2_MCSPI_XFERLEVEL 0x7c
/* per-channel banks, 0x14 bytes each, first is: */
#define OMAP2_MCSPI_CHCONF00x2c
@@ -85,6 +88,9 @@
#define OMAP2_MCSPI_CHCONF_IS BIT(18)
#define OMAP2_MCSPI_CHCONF_TURBO BIT(19)
#define OMAP2_MCSPI_CHCONF_FORCE BIT(20)
+#define OMAP2_MCSPI_CHCONF_FFERBIT(28)
+#define OMAP2_MCSPI_CHCONF_FFETBIT(27)
+
#define OMAP2_MCSPI_CHSTAT_RXS BIT(0)
#define OMAP2_MCSPI_CHSTAT_TXS BIT(1)
@@ -93,6 +99,7 @@
#define OMAP2_MCSPI_CHCTRL_EN BIT(0)
#define OMAP2_MCSPI_WAKEUPENABLE_WKEN BIT(0)
+#define OMAP2_MCSPI_IRQ_EOWBIT(17)
/* We have 2 DMA channels per CS, one for RX and one for TX */
struct omap2_mcspi_dma {
@@ -125,6 +132,10 @@
unsigned long phys;
/* SPI1 has 4 channels, while SPI2 has 2 */
struct omap2_mcspi_dma *dma_channels;
+ unsigned short mcspi_mode;
+ unsigned short dma_mode;
+ unsigned short force_cs_mode;
+ unsigned short fifo_depth;
};
struct omap2_mcspi_cs {
@@ -133,6 +144,37 @@
int word_len;
};
+#ifdef CONFIG_SPI_DEBUG
+struct reg_type {
+ char name[40];
+ int offset;
+};
+
+static struct reg_type reg_map[] = {
+ {MCSPI_REV, 0x0},
+ {MCSPI_SYSCONFIG, 0x10},
+ {MCSPI_SYSSTATUS, 0x14},
+ {MCSPI_IRQSTATUS, 0x18},
+ {MCSPI_IRQENABLE, 0x1C},
+ {MCSPI_WAKEUPENABLE, 0x20},
+ {MCSPI_SYST, 0x24},
+ {MCSPI_MODULCTRL, 0x28},
+ {MCSPI_XFERLEVEL, 0x7c},
+ {CH0, 0x2C},
+ {CH1, 0x40},
+ {CH2, 0x54},
+ {CH3, 0x68}
+};
+
+static struct reg_type ch_reg_type[] = {
+ {CONF, 0x00},
+ {STAT, 0x04},
+ {CTRL, 0x08},
+ {TX, 0x0C},
[PATCH 2/2] McSPI Slave and DMA,FIFO support
This patch adds MUX changes for SPI2 and also adds an
option for test driver
Signed-off-by: Hemanth V heman...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c | 26 ++
arch/arm/mach-omap2/mux.c | 11 +++
arch/arm/plat-omap/include/mach/mux.h |7 +++
3 files changed, 44 insertions(+)
Index: linux-omap-2.6/arch/arm/mach-omap2/board-3430sdp.c
===
--- linux-omap-2.6.orig/arch/arm/mach-omap2/board-3430sdp.c 2009-05-20
11:02:34.0 +0530
+++ linux-omap-2.6/arch/arm/mach-omap2/board-3430sdp.c 2009-05-20
11:05:22.0 +0530
@@ -228,6 +228,13 @@
.single_channel = 1,/* 0: slave, 1: master */
};
+#ifdef CONFIG_SPI_DEBUG
+static struct omap2_mcspi_device_config dummy_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1, /* 0: slave, 1: master */
+};
+#endif
+
static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
[0] = {
/*
@@ -242,6 +249,18 @@
.irq= 0,
.platform_data = tsc2046_config,
},
+#ifdef CONFIG_SPI_DEBUG
+ [1] = {
+ /* SPI test driver attached to SPI2 controller by
+* default
+*/
+ .modalias = spitst,
+ .bus_num= 2,
+ .chip_select= 0,
+ .max_speed_hz = 150,
+ .controller_data= dummy_mcspi_config,
+ },
+#endif
};
static struct platform_device sdp3430_lcd_device = {
@@ -666,6 +685,13 @@
static void __init omap_3430sdp_init(void)
{
+
+ /* SPI2 Pin MUX */
+ omap_cfg_reg(AA3_3430_McSPI2_CLK);
+ omap_cfg_reg(Y2_3430_McSPI2_SIMO);
+ omap_cfg_reg(Y3_3430_McSPI2_SOMI);
+ omap_cfg_reg(Y4_3430_McSPI2_CS0);
+
omap3430_i2c_init();
platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
omap_board_config = sdp3430_config;
Index: linux-omap-2.6/arch/arm/mach-omap2/mux.c
===
--- linux-omap-2.6.orig/arch/arm/mach-omap2/mux.c 2009-05-20
11:02:34.0
+0530
+++ linux-omap-2.6/arch/arm/mach-omap2/mux.c2009-05-20 11:05:22.0
+0530
@@ -486,6 +486,17 @@
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX(J25_34XX_GPIO170, 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+
+/* McSPI */
+MUX_CFG_34XX(AA3_3430_McSPI2_CLK, 0x1d6,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX(Y2_3430_McSPI2_SIMO, 0x1d8,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX(Y3_3430_McSPI2_SOMI, 0x1da,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX(Y4_3430_McSPI2_CS0, 0x1dc,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLDOWN)
+
};
#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
Index: linux-omap-2.6/arch/arm/plat-omap/include/mach/mux.h
===
--- linux-omap-2.6.orig/arch/arm/plat-omap/include/mach/mux.h 2009-05-20
11:02:34.0 +0530
+++ linux-omap-2.6/arch/arm/plat-omap/include/mach/mux.h2009-05-20
11:05:22.0 +0530
@@ -853,6 +853,13 @@
AE5_34XX_GPIO143,
H19_34XX_GPIO164_OUT,
J25_34XX_GPIO170,
+
+ /* McSPI */
+ AA3_3430_McSPI2_CLK,
+ Y2_3430_McSPI2_SIMO,
+ Y3_3430_McSPI2_SOMI,
+ Y4_3430_McSPI2_CS0,
+
};
struct omap_mux_cfg {
--
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