Re: Missing OMAP nand drivers from 2.6.30?
* Peter Barada pet...@logicpd.com [090619 20:03]: Looking at the current linux-omap tree from yesterday, I'm wondering where the NAND chip driver for the OMAP34x/35x is. It used to be in drivers/mtd/nand/omap2.c, but there's no trace of it now (that I can find). Any ideas where it went? Please see $ git log | grep REMOVE OMAP LEGACY CODE. Basically those drivers should be cleaned up and sent to the MTD list for integration to the mainline tree. If you are you using them, please go for it if you have a chance! Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] OMAP2/3 clock: fix module IDLEST code for unusual devs
Hello, After Linux enables an OMAP device's clocks, it must wait for the device to leave the 'idle' state, or register accesses may result in an interconnect error and subsequent system crash. Code to do this is currently in the OMAP clock code, but is overgeneralized, and will not work correctly for several exception cases - one on 2430, and four on OMAP3. This series fixes these bugs by modularizing omap2_clk_wait_ready(), allowing custom CM_IDLEST register and bit shift data to be supplied on a per-clock basis, if necessary. (This was originally fixed in the linux-omap kernel during 2.6.29 in a slightly different manner.) In the medium term, the module wait code will be moved to omap_hwmod or a similar OMAP device layer. Tested on BeagleBoard rev C2 (OMAP3530 ES3); compile-tested with the N800 defconfig. - Paul --- textdata bss dec hex filename 3346788 187872 103104 3637764 378204 vmlinux.beagle.orig 3347316 188608 103104 3639028 3786f4 vmlinux.beagle Paul Walmsley (3): OMAP3 clock: correct module IDLEST bits: SSI; DSS; USBHOST; HSOTGUSB OMAP2 clock: 2430 I2CHS uses non-standard CM_IDLEST register OMAP2/3 clock: split, rename omap2_wait_clock_ready() arch/arm/mach-omap2/clock.c | 126 +++-- arch/arm/mach-omap2/clock.h |6 + arch/arm/mach-omap2/clock24xx.c | 37 - arch/arm/mach-omap2/clock24xx.h |4 - arch/arm/mach-omap2/clock34xx.c | 133 +-- arch/arm/mach-omap2/clock34xx.h | 85 +--- arch/arm/mach-omap2/prcm.c | 43 ++ arch/arm/plat-omap/include/mach/clock.h |2 arch/arm/plat-omap/include/mach/prcm.h |1 9 files changed, 338 insertions(+), 99 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] OMAP2 clock: 2430 I2CHS uses non-standard CM_IDLEST register
OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the CM_*CLKEN bits
are in CM_{I,F}CLKEN2_CORE [1]. Fix by implementing a custom clkops
.find_idlest function to return the correct slave IDLEST register.
...
1. OMAP2430 Multimedia Device Package-on-Package (POP) Silicon Revision 2.1
(Rev. V) Technical Reference Manual, tables 4-99 and 4-105.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock24xx.c | 37 +++--
arch/arm/mach-omap2/clock24xx.h |4 ++--
2 files changed, 37 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 44de027..bc5d3ac 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -30,6 +30,7 @@
#include mach/clock.h
#include mach/sram.h
+#include mach/prcm.h
#include asm/div64.h
#include asm/clkdev.h
@@ -43,6 +44,18 @@
static const struct clkops clkops_oscck;
static const struct clkops clkops_fixed;
+static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit);
+
+/* 2430 I2CHS has non-standard IDLEST register */
+static const struct clkops clkops_omap2430_i2chs_wait = {
+ .enable = omap2_dflt_clk_enable,
+ .disable= omap2_dflt_clk_disable,
+ .find_idlest= omap2430_clk_i2chs_find_idlest,
+ .find_companion = omap2_clk_dflt_find_companion,
+};
+
#include clock24xx.h
struct omap_clk {
@@ -240,6 +253,26 @@ static void __iomem *prcm_clksrc_ctrl;
*-*/
/**
+ * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
+ * @clk: struct clk * being enabled
+ * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
+ * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
+ *
+ * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
+ * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE. This custom function
+ * passes back the correct CM_IDLEST register address for I2CHS
+ * modules. No return value.
+ */
+static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit)
+{
+ *idlest_reg = OMAP_CM_REGADDR(CORE_MOD, CM_IDLEST);
+ *idlest_bit = clk-enable_bit;
+}
+
+
+/**
* omap2xxx_clk_get_core_rate - return the CORE_CLK rate
* @clk: pointer to the combined dpll_ck + core_ck (currently dpll_ck)
*
@@ -325,8 +358,8 @@ static int omap2_clk_fixed_enable(struct clk *clk)
else if (clk == apll54_ck)
cval = OMAP24XX_ST_54M_APLL;
- omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
- clk-name);
+ omap2_cm_wait_idlest(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
+clk-name);
/*
* REVISIT: Should we return an error code if omap2_wait_clock_ready()
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 458f00c..d19cf7a 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -2337,7 +2337,7 @@ static struct clk i2c2_fck = {
static struct clk i2chs2_fck = {
.name = i2c_fck,
- .ops= clkops_omap2_dflt_wait,
+ .ops= clkops_omap2430_i2chs_wait,
.id = 2,
.parent = func_96m_ck,
.clkdm_name = core_l4_clkdm,
@@ -2370,7 +2370,7 @@ static struct clk i2c1_fck = {
static struct clk i2chs1_fck = {
.name = i2c_fck,
- .ops= clkops_omap2_dflt_wait,
+ .ops= clkops_omap2430_i2chs_wait,
.id = 1,
.parent = func_96m_ck,
.clkdm_name = core_l4_clkdm,
--
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[PATCH 1/3] OMAP2/3 clock: split, rename omap2_wait_clock_ready()
Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:
1. A clkops-specific companion clock return function (by default,
omap2_clk_dflt_find_companion())
2. A clkops-specific CM_IDLEST register address and bit shift return
function (by default, omap2_clk_dflt_find_idlest())
3. Code to wait for the CM to indicate that the module is ready
(omap2_cm_wait_idlest())
Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.c | 126 ---
arch/arm/mach-omap2/clock.h |6 +
arch/arm/mach-omap2/prcm.c | 43 +++
arch/arm/plat-omap/include/mach/clock.h |2
arch/arm/plat-omap/include/mach/prcm.h |1
5 files changed, 101 insertions(+), 77 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index b0665f1..9d83daa 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -27,6 +27,7 @@
#include mach/clock.h
#include mach/clockdomain.h
#include mach/cpu.h
+#include mach/prcm.h
#include asm/div64.h
#include mach/sdrc.h
@@ -38,8 +39,6 @@
#include cm-regbits-24xx.h
#include cm-regbits-34xx.h
-#define MAX_CLOCK_ENABLE_WAIT 10
-
/* DPLL rate rounding: minimum DPLL multiplier, divider values */
#define DPLL_MIN_MULTIPLIER1
#define DPLL_MIN_DIVIDER 1
@@ -273,84 +272,68 @@ unsigned long omap2_fixed_divisor_recalc(struct clk *clk)
return clk-parent-rate / clk-fixed_div;
}
-/**
- * omap2_wait_clock_ready - wait for clock to enable
- * @reg: physical address of clock IDLEST register
- * @mask: value to mask against to determine if the clock is active
- * @name: name of the clock (for printk)
+/*
+ * XXX document
+ *
+ * Note: We don't need special code here for INVERT_ENABLE for the
+ * time being since INVERT_ENABLE only applies to clocks enabled by
+ * CM_CLKEN_PLL
*
- * Returns 1 if the clock enabled in time, or 0 if it failed to enable
- * in roughly MAX_CLOCK_ENABLE_WAIT microseconds.
+ * Convert CM_ICLKEN* - CM_FCLKEN*. This conversion assumes it's
+ * just a matter of XORing the bits.
*/
-int omap2_wait_clock_ready(void __iomem *reg, u32 mask, const char *name)
+void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
+ u8 *other_bit)
{
- int i = 0;
- int ena = 0;
+ u32 r;
/*
-* 24xx uses 0 to indicate not ready, and 1 to indicate ready.
-* 34xx reverses this, just to keep us on our toes
+* Convert CM_ICLKEN* - CM_FCLKEN*. This conversion assumes
+* it's just a matter of XORing the bits.
*/
- if (cpu_mask (RATE_IN_242X | RATE_IN_243X))
- ena = mask;
- else if (cpu_mask RATE_IN_343X)
- ena = 0;
-
- /* Wait for lock */
- while (((__raw_readl(reg) mask) != ena)
- (i++ MAX_CLOCK_ENABLE_WAIT)) {
- udelay(1);
- }
-
- if (i = MAX_CLOCK_ENABLE_WAIT)
- pr_debug(Clock %s stable after %d loops\n, name, i);
- else
- printk(KERN_ERR Clock %s didn't enable in %d tries\n,
- name, MAX_CLOCK_ENABLE_WAIT);
+ r = ((u32)clk-enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
+ *other_reg = (void __iomem *)r;
+ *other_bit = clk-enable_bit;
+}
- return (i MAX_CLOCK_ENABLE_WAIT) ? 1 : 0;
-};
-
+/* XXX document */
+/* CM_IDLEST* */
+void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
+ u8 *idlest_bit)
+{
+ *idlest_reg = (void __iomem *)(((u32)clk-enable_reg ~0xf0) | 0x20);
+ *idlest_bit = clk-enable_bit;
+}
/*
- * Note: We don't need special code here for INVERT_ENABLE
- * for the time being since INVERT_ENABLE only applies to clocks enabled by
- * CM_CLKEN_PLL
+ * XXX document
+ *
+ * XXX belongs elsewhere
*/
-static void omap2_clk_wait_ready(struct clk *clk)
+static void omap2_module_wait_ready(struct clk *clk)
{
- void __iomem *reg, *other_reg, *st_reg;
- u32 bit;
-
- /*
-* REVISIT: This code is pretty ugly. It would be nice to generalize
-* it and pull it into struct clk itself somehow.
-*/
- reg = clk-enable_reg;
+ void __iomem *companion_reg, *idlest_reg;
+ u8 other_bit, idlest_bit;
- /*
-* Convert CM_ICLKEN* - CM_FCLKEN*. This conversion assumes
-* it's just a matter of XORing the bits.
-*/
- other_reg = (void __iomem *)((u32)reg ^ (CM_FCLKEN ^ CM_ICLKEN));
+ /* Not all modules have multiple clocks that
[PATCH 3/3] OMAP3 clock: correct module IDLEST bits: SSI; DSS; USBHOST; HSOTGUSB
Fix two bugs in the OMAP3 clock tree pertaining to the SSI, DSS,
USBHOST, and HSOTGUSB devices. These devices are both interconnect
initiators and targets.
First, target CM_IDLEST register bits were only added on ES2+ chips.
ES1 chips should not wait for these clocks to enable. So, split the
appropriate clocks into ES1 and ES2+ variants, so that kernels running
on ES1 devices won't try to wait.
Second, the current heuristic in omap2_clk_dflt_find_idlest() will
fail for these clocks. It assumes that the CM_IDLEST bit to wait upon
is the same as the CM_*CLKEN bit, which is false[1]. Fix by
implementing custom clkops .find_idlest function pointers for the
appropriate clocks that return the correct slave IDLEST bit shift.
This was originally fixed in the linux-omap kernel during 2.6.29 in a
slightly different manner[2][3].
In the medium-term future, all of the module IDLEST code will
eventually be moved to the omap_hwmod code.
Problem reported by Jarkko Nikula jhnik...@gmail.com.
...
1. See for example 34xx TRM Revision P Table 4-213 and 4-217 (for the
DSS case).
2. http://www.spinics.net/lists/linux-omap/msg05512.html et seq.
3. http://lkml.indiana.edu/hypermail/linux/kernel/0901.3/01498.html
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Jarkko Nikula jhnik...@gmail.com
---
arch/arm/mach-omap2/clock34xx.c | 133 +--
arch/arm/mach-omap2/clock34xx.h | 85 ++---
2 files changed, 200 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..c5bc807 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -2,7 +2,7 @@
* OMAP3-specific clock framework functions
*
* Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Copyright (C) 2007-2008 Nokia Corporation
+ * Copyright (C) 2007-2009 Nokia Corporation
*
* Written by Paul Walmsley
* Testing and integration fixes by Jouni Högander
@@ -41,6 +41,47 @@
static const struct clkops clkops_noncore_dpll_ops;
+static void omap3430es2_clk_ssi_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit);
+static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit);
+static void omap3430es2_clk_dss_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit);
+static void omap3430es2_clk_usbhost_find_idlest(struct clk *clk,
+ void __iomem **idlest_reg,
+ u8 *idlest_bit);
+
+static const struct clkops clkops_omap3430es2_ssi_wait = {
+ .enable = omap2_dflt_clk_enable,
+ .disable= omap2_dflt_clk_disable,
+ .find_idlest= omap3430es2_clk_ssi_find_idlest,
+ .find_companion = omap2_clk_dflt_find_companion,
+};
+
+static const struct clkops clkops_omap3430es2_hsotgusb_wait = {
+ .enable = omap2_dflt_clk_enable,
+ .disable= omap2_dflt_clk_disable,
+ .find_idlest= omap3430es2_clk_hsotgusb_find_idlest,
+ .find_companion = omap2_clk_dflt_find_companion,
+};
+
+static const struct clkops clkops_omap3430es2_dss_wait = {
+ .enable = omap2_dflt_clk_enable,
+ .disable= omap2_dflt_clk_disable,
+ .find_idlest= omap3430es2_clk_dss_find_idlest,
+ .find_companion = omap2_clk_dflt_find_companion,
+};
+
+static const struct clkops clkops_omap3430es2_usbhost_wait = {
+ .enable = omap2_dflt_clk_enable,
+ .disable= omap2_dflt_clk_disable,
+ .find_idlest= omap3430es2_clk_usbhost_find_idlest,
+ .find_companion = omap2_clk_dflt_find_companion,
+};
+
#include clock34xx.h
struct omap_clk {
@@ -157,10 +198,13 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, fshostusb_fck, fshostusb_fck, CK_3430ES1),
CLK(NULL, core_12m_fck, core_12m_fck, CK_343X),
CLK(omap_hdq.0, fck,hdq_fck, CK_343X),
- CLK(NULL, ssi_ssr_fck, ssi_ssr_fck, CK_343X),
- CLK(NULL, ssi_sst_fck, ssi_sst_fck, CK_343X),
+ CLK(NULL, ssi_ssr_fck, ssi_ssr_fck_3430es1, CK_3430ES1),
+ CLK(NULL, ssi_ssr_fck, ssi_ssr_fck_3430es2, CK_3430ES2),
+ CLK(NULL, ssi_sst_fck, ssi_sst_fck_3430es1, CK_3430ES1),
+ CLK(NULL, ssi_sst_fck, ssi_sst_fck_3430es2, CK_3430ES2),
CLK(NULL, core_l3_ick, core_l3_ick, CK_343X),
- CLK(musb_hdrc,ick, hsotgusb_ick, CK_343X),
+ CLK(musb_hdrc,ick, hsotgusb_ick_3430es1, CK_3430ES1),
+ CLK(musb_hdrc,ick, hsotgusb_ick_3430es2, CK_3430ES2),
Re: [PATCH] Missing implementation of omap3evm_flash_init()
Hi,
* Sanjeev Premi pr...@ti.com [090618 16:29]:
The function omap3evm_flash_init() earlier implemented
in board-omap3evm-flash.c did not find its way into the
board-omap3evm.c during the latest migration.
This patch brings in the earlier implementation with
appropriate changes as necessary on current head.
Signed-off-by: Sanjeev Premi pr...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 176
+-
1 files changed, 175 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 1b7a797..5084b67 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -26,23 +26,197 @@
#include linux/spi/ads7846.h
#include linux/i2c/twl4030.h
+#include linux/mtd/mtd.h
+#include linux/mtd/partitions.h
+#include linux/mtd/nand.h
+
#include mach/hardware.h
#include asm/mach-types.h
#include asm/mach/arch.h
#include asm/mach/map.h
+#include asm/mach/flash.h
+#include mach/common.h
#include mach/board.h
#include mach/mux.h
+#include mach/gpmc.h
+#include mach/nand.h
+#include mach/onenand.h
#include mach/usb.h
-#include mach/common.h
#include mach/mcspi.h
#include mach/keypad.h
#include sdram-micron-mt46h32m32lf-6.h
#include mmc-twl4030.h
+#define GPMC_CS0_BASE 0x60
+#define GPMC_CS_SIZE0x30
+
#define OMAP3_EVM_TS_GPIO175
+/*
+ * MTD - NAND, OneNAND
+ */
+#define NAND_BLOCK_SIZE SZ_128K
+
+static struct mtd_partition omap3evm_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = xloader-nand,
+ .offset = 0,
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 14 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-nand,
+
+ .offset = MTDPART_OFS_APPEND,
+ .size = 2 * NAND_BLOCK_SIZE
+ },
+ {
+ .name = linux-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-nand,
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct omap_nand_platform_data omap3evm_nand_data = {
+ .parts = omap3evm_nand_partitions,
+ .nr_parts = ARRAY_SIZE(omap3evm_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .nand_setup = NULL,
+ .dev_ready = NULL,
+};
+
+static struct resource omap3evm_nand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device omap3evm_nand_device = {
+ .name = omap2-nand,
+ .id = 0,
+ .dev= {
+ .platform_data = omap3evm_nand_data,
+ },
+ .num_resources = 1,
+ .resource = omap3evm_nand_resource,
+};
+
+#define ONENAND_MAP 0x2000
+#define ONENAND_BLOCK_SIZE (64*2048)
+
+static struct mtd_partition omap3evm_onenand_partitions[] = {
+ {
+ .name = xloader-onenand,
+ .offset = 0,
+ .size = 4 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 15 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 1 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = linux-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct omap_onenand_platform_data omap3evm_onenand_data = {
+ .parts = omap3evm_onenand_partitions,
+ .nr_parts = ARRAY_SIZE(omap3evm_onenand_partitions),
+ .onenand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP OneNAND driver */
+};
+
+static struct platform_device omap3evm_onenand_device = {
+ .name = omap2-onenand,
+ .id = -1,
+ .dev = {
+ .platform_data =
[APPLIED] [PATCH] initialize gpio debounce register
This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: omap-fixes Initial commit ID (Likely to change): 732636a34b4c10224c212325878f97274b4df426 PatchWorks http://patchwork.kernel.org/patch/31373/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=732636a34b4c10224c212325878f97274b4df426 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/12] Omap fixes for 2.6.31
Hi, Here are some omap fixes for 2.6.31 for review. Regards, Tony --- Adrian Hunter (2): OMAP3: RX51: Use OneNAND sync read / write OMAP2/3: gpmc-onenand: correct use of async timings Andrew de Quincey (1): OMAP1: Fix N770 MMC support Fernando Guzman Lugo (1): OMAP: IOMMU: function flush_iotlb_page is not flushing correct entry Grazvydas Ignotas (1): OMAP2/3: mmc-twl4030: use correct controller in twl_mmc23_set_power Huang Weiyi (1): OMAP1: remove duplicated #include Jonathan McDowell (1): OMAP1: Fix compilation of arch/arm/mach-omap1/mailbox.c Kalle Jokiniemi (1): OMAP3: DMA: Enable idlemodes for DMA OCP Kevin Hilman (1): OMAP2/3: Add omap_type() for determining GP/EMU/HS Roel Kluin (1): OMAP2/3: omap mailbox: platform_get_irq() error ignored Tero Kristo (1): OMAP3: SRAM size fix for HS/EMU devices janboe (1): OMAP2/3: Initialize gpio debounce register arch/arm/mach-omap1/board-nokia770.c |3 ++- arch/arm/mach-omap1/mailbox.c|2 +- arch/arm/mach-omap2/board-rx51-peripherals.c |1 + arch/arm/mach-omap2/gpmc-onenand.c | 21 +++-- arch/arm/mach-omap2/id.c | 22 ++ arch/arm/mach-omap2/mailbox.c|6 +++--- arch/arm/mach-omap2/mmc-twl4030.c| 13 - arch/arm/plat-omap/dma.c | 13 + arch/arm/plat-omap/gpio.c|1 + arch/arm/plat-omap/include/mach/cpu.h| 22 +++--- arch/arm/plat-omap/include/mach/dma.h| 15 +++ arch/arm/plat-omap/iommu.c |2 +- arch/arm/plat-omap/sram.c|7 ++- 13 files changed, 107 insertions(+), 21 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/12] OMAP1: Fix compilation of arch/arm/mach-omap1/mailbox.c
From: Jonathan McDowell nood...@earth.li This fixes the positioning of in MODULE_AUTHOR, which is currently causing a build failure on latest git with CONFIG_OMAP_MBOX_FWK=m; the original breakage appears to date from the end of last year in a5abbbe52b7e89a7633319c5417bd4331f7ac8ed Signed-Off-By: Jonathan McDowell nood...@earth.li Acked-by: Hiroshi DOYU hiroshi.d...@nokia.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap1/mailbox.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c index 0af4d6c..6810b4a 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/arch/arm/mach-omap1/mailbox.c @@ -203,5 +203,5 @@ module_exit(omap1_mbox_exit); MODULE_LICENSE(GPL v2); MODULE_DESCRIPTION(omap mailbox: omap1 architecture specific functions); -MODULE_AUTHOR(Hiroshi DOYU hiroshi.d...@nokia.com); +MODULE_AUTHOR(Hiroshi DOYU hiroshi.d...@nokia.com); MODULE_ALIAS(platform:omap1-mailbox); -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/12] OMAP1: Fix N770 MMC support
From: Andrew de Quincey adq_...@lidskialf.net
Some of the N770's MMC configuration options seem to have been
dropped. This patch adds them back in again.
Note that only the .ocr_mask change was /critical/, but I've added the
.max_freq setting back as well, as the original sources had it. Can
anyone confirm if this is unnecessary?
Secondly, there is support in the original code for a 4wire/higher
speed mode. As I don't have the requisite N770 hardware (I think it
was a rev2 N770?) to test this, I can't really add it back.
Signed-off-by: Andrew de Quincey a...@lidskialf.net
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/board-nokia770.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap1/board-nokia770.c
b/arch/arm/mach-omap1/board-nokia770.c
index e70fc7c..d9ebba0 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -205,9 +205,11 @@ static int nokia770_mmc_get_cover_state(struct device
*dev, int slot)
static struct omap_mmc_platform_data nokia770_mmc2_data = {
.nr_slots = 1,
.dma_mask = 0x,
+ .max_freq = 1200,
.slots[0] = {
.set_power = nokia770_mmc_set_power,
.get_cover_state= nokia770_mmc_get_cover_state,
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.name = mmcblk,
},
};
--
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[PATCH 03/12] OMAP1: remove duplicated #include
From: Huang Weiyi weiyi.hu...@gmail.com Remove duplicated #include in arch/arm/mach-omap1/board-nokia770.c. Signed-off-by: Huang Weiyi weiyi.hu...@gmail.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap1/board-nokia770.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index d9ebba0..ed2a48a 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -36,7 +36,6 @@ #include mach/hwa742.h #include mach/lcd_mipid.h #include mach/mmc.h -#include mach/usb.h #include mach/clock.h #define ADS7846_PENDOWN_GPIO 15 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 04/12] OMAP2/3: mmc-twl4030: use correct controller in twl_mmc23_set_power
From: Grazvydas Ignotas nota...@gmail.com
twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which
breaks MMC3. Find the right controller to use instead.
Signed-off-by: Grazvydas Ignotas nota...@gmail.com
Cc: David Brownell davi...@pacbell.net
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/mmc-twl4030.c | 13 -
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c
b/arch/arm/mach-omap2/mmc-twl4030.c
index 9756a87..1541fd4 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -263,8 +263,19 @@ static int twl_mmc1_set_power(struct device *dev, int
slot, int power_on,
static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int
vdd)
{
int ret = 0;
- struct twl_mmc_controller *c = hsmmc[1];
+ struct twl_mmc_controller *c = NULL;
struct omap_mmc_platform_data *mmc = dev-platform_data;
+ int i;
+
+ for (i = 1; i ARRAY_SIZE(hsmmc); i++) {
+ if (mmc == hsmmc[i].mmc) {
+ c = hsmmc[i];
+ break;
+ }
+ }
+
+ if (c == NULL)
+ return -ENODEV;
/* If we don't see a Vcc regulator, assume it's a fixed
* voltage always-on regulator.
--
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[PATCH 05/12] OMAP2/3: omap mailbox: platform_get_irq() error ignored
From: Roel Kluin roel.kl...@gmail.com
platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq
is unsigned, so the error was not noticed.
Signed-off-by: Roel Kluin roel.kl...@gmail.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/mailbox.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index fd5b8a5..6f71f37 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -282,12 +282,12 @@ static int __devinit omap2_mbox_probe(struct
platform_device *pdev)
return -ENOMEM;
/* DSP or IVA2 IRQ */
- mbox_dsp_info.irq = platform_get_irq(pdev, 0);
- if (mbox_dsp_info.irq 0) {
+ ret = platform_get_irq(pdev, 0);
+ if (ret 0) {
dev_err(pdev-dev, invalid irq resource\n);
- ret = -ENODEV;
goto err_dsp;
}
+ mbox_dsp_info.irq = ret;
ret = omap_mbox_register(pdev-dev, mbox_dsp_info);
if (ret)
--
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[PATCH 06/12] OMAP2/3: Add omap_type() for determining GP/EMU/HS
From: Kevin Hilman khil...@deeprootsystems.com
The omap_type() function is added and returns the DEVICETYPE field of
the CONTROL_STATUS register. The result can be used for conditional
code based on whether device is GP (general purpose), EMU or
HS (high security). Also move the type defines so omap1 code
compile does not require ifdefs for sections using these defines.
This code is needed for the following fix to set the SRAM
size correctly for HS omaps. Also at least PM and watchdog
code will need this function.
Signed-off-by: Kevin Hilman khil...@ti.deeprootsystems.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/id.c | 22 ++
arch/arm/plat-omap/include/mach/cpu.h | 22 +++---
2 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 458990e..a98201c 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -48,6 +48,28 @@ int omap_chip_is(struct omap_chip_id oci)
}
EXPORT_SYMBOL(omap_chip_is);
+int omap_type(void)
+{
+ u32 val = 0;
+
+ if (cpu_is_omap24xx())
+ val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
+ else if (cpu_is_omap34xx())
+ val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
+ else {
+ pr_err(Cannot detect omap type!\n);
+ goto out;
+ }
+
+ val = OMAP2_DEVICETYPE_MASK;
+ val = 8;
+
+out:
+ return val;
+}
+EXPORT_SYMBOL(omap_type);
+
+
/**/
#define OMAP_TAP_IDCODE0x0204
diff --git a/arch/arm/plat-omap/include/mach/cpu.h
b/arch/arm/plat-omap/include/mach/cpu.h
index fc60c4e..285eaa3 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -30,6 +30,17 @@
#ifndef __ASM_ARCH_OMAP_CPU_H
#define __ASM_ARCH_OMAP_CPU_H
+/*
+ * Omap device type i.e. EMU/HS/TST/GP/BAD
+ */
+#define OMAP2_DEVICE_TYPE_TEST 0
+#define OMAP2_DEVICE_TYPE_EMU 1
+#define OMAP2_DEVICE_TYPE_SEC 2
+#define OMAP2_DEVICE_TYPE_GP 3
+#define OMAP2_DEVICE_TYPE_BAD 4
+
+int omap_type(void);
+
struct omap_chip_id {
u8 oc;
u8 type;
@@ -424,17 +435,6 @@ IS_OMAP_TYPE(3430, 0x3430)
int omap_chip_is(struct omap_chip_id oci);
-int omap_type(void);
-
-/*
- * Macro to detect device type i.e. EMU/HS/TST/GP/BAD
- */
-#define OMAP2_DEVICE_TYPE_TEST 0
-#define OMAP2_DEVICE_TYPE_EMU 1
-#define OMAP2_DEVICE_TYPE_SEC 2
-#define OMAP2_DEVICE_TYPE_GP 3
-#define OMAP2_DEVICE_TYPE_BAD 4
-
void omap2_check_revision(void);
#endif/* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
--
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[PATCH 07/12] OMAP3: SRAM size fix for HS/EMU devices
From: Tero Kristo tero.kri...@nokia.com
SRAM size fix for HS/EMU devices
Signed-off-by: Tero Kristo tero.kri...@nokia.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/sram.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index a5b9bcd..1c18de9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -133,7 +133,12 @@ void __init omap_detect_sram(void)
if (cpu_is_omap34xx()) {
omap_sram_base = OMAP3_SRAM_PUB_VA;
omap_sram_start = OMAP3_SRAM_PUB_PA;
- omap_sram_size = 0x8000; /* 32K */
+ if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
+ (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
+ omap_sram_size = 0x7000; /* 28K */
+ } else {
+ omap_sram_size = 0x8000; /* 32K */
+ }
} else {
omap_sram_base = OMAP2_SRAM_PUB_VA;
omap_sram_start = OMAP2_SRAM_PUB_PA;
--
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Re: Please help in adding ams-delta support to ASoC
On Thu, 18 Jun 2009 13:40:56 +0200 Janusz Krzysztofik jkrzy...@tis.icnet.pl wrote: Then I retired the same on the commit d8376cc482b241701f7606c81ad578b90853e175 and got similiar hangup. Next, I moved mcbsp initialization to a boot time hook and finally heard a sound and got my first DMA interrupt! Great! :-) I wonder what special boot time omap_mcbsp_request call has in respect to McBSP access. DSP issue pointed by Tony might be one answer and I'm also thinking can it be also some clock gating problem to the McBSP like some parent clock gets idled after booting? Can you move this boot time initialization moment around with xxx_initcall variants to see what is the point where block is not anymore accessable? Basically around the DSP power up and idle code (were there such code for older audio drivers?) and where unused clocks are disabled (functions clk_disable_unused and omap1_clk_disable_unused). -- Jarkko -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 08/12] OMAP3: DMA: Enable idlemodes for DMA OCP
From: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
This patch enables MStandby smart-idle mode, autoidle smartidle mode,
and the autoidle bit for DMA4_OCP_SYSCONFIG.
Signed-off-by: Kalle Jokiniemi ext-kalle.jokini...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
Signed-off-by: Kevin Hilman khil...@ti.deeprootsystems.com
---
arch/arm/plat-omap/dma.c | 13 +
arch/arm/plat-omap/include/mach/dma.h | 15 +++
2 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index def14ec..7677a4a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2457,6 +2457,19 @@ static int __init omap_init_dma(void)
setup_irq(irq, omap24xx_dma_irq);
}
+ /* Enable smartidle idlemodes and autoidle */
+ if (cpu_is_omap34xx()) {
+ u32 v = dma_read(OCP_SYSCONFIG);
+ v = ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
+ DMA_SYSCONFIG_SIDLEMODE_MASK |
+ DMA_SYSCONFIG_AUTOIDLE);
+ v |= (DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
+ DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
+ DMA_SYSCONFIG_AUTOIDLE);
+ dma_write(v , OCP_SYSCONFIG);
+ }
+
+
/* FIXME: Update LCD DMA to work on 24xx */
if (cpu_class_is_omap1()) {
r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
diff --git a/arch/arm/plat-omap/include/mach/dma.h
b/arch/arm/plat-omap/include/mach/dma.h
index 8c1eae8..7b939cc 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -389,6 +389,21 @@
#define DMA_THREAD_FIFO_25 (0x02 14)
#define DMA_THREAD_FIFO_50 (0x03 14)
+/* DMA4_OCP_SYSCONFIG bits */
+#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 12)
+#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 8)
+#define DMA_SYSCONFIG_EMUFREE (1 5)
+#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 3)
+#define DMA_SYSCONFIG_SOFTRESET(1 2)
+#define DMA_SYSCONFIG_AUTOIDLE (1 0)
+
+#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) 12)
+#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) 3)
+
+#define DMA_IDLEMODE_SMARTIDLE 0x2
+#define DMA_IDLEMODE_NO_IDLE 0x1
+#define DMA_IDLEMODE_FORCE_IDLE0x0
+
/* Chaining modes*/
#ifndef CONFIG_ARCH_OMAP1
#define OMAP_DMA_STATIC_CHAIN 0x1
--
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[PATCH 09/12] OMAP2/3: gpmc-onenand: correct use of async timings
From: Adrian Hunter adrian.hun...@nokia.com
Use async timings when sync timings are not requested.
Also ensure that OneNAND is in async mode when async
timings are used.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpmc-onenand.c | 21 +++--
1 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c
b/arch/arm/mach-omap2/gpmc-onenand.c
index 2fd22f9..54fec53 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -31,6 +31,8 @@ static struct platform_device gpmc_onenand_device = {
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
{
struct gpmc_timings t;
+ u32 reg;
+ int err;
const int t_cer = 15;
const int t_avdp = 12;
@@ -43,6 +45,11 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem
*onenand_base)
const int t_wpl = 40;
const int t_wph = 30;
+ /* Ensure sync read and sync write are disabled */
+ reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
+ reg = ~ONENAND_SYS_CFG1_SYNC_READ ~ONENAND_SYS_CFG1_SYNC_WRITE;
+ writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
+
memset(t, 0, sizeof(t));
t.sync_clk = 0;
t.cs_on = 0;
@@ -74,7 +81,16 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem
*onenand_base)
GPMC_CONFIG1_DEVICESIZE_16 |
GPMC_CONFIG1_MUXADDDATA);
- return gpmc_cs_set_timings(cs, t);
+ err = gpmc_cs_set_timings(cs, t);
+ if (err)
+ return err;
+
+ /* Ensure sync read and sync write are disabled */
+ reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
+ reg = ~ONENAND_SYS_CFG1_SYNC_READ ~ONENAND_SYS_CFG1_SYNC_WRITE;
+ writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
+
+ return 0;
}
static void set_onenand_cfg(void __iomem *onenand_base, int latency,
@@ -124,7 +140,8 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
} else if (cfg-flags ONENAND_SYNC_READWRITE) {
sync_read = 1;
sync_write = 1;
- }
+ } else
+ return omap2_onenand_set_async_mode(cs, onenand_base);
if (!freq) {
/* Very first call freq is not known */
--
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[PATCH 10/12] OMAP3: RX51: Use OneNAND sync read / write
From: Adrian Hunter adrian.hun...@nokia.com
Use OneNAND sync read / write
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index da93b86..9a0bf67 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -362,6 +362,7 @@ static struct omap_onenand_platform_data board_onenand_data
= {
.gpio_irq = 65,
.parts = onenand_partitions,
.nr_parts = ARRAY_SIZE(onenand_partitions),
+ .flags = ONENAND_SYNC_READWRITE,
};
static void __init board_onenand_init(void)
--
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[PATCH 11/12] OMAP: IOMMU: function flush_iotlb_page is not flushing correct entry
From: Fernando Guzman Lugo x0095...@ti.com
The function flush_iotlb_page is not loading the CAM register with
the correct entry to be flushed, so it is flushing other entry
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/iommu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4cf449f..4a03013 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -298,7 +298,7 @@ void flush_iotlb_page(struct iommu *obj, u32 da)
if ((start = da) (da start + bytes)) {
dev_dbg(obj-dev, %s: %08x=%08x(%x)\n,
__func__, start, da, bytes);
-
+ iotlb_load_cr(obj, cr);
iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
}
}
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[PATCH 12/12] OMAP2/3: Initialize gpio debounce register
From: janboe janboe...@gmail.com Some bootloader may initialize debounce register and this will make dbclk not consist with the debounce register after linux kernel boot up. Signed-off-by: janboe janboe...@gmail.com Signed-off-by: Kevin Hilman khil...@deeprootsystems.com Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/gpio.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 7fd89ba..26b387c 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -1585,6 +1585,7 @@ static int __init _omap_gpio_init(void) __raw_writel(0x, bank-base + OMAP24XX_GPIO_IRQENABLE1); __raw_writel(0x, bank-base + OMAP24XX_GPIO_IRQSTATUS1); __raw_writew(0x0015, bank-base + OMAP24XX_GPIO_SYSCONFIG); + __raw_writel(0x, bank-base + OMAP24XX_GPIO_DEBOUNCE_EN); /* Initialize interface clock ungated, module enabled */ __raw_writel(0, bank-base + OMAP24XX_GPIO_CTRL); -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 1/2] watchdog:OMAP3:Register IVA and SECURE WDT, make clks accessible
* Ulrik Bech Hald u...@ti.com [090617 22:06]:
Enabling registration of IVA and SECURE WDT devices. Making
ick and fck for IVA and SECURE WDTs accessible.
Tested on Zoom1 OMAP3 platform
Signed-off-by: Ulrik Bech Hald u...@ti.com
---
arch/arm/mach-omap1/clock.c |6 +-
arch/arm/mach-omap2/clock24xx.c |4 +-
arch/arm/mach-omap2/clock34xx.c | 12 +++---
arch/arm/plat-omap/devices.c| 91
---
4 files changed, 86 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 436eed2..c0b5849 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -85,9 +85,9 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, arm_gpio_ck, arm_gpio_ck, CK_1510 | CK_310),
CLK(NULL, armxor_ck,armxor_ck.clk, CK_16XX | CK_1510 |
CK_310),
CLK(NULL, armtim_ck,armtim_ck.clk, CK_16XX | CK_1510 |
CK_310),
- CLK(omap_wdt, fck, armwdt_ck.clk, CK_16XX | CK_1510 |
CK_310),
- CLK(omap_wdt, ick, armper_ck.clk, CK_16XX),
- CLK(omap_wdt, ick, dummy_ck, CK_1510 | CK_310),
+ CLK(omap_wdt.2, fck,armwdt_ck.clk, CK_16XX | CK_1510 |
CK_310),
+ CLK(omap_wdt.2, ick,armper_ck.clk, CK_16XX),
+ CLK(omap_wdt.2, ick,dummy_ck, CK_1510 | CK_310),
CLK(NULL, arminth_ck, arminth_ck1510, CK_1510 | CK_310),
CLK(NULL, arminth_ck, arminth_ck16xx, CK_16XX),
/* CK_GEN2 clocks */
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 44de027..4fe3def
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -165,8 +165,8 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, uart3_fck,uart3_fck, CK_243X | CK_242X),
CLK(NULL, gpios_ick,gpios_ick, CK_243X | CK_242X),
CLK(NULL, gpios_fck,gpios_fck, CK_243X | CK_242X),
- CLK(omap_wdt, ick, mpu_wdt_ick, CK_243X | CK_242X),
- CLK(omap_wdt, fck, mpu_wdt_fck, CK_243X | CK_242X),
+ CLK(omap_wdt.2, ick,mpu_wdt_ick, CK_243X | CK_242X),
+ CLK(omap_wdt.2, fck,mpu_wdt_fck, CK_243X | CK_242X),
CLK(NULL, sync_32k_ick, sync_32k_ick, CK_243X | CK_242X),
CLK(NULL, wdt1_ick, wdt1_ick, CK_243X | CK_242X),
CLK(NULL, omapctrl_ick, omapctrl_ick, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..a4613e5 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -215,11 +215,11 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, gpt1_fck, gpt1_fck, CK_343X),
CLK(NULL, wkup_32k_fck, wkup_32k_fck, CK_343X),
CLK(NULL, gpio1_dbck, gpio1_dbck,CK_343X),
- CLK(omap_wdt, fck, wdt2_fck, CK_343X),
+ CLK(omap_wdt.2, fck,wdt2_fck, CK_343X),
CLK(NULL, wkup_l4_ick, wkup_l4_ick, CK_343X),
CLK(NULL, usim_ick, usim_ick, CK_3430ES2),
- CLK(omap_wdt, ick, wdt2_ick, CK_343X),
- CLK(NULL, wdt1_ick, wdt1_ick, CK_343X),
+ CLK(omap_wdt.2, ick,wdt2_ick, CK_343X),
+ CLK(omap_wdt.1, ick,wdt1_ick, CK_343X),
CLK(NULL, gpio1_ick,gpio1_ick, CK_343X),
CLK(NULL, omap_32ksync_ick, omap_32ksync_ick, CK_343X),
CLK(NULL, gpt12_ick,gpt12_ick, CK_343X),
@@ -241,14 +241,14 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, gpio4_dbck, gpio4_dbck,CK_343X),
CLK(NULL, gpio3_dbck, gpio3_dbck,CK_343X),
CLK(NULL, gpio2_dbck, gpio2_dbck,CK_343X),
- CLK(NULL, wdt3_fck, wdt3_fck, CK_343X),
+ CLK(omap_wdt.3, fck,wdt3_fck, CK_343X),
CLK(NULL, per_l4_ick, per_l4_ick,CK_343X),
CLK(NULL, gpio6_ick,gpio6_ick, CK_343X),
CLK(NULL, gpio5_ick,gpio5_ick, CK_343X),
CLK(NULL, gpio4_ick,gpio4_ick, CK_343X),
CLK(NULL, gpio3_ick,gpio3_ick, CK_343X),
CLK(NULL, gpio2_ick,gpio2_ick, CK_343X),
- CLK(NULL, wdt3_ick, wdt3_ick, CK_343X),
+ CLK(omap_wdt.3, ick,wdt3_ick, CK_343X),
CLK(NULL, uart3_ick,uart3_ick, CK_343X),
CLK(NULL, gpt9_ick, gpt9_ick, CK_343X),
CLK(NULL, gpt8_ick, gpt8_ick, CK_343X),
@@ -275,7 +275,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, sr_l4_ick,sr_l4_ick, CK_343X),
CLK(NULL, secure_32k_fck, secure_32k_fck, CK_343X),
CLK(NULL, gpt12_fck,gpt12_fck, CK_343X),
- CLK(NULL, wdt1_fck,
Re: [PATCH] serial: 8250: add IRQ trigger support
* Marc Zyngier m...@misterjones.org [090612 22:31]:
On Fri, 12 Jun 2009 12:32:51 -0500
Vikram Pandita vikram.pand...@ti.com wrote:
There is currently no provision for passing IRQ trigger flags for
serial IRQs with triggering requirements (such as GPIO IRQs.)
This patch adds UPF_IRQ_TRIG_* flags which map on to IRQF_TRIGGER_*
flags.
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
Note that this patch doesn't allow the interrupt to trigger on both
edges (not that I have ever seen a 8250 with this behavior, but this
is a valid configuration from an interrupt point of view).
To me it sounds like the it would be better to have unsigned
long irqflags in struct uart_port instead of trying to squeeze
the irqflags the flags field. We're already not covering all the
irqflags currently like Marc pointed out.
Regards,
Tony
Aside from this remark:
Acked-by: Marc Zyngier m...@misterjones.org
---
drivers/serial/8250.c | 10 ++
include/linux/serial_core.h |4
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index bab115e..8235ef5 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1641,6 +1641,16 @@ static int serial_link_irq_chain(struct
uart_8250_port *up) struct irq_info *i;
int ret, irq_flags = up-port.flags UPF_SHARE_IRQ ?
IRQF_SHARED : 0;
+ /* Get IRQ Trigger Flag */
+ if (up-port.flags UPF_IRQ_TRIG_RISING)
+ irq_flags |= IRQF_TRIGGER_RISING;
+ else if (up-port.flags UPF_IRQ_TRIG_FALLING)
+ irq_flags |= IRQF_TRIGGER_FALLING;
+ else if (up-port.flags UPF_IRQ_TRIG_HIGH)
+ irq_flags |= IRQF_TRIGGER_HIGH;
+ else if (up-port.flags UPF_IRQ_TRIG_LOW)
+ irq_flags |= IRQF_TRIGGER_LOW;
+
mutex_lock(hash_mutex);
h = irq_lists[up-port.irq % NR_IRQ_HASH];
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 57a97e5..07591d5 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -296,7 +296,11 @@ struct uart_port {
#define UPF_SPD_WARP ((__force upf_t) (0x1010))
#define UPF_SKIP_TEST ((__force upf_t) (1 6))
#define UPF_AUTO_IRQ ((__force upf_t) (1 7))
+#define UPF_IRQ_TRIG_RISING((__force upf_t) (1 8))
+#define UPF_IRQ_TRIG_FALLING ((__force upf_t) (1 9))
+#define UPF_IRQ_TRIG_HIGH ((__force upf_t) (1 10))
#define UPF_HARDPPS_CD ((__force upf_t) (1 11))
+#define UPF_IRQ_TRIG_LOW ((__force upf_t) (1 12))
#define UPF_LOW_LATENCY((__force upf_t) (1 13))
#define UPF_BUGGY_UART ((__force upf_t) (1 14))
#define UPF_NO_TXEN_TEST ((__force upf_t) (1 15))
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Re: [APPLIED] [PATCH 2/2] OMAP: Zoom2: Fix file system loading issue
* Kevin Hilman khil...@deeprootsystems.com [090618 17:12]: Tony Lindgren t...@atomide.com writes: * Pandita, Vikram vikram.pand...@ti.com [090617 19:26]: -Original Message- From: Kevin Hilman [mailto:khil...@deeprootsystems.com] Sent: Wednesday, June 17, 2009 10:55 AM To: Tony Lindgren; Pandita, Vikram Cc: linux-omap@vger.kernel.org Subject: Re: [APPLIED] [PATCH 2/2] OMAP: Zoom2: Fix file system loading issue Tony Lindgren t...@atomide.com writes: This patch has been applied to the linux-omap by youw fwiendly patch wobot. Branch in linux-omap: omap-fixes Initial commit ID (Likely to change): f84eca35d44fd64cdde542f12d08eb04ca534954 PatchWorks http://patchwork.kernel.org/patch/29668/ Git (Likely to change, and takes a while to get mirrored) http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap- 2.6.git;a=commit;h=f84eca35d44fd64cdde542f12d08eb04ca534954 Sorry, I didn't get to this beforethe merge, but $SUBJECT for this patch is wrong and not terribly helpful. It refers to the symptom, bu tnot the root cause. It should be something like: OMAP3: Zoom2: pass IRQ triggering flags for serial driver Yes that should have been the subject and is put that way for the 8250 driver: http://lists.arm.linux.org.uk/lurker/attach/1...@20090612.173251.776f9eda.attach It's learning for next time. Will revert. I guess we now need two 8250 patches upstream? One for the omap register define, and one for the interrupt flags? Yes, both of these are pending on LKML, and still no word from Alan. To get it upstream, I defined wake-up register locally in mach-omap2/serial.c until the patch gets merged, but for the interrupt flags there isn't an easy solution. OK, so it's the irqflags that we still need. I took a look and commented that we should rather have irqflags field in struct uart_port instead.. So let's just wait and see until we have some ack from Alan. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] OMAP3:Zoom2: Add TWL4030 support
* Vikram Pandita vikram.pand...@ti.com [090619 01:18]: Add TWL4030 CORE and TWL4030 drivers to Zoom2 board file TWL drivers enabled are: bci madc usb keypad mmc Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/board-zoom2.c | 209 +++-- 1 files changed, 198 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index bcc0f76..443859c 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -12,17 +12,88 @@ #include linux/kernel.h #include linux/init.h #include linux/platform_device.h +#include linux/input.h #include linux/gpio.h #include linux/i2c/twl4030.h +#include linux/regulator/machine.h #include asm/mach-types.h #include asm/mach/arch.h #include mach/common.h #include mach/usb.h +#include mach/keypad.h #include mmc-twl4030.h +#ifndef CONFIG_TWL4030_CORE +#error no power companion board defined! +#endif This does not look right. You should still be able to boot the board even without twl compiled in. Or compile twl as a module. Currently we do have a bug where mmc-twl4030.c forces mmc core to be compiled in because of the regulator fwk, but that should be fixed by moving the regulator fwk calls to drivers/mmc/host/omap_hsmmc.c. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: MACH-OMAP2: Cleanup Kconfig entries
* Aguirre Rodriguez, Sergio Alberto saagui...@ti.com [090619 17:53]: From 9258708325e0a04de7d7503b65cabc25860a9e7d Mon Sep 17 00:00:00 2001 From: Sergio Aguirre saagui...@ti.com Date: Fri, 19 Jun 2009 09:50:52 -0500 Subject: [PATCH] ARM: MACH-OMAP2: Cleanup Kconfig entries This patch removes some duplicate entries, and intents to cleanup the order. This does not seem to apply to the mainline kernel or linux-omap, can you please check? Tony Signed-off-by: Sergio Aguirre saagui...@ti.com --- arch/arm/mach-omap2/Kconfig | 38 ++ 1 files changed, 14 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index bfb36e2..caf5144 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -109,22 +109,30 @@ config MACH_OMAP_2430SDP bool OMAP 2430 SDP board depends on ARCH_OMAP2 ARCH_OMAP2430 -config MACH_OMAP_LDP - bool OMAP3 LDP board +config MACH_OMAP_3430SDP + bool OMAP 3430 SDP board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_4430SDP + bool OMAP 4430 SDP board + depends on ARCH_OMAP4 + config MACH_OMAP2EVM bool OMAP 2530 EVM board depends on ARCH_OMAP2 ARCH_OMAP24XX -config MACH_OMAP_3430SDP - bool OMAP 3430 SDP board - depends on ARCH_OMAP3 ARCH_OMAP34XX - config MACH_OMAP3EVM bool OMAP 3530 EVM board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_LDP + bool OMAP3 LDP board + depends on ARCH_OMAP3 ARCH_OMAP34XX + +config MACH_OMAP_ZOOM2 + bool OMAP3 Zoom2 board + depends on ARCH_OMAP3 ARCH_OMAP34XX + config MACH_OMAP3_BEAGLE bool OMAP3 BEAGLE board depends on ARCH_OMAP3 ARCH_OMAP34XX @@ -133,26 +141,8 @@ config MACH_OVERO bool Gumstix Overo board depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP3EVM - bool OMAP 3530 EVM board - depends on ARCH_OMAP3 ARCH_OMAP34XX - config MACH_OMAP3_PANDORA bool OMAP3 Pandora depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP_3430SDP - bool OMAP 3430 SDP board - depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP_ZOOM2 - bool OMAP3 Zoom2 board - depends on ARCH_OMAP3 ARCH_OMAP34XX - -config MACH_OMAP_ZOOM2 - bool OMAP3 Zoom2 board - depends on ARCH_OMAP3 ARCH_OMAP34XX - -config MACH_OMAP_4430SDP - bool OMAP 4430 SDP board - depends on ARCH_OMAP4 -- 1.6.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: MACH-OMAP2: Cleanup Kconfig entries
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Monday, June 22, 2009 7:53 AM To: Aguirre Rodriguez, Sergio Alberto Cc: linux-omap@vger.kernel.org Subject: Re: [PATCH] ARM: MACH-OMAP2: Cleanup Kconfig entries * Aguirre Rodriguez, Sergio Alberto saagui...@ti.com [090619 17:53]: From 9258708325e0a04de7d7503b65cabc25860a9e7d Mon Sep 17 00:00:00 2001 From: Sergio Aguirre saagui...@ti.com Date: Fri, 19 Jun 2009 09:50:52 -0500 Subject: [PATCH] ARM: MACH-OMAP2: Cleanup Kconfig entries This patch removes some duplicate entries, and intents to cleanup the order. This does not seem to apply to the mainline kernel or linux-omap, can you please check? Tony, I'm sorry for not clarifying... I applied this patch on top of Kevin's PM tree, I'll check on l-o tree. Regards, Sergio Tony Signed-off-by: Sergio Aguirre saagui...@ti.com --- arch/arm/mach-omap2/Kconfig | 38 ++-- -- 1 files changed, 14 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index bfb36e2..caf5144 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -109,22 +109,30 @@ config MACH_OMAP_2430SDP bool OMAP 2430 SDP board depends on ARCH_OMAP2 ARCH_OMAP2430 -config MACH_OMAP_LDP - bool OMAP3 LDP board +config MACH_OMAP_3430SDP + bool OMAP 3430 SDP board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_4430SDP + bool OMAP 4430 SDP board + depends on ARCH_OMAP4 + config MACH_OMAP2EVM bool OMAP 2530 EVM board depends on ARCH_OMAP2 ARCH_OMAP24XX -config MACH_OMAP_3430SDP - bool OMAP 3430 SDP board - depends on ARCH_OMAP3 ARCH_OMAP34XX - config MACH_OMAP3EVM bool OMAP 3530 EVM board depends on ARCH_OMAP3 ARCH_OMAP34XX +config MACH_OMAP_LDP + bool OMAP3 LDP board + depends on ARCH_OMAP3 ARCH_OMAP34XX + +config MACH_OMAP_ZOOM2 + bool OMAP3 Zoom2 board + depends on ARCH_OMAP3 ARCH_OMAP34XX + config MACH_OMAP3_BEAGLE bool OMAP3 BEAGLE board depends on ARCH_OMAP3 ARCH_OMAP34XX @@ -133,26 +141,8 @@ config MACH_OVERO bool Gumstix Overo board depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP3EVM - bool OMAP 3530 EVM board - depends on ARCH_OMAP3 ARCH_OMAP34XX - config MACH_OMAP3_PANDORA bool OMAP3 Pandora depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP_3430SDP - bool OMAP 3430 SDP board - depends on ARCH_OMAP3 ARCH_OMAP34XX -config MACH_OMAP_ZOOM2 - bool OMAP3 Zoom2 board - depends on ARCH_OMAP3 ARCH_OMAP34XX - -config MACH_OMAP_ZOOM2 - bool OMAP3 Zoom2 board - depends on ARCH_OMAP3 ARCH_OMAP34XX - -config MACH_OMAP_4430SDP - bool OMAP 4430 SDP board - depends on ARCH_OMAP4 -- 1.6.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] OMAP3: MMC: Add mux for pins
* Vikram Pandita vikram.pand...@ti.com [090616 02:39]:
For OMAP3 add MMC1 MMC2 and MMC3 pin mux
Signed-off-by: Chikkature Rajashekar madhu...@ti.com
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
---
arch/arm/mach-omap2/devices.c | 33 ++
arch/arm/mach-omap2/mux.c | 49
+
arch/arm/plat-omap/include/mach/mux.h | 28 +++
3 files changed, 110 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc35..7b87543 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,39 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
+
+ if (cpu_is_omap3430()) {
+ if (controller_nr == 0 (!mmc_controller-slots[0].nomux)) {
+ omap_cfg_reg(N28_3430_MMC1_CLK);
+ omap_cfg_reg(M27_3430_MMC1_CMD);
+ omap_cfg_reg(N27_3430_MMC1_DAT0);
+ omap_cfg_reg(N26_3430_MMC1_DAT1);
+ omap_cfg_reg(N25_3430_MMC1_DAT2);
+ omap_cfg_reg(P28_3430_MMC1_DAT3);
+ omap_cfg_reg(P27_3430_MMC1_DAT4);
+ omap_cfg_reg(P26_3430_MMC1_DAT5);
+ omap_cfg_reg(R27_3430_MMC1_DAT6);
+ omap_cfg_reg(R25_3430_MMC1_DAT7);
+ }
+ if (controller_nr == 1 (!mmc_controller-slots[0].nomux)) {
+ /* MMC2 */
+ omap_cfg_reg(AE2_3430_MMC2_CLK);
+ omap_cfg_reg(AG5_3430_MMC2_CMD);
+ omap_cfg_reg(AH5_3430_MMC2_DAT0);
+ omap_cfg_reg(AH4_3430_MMC2_DAT1);
+ omap_cfg_reg(AG4_3430_MMC2_DAT2);
+ omap_cfg_reg(AF4_3430_MMC2_DAT3);
+ }
+ if (controller_nr == 2 (!mmc_controller-slots[0].nomux)) {
+ /* MMC3 */
+ omap_cfg_reg(AF10_3430_MMC3_CLK);
+ omap_cfg_reg(AC3_3430_MMC3_CMD);
+ omap_cfg_reg(AE11_3430_MMC3_DAT0);
+ omap_cfg_reg(AH9_3430_MMC3_DAT1);
+ omap_cfg_reg(AF13_3430_MMC3_DAT2);
+ omap_cfg_reg(AF13_3430_MMC3_DAT3);
+ }
+ }
}
Just for reference, I'll summarize what we've discussed in the other related
thread:
- Since we support muxing by both the bootloader and kernel,
adding nomux flag is dangerous
- We can only mux the pins that don't have alternative outputs
Regards,
Tony
void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 026c4fc..d49b9a7 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -486,6 +486,55 @@ MUX_CFG_34XX(H19_34XX_GPIO164_OUT, 0x19c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX(J25_34XX_GPIO170, 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+/* MMC1 */
+MUX_CFG_34XX(N28_3430_MMC1_CLK, 0x144,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(M27_3430_MMC1_CMD, 0x146,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N27_3430_MMC1_DAT0, 0x148,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N26_3430_MMC1_DAT1, 0x14a,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N25_3430_MMC1_DAT2, 0x14c,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P28_3430_MMC1_DAT3, 0x14e,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P27_3430_MMC1_DAT4, 0x150,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P26_3430_MMC1_DAT5, 0x152,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R27_3430_MMC1_DAT6, 0x154,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R25_3430_MMC1_DAT7, 0x156,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC2 */
+MUX_CFG_34XX(AE2_3430_MMC2_CLK, 0x158,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AG5_3430_MMC2_CMD, 0x15A,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH5_3430_MMC2_DAT0, 0x15c,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH4_3430_MMC2_DAT1, 0x15e,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AG4_3430_MMC2_DAT2, 0x160,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AF4_3430_MMC2_DAT3, 0x162,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC3 */
+MUX_CFG_34XX(AF10_3430_MMC3_CLK, 0x5d8,
+
RE: [PATCH] Missing implementation of omap3evm_flash_init()
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Monday, June 22, 2009 2:37 PM
To: Premi, Sanjeev
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH] Missing implementation of omap3evm_flash_init()
Hi,
* Sanjeev Premi pr...@ti.com [090618 16:29]:
The function omap3evm_flash_init() earlier implemented
in board-omap3evm-flash.c did not find its way into the
board-omap3evm.c during the latest migration.
This patch brings in the earlier implementation with
appropriate changes as necessary on current head.
Signed-off-by: Sanjeev Premi pr...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 176
+-
1 files changed, 175 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 1b7a797..5084b67 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -26,23 +26,197 @@
#include linux/spi/ads7846.h
#include linux/i2c/twl4030.h
+#include linux/mtd/mtd.h
+#include linux/mtd/partitions.h
+#include linux/mtd/nand.h
+
#include mach/hardware.h
#include asm/mach-types.h
#include asm/mach/arch.h
#include asm/mach/map.h
+#include asm/mach/flash.h
+#include mach/common.h
#include mach/board.h
#include mach/mux.h
+#include mach/gpmc.h
+#include mach/nand.h
+#include mach/onenand.h
#include mach/usb.h
-#include mach/common.h
#include mach/mcspi.h
#include mach/keypad.h
#include sdram-micron-mt46h32m32lf-6.h
#include mmc-twl4030.h
+#define GPMC_CS0_BASE 0x60
+#define GPMC_CS_SIZE0x30
+
#define OMAP3_EVM_TS_GPIO 175
+/*
+ * MTD - NAND, OneNAND
+ */
+#define NAND_BLOCK_SIZESZ_128K
+
+static struct mtd_partition omap3evm_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND
block size */
+ {
+ .name = xloader-nand,
+ .offset = 0,
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 14 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-nand,
+
+ .offset = MTDPART_OFS_APPEND,
+ .size = 2 * NAND_BLOCK_SIZE
+ },
+ {
+ .name = linux-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-nand,
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct omap_nand_platform_data omap3evm_nand_data = {
+ .parts = omap3evm_nand_partitions,
+ .nr_parts = ARRAY_SIZE(omap3evm_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP
NAND driver */
+ .nand_setup = NULL,
+ .dev_ready = NULL,
+};
+
+static struct resource omap3evm_nand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device omap3evm_nand_device = {
+ .name = omap2-nand,
+ .id = 0,
+ .dev= {
+ .platform_data = omap3evm_nand_data,
+ },
+ .num_resources = 1,
+ .resource = omap3evm_nand_resource,
+};
+
+#define ONENAND_MAP0x2000
+#define ONENAND_BLOCK_SIZE (64*2048)
+
+static struct mtd_partition omap3evm_onenand_partitions[] = {
+ {
+ .name = xloader-onenand,
+ .offset = 0,
+ .size = 4 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 15 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 1 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = linux-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct omap_onenand_platform_data omap3evm_onenand_data = {
+ .parts = omap3evm_onenand_partitions,
+ .nr_parts = ARRAY_SIZE(omap3evm_onenand_partitions),
+ .onenand_setup = NULL,
+ .dma_channel= -1,
Re: [PATCH] serial: 8250: add IRQ trigger support
To me it sounds like the it would be better to have unsigned long irqflags in struct uart_port instead of trying to squeeze the irqflags the flags field. We're already not covering all the irqflags currently like Marc pointed out. Agreed. Alan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] serial: 8250: add IRQ trigger support
-Original Message- From: Alan Cox [mailto:a...@lxorguk.ukuu.org.uk] Sent: Monday, June 22, 2009 8:24 AM To: Tony Lindgren Cc: Marc Zyngier; Pandita, Vikram; linux-ser...@vger.kernel.org; linux-ker...@vger.kernel.org; linux- o...@vger.kernel.org; linux-arm-ker...@lists.arm.linux.org.uk Subject: Re: [PATCH] serial: 8250: add IRQ trigger support To me it sounds like the it would be better to have unsigned long irqflags in struct uart_port instead of trying to squeeze the irqflags the flags field. We're already not covering all the irqflags currently like Marc pointed out. Agreed. I can post a patch with new irqflags in uart_port. Expect a patch today. Alan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Missing implementation of omap3evm_flash_init()
* Premi, Sanjeev pr...@ti.com [090622 16:16]:
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Monday, June 22, 2009 2:37 PM
To: Premi, Sanjeev
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH] Missing implementation of omap3evm_flash_init()
Hi,
* Sanjeev Premi pr...@ti.com [090618 16:29]:
The function omap3evm_flash_init() earlier implemented
in board-omap3evm-flash.c did not find its way into the
board-omap3evm.c during the latest migration.
This patch brings in the earlier implementation with
appropriate changes as necessary on current head.
Signed-off-by: Sanjeev Premi pr...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 176
+-
1 files changed, 175 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 1b7a797..5084b67 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -26,23 +26,197 @@
#include linux/spi/ads7846.h
#include linux/i2c/twl4030.h
+#include linux/mtd/mtd.h
+#include linux/mtd/partitions.h
+#include linux/mtd/nand.h
+
#include mach/hardware.h
#include asm/mach-types.h
#include asm/mach/arch.h
#include asm/mach/map.h
+#include asm/mach/flash.h
+#include mach/common.h
#include mach/board.h
#include mach/mux.h
+#include mach/gpmc.h
+#include mach/nand.h
+#include mach/onenand.h
#include mach/usb.h
-#include mach/common.h
#include mach/mcspi.h
#include mach/keypad.h
#include sdram-micron-mt46h32m32lf-6.h
#include mmc-twl4030.h
+#define GPMC_CS0_BASE 0x60
+#define GPMC_CS_SIZE0x30
+
#define OMAP3_EVM_TS_GPIO175
+/*
+ * MTD - NAND, OneNAND
+ */
+#define NAND_BLOCK_SIZE SZ_128K
+
+static struct mtd_partition omap3evm_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND
block size */
+ {
+ .name = xloader-nand,
+ .offset = 0,
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 14 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-nand,
+
+ .offset = MTDPART_OFS_APPEND,
+ .size = 2 * NAND_BLOCK_SIZE
+ },
+ {
+ .name = linux-nand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-nand,
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct omap_nand_platform_data omap3evm_nand_data = {
+ .parts = omap3evm_nand_partitions,
+ .nr_parts = ARRAY_SIZE(omap3evm_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP
NAND driver */
+ .nand_setup = NULL,
+ .dev_ready = NULL,
+};
+
+static struct resource omap3evm_nand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device omap3evm_nand_device = {
+ .name = omap2-nand,
+ .id = 0,
+ .dev= {
+ .platform_data = omap3evm_nand_data,
+ },
+ .num_resources = 1,
+ .resource = omap3evm_nand_resource,
+};
+
+#define ONENAND_MAP 0x2000
+#define ONENAND_BLOCK_SIZE (64*2048)
+
+static struct mtd_partition omap3evm_onenand_partitions[] = {
+ {
+ .name = xloader-onenand,
+ .offset = 0,
+ .size = 4 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 15 * ONENAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = params-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 1 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = linux-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * ONENAND_BLOCK_SIZE,
+ },
+ {
+ .name = jffs2-onenand,
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct omap_onenand_platform_data omap3evm_onenand_data = {
+ .parts = omap3evm_onenand_partitions,
+ .nr_parts =
[PATCH v2] OMAP3: MMC: Add mux for pins
For OMAP3 add MMC1 MMC2 pin mux
MMC3 mux is not added as there are multiple configurations possible,
so the muxing is left to be done in board file
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
Signed-off-by: Chikkature Rajashekar madhu...@ti.com
---
arch/arm/mach-omap2/devices.c | 42
arch/arm/mach-omap2/mux.c | 49 +
arch/arm/plat-omap/include/mach/mux.h | 28 +++
3 files changed, 119 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc35..91cb84d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,48 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data *mmc_controller,
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
+
+ if (cpu_is_omap3430()) {
+ if (controller_nr == 0) {
+ omap_cfg_reg(N28_3430_MMC1_CLK);
+ omap_cfg_reg(M27_3430_MMC1_CMD);
+ omap_cfg_reg(N27_3430_MMC1_DAT0);
+ if (mmc_controller-slots[0].wires == 4 ||
+ mmc_controller-slots[0].wires == 8) {
+ omap_cfg_reg(N26_3430_MMC1_DAT1);
+ omap_cfg_reg(N25_3430_MMC1_DAT2);
+ omap_cfg_reg(P28_3430_MMC1_DAT3);
+ }
+ if (mmc_controller-slots[0].wires == 8) {
+ omap_cfg_reg(P27_3430_MMC1_DAT4);
+ omap_cfg_reg(P26_3430_MMC1_DAT5);
+ omap_cfg_reg(R27_3430_MMC1_DAT6);
+ omap_cfg_reg(R25_3430_MMC1_DAT7);
+ }
+ }
+ if (controller_nr == 1) {
+ /* MMC2 */
+ omap_cfg_reg(AE2_3430_MMC2_CLK);
+ omap_cfg_reg(AG5_3430_MMC2_CMD);
+ omap_cfg_reg(AH5_3430_MMC2_DAT0);
+ if (mmc_controller-slots[0].wires == 4 ||
+ mmc_controller-slots[0].wires == 8) {
+ omap_cfg_reg(AH4_3430_MMC2_DAT1);
+ omap_cfg_reg(AG4_3430_MMC2_DAT2);
+ omap_cfg_reg(AF4_3430_MMC2_DAT3);
+ }
+ if (mmc_controller-slots[0].wires == 8)
+ printk(KERN_WARNING
+ \n MMC2: DAT4, DAT5, DAT6, DAT7:
+ Setup the mux in board file);
+ }
+ if (controller_nr == 2) {
+ /* MMC3 */
+ printk(KERN_WARNING
+ \n MMC3: Setup the mux in board file:
+ Multiple options exist, so is board specific);
+ }
+ }
}
void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 026c4fc..d49b9a7 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -486,6 +486,55 @@ MUX_CFG_34XX(H19_34XX_GPIO164_OUT, 0x19c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX(J25_34XX_GPIO170, 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+/* MMC1 */
+MUX_CFG_34XX(N28_3430_MMC1_CLK, 0x144,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(M27_3430_MMC1_CMD, 0x146,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N27_3430_MMC1_DAT0, 0x148,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N26_3430_MMC1_DAT1, 0x14a,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N25_3430_MMC1_DAT2, 0x14c,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P28_3430_MMC1_DAT3, 0x14e,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P27_3430_MMC1_DAT4, 0x150,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P26_3430_MMC1_DAT5, 0x152,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R27_3430_MMC1_DAT6, 0x154,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R25_3430_MMC1_DAT7, 0x156,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC2 */
+MUX_CFG_34XX(AE2_3430_MMC2_CLK, 0x158,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AG5_3430_MMC2_CMD, 0x15A,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH5_3430_MMC2_DAT0, 0x15c,
+ OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH4_3430_MMC2_DAT1, 0x15e,
+ OMAP34XX_MUX_MODE0 |
RE: [PATCH v2 1/2] OMAP3:Zoom2: Add TWL4030 support
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Monday, June 22, 2009 7:52 AM To: Pandita, Vikram Cc: linux-omap@vger.kernel.org Subject: Re: [PATCH v2 1/2] OMAP3:Zoom2: Add TWL4030 support * Vikram Pandita vikram.pand...@ti.com [090619 01:18]: Add TWL4030 CORE and TWL4030 drivers to Zoom2 board file TWL drivers enabled are: bci madc usb keypad mmc Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/mach-omap2/board-zoom2.c | 209 +++-- 1 files changed, 198 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index bcc0f76..443859c 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c #include mmc-twl4030.h +#ifndef CONFIG_TWL4030_CORE +#error no power companion board defined! +#endif This does not look right. You should still be able to boot the board even without twl compiled in. Or compile twl as a module. Currently we do have a bug where mmc-twl4030.c forces mmc core to be compiled in because of the regulator fwk, but that should be fixed by moving the regulator fwk calls to drivers/mmc/host/omap_hsmmc.c. Correcting this is v3 of patch. Posting it out today. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/2] OMAP3:Zoom2: Add TWL4030 support
Add TWL4030 CORE and TWL4030 drivers to Zoom2 board file
TWL drivers enabled are:
bci
madc
usb
keypad
mmc
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
---
arch/arm/mach-omap2/board-zoom2.c | 204 +++--
1 files changed, 193 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-zoom2.c
b/arch/arm/mach-omap2/board-zoom2.c
index bcc0f76..9ecf75c 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -12,17 +12,83 @@
#include linux/kernel.h
#include linux/init.h
#include linux/platform_device.h
+#include linux/input.h
#include linux/gpio.h
#include linux/i2c/twl4030.h
+#include linux/regulator/machine.h
#include asm/mach-types.h
#include asm/mach/arch.h
#include mach/common.h
#include mach/usb.h
+#include mach/keypad.h
#include mmc-twl4030.h
+/* Zoom2 has Qwerty keyboard*/
+static int zoom2_twl4030_keymap[] = {
+ KEY(0, 0, KEY_E),
+ KEY(1, 0, KEY_R),
+ KEY(2, 0, KEY_T),
+ KEY(3, 0, KEY_HOME),
+ KEY(6, 0, KEY_I),
+ KEY(7, 0, KEY_LEFTSHIFT),
+ KEY(0, 1, KEY_D),
+ KEY(1, 1, KEY_F),
+ KEY(2, 1, KEY_G),
+ KEY(3, 1, KEY_SEND),
+ KEY(6, 1, KEY_K),
+ KEY(7, 1, KEY_ENTER),
+ KEY(0, 2, KEY_X),
+ KEY(1, 2, KEY_C),
+ KEY(2, 2, KEY_V),
+ KEY(3, 2, KEY_END),
+ KEY(6, 2, KEY_DOT),
+ KEY(7, 2, KEY_CAPSLOCK),
+ KEY(0, 3, KEY_Z),
+ KEY(1, 3, KEY_KPPLUS),
+ KEY(2, 3, KEY_B),
+ KEY(3, 3, KEY_F1),
+ KEY(6, 3, KEY_O),
+ KEY(7, 3, KEY_SPACE),
+ KEY(0, 4, KEY_W),
+ KEY(1, 4, KEY_Y),
+ KEY(2, 4, KEY_U),
+ KEY(3, 4, KEY_F2),
+ KEY(4, 4, KEY_VOLUMEUP),
+ KEY(6, 4, KEY_L),
+ KEY(7, 4, KEY_LEFT),
+ KEY(0, 5, KEY_S),
+ KEY(1, 5, KEY_H),
+ KEY(2, 5, KEY_J),
+ KEY(3, 5, KEY_F3),
+ KEY(5, 5, KEY_VOLUMEDOWN),
+ KEY(6, 5, KEY_M),
+ KEY(4, 5, KEY_ENTER),
+ KEY(7, 5, KEY_RIGHT),
+ KEY(0, 6, KEY_Q),
+ KEY(1, 6, KEY_A),
+ KEY(2, 6, KEY_N),
+ KEY(3, 6, KEY_BACKSPACE),
+ KEY(6, 6, KEY_P),
+ KEY(7, 6, KEY_UP),
+ KEY(6, 7, KEY_SELECT),
+ KEY(7, 7, KEY_DOWN),
+ KEY(0, 7, KEY_PROG1), /*MACRO 1 User defined */
+ KEY(1, 7, KEY_PROG2), /*MACRO 2 User defined */
+ KEY(2, 7, KEY_PROG3), /*MACRO 3 User defined */
+ KEY(3, 7, KEY_PROG4), /*MACRO 4 User defined */
+ 0
+};
+
+static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
+ .rows = 8,
+ .cols = 8,
+ .keymap = zoom2_twl4030_keymap,
+ .keymapsize = ARRAY_SIZE(zoom2_twl4030_keymap),
+ .rep= 1,
+};
static void __init omap_zoom2_init_irq(void)
{
omap2_init_common_hw(NULL);
@@ -38,10 +104,129 @@ static struct omap_board_config_kernel zoom2_config[]
__initdata = {
{ OMAP_TAG_UART,zoom2_uart_config },
};
+
+
+static struct regulator_consumer_supply zoom2_vmmc1_supply = {
+ .supply = vmmc,
+};
+
+static struct regulator_consumer_supply zoom2_vsim_supply = {
+ .supply = vmmc_aux,
+};
+
+static struct regulator_consumer_supply zoom2_vmmc2_supply = {
+ .supply = vmmc,
+};
+
+/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
+static struct regulator_init_data zoom2_vmmc1 = {
+ .constraints = {
+ .min_uV = 185,
+ .max_uV = 315,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
+ | REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = zoom2_vmmc1_supply,
+};
+
+/* VMMC2 for MMC2 card */
+static struct regulator_init_data zoom2_vmmc2 = {
+ .constraints = {
+ .min_uV = 185,
+ .max_uV = 185,
+ .apply_uV = true,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = zoom2_vmmc2_supply,
+};
+
+/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
+static struct regulator_init_data zoom2_vsim = {
+ .constraints = {
+ .min_uV = 180,
+ .max_uV = 300,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+
[PATCH v3 2/2] OMAP3:Zoom2: Update board defconfig
Update defconfig for Zoom2 to include TWL4030 core TWL4030 drivers (bci, gpio, keypad, usb, mmc) Also sync the defconfig after issuing a menuconfig Signed-off-by: Vikram Pandita vikram.pand...@ti.com --- arch/arm/configs/omap_zoom2_defconfig | 484 +++- 1 files changed, 408 insertions(+), 76 deletions(-) diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig index 213fe9c..f1739fa 100644 --- a/arch/arm/configs/omap_zoom2_defconfig +++ b/arch/arm/configs/omap_zoom2_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.27-rc5 -# Fri Oct 10 11:49:41 2008 +# Linux kernel version: 2.6.30-omap1 +# Fri Jun 12 17:25:46 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_SUPPORTS_AOUT=y -CONFIG_ZONE_DMA=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0x CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config @@ -39,44 +37,61 @@ CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set CONFIG_GROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_USER_SCHED=y # CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set # CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE= +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y CONFIG_EMBEDDED=y CONFIG_UID16=y # CONFIG_SYSCTL_SYSCALL is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_KALLSYMS_EXTRA_PASS=y +# CONFIG_STRIP_ASM_SYMS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y +CONFIG_AIO=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set @@ -84,19 +99,13 @@ CONFIG_SLAB=y # CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_IOREMAP_PROT is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_USE_GENERIC_SMP_HELPERS is not set CONFIG_HAVE_CLK=y -CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set @@ -104,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y CONFIG_BLOCK=y # CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -124,7 +130,7 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED=anticipatory -CONFIG_CLASSIC_RCU=y +CONFIG_FREEZER=y # # System Type @@ -134,10 +140,10 @@ CONFIG_CLASSIC_RCU=y # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_GEMINI is not set # CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set @@ -158,14 +164,17 @@ CONFIG_CLASSIC_RCU=y # CONFIG_ARCH_ORION5X is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MMP is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set CONFIG_ARCH_OMAP=y -# CONFIG_ARCH_MSM7X00A is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_W90X900 is not set # # TI OMAP Implementations @@ -174,6 +183,7 @@ CONFIG_ARCH_OMAP_OTG=y # CONFIG_ARCH_OMAP1 is not set # CONFIG_ARCH_OMAP2 is not set CONFIG_ARCH_OMAP3=y +# CONFIG_ARCH_OMAP4
RE: [PATCH 2/2] OMAP3: MMC: Add mux for pins
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Monday, June 22, 2009 8:07 AM
To: Pandita, Vikram
Cc: linux-omap@vger.kernel.org; Chikkature Rajashekar, Madhusudhan
Subject: Re: [PATCH 2/2] OMAP3: MMC: Add mux for pins
* Vikram Pandita vikram.pand...@ti.com [090616 02:39]:
For OMAP3 add MMC1 MMC2 and MMC3 pin mux
Signed-off-by: Chikkature Rajashekar madhu...@ti.com
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
---
arch/arm/mach-omap2/devices.c | 33 ++
arch/arm/mach-omap2/mux.c | 49
+
arch/arm/plat-omap/include/mach/mux.h | 28 +++
3 files changed, 110 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc35..7b87543 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,39 @@ static inline void omap2_mmc_mux(struct
omap_mmc_platform_data
*mmc_controller,
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
}
}
+
+if (cpu_is_omap3430()) {
+if (controller_nr == 0 (!mmc_controller-slots[0].nomux)) {
+omap_cfg_reg(N28_3430_MMC1_CLK);
+omap_cfg_reg(M27_3430_MMC1_CMD);
+omap_cfg_reg(N27_3430_MMC1_DAT0);
+omap_cfg_reg(N26_3430_MMC1_DAT1);
+omap_cfg_reg(N25_3430_MMC1_DAT2);
+omap_cfg_reg(P28_3430_MMC1_DAT3);
+omap_cfg_reg(P27_3430_MMC1_DAT4);
+omap_cfg_reg(P26_3430_MMC1_DAT5);
+omap_cfg_reg(R27_3430_MMC1_DAT6);
+omap_cfg_reg(R25_3430_MMC1_DAT7);
+}
+if (controller_nr == 1 (!mmc_controller-slots[0].nomux)) {
+/* MMC2 */
+omap_cfg_reg(AE2_3430_MMC2_CLK);
+omap_cfg_reg(AG5_3430_MMC2_CMD);
+omap_cfg_reg(AH5_3430_MMC2_DAT0);
+omap_cfg_reg(AH4_3430_MMC2_DAT1);
+omap_cfg_reg(AG4_3430_MMC2_DAT2);
+omap_cfg_reg(AF4_3430_MMC2_DAT3);
+}
+if (controller_nr == 2 (!mmc_controller-slots[0].nomux)) {
+/* MMC3 */
+omap_cfg_reg(AF10_3430_MMC3_CLK);
+omap_cfg_reg(AC3_3430_MMC3_CMD);
+omap_cfg_reg(AE11_3430_MMC3_DAT0);
+omap_cfg_reg(AH9_3430_MMC3_DAT1);
+omap_cfg_reg(AF13_3430_MMC3_DAT2);
+omap_cfg_reg(AF13_3430_MMC3_DAT3);
+}
+}
}
Just for reference, I'll summarize what we've discussed in the other related
thread:
- Since we support muxing by both the bootloader and kernel,
adding nomux flag is dangerous
- We can only mux the pins that don't have alternative outputs
Posting v2 of patch with these MMC mux changes.
I had posted the same on 6/18 but somehow it did not make it to patchworks.
So posting again.
Regards,
Tony
void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 026c4fc..d49b9a7 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -486,6 +486,55 @@ MUX_CFG_34XX(H19_34XX_GPIO164_OUT, 0x19c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX(J25_34XX_GPIO170, 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+/* MMC1 */
+MUX_CFG_34XX(N28_3430_MMC1_CLK, 0x144,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(M27_3430_MMC1_CMD, 0x146,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N27_3430_MMC1_DAT0, 0x148,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N26_3430_MMC1_DAT1, 0x14a,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(N25_3430_MMC1_DAT2, 0x14c,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P28_3430_MMC1_DAT3, 0x14e,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P27_3430_MMC1_DAT4, 0x150,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(P26_3430_MMC1_DAT5, 0x152,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R27_3430_MMC1_DAT6, 0x154,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(R25_3430_MMC1_DAT7, 0x156,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC2 */
+MUX_CFG_34XX(AE2_3430_MMC2_CLK, 0x158,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AG5_3430_MMC2_CMD, 0x15A,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH5_3430_MMC2_DAT0, 0x15c,
+OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX(AH4_3430_MMC2_DAT1,
[PATCH] [RFC][OMAP3:I2C]Workaround for OMAP3430 I2C silicon errata 1.153
This patch includes the workarround for I2C Errata 1.153: When an XRDY/XDR is
hit, wait for XUDF before writing data to DATA_REG
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
Signed-off by: Nishant Kamat nska...@ti.com
Signed-off-by: Moiz Sonasathm-sonas...@ti.com
---
drivers/i2c/busses/i2c-omap.c | 54 +---
1 files changed, 50 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..e84836b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -632,6 +632,37 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id)
#define omap_i2c_rev1_isr NULL
#endif
+/* I2C Errata 1.153:
+ * When an XRDY/XDR is hit, wait for XUDF before writing data to DATA_REG.
+ * Otherwise some data bytes can be lost while transferring them from the
+ * memory to the I2C interface.
+ */
+
+static int omap_i2c_wait_for_xudf(struct omap_i2c_dev *dev)
+{
+ u16 xudf;
+ int counter = 500;
+
+ /* We are in interrupt context. Wait for XUDF for max 7 msec */
+ xudf = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ while (!(xudf OMAP_I2C_STAT_XUDF) counter--) {
+ if (xudf (OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_NACK |
+ OMAP_I2C_STAT_AL))
+ return -EINVAL;
+ udelay(10);
+ xudf = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ }
+
+ if (!counter) {
+ /* Clear Tx FIFO */
+ omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG,
+ OMAP_I2C_BUF_TXFIF_CLR);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
static irqreturn_t
omap_i2c_isr(int this_irq, void *dev_id)
{
@@ -639,6 +670,7 @@ omap_i2c_isr(int this_irq, void *dev_id)
u16 bits;
u16 stat, w;
int err, count = 0;
+ int error;
if (dev-idle)
return IRQ_NONE;
@@ -647,7 +679,7 @@ omap_i2c_isr(int this_irq, void *dev_id)
while ((stat = (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG))) bits) {
dev_dbg(dev-dev, IRQ (ISR = 0x%04x)\n, stat);
if (count++ == 100) {
- dev_warn(dev-dev, Too much work in one IRQ\n);
+ dev_dbg(dev-dev, Too much work in one IRQ\n);
break;
}
@@ -715,11 +747,22 @@ omap_i2c_isr(int this_irq, void *dev_id)
OMAP_I2C_BUFSTAT_REG);
}
while (num_bytes) {
- num_bytes--;
w = 0;
if (dev-buf_len) {
+ if (cpu_is_omap34xx()) {
+ /* OMAP3430 Errata 1.153 */
+ error =
omap_i2c_wait_for_xudf(dev);
+ if (error) {
+ omap_i2c_ack_stat(dev,
stat
+
(OMAP_I2C_STAT_XRDY |
+
OMAP_I2C_STAT_XDR));
+ dev_err(dev-dev,
Transmit error\n);
+
omap_i2c_complete_cmd(dev, OMAP_I2C_STAT_XUDF);
+
+ return IRQ_HANDLED;
+ }
+ }
w = *dev-buf++;
- dev-buf_len--;
/* Data reg from 2430 is 8 bit wide */
if (!cpu_is_omap2430()
!cpu_is_omap34xx()) {
@@ -728,6 +771,10 @@ omap_i2c_isr(int this_irq, void *dev_id)
dev-buf_len--;
}
}
+ omap_i2c_write_reg(dev,
+ OMAP_I2C_DATA_REG, w);
+ num_bytes--;
+ dev-buf_len--;
} else {
if (stat OMAP_I2C_STAT_XRDY)
dev_err(dev-dev,
@@ -739,7 +786,6 @@ omap_i2c_isr(int this_irq, void *dev_id)
data to send\n);
break;
}
- omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w);
}
Re: OMAP34XXCAM: Micron mt9d111 sensor support?
Aguirre Rodriguez, Sergio Alberto wrote: -Original Message- From: linux-media-ow...@vger.kernel.org [mailto:linux-media- ow...@vger.kernel.org] On Behalf Of Zach LeRoy Sent: Wednesday, June 17, 2009 5:06 PM To: linux-omap; linux-me...@vger.kernel.org Subject: OMAP34XXCAM: Micron mt9d111 sensor support? I am working on adding support for a micron 2 MP sensor: mt9d111 on a gumsitx overo. This is a i2c-controlled sensor. Ideally, I would like to use the omap34xxcam driver to interface with this sensor. I am wondering if there are currently any distributions which already include support for this sensor through the omap34xxcam driver, or if anyone else is interested in this topic. Hi Zach, I'm working along with Sakari Ailus and others in this omap34xxcam driver you're talking about, and we are in the process to provide a newer patchset to work on the latest l-o tree. Sakari is sharing the camera core here: http://gitorious.org/omap3camera And I have also this repository which contains a snapshot of Sakari's tree + support from some sensors I have available for the 3430SDP and LDP (the name could confuse with the above, but I'll change the name/location soon): http://gitorious.org/omap3-linux-camera-driver Testing the driver with as much sensors as we can is very interesting (at least for me), because that help us spot possible bugs that aren't seen with our current HW. So, I'll be looking forward if you add this sensor driver to the supported list :) I'd like to move forward using this on OMAP/3530 with TVP5150 (S-video in) Sadly, the tree above (omap3-linux-camera-driver) won't build for the Zoom/LDP: CC arch/arm/mach-omap2/board-ldp-camera.o /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:59: error: implicit declaration of function 'PAGE_ALIGN' /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:59: error: initializer element is not constant /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:59: error: (near initialization for 'ov3640_hwc.capture_mem') /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c: In function 'ov3640_sensor_set_prv_data': /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:89: error: 'hwc' undeclared (first use in this function) /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:89: error: (Each undeclared identifier is reported only once /local/omap3-linux-camera-driver/arch/arm/mach-omap2/board-ldp-camera.c:89: error: for each function it appears in.) Looking at the code, it seems that some pieces are missing - merge problem maybe? -- Gary Thomas | Consulting for the MLB Associates |Embedded world -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] omapfb: invalid test on unsigned
Unsigned regno cannot be less than 0.
Signed-off-by: Roel Kluin roel.kl...@gmail.com
---
Is this correct? please review.
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 060d72f..787271f 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -276,7 +276,7 @@ static int _setcolreg(struct fb_info *info, u_int regno,
u_int red, u_int green,
if (r != 0)
break;
- if (regno 0) {
+ if (regno = info-cmap.len) {
r = -EINVAL;
break;
}
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Re: [PULL REQUEST] omapfb: Add support for new LCDs / misc fixes
Krzysztof, On Wed, Jun 17, 2009 at 12:25:20PM +0200, Deak Imre (Nokia-D/Helsinki) wrote: On Tue, Jun 16, 2009 at 06:58:25PM +0200, ext Krzysztof Helt wrote: On Thu, 11 Jun 2009 15:02:06 +0300 Imre Deak imre.d...@nokia.com wrote: Hi, the following pull request is for the patchset updated based on your comments: The following changes since commit 07a2039b8eb0af4ff464efd3dfd95de5c02648c6: Linus Torvalds (1): Linux 2.6.30 are available in the git repository at: git://koowaldah.org/people/imre/linux-2.6-fb master Daniel Stone (1): omapfb: dispc: Allow multiple external IRQ handlers Hunyue Yau (1): omapfb: Add support for the 2430SDP LCD Imre Deak (5): omapfb: Add support for MIPI-DCS compatible LCDs N770: Enable LCD MIPI-DCS in Kconfig omapfb: dispc: Various typo fixes omapfb: Add FB manual update option to Kconfig omapfb: HWA742: fix pointer to be const Jonathan McDowell (1): omapfb: Add support for the Amstrad Delta LCD Jouni Hogander (2): omapfb: dispc: Disable iface clocks along with func clocks omapfb: dispc: Enable wake up capability Jouni Högander (1): omapfb: suspend/resume only if FB device is already initialized Kevin Hilman (1): omapfb: Add support for the 3430SDP LCD Koen Kooi (1): omapfb: Add support for the OMAP3 Beagle DVI output Kyungmin Park (1): omapfb: Add support for the Apollon LCD Rodrigo Vivi (1): omapfb: Add support for rotation on the Blizzard LCD ctrl Stanley.Miao (1): omapfb: Add support for the ZOOM MDK LCD Steve Sakoman (2): omapfb: Add support for the OMAP3 EVM LCD omapfb: Add support for the Gumstix Overo LCD arun c (2): omapfb: Add support for the OMAP2EVM LCD omapfb: Fix coding style / remove dead line arch/arm/configs/n770_defconfig |2 +- arch/arm/configs/omap3_beagle_defconfig | 47 ++- arch/arm/configs/omap_3430sdp_defconfig | 39 ++- arch/arm/configs/omap_ldp_defconfig | 54 +++- arch/arm/plat-omap/include/mach/lcd_mipid.h |5 + arch/arm/plat-omap/include/mach/omapfb.h|4 +- drivers/video/omap/Kconfig | 82 +++- drivers/video/omap/Makefile | 12 + drivers/video/omap/blizzard.c | 91 - drivers/video/omap/dispc.c | 130 --- drivers/video/omap/dispc.h |7 +- drivers/video/omap/hwa742.c |2 +- drivers/video/omap/lcd_2430sdp.c| 200 + drivers/video/omap/lcd_ams_delta.c | 137 ++ drivers/video/omap/lcd_apollon.c| 138 ++ drivers/video/omap/lcd_ldp.c| 200 + drivers/video/omap/lcd_mipid.c | 625 +++ drivers/video/omap/lcd_omap2evm.c | 189 drivers/video/omap/lcd_omap3beagle.c| 133 ++ drivers/video/omap/lcd_omap3evm.c | 191 drivers/video/omap/lcd_overo.c | 179 drivers/video/omap/omapfb_main.c| 64 ++- drivers/video/omap/rfbi.c |7 +- 23 files changed, 2424 insertions(+), 114 deletions(-) create mode 100644 drivers/video/omap/lcd_2430sdp.c create mode 100644 drivers/video/omap/lcd_ams_delta.c create mode 100644 drivers/video/omap/lcd_apollon.c create mode 100644 drivers/video/omap/lcd_ldp.c create mode 100644 drivers/video/omap/lcd_mipid.c create mode 100644 drivers/video/omap/lcd_omap2evm.c create mode 100644 drivers/video/omap/lcd_omap3beagle.c create mode 100644 drivers/video/omap/lcd_omap3evm.c create mode 100644 drivers/video/omap/lcd_overo.c I assume you introduced small changes after my review. For the whole patchset: Acked-by: Krzysztof Helt krzysztof...@wp.pl Yes, I've updated the patchset based on our discussion. I've also added your acked-by line. I can't see this merged yet to Linus' tree. When are you planning to submit it? --Imre -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [Linux-fbdev-devel] [PATCH] omapfb: invalid test on unsigned
On Mon, 22 Jun 2009 22:35:59 +0200
Roel Kluin roel.kl...@gmail.com wrote:
Unsigned regno cannot be less than 0.
Signed-off-by: Roel Kluin roel.kl...@gmail.com
---
Is this correct? please review.
No. It is a case for truecolor modes. They do not use the cmap.
Either remove the if clause completely or make it a an else clause for the next
if
if (regno 16) {
...
} else {
r = -EINVAL;
}
The latter (the else clause) is a better solution.
Kind regards,
Krzysztof
diff --git a/drivers/video/omap/omapfb_main.c
b/drivers/video/omap/omapfb_main.c
index 060d72f..787271f 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -276,7 +276,7 @@ static int _setcolreg(struct fb_info *info, u_int regno,
u_int red, u_int green,
if (r != 0)
break;
- if (regno 0) {
+ if (regno = info-cmap.len) {
r = -EINVAL;
break;
}
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[PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+ /* 3430 I2C Errata 1.15
+* RDR could be set when the bus is busy, then
+* ignore the interrupt, and clear the bit.
+*/
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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RE: [PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Ulrik Bech Hald
Sent: Monday, June 22, 2009 3:25 PM
To: linux-omap@vger.kernel.org
Cc: Hald, Ulrik Bech
Subject: [PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+ /* 3430 I2C Errata 1.15
+ * RDR could be set when the bus is busy, then
+ * ignore the interrupt, and clear the bit.
+ */
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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RE: [PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Sorry about that Jagadeesh, your name should definitely be in there. I was too
quick on the send trigger :(
BR
Ulrik Bech Hald
-Original Message-
From: Pakaravoor, Jagadeesh
Sent: Monday, June 22, 2009 3:23 PM
To: Hald, Ulrik Bech; linux-omap@vger.kernel.org
Cc: Hald, Ulrik Bech
Subject: RE: [PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR
event
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Ulrik Bech Hald
Sent: Monday, June 22, 2009 3:25 PM
To: linux-omap@vger.kernel.org
Cc: Hald, Ulrik Bech
Subject: [PATCH 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-
omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+ /* 3430 I2C Errata 1.15
+* RDR could be set when the bus is busy, then
+* ignore the interrupt, and clear the bit.
+*/
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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[PATCH v2 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+ /* 3430 I2C Errata 1.15
+* RDR could be set when the bus is busy, then
+* ignore the interrupt, and clear the bit.
+*/
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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Re: [PATCH v2 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Ulrik Bech Hald u...@ti.com writes:
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
Minor CodingStyle comments below...
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
But the local variable define here, followed by a blank line, and
the assignment to zero is unnecessary.
+ /* 3430 I2C Errata 1.15
+ * RDR could be set when the bus is busy, then
+ * ignore the interrupt, and clear the bit.
+ */
Move the '*/' to the end of the previous line.
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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Re: [PATCH v4 1/2] watchdog:OMAP3:Register IVA and SECURE WDT, make clks accessible
Ulrik Bech Hald u...@ti.com writes:
Enabling registration of IVA and SECURE WDT devices. Making
ick and fck for IVA and SECURE WDTs accessible.
Tested on Zoom1 OMAP3 platform
Signed-off-by: Ulrik Bech Hald u...@ti.com
One more change still needed... You should start the platform_device
numbering at zero, not one.
Kevin
---
arch/arm/mach-omap1/clock.c |6 +-
arch/arm/mach-omap2/clock24xx.c |4 +-
arch/arm/mach-omap2/clock34xx.c | 12 +++---
arch/arm/plat-omap/devices.c| 91
---
4 files changed, 86 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 436eed2..c0b5849 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -85,9 +85,9 @@ static struct omap_clk omap_clks[] = {
CLK(NULL, arm_gpio_ck, arm_gpio_ck, CK_1510 | CK_310),
CLK(NULL, armxor_ck,armxor_ck.clk, CK_16XX | CK_1510 |
CK_310),
CLK(NULL, armtim_ck,armtim_ck.clk, CK_16XX | CK_1510 |
CK_310),
- CLK(omap_wdt, fck, armwdt_ck.clk, CK_16XX | CK_1510 |
CK_310),
- CLK(omap_wdt, ick, armper_ck.clk, CK_16XX),
- CLK(omap_wdt, ick, dummy_ck, CK_1510 | CK_310),
+ CLK(omap_wdt.2, fck,armwdt_ck.clk, CK_16XX | CK_1510 |
CK_310),
+ CLK(omap_wdt.2, ick,armper_ck.clk, CK_16XX),
+ CLK(omap_wdt.2, ick,dummy_ck, CK_1510 | CK_310),
CLK(NULL, arminth_ck, arminth_ck1510, CK_1510 | CK_310),
CLK(NULL, arminth_ck, arminth_ck16xx, CK_16XX),
/* CK_GEN2 clocks */
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 44de027..4fe3def
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -165,8 +165,8 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, uart3_fck,uart3_fck, CK_243X | CK_242X),
CLK(NULL, gpios_ick,gpios_ick, CK_243X | CK_242X),
CLK(NULL, gpios_fck,gpios_fck, CK_243X | CK_242X),
- CLK(omap_wdt, ick, mpu_wdt_ick, CK_243X | CK_242X),
- CLK(omap_wdt, fck, mpu_wdt_fck, CK_243X | CK_242X),
+ CLK(omap_wdt.2, ick,mpu_wdt_ick, CK_243X | CK_242X),
+ CLK(omap_wdt.2, fck,mpu_wdt_fck, CK_243X | CK_242X),
CLK(NULL, sync_32k_ick, sync_32k_ick, CK_243X | CK_242X),
CLK(NULL, wdt1_ick, wdt1_ick, CK_243X | CK_242X),
CLK(NULL, omapctrl_ick, omapctrl_ick, CK_243X | CK_242X),
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 045da92..a4613e5 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -215,11 +215,11 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, gpt1_fck, gpt1_fck, CK_343X),
CLK(NULL, wkup_32k_fck, wkup_32k_fck, CK_343X),
CLK(NULL, gpio1_dbck, gpio1_dbck,CK_343X),
- CLK(omap_wdt, fck, wdt2_fck, CK_343X),
+ CLK(omap_wdt.2, fck,wdt2_fck, CK_343X),
CLK(NULL, wkup_l4_ick, wkup_l4_ick, CK_343X),
CLK(NULL, usim_ick, usim_ick, CK_3430ES2),
- CLK(omap_wdt, ick, wdt2_ick, CK_343X),
- CLK(NULL, wdt1_ick, wdt1_ick, CK_343X),
+ CLK(omap_wdt.2, ick,wdt2_ick, CK_343X),
+ CLK(omap_wdt.1, ick,wdt1_ick, CK_343X),
CLK(NULL, gpio1_ick,gpio1_ick, CK_343X),
CLK(NULL, omap_32ksync_ick, omap_32ksync_ick, CK_343X),
CLK(NULL, gpt12_ick,gpt12_ick, CK_343X),
@@ -241,14 +241,14 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, gpio4_dbck, gpio4_dbck,CK_343X),
CLK(NULL, gpio3_dbck, gpio3_dbck,CK_343X),
CLK(NULL, gpio2_dbck, gpio2_dbck,CK_343X),
- CLK(NULL, wdt3_fck, wdt3_fck, CK_343X),
+ CLK(omap_wdt.3, fck,wdt3_fck, CK_343X),
CLK(NULL, per_l4_ick, per_l4_ick,CK_343X),
CLK(NULL, gpio6_ick,gpio6_ick, CK_343X),
CLK(NULL, gpio5_ick,gpio5_ick, CK_343X),
CLK(NULL, gpio4_ick,gpio4_ick, CK_343X),
CLK(NULL, gpio3_ick,gpio3_ick, CK_343X),
CLK(NULL, gpio2_ick,gpio2_ick, CK_343X),
- CLK(NULL, wdt3_ick, wdt3_ick, CK_343X),
+ CLK(omap_wdt.3, ick,wdt3_ick, CK_343X),
CLK(NULL, uart3_ick,uart3_ick, CK_343X),
CLK(NULL, gpt9_ick, gpt9_ick, CK_343X),
CLK(NULL, gpt8_ick, gpt8_ick, CK_343X),
@@ -275,7 +275,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, sr_l4_ick,sr_l4_ick, CK_343X),
CLK(NULL, secure_32k_fck, secure_32k_fck, CK_343X),
Re: [PATCH v4 2/2] watchdog:OMAP3:Enable support for IVA2 and SECURE
Ulrik Bech Hald u...@ti.com writes:
This patch adds support for IVA2 and SECURE WDTs in the omap_wdt
driver for omap34xx family. SECURE will be available as
/dev/watchdog_secure on HS/EMU devices and IVA2 will be available
as /dev/watchdog_iva2. MPU will still be available as /dev/watchdog
Tested on Zoom1 OMAP3 platform
Signed-off-by: Ulrik Bech Hald u...@ti.com
As I said in previous version of this patch, pdev-id numbering should
begin a zero, so all the 'pdev-id - 1' usages can be pdev-id.
Kevin
---
runtime: [PATCH 1/1] watchdog: OMAP fixes: enable clock in probe, trigger
timer reload
drivers/watchdog/omap_wdt.c | 34 ++
1 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index f271385..ab9bd88
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -47,7 +47,9 @@
#include omap_wdt.h
-static struct platform_device *omap_wdt_dev;
+#define NUM_WDTS 3
+
+static struct platform_device *omap_wdt_dev[NUM_WDTS];
static unsigned timer_margin;
module_param(timer_margin, uint, 0);
@@ -139,8 +141,23 @@ static void omap_wdt_set_timeout(struct omap_wdt_dev
*wdev)
*/
static int omap_wdt_open(struct inode *inode, struct file *file)
{
- struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
- void __iomem *base = wdev-base;
+ struct omap_wdt_dev *wdev = NULL;
+ void __iomem *base;
+
+ /* Find match between device node and wdt device */
+ int i;
+ for (i = 0; i NUM_WDTS; i++) {
+ if (omap_wdt_dev[i]) {
+ wdev = platform_get_drvdata(omap_wdt_dev[i]);
+ if (iminor(inode) == wdev-omap_wdt_miscdev.minor)
+ break;
+ }
+ }
+
+ if (!wdev)
+ return -ENODEV;
+
+ base = wdev-base;
if (test_and_set_bit(1, (unsigned long *)(wdev-omap_wdt_users)))
return -EBUSY;
@@ -271,7 +288,7 @@ static int __devinit omap_wdt_probe(struct
platform_device *pdev)
goto err_get_resource;
}
- if (omap_wdt_dev) {
+ if (omap_wdt_dev[pdev-id-1]) {
ret = -EBUSY;
goto err_busy;
}
@@ -317,9 +334,9 @@ static int __devinit omap_wdt_probe(struct
platform_device *pdev)
omap_wdt_adjust_timeout(timer_margin);
wdev-omap_wdt_miscdev.parent = pdev-dev;
- wdev-omap_wdt_miscdev.minor = WATCHDOG_MINOR;
- wdev-omap_wdt_miscdev.name = watchdog;
+ wdev-omap_wdt_miscdev.minor = MISC_DYNAMIC_MINOR;
wdev-omap_wdt_miscdev.fops = omap_wdt_fops;
+ wdev-omap_wdt_miscdev.name = (char *) pdev-dev.platform_data;
ret = misc_register((wdev-omap_wdt_miscdev));
if (ret)
@@ -332,7 +349,8 @@ static int __devinit omap_wdt_probe(struct
platform_device *pdev)
/* autogate OCP interface clock */
__raw_writel(0x01, wdev-base + OMAP_WATCHDOG_SYS_CONFIG);
- omap_wdt_dev = pdev;
+ /* keep track of the wdt platform devices in local device array */
+ omap_wdt_dev[pdev-id - 1] = pdev;
return 0;
@@ -384,7 +402,7 @@ static int __devexit omap_wdt_remove(struct
platform_device *pdev)
iounmap(wdev-base);
kfree(wdev);
- omap_wdt_dev = NULL;
+ omap_wdt_dev[pdev-id-1] = NULL;
return 0;
}
--
1.5.4.3
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[PATCH v2] OMAP2: Zoom2: Pass irqflags to 8250 driver
Pass irqflags to 8250 driver from zoom2 board file
Zoom2 has IRQF_TRIGGER_RISING requirement for the 8250 GPIO irq
This patch is dependent on 8250 driver changes getting accepted upstream:
Refer: http://patchwork.kernel.org/patch/31884/
Signed-off-by: Vikram Pandita vikram.pand...@ti.com
---
Warning:
could cause compilation break if 8250 patch is not integrated first
arch/arm/mach-omap2/board-zoom-debugboard.c |2 ++
arch/arm/mach-omap2/serial.c|2 +-
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c
b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bac5c43..f546063 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -12,6 +12,7 @@
#include linux/gpio.h
#include linux/serial_8250.h
#include linux/smsc911x.h
+#include linux/interrupt.h
#include mach/gpmc.h
@@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
.mapbase= 0x1000,
.irq= OMAP_GPIO_IRQ(102),
.flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
+ .irqflags = IRQF_SHARED | IRQF_TRIGGER_RISING,
.iotype = UPIO_MEM,
.regshift = 1,
.uartclk= QUART_CLK,
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index b094c15..45d4884 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -429,7 +429,7 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
omap_ctrl_writew(v, uart-padconf);
}
- p-flags |= UPF_SHARE_IRQ;
+ p-irqflags |= IRQF_SHARED;
ret = request_irq(p-irq, omap_uart_interrupt, IRQF_SHARED,
serial idle, (void *)uart);
WARN_ON(ret);
--
1.6.0.3.613.g9f8f13
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Re: [PATCH][RFC] OMAP3: PM: Prevent hang in prcm_interrupt_handler
Jon Hunter jon-hun...@ti.com writes:
From: Jon Hunter jon-hun...@ti.com
There are two scenarios where a race condition could result in a hang in the
prcm_interrupt handler. These are:
IIRC, the RX51 tree has a workaround for some hangs seen in this
interrupt handler as well, so this has definitely been seen. The fix
there though was just to no loop, I think your fix is more thorough
and fixes the root cause. Thanks.
No comments on the funtional changes, but a couple
cosmetic/documentation changes.
1) Would it be possible to summarize the requirements in the function
itself as part of this patch.
2) With the extra indentation, this function is getting too indented.
Looking closer, an abstraction of the 'enable clocks, poll PM_WKST,
disable clocks loop' could be done an called with the various modules
and offsets. I've attached a hack/patch below to show what I mean.
You could just fold this into your patch.
Kevin
1). Waiting for PRM_IRQSTATUS_MPU register to clear.
Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event is
pending for the MPU. This bit can only be cleared if the all the wake-up
events
latched in the various PM_WKST_x registers have been cleared. If a wake-up
event
occurred during the processing of the prcm interrupt handler, after the
corresponding PM_WKST_x register was checked but before the PRM_IRQSTATUS_MPU
was cleared, then the CPU would be stuck forever waiting for bit 0 in
PRM_IRQSTATUS_MPU to be cleared.
2). Waiting for the PM_WKST_x register to clear.
Some power domains have more than one wake-up source. The PM_WKST_x registers
indicate the source of a wake-up event and need to be cleared after a wake-up
event occurs. When the PM_WKST_x registers are read and before they are
cleared,
it is possible that another wake-up event could occur causing another bit to
be
set in one of the PM_WKST_x registers. If this did occur after reading a
PM_WKST_x register then the CPU would miss this event and get stuck forever in
a loop waiting for that PM_WKST_x register to clear.
This patch address the above race conditions that would result in a hang.
Signed-off-by: Jon Hunter jon-hun...@ti.com
commit 6b95e05225d5f4fa9aaf8400f5b6dd056fd8ce91
Author: Kevin Hilman khil...@deeprootsystems.com
Date: Mon Jun 22 16:17:57 2009 -0700
temp: merge into PRCM interrupt fix
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0545262..708816c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -194,109 +194,40 @@ static void omap3_save_secure_ram_context(u32
target_mpu_state)
}
}
+static void prcm_clear_mod_irqs(s16 module, u16 wkst_off,
+ u16 iclk_off, u16 fclk_off) {
+ u32 wkst, fclk, iclk;
+
+ wkst = prm_read_mod_reg(module, wkst_off);
+ if (wkst) {
+ iclk = cm_read_mod_reg(module, iclk_off);
+ fclk = cm_read_mod_reg(module, fclk_off);
+ while (wkst) {
+ cm_set_mod_reg_bits(wkst, module, iclk_off);
+ cm_set_mod_reg_bits(wkst, module, fclk_off);
+ prm_write_mod_reg(wkst, module, wkst_off);
+ wkst = prm_read_mod_reg(module, wkst_off);
+ }
+ cm_write_mod_reg(iclk, module, iclk_off);
+ cm_write_mod_reg(fclk, module, fclk_off);
+ }
+}
+
/* PRCM Interrupt Handler for wakeups */
static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
{
- u32 wkst, irqstatus_mpu;
- u32 fclk, iclk;
+ u32 irqstatus_mpu;
do {
- /* WKUP */
- wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST);
- if (wkst) {
- iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
- fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
- while (wkst) {
- cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN);
- cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN);
- prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST);
- wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST);
- }
- cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN);
- cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN);
- }
-
- /* CORE */
- wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1);
- if (wkst) {
- iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
- fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
- while (wkst) {
- cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1);
- cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1);
- prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1);
-
Re: [PATCH v2 1/1] i2c:OMAP3:Errata workaround for spurious RDR event
Hello Ulrik, Jagadeesh,
On Mon, 22 Jun 2009, Ulrik Bech Hald wrote:
Under certain rare conditions, I2C_STAT[13].RDR bit may be set,
and the corresponding interrupt fire, even when there is no
data in the receive FIFO, or the I2C data transfer is still
ongoing. These spurious RDR events must be ignored by the
software.
A check for OMAP_I2C_STAT_BB is introduced in the ISR to
prevent further processing of RDR interrupt, if the bus is busy.
Signed-off-by: Ulrik Bech Hald u...@ti.com
Signed-off-by: Jagadeesh Bhaskar Pakaravoor j-pakarav...@ti.com
---
drivers/i2c/busses/i2c-omap.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ece0125..88feea1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -668,6 +668,15 @@ omap_i2c_isr(int this_irq, void *dev_id)
omap_i2c_complete_cmd(dev, err);
if (stat (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+ /* 3430 I2C Errata 1.15
+ * RDR could be set when the bus is busy, then
+ * ignore the interrupt, and clear the bit.
+ */
+ u8 stat2 = 0;
+ stat2 = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+ if (stat2 OMAP_I2C_STAT_BB)
+ return IRQ_HANDLED;
Why use stat2? Why not just test stat again?
+
if (dev-fifo_size) {
if (stat OMAP_I2C_STAT_RRDY)
num_bytes = dev-fifo_size;
--
1.5.4.3
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- Paul
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RE: [PATCH] [RFC][OMAP3:I2C]Workaround for OMAP3430 I2C silicon errata 1.153
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Sonasath, Moiz Sent: Monday, June 22, 2009 7:50 PM To: linux-omap@vger.kernel.org Cc: Pandita, Vikram Subject: [PATCH] [RFC][OMAP3:I2C]Workaround for OMAP3430 I2C silicon errata 1.153 This patch includes the workarround for I2C Errata 1.153: When an XRDY/XDR is hit, wait for XUDF before writing data to DATA_REG Is this workaround valid for omap2430 also? Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
