Re: Issue in oamp nand driver with 32-bit reads in prefetch mode
On Thu, 2009-12-31 at 17:50 +0530, Vimal Singh wrote:
There is a bug in nand prefetch read routine, which comes into effect
only if nand device is a 16-bit device (as we have in zoom boards).
This bug is effective only with below combination of conditions:
1. nand deivce, in use, is a 16 bit device
2. nand driver supports 'subpage' read
3. SW ECC is in use
This was not seen old kernel (ex: .23), because when, in early days,
we tested this (nand prefetch read in LDP boards) there was no
'subpage read' support.
Later when we had subpage read in (.27) kernel, we had hw ecc enabled
always in our internal tree. So, we missed this bug.
Here is a patch to fix this issue:
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 1bb799f..75004fe 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -295,11 +295,14 @@ static void omap_read_buf_pref(struct
u32 *p = (u32 *)buf;
/* take care of subpage reads */
- for (; len % 4 != 0; ) {
- *buf++ = __raw_readb(info-nand.IO_ADDR_R);
- len--;
+ if (len % 4) {
+ if (info-nand.options NAND_BUSWIDTH_16)
+ omap_read_buf16(mtd, buf, len % 4);
+ else
+ omap_read_buf8(mtd, buf, len % 4);
+ p = (u32 *) (buf + len % 4);
+ len -= len % 4;
}
- p = (u32 *) buf;
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info-gpmc_cs, 0x0, len, 0x0);
Pushed this patch to my l2-mtd-2.6.git/dunno.
--
Best Regards,
Artem Bityutskiy (Артём Битюцкий)
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Re: [PATCH] omap2/3: mtd: fix compile warning
On Tue, 2009-12-29 at 16:04 +0530, Sanjeev Premi wrote: This patch fixes following compile warning: drivers/mtd/nand/omap2.c:508: warning: passing argumen t 2 of 'omap_nand_dma_transfer' discards qualifiers fr om pointer target type Signed-off-by: Sanjeev Premi pr...@ti.com --- drivers/mtd/nand/omap2.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 1bb799f..08c193c 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -505,7 +505,7 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd, omap_write_buf_pref(mtd, buf, len); else /* start transfer in DMA mode */ - omap_nand_dma_transfer(mtd, buf, len, 0x1); + omap_nand_dma_transfer(mtd, (void *)buf, len, 0x1); } Pushed this patch to my l2-mtd-2.6/dunno tree. -- Best Regards, Artem Bityutskiy (Артём Битюцкий) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/12] omap: McBSP: Fix possible port lockout
Friday 08 January 2010 18:14:06 Sergei Shtylyov napisał(a): Tony Lindgren wrote: From: Janusz Krzysztofik jkrzy...@tis.icnet.pl In its current form, the omap_mcbsp_request() function can return after irq_request() failure without any cleanups, effectively locking out the port forever with clocks left running. Fix it. Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl Acked-by: Jarkko Nikula jhnik...@gmail.com Acked-by: Peter Ujfalusi peter.ujfal...@nokia.com Signed-off-by: Tony Lindgren t...@atomide.com [...] diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 2cc1cc3..f757672 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id) dev_err(mcbsp-dev, Unable to request TX IRQ %d for McBSP%d\n, mcbsp-tx_irq, mcbsp-id); - return err; + goto error; } init_completion(mcbsp-rx_irq_completion); @@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id) dev_err(mcbsp-dev, Unable to request RX IRQ %d for McBSP%d\n, mcbsp-rx_irq, mcbsp-id); - free_irq(mcbsp-tx_irq, (void *)mcbsp); - return err; + goto tx_irq; } } return 0; +tx_irq: As if this wasn't a label for error cleanup, i.e. labels could be named more consistently, both including 'err' or 'error'... + free_irq(mcbsp-tx_irq, (void *)mcbsp); +error: + if (mcbsp-pdata mcbsp-pdata-ops mcbsp-pdata-ops-free) + mcbsp-pdata-ops-free(id); This line is overindented. Sergei, Thanks for pointing these out. Tony, Since you have already sent a pull request covering this patch, I propose I will address both issues soon when I revisit the source while further modifying this function for McBSP register cache support, OK? Thanks, Janusz -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Remove unnecessarily .init initializers from OMAP3 clocks
The first thing that omap2_init_clksel_parent() does is check for
a non-zero .clksel field in the struct clk. Therefore, it is
pointless calling this function on clocks where the clksel field
is unset.
Remove init calls to omap2_init_clksel_parent() on clocks without
a clksel field.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
The changes in this patch were script generated. Script will follow
with other changes shortly.
arch/arm/mach-omap2/clock34xx_data.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx_data.c
b/arch/arm/mach-omap2/clock34xx_data.c
index 8bdcc9c..08f6e10 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = {
.name = dpll4_m3x2_ck,
.ops= clkops_omap2_dflt_wait,
.parent = dpll4_m3_ck,
- .init = omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_TV_SHIFT,
.flags = INVERT_ENABLE,
@@ -809,7 +808,6 @@ static struct clk dpll4_m6x2_ck = {
.name = dpll4_m6x2_ck,
.ops= clkops_omap2_dflt_wait,
.parent = dpll4_m6_ck,
- .init = omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT,
.flags = INVERT_ENABLE,
@@ -1045,7 +1043,6 @@ static struct clk iva2_ck = {
.name = iva2_ck,
.ops= clkops_omap2_dflt_wait,
.parent = dpll2_m2_ck,
- .init = omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
.clkdm_name = iva2_clkdm,
@@ -1119,7 +1116,6 @@ static struct clk gfx_l3_ck = {
.name = gfx_l3_ck,
.ops= clkops_omap2_dflt_wait,
.parent = l3_ick,
- .init = omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
.enable_bit = OMAP_EN_GFX_SHIFT,
.recalc = followparent_recalc,
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RE: [PATCH] OMAP: Exporting functions doing common register access
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Aggarwal, Anuj
Sent: Thursday, January 07, 2010 7:40 PM
To: Paul Walmsley; Jarkko Nikula
Cc: linux-omap@vger.kernel.org; alsa-de...@alsa-project.org; Lohithakshan,
Ranjith
Subject: RE: [PATCH] OMAP: Exporting functions doing common register
access
In the interim, I would suggest that you remove the the clock source
and
receiver source change functions from omap-mcbsp.c, split them into
OMAP1
and OMAP2/3 variants, and place them into arch/arm/mach-
omap*/mcbsp.c.
Expand struct omap_mcbsp_ops to add function pointers to those
functions.
Call those from soc/omap-mcbsp.c via mcbsp-pdata-ops. That way you
won't
need those exports.
Paul: What's your opinnion, would it be possible or would it be wise
to
handle these McBSP clock route setups with the clock framework
instead?
Functions omap_mcbsp_dai_set_clks_src and omap_mcbsp_dai_set_rcvr_src
are basically just setting up the input clock for McBSP SRG or McBSP1
receiver.
Sure. There already should be some support for it in clock34xx.h, but I
doubt anyone's tested it:
static struct clk mcbsp1_fck = {
.name = mcbsp_fck,
.ops= clkops_omap2_dflt_wait,
.id = 1,
.init = omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
.clksel_reg = OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
.clksel_mask= OMAP2_MCBSP1_CLKS_MASK,
.clksel = mcbsp_15_clksel,
.clkdm_name = core_l4_clkdm,
.recalc = omap2_clksel_recalc,
};
etc. Some similar entries would need to be added to the clock24xx.h
file.
[Aggarwal, Anuj] One problem which I found in trying the above discussed
approach is that I am not able to get mcbsp clock handles in omap-mcbsp.c
file. To call clk_set_parent() with the new parent clock as mcbsp_clks
(in case of an external clock), I need the mcbsp_fck clock handle. But
this
handle is not shared with the omap_mcbsp_dai[].
What should be the right method of getting this handle in
omap_mcbsp_dai_set_dai_sysclk(), in case I understood the concept
properly.
Basically, we want to get rid of the low level stuff in this function
and instead use standard clock framework APIs?
Paul / Jarkko,
Any comments/pointers please?
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RE: [PATCH 0/6] Regulator: Removing common code for TWL4030 PMIC from various OMAP3 board-evms
-Original Message- From: Kevin Hilman [mailto:khil...@deeprootsystems.com] Sent: Saturday, January 09, 2010 3:57 AM To: Aggarwal, Anuj Cc: linux-omap@vger.kernel.org; broo...@opensource.wolfsonmicro.com; l...@slimlogic.co.uk Subject: Re: [PATCH 0/6] Regulator: Removing common code for TWL4030 PMIC from various OMAP3 board-evms Anuj Aggarwal anuj.aggar...@ti.com writes: Based on the discussions and feedback received, this patch set is created which cleans up various OMAP3-board-evm files and removes common TWL4030 specific regulator suuplies and init data structs. These structures are instead placed in a new file - board-omap35x-twl4030-pmic.c and are referenced from the board-evm Why is this omap35x? You seem to be using this from omap34xx board files as well. I don't think you need the board-omap* prefix at all. Why not just call it twl4030-pmic.c. [Aggarwal, Anuj] That's fine with me. I will wait for some more comments to pour in today and will re-send the patch with this modification. There has been some proposals to unify the twl4030 scripts as well by Lesley, and this new file would be a logical place for those as well. Kevin files depending on the platform requirements. Regulator having specific supplies or init data structs are not changed in their respective board-evms. The main advantages of having one common file for these structures are redundant code removal, easy maintainability and single copy of common structure(s) in case uImage for multiple platforms is built. Please see the following links for previous discussions: http://marc.info/?l=linux-omapm=12579548775w=2 http://marc.info/?l=linux-omapm=125795068502904w=2 I have tested these patches on OMAP3EVM and the image boots fine. I have compile-tested them for SDP3430 and all OMAP platforms (using omap3_defconfig) and the build went fine. If someone can test them on their hardware, that would be great !!! Anuj Aggarwal (6): Regulator: Creating TWL4030 specific file having supplies init data Regulator: Removing the common supplies and regulator init data structs Regulator: Use common regulator supplies and init data structs Regulator: Modifying Kconfig to choose from the available PMICs Regulator: Kconfig modified to select TWL4030 for OMAP3 based platforms Regulator: Makefile modified to include TWL4030-PMIC specific file arch/arm/mach-omap2/Kconfig | 20 +++ arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/board-3430sdp.c | 146 +++ --- arch/arm/mach-omap2/board-cm-t35.c | 52 ++- arch/arm/mach-omap2/board-igep0020.c | 26 +--- arch/arm/mach-omap2/board-ldp.c | 26 +--- arch/arm/mach-omap2/board-omap35x-twl4030-pmic.c | 175 ++ arch/arm/mach-omap2/board-omap3beagle.c | 52 ++- arch/arm/mach-omap2/board-omap3evm.c | 63 ++-- arch/arm/mach-omap2/board-omap3pandora.c | 52 ++- arch/arm/mach-omap2/board-omap3touchbook.c | 52 ++- arch/arm/mach-omap2/board-overo.c| 26 +--- arch/arm/mach-omap2/board-zoom-peripherals.c | 78 ++ 13 files changed, 304 insertions(+), 465 deletions(-) create mode 100644 arch/arm/mach-omap2/board-omap35x-twl4030-pmic.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/10] OPP layer and additional cleanups.
lets make the list implementation as a seperate series and discuss this. I am guessing that there could be wrapper apis which would could optimize the implementation while maintaining the overall APIs allowing other dependent users to continue. I will reserve my comments till we see the series on this. Based on the OPP nano-summit!! we had last Friday I will post two sets of patches to start with 1. Miscellaneous changes that was part of the earlier patch. 2. Patch that will remove maintaining pointers to the beginning of the array (OPP array). Thanks, -Romit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] OMAP3 PM: Disable SR only during Device Retention/OFF
Kevin,
Can you pls take this patch if there are no comments?
Regards
Vishwa
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Sripathy, Vishwanath
Sent: Thursday, January 07, 2010 11:22 AM
To: linux-omap@vger.kernel.org
Subject: [PATCH] OMAP3 PM: Disable SR only during Device Retention/OFF
Currently in omap_sram_idle function, SR is disabled whenever next state
is retention/OFF w/o checking whether system can really enter retention/off.
This patch adds another condition to disable SR. Basically FCLK register for
Core and PER are checked before disabling SR. THis will give some more power
savings in MP3 usecase (where Core enters retention where as PER does not).
Tested OMAP3430 ZOOM2
Signed-off-by: Vishwanath BS vishwanath...@ti.com
---
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3868cdf..13c5dfb
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -479,6 +479,7 @@ void omap_sram_idle(void)
int mpu_logic_state, mpu_mem_state, core_logic_state, core_mem_state;
u32 sdrc_pwr = 0;
int per_state_modified = 0;
+ u32 fclk_status;
if (!_omap_sram_idle)
return;
@@ -545,15 +546,6 @@ void omap_sram_idle(void)
if (pwrdm_read_pwrst(cam_pwrdm) == PWRDM_POWER_ON)
omap2_clkdm_deny_idle(mpu_pwrdm-pwrdm_clkdms[0]);
- /*
- * Disable smartreflex before entering WFI.
- * Only needed if we are going to enter retention or off.
- */
- if (mpu_next_state = PWRDM_POWER_RET)
- disable_smartreflex(SR1);
- if (core_next_state = PWRDM_POWER_RET)
- disable_smartreflex(SR2);
-
/* CORE */
if (core_next_state PWRDM_POWER_ON) {
omap_uart_prepare_idle(0, core_next_state core_logic_state);
@@ -600,6 +592,21 @@ void omap_sram_idle(void)
omap3_intc_prepare_idle();
/*
+ * Disable smartreflex before entering WFI.
+ * Only needed if we are going to enter retention or off.
+ */
+ fclk_status = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN) |
+ cm_read_mod_reg(CORE_MOD, CM_FCLKEN1) |
+ cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
+
+ if (!fclk_status) {
+ if (mpu_next_state = PWRDM_POWER_RET)
+ disable_smartreflex(SR1);
+ if (core_next_state = PWRDM_POWER_RET)
+ disable_smartreflex(SR2);
+ }
+
+ /*
* On EMU/HS devices ROM code restores a SRDC value
* from scratchpad which has automatic self refresh on timeout
* of AUTO_CNT = 1 enabled. This takes care of errata 1.142.
@@ -685,11 +692,12 @@ void omap_sram_idle(void)
* Enable smartreflex after WFI. Only needed if we entered
* retention or off
*/
- if (mpu_next_state = PWRDM_POWER_RET)
- enable_smartreflex(SR1);
- if (core_next_state = PWRDM_POWER_RET)
- enable_smartreflex(SR2);
-
+ if (!fclk_status) {
+ if (mpu_next_state = PWRDM_POWER_RET)
+ enable_smartreflex(SR1);
+ if (core_next_state = PWRDM_POWER_RET)
+ enable_smartreflex(SR2);
+ }
/* PER */
if (per_next_state PWRDM_POWER_ON) {
if (per_next_state == PWRDM_POWER_OFF) {
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[PM-WIP-OPP] [PATCH] cleaner ceil function for uv to vsel conversion
Cleaner ceil function.
Signed-off-by: Romit Dasgupta ro...@ti.com
---
diff --git a/arch/arm/plat-omap/opp_twl_tps.c b/arch/arm/plat-omap/opp_twl_tps.c
index e0db39b..1caa414 100644
--- a/arch/arm/plat-omap/opp_twl_tps.c
+++ b/arch/arm/plat-omap/opp_twl_tps.c
@@ -36,14 +36,7 @@ unsigned long omap_twl_vsel_to_uv(const u8 vsel)
*/
u8 omap_twl_uv_to_vsel(unsigned long uv)
{
- u8 vsel;
- vsel = ((uv / 100) - 6000) / 125;
+ return (((uv + 99) / 100 - 6000) + 124) / 125;
- /* round off to higher voltage */
- /* XXX Surely not the best way to handle this. */
- if (uv omap_twl_vsel_to_uv(vsel))
- vsel++;
-
- return vsel;
}
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[PATCH] OMAP3: hwmod: support to specify the offset position of various SYSCONFIG register bits.
In OMAP3 Some modules like Smartreflex do not have the regular sysconfig
register.Instead clockactivity bits are part of another register at a
different bit position than the usual bit positions 8 and 9.
In OMAP4, a new scheme is available due to the new protocol
between the PRCM and the IPs. Depending of the scheme, the SYSCONFIG
bitfields position will be different.
The IP_REVISION register should be at offset 0x00.
It should contain a SCHEME field From this we can determine legacy or HL.
31:30 SCHEME Used to distinguish between old scheme and current.
Read 0x0: Legacy ASP or WTBU scheme
Read 0x1: Highlander 0.8 scheme
For legacy IP
13:12 MIDLEMODE
11:8 CLOCKACTIVITY
6 EMUSOFT
5 EMUFREE
4:3 SIDLEMODE
2 ENAWAKEUP
1 SOFTRESET
0 AUTOIDLE
For Highlander IP, the bit position in SYSCONFIG is (for simple target):
5:4 STANDBYMODE (Ex MIDLEMODE)
3:2 IDLEMODE (Ex SIDLEMODE)
1 FREEEMU (Ex EMUFREE)
0 SOFTRESET
Unfortunately In OMAP4 also some IPs will not follow any of these
two schemes. This is the case at least for McASP, SmartReflex
and some security IPs.
This patch introduces a new field sysc_fields in omap_hwmod_sysconfig which
can be used by the hwmod structures to specify the offsets for the
sysconfig register of the IP.Also two static structures
omap_hwmod_sysc_fields and omap_hwmod_sysc_highlander are defined
which can be used directly to populate the sysc_fields if the IP follows
legacy or highlander scheme. If the IP follows none of these two schemes
a new omap_hwmod_sysc_fields structure has to be defined and
passed as part of omap_hwmod_sysconfig.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
---
This patch is based off Kevin's tree origin/pm-wip/omap_device branch
arch/arm/mach-omap2/omap_hwmod.c | 14 --
arch/arm/plat-omap/include/plat/omap_hwmod.h | 26 +-
2 files changed, 29 insertions(+), 11 deletions(-)
Index: linux-omap-pm/arch/arm/mach-omap2/omap_hwmod.c
===
--- linux-omap-pm.orig/arch/arm/mach-omap2/omap_hwmod.c
+++ linux-omap-pm/arch/arm/mach-omap2/omap_hwmod.c
@@ -135,12 +135,23 @@ static void _write_sysconfig(u32 v, stru
static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
u32 *v)
{
+ u32 mstandby_mask = 0;
+ u8 mstandby_shift = 0;
+
if (!oh-sysconfig ||
!(oh-sysconfig-sysc_flags SYSC_HAS_MIDLEMODE))
return -EINVAL;
- *v = ~SYSC_MIDLEMODE_MASK;
- *v |= __ffs(standbymode) SYSC_MIDLEMODE_SHIFT;
+ if (!oh-sysconfig-sysc_fields) {
+ pr_warning(offset struct for sysconfig not provided\n);
+ return -EINVAL;
+ }
+
+ mstandby_shift = oh-sysconfig-sysc_fields-midle_shift;
+ mstandby_mask = (0x3 mstandby_shift);
+
+ *v = ~mstandby_mask;
+ *v |= __ffs(standbymode) mstandby_shift;
return 0;
}
@@ -157,12 +168,22 @@ static int _set_master_standbymode(struc
*/
static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
{
+ u32 sidle_mask = 0;
+ u8 sidle_shift = 0;
+
if (!oh-sysconfig ||
!(oh-sysconfig-sysc_flags SYSC_HAS_SIDLEMODE))
return -EINVAL;
- *v = ~SYSC_SIDLEMODE_MASK;
- *v |= __ffs(idlemode) SYSC_SIDLEMODE_SHIFT;
+ if (!oh-sysconfig-sysc_fields) {
+ pr_warning(offset struct for sysconfig not provided\n);
+ return -EINVAL;
+ }
+ sidle_shift = oh-sysconfig-sysc_fields-sidle_shift;
+ sidle_mask = (0x3 sidle_shift);
+
+ *v = ~sidle_mask;
+ *v |= __ffs(idlemode) sidle_shift;
return 0;
}
@@ -180,12 +201,22 @@ static int _set_slave_idlemode(struct om
*/
static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
{
+ u32 clkact_mask = 0;
+ u8 clkact_shift = 0;
+
if (!oh-sysconfig ||
!(oh-sysconfig-sysc_flags SYSC_HAS_CLOCKACTIVITY))
return -EINVAL;
- *v = ~SYSC_CLOCKACTIVITY_MASK;
- *v |= clockact SYSC_CLOCKACTIVITY_SHIFT;
+ if (!oh-sysconfig-sysc_fields) {
+ pr_warning(offset struct for sysconfig not provided\n);
+ return -EINVAL;
+ }
+ clkact_shift = oh-sysconfig-sysc_fields-clkact_shift;
+ clkact_mask = (0x3 clkact_shift);
+
+ *v = ~clkact_mask;
+ *v |= clockact clkact_shift;
return 0;
}
@@ -200,11 +231,19 @@ static int _set_clockactivity(struct oma
*/
static int _set_softreset(struct omap_hwmod *oh, u32 *v)
{
+ u32 softrst_mask = 0;
+
if (!oh-sysconfig ||
!(oh-sysconfig-sysc_flags SYSC_HAS_SOFTRESET))
return -EINVAL;
- *v |= SYSC_SOFTRESET_MASK;
+ if
RE: [PATCH] ARM: OMAP4: Power Domains: Remove the return as power domain framework is in place
Sergio,
I have taken care of that in my other patches, which I had posted
earlier. They are not in mainline yet but are lined up for the next release.
You can find the same here.
http://marc.info/?l=linux-omapm=126088474831309w=2
Do let me know if you have any further questions.
Best Regards,
Abhijit Pagare
-Original Message-
From: Aguirre, Sergio
Sent: Friday, January 08, 2010 7:31 PM
To: Pagare, Abhijit; linux-omap@vger.kernel.org; linux-arm-
ker...@lists.infradead.org
Cc: Paul Walmsley
Subject: RE: [PATCH] ARM: OMAP4: Power Domains: Remove the return as power
domain framework is in place
Abhijit,
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Pagare, Abhijit
Sent: Friday, January 08, 2010 5:59 AM
To: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
Cc: Pagare, Abhijit; Paul Walmsley
Subject: [PATCH] ARM: OMAP4: Power Domains: Remove the return as power
domain framework is in place
The return prevents the power domains from getting registered.
Hence removing it to allow the frameworks model to work.
Signed-off-by: Abhijit Pagare abhijitpag...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
Compiled and Boot Tested on OMAP4430 simulator and ES1 Chip
Compiled and Boot Tested on OMAP3430 SDP
Compiled for OMAP2430 and OMAP2420
arch/arm/mach-omap2/id.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a779240..6d1e97b 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -362,7 +362,6 @@ void __init omap2_check_revision(void)
omap3_cpuinfo();
} else if (cpu_is_omap44xx()) {
omap4_check_revision();
- return;
} else {
pr_err(OMAP revision unknown, please fix!\n);
}
I don't have an OMAP4 with me, but I found something weird in your
reported behaviour...
The code that was being skipped is:
/*
* OK, now we know the exact revision. Initialize omap_chip bits
* for powerdowmain and clockdomain code.
*/
if (cpu_is_omap243x()) {
/* Currently only supports 2430ES2.1 and 2430-all */
omap_chip.oc |= CHIP_IS_OMAP2430;
} else if (cpu_is_omap242x()) {
/* Currently only supports 2420ES2.1.1 and 2420-all */
omap_chip.oc |= CHIP_IS_OMAP2420;
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
} else if (cpu_is_omap343x()) {
omap_chip.oc = CHIP_IS_OMAP3430;
if (omap_rev() == OMAP3430_REV_ES1_0)
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
else if (omap_rev() = OMAP3430_REV_ES2_0
omap_rev() = OMAP3430_REV_ES2_1)
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
else if (omap_rev() == OMAP3430_REV_ES3_0)
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
else if (omap_rev() == OMAP3430_REV_ES3_1)
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
else if (omap_rev() == OMAP3630_REV_ES1_0)
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
} else {
pr_err(Uninitialized omap_chip, please fix!\n);
}
And, in theory, in OMAP4 case, you SHOULDN'T be doing anything here, as
there's no case for cpu_is_omap443x or similar. So you should be _only_
seeing a print in console saying: Uninitialized omap_chip, please fix!,
right?
Is OMAP4 chip giving positive on cpu_is_omap343x() test then??
Regards,
Sergio
--
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[PATCH 3/3] OMAP4: clocks: Fix the clksel_rate struct DPLL divs
For all DPLL's the valid dividers are same as the values
to be programmed in the register. 0 is an invalid value.
The changes are generated by updating the script which autogenerates
the file modifed in the patch.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 62 +-
1 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 2210e22..9d882bc 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -346,37 +346,37 @@ static struct clk aess_fclk = {
};
static const struct clksel_rate div31_1to31_rates[] = {
- { .div = 1, .val = 0, .flags = RATE_IN_4430 },
- { .div = 2, .val = 1, .flags = RATE_IN_4430 },
- { .div = 3, .val = 2, .flags = RATE_IN_4430 },
- { .div = 4, .val = 3, .flags = RATE_IN_4430 },
- { .div = 5, .val = 4, .flags = RATE_IN_4430 },
- { .div = 6, .val = 5, .flags = RATE_IN_4430 },
- { .div = 7, .val = 6, .flags = RATE_IN_4430 },
- { .div = 8, .val = 7, .flags = RATE_IN_4430 },
- { .div = 9, .val = 8, .flags = RATE_IN_4430 },
- { .div = 10, .val = 9, .flags = RATE_IN_4430 },
- { .div = 11, .val = 10, .flags = RATE_IN_4430 },
- { .div = 12, .val = 11, .flags = RATE_IN_4430 },
- { .div = 13, .val = 12, .flags = RATE_IN_4430 },
- { .div = 14, .val = 13, .flags = RATE_IN_4430 },
- { .div = 15, .val = 14, .flags = RATE_IN_4430 },
- { .div = 16, .val = 15, .flags = RATE_IN_4430 },
- { .div = 17, .val = 16, .flags = RATE_IN_4430 },
- { .div = 18, .val = 17, .flags = RATE_IN_4430 },
- { .div = 19, .val = 18, .flags = RATE_IN_4430 },
- { .div = 20, .val = 19, .flags = RATE_IN_4430 },
- { .div = 21, .val = 20, .flags = RATE_IN_4430 },
- { .div = 22, .val = 21, .flags = RATE_IN_4430 },
- { .div = 23, .val = 22, .flags = RATE_IN_4430 },
- { .div = 24, .val = 23, .flags = RATE_IN_4430 },
- { .div = 25, .val = 24, .flags = RATE_IN_4430 },
- { .div = 26, .val = 25, .flags = RATE_IN_4430 },
- { .div = 27, .val = 26, .flags = RATE_IN_4430 },
- { .div = 28, .val = 27, .flags = RATE_IN_4430 },
- { .div = 29, .val = 28, .flags = RATE_IN_4430 },
- { .div = 30, .val = 29, .flags = RATE_IN_4430 },
- { .div = 31, .val = 30, .flags = RATE_IN_4430 },
+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
+ { .div = 2, .val = 2, .flags = RATE_IN_4430 },
+ { .div = 3, .val = 3, .flags = RATE_IN_4430 },
+ { .div = 4, .val = 4, .flags = RATE_IN_4430 },
+ { .div = 5, .val = 5, .flags = RATE_IN_4430 },
+ { .div = 6, .val = 6, .flags = RATE_IN_4430 },
+ { .div = 7, .val = 7, .flags = RATE_IN_4430 },
+ { .div = 8, .val = 8, .flags = RATE_IN_4430 },
+ { .div = 9, .val = 9, .flags = RATE_IN_4430 },
+ { .div = 10, .val = 10, .flags = RATE_IN_4430 },
+ { .div = 11, .val = 11, .flags = RATE_IN_4430 },
+ { .div = 12, .val = 12, .flags = RATE_IN_4430 },
+ { .div = 13, .val = 13, .flags = RATE_IN_4430 },
+ { .div = 14, .val = 14, .flags = RATE_IN_4430 },
+ { .div = 15, .val = 15, .flags = RATE_IN_4430 },
+ { .div = 16, .val = 16, .flags = RATE_IN_4430 },
+ { .div = 17, .val = 17, .flags = RATE_IN_4430 },
+ { .div = 18, .val = 18, .flags = RATE_IN_4430 },
+ { .div = 19, .val = 19, .flags = RATE_IN_4430 },
+ { .div = 20, .val = 20, .flags = RATE_IN_4430 },
+ { .div = 21, .val = 21, .flags = RATE_IN_4430 },
+ { .div = 22, .val = 22, .flags = RATE_IN_4430 },
+ { .div = 23, .val = 23, .flags = RATE_IN_4430 },
+ { .div = 24, .val = 24, .flags = RATE_IN_4430 },
+ { .div = 25, .val = 25, .flags = RATE_IN_4430 },
+ { .div = 26, .val = 26, .flags = RATE_IN_4430 },
+ { .div = 27, .val = 27, .flags = RATE_IN_4430 },
+ { .div = 28, .val = 28, .flags = RATE_IN_4430 },
+ { .div = 29, .val = 29, .flags = RATE_IN_4430 },
+ { .div = 30, .val = 30, .flags = RATE_IN_4430 },
+ { .div = 31, .val = 31, .flags = RATE_IN_4430 },
{ .div = 0 },
};
--
1.5.4.7
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[PATCH 2/3] OMAP4: PRCM: Fix the base address for CHIRONSS reg defines
The CHIRONSS has its own local PRCM module and the register defines need to use the CHIRONSS base and not the PRM base. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/mach-omap2/prm.h |2 ++ arch/arm/mach-omap2/prm44xx.h | 32 2 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ea050ce..40f0062 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -24,6 +24,8 @@ OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) #define OMAP44XX_PRM_REGADDR(module, reg) \ OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg)) +#define OMAP44XX_CHIRONSS_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP4430_CHIRONSS_BASE + (module) + (reg)) #include prm44xx.h diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 89be97f..adb2558 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -386,26 +386,26 @@ /* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */ -#define OMAP4430_REVISION_PRCM OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x) +#define OMAP4430_REVISION_PRCM OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x) /* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */ -#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x) +#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x) /* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */ -#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x) -#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) -#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) -#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) -#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) -#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) -#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) +#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x) +#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) +#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) +#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) +#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) +#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) +#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) /* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */ -#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x) -#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) -#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008) -#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c) -#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010) -#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014) -#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018) +#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x) +#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) +#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD,
[PATCH 0/3-V1] Add base addr bit defination for AM35xx IPSS modules
From: Vaibhav Hiremath hvaib...@ti.com AM35xx (AM3517/05) has few additional modules under IPSS (IP SubSystem), like VPFE, CPGMAC and USBOTG. This patch adds/updates the corresponding base addresses, interrupt number, and control module bit definations for the same. Please note that the OMAP34xx IVA2 memory space is being used for AM35xx IPSS modules. Changes from last submission - - As per Kevin's comment moved am35xx.h file from plat-omap to mach-omap2 - Added information about memory space being re-used from IVA2 in comment description Vaibhav Hiremath (3): AM35xx: Introduce am35xx.h file AM35xx: Add AM35xx intr_clr sw_rst cntrl reg bit defination AM35xx: Update irq.h for AM35xx IPSS module interrupts arch/arm/mach-omap2/board-am3517evm.c |1 + arch/arm/mach-omap2/include/mach/am35xx.h | 26 ++ arch/arm/plat-omap/include/plat/control.h | 17 + arch/arm/plat-omap/include/plat/irqs.h| 10 ++ 4 files changed, 54 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/am35xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3-V1] AM35xx: Introduce am35xx.h file
From: Vaibhav Hiremath hvaib...@ti.com Add base address definations for new AM35xx IPSS modules, like VPFE, USBOTG, CPGMAC. Please note that the OMAP34xx IVA2 memory space is being used for AM35xx IPSS modules. Signed-off-by: Vaibhav Hiremath hvaib...@ti.com Signed-off-by: Sriramakrishnan s...@ti.com --- arch/arm/mach-omap2/board-am3517evm.c |1 + arch/arm/mach-omap2/include/mach/am35xx.h | 26 ++ 2 files changed, 27 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/am35xx.h diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index b4e6eca..8cce7d1 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -22,6 +22,7 @@ #include linux/gpio.h #include mach/hardware.h +#include mach/am35xx.h #include asm/mach-types.h #include asm/mach/arch.h #include asm/mach/map.h diff --git a/arch/arm/mach-omap2/include/mach/am35xx.h b/arch/arm/mach-omap2/include/mach/am35xx.h new file mode 100644 index 000..a705f94 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/am35xx.h @@ -0,0 +1,26 @@ +/*: + * Address mappings and base address for AM35XX specific interconnects + * and peripherals. + * + * Copyright (C) 2009 Texas Instruments + * + * Author: Sriramakrishnan s...@ti.com + *Vaibhav Hiremath hvaib...@ti.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_AM35XX_H +#define __ASM_ARCH_AM35XX_H + +/* + * Base addresses + * Note: OMAP3430 IVA2 memory space is being used for AM35xx IPSS modules + */ +#define AM35XX_IPSS_EMAC_BASE 0x5C00 +#define AM35XX_IPSS_USBOTGSS_BASE 0x5C04 +#define AM35XX_IPSS_HECC_BASE 0x5C05 +#define AM35XX_IPSS_VPFE_BASE 0x5C06 + +#endif /* __ASM_ARCH_AM35XX_H */ -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3-V1] AM35xx: Update irq.h for AM35xx IPSS module interrupts
From: Vaibhav Hiremath hvaib...@ti.com Signed-off-by: Vaibhav Hiremath hvaib...@ti.com --- arch/arm/plat-omap/include/plat/irqs.h | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 97d6c50..e0d5092 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -344,6 +344,16 @@ #defineINT_34XX_BENCH_MPU_EMUL 3 +#define INT_35XX_HECC0_IRQ 24 +#define INT_35XX_HECC1_IRQ 28 +#define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67 +#define INT_35XX_EMAC_C0_RX_PULSE_IRQ 68 +#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 +#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ70 +#define INT_35XX_USBOTG_IRQ71 +#define INT_35XX_CCDC_VD0_IRQ 88 +#define INT_35XX_CCDC_VD1_IRQ 92 +#define INT_35XX_CCDC_VD2_IRQ 93 #define IRQ_GIC_START 32 #define INT_44XX_LOCALTIMER_IRQ29 -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3-V1] AM35xx: Add AM35xx intr_clr sw_rst cntrl reg bit defination
From: Vaibhav Hiremath hvaib...@ti.com AM3517/05 has few additional control module registers to control the new IP's, like VPFE, USBOTG, CPGMAC. This patch adds the bit defination for INTR_CLR and SW_RST control register. Signed-off-by: Vaibhav Hiremath hvaib...@ti.com --- arch/arm/plat-omap/include/plat/control.h | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 61e7b8a..efdf9e6 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -274,6 +274,23 @@ #define AM35XX_CPGMAC_FCLK_SHIFT9 #define AM35XX_VPFE_FCLK_SHIFT 10 +/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/ +#define AM35XX_CPGMAC_C0_MISC_PULSE_CLRBIT(0) +#define AM35XX_CPGMAC_C0_RX_PULSE_CLR BIT(1) +#define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2) +#define AM35XX_CPGMAC_C0_TX_PULSE_CLR BIT(3) +#define AM35XX_USBOTGSS_INT_CLRBIT(4) +#define AM35XX_VPFE_CCDC_VD0_INT_CLR BIT(5) +#define AM35XX_VPFE_CCDC_VD1_INT_CLR BIT(6) +#define AM35XX_VPFE_CCDC_VD2_INT_CLR BIT(7) + +/*AM35XX CONTROL_IP_SW_RESET bits*/ +#define AM35XX_USBOTGSS_SW_RST BIT(0) +#define AM35XX_CPGMACSS_SW_RST BIT(1) +#define AM35XX_VPFE_VBUSP_SW_RST BIT(2) +#define AM35XX_HECC_SW_RST BIT(3) +#define AM35XX_VPFE_PCLK_SW_RSTBIT(4) + /* * CONTROL OMAP STATUS register to identify OMAP3 features */ -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] OMAP4: prcm/clock fixes
Hi, This series contains prcm register def fixes and clock framework fixes for omap4. The patches are generated by updating the scripts which autogenerate the files modified. They apply on latest mainline kernel and are intended for the .33-rc series. regards, Rajendra Rajendra Nayak (3): OMAP4: PRCM: Define shift macros as n instead of 1 n OMAP4: PRCM: Fix the base address for CHIRONSS reg defines OMAP4: clocks: Fix the clksel_rate struct DPLL divs-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4-V1] Add support for I2C based devices to AM3517EVM
From: Vaibhav Hiremath hvaib...@ti.com This series of patchset adds platform hook-up interface for I2C based devices to AM3517 - - Real Time Clock (S35390A) - TouchScreen (TSC2004) - I2C GPIO Expander (TCA6416) Changes from last submission - - As per Kevin's comment, added more description in patch-series/change-log/commit Vaibhav Hiremath (4): AM3517: Enable basic I2C Support AM3517: Enable TSC2004 driver support for AM3517EVM AM3517: Enable RTC driver support for AM3517EVM AM3517: Enable I2C-GPIO Expander driver support for AM3517EVM arch/arm/mach-omap2/board-am3517evm.c | 126 + 1 files changed, 126 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4-V1] AM3517: Enable TSC2004 driver support for AM3517EVM
From: Vaibhav Hiremath hvaib...@ti.com
Add platform hook-up interface to support touch-Screen driver
(TSC2004).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c | 60 +
1 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 300b165..33d364a 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -20,6 +20,8 @@
#include linux/init.h
#include linux/platform_device.h
#include linux/gpio.h
+#include linux/irq.h
+#include linux/i2c/tsc2004.h
#include mach/hardware.h
#include mach/am35xx.h
@@ -33,6 +35,59 @@
#include mux.h
+/*
+ * TSC 2004 Support
+ */
+#defineGPIO_TSC2004_IRQ65
+
+static int tsc2004_init_irq(void)
+{
+ int ret = 0;
+
+ ret = gpio_request(GPIO_TSC2004_IRQ, tsc2004-irq);
+ if (ret 0) {
+ printk(KERN_WARNING failed to request GPIO#%d: %d\n,
+ GPIO_TSC2004_IRQ, ret);
+ return ret;
+ }
+
+ if (gpio_direction_input(GPIO_TSC2004_IRQ)) {
+ printk(KERN_WARNING GPIO#%d cannot be configured as
+ input\n, GPIO_TSC2004_IRQ);
+ return -ENXIO;
+ }
+
+ omap_set_gpio_debounce(GPIO_TSC2004_IRQ, 1);
+ omap_set_gpio_debounce_time(GPIO_TSC2004_IRQ, 0xa);
+ return ret;
+}
+
+static void tsc2004_exit_irq(void)
+{
+ gpio_free(GPIO_TSC2004_IRQ);
+}
+
+static int tsc2004_get_irq_level(void)
+{
+ return gpio_get_value(GPIO_TSC2004_IRQ) ? 0 : 1;
+}
+
+struct tsc2004_platform_data am3517evm_tsc2004data = {
+ .model = 2004,
+ .x_plate_ohms = 180,
+ .get_pendown_state = tsc2004_get_irq_level,
+ .init_platform_hw = tsc2004_init_irq,
+ .exit_platform_hw = tsc2004_exit_irq,
+};
+
+static struct i2c_board_info __initdata am3517evm_tsc_i2c_boardinfo[] = {
+ {
+ I2C_BOARD_INFO(tsc2004, 0x4B),
+ .type = tsc2004,
+ .platform_data = am3517evm_tsc2004data,
+ },
+};
+
static int __init am3517_evm_i2c_init(void)
{
omap_register_i2c_bus(1, 400, NULL, 0);
@@ -90,6 +145,11 @@ static void __init am3517_evm_init(void)
omap_serial_init();
usb_ehci_init(ehci_pdata);
+ /* TSC 2004 */
+ omap_mux_init_gpio(65, OMAP_PIN_INPUT_PULLUP);
+ am3517evm_tsc_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_TSC2004_IRQ);
+ i2c_register_board_info(1, am3517evm_tsc_i2c_boardinfo,
+ ARRAY_SIZE(am3517evm_tsc_i2c_boardinfo));
}
static void __init am3517_evm_map_io(void)
--
1.6.2.4
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[PATCH 3/4-V1] AM3517: Enable RTC driver support for AM3517EVM
From: Vaibhav Hiremath hvaib...@ti.com
Add platform hook-up interface to support RTC driver (S35390A).
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c | 30 ++
1 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 33d364a..67edb0f 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -80,14 +80,24 @@ struct tsc2004_platform_data am3517evm_tsc2004data = {
.exit_platform_hw = tsc2004_exit_irq,
};
-static struct i2c_board_info __initdata am3517evm_tsc_i2c_boardinfo[] = {
+/*
+ * RTC - S35390A
+ */
+#defineGPIO_RTCS35390A_IRQ 55
+
+static struct i2c_board_info __initdata am3517evm_i2c_boardinfo[] = {
{
I2C_BOARD_INFO(tsc2004, 0x4B),
.type = tsc2004,
.platform_data = am3517evm_tsc2004data,
},
+ {
+ I2C_BOARD_INFO(s35390a, 0x30),
+ .type = s35390a,
+ },
};
+
static int __init am3517_evm_i2c_init(void)
{
omap_register_i2c_bus(1, 400, NULL, 0);
@@ -145,11 +155,23 @@ static void __init am3517_evm_init(void)
omap_serial_init();
usb_ehci_init(ehci_pdata);
+
/* TSC 2004 */
omap_mux_init_gpio(65, OMAP_PIN_INPUT_PULLUP);
- am3517evm_tsc_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_TSC2004_IRQ);
- i2c_register_board_info(1, am3517evm_tsc_i2c_boardinfo,
- ARRAY_SIZE(am3517evm_tsc_i2c_boardinfo));
+ am3517evm_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_TSC2004_IRQ);
+
+ /* RTC - S35390A */
+ omap_mux_init_gpio(55, OMAP_PIN_INPUT_PULLUP);
+ if (gpio_request(GPIO_RTCS35390A_IRQ, rtcs35390a-irq) 0)
+ printk(KERN_WARNING failed to request GPIO#%d\n,
+ GPIO_RTCS35390A_IRQ);
+ if (gpio_direction_input(GPIO_RTCS35390A_IRQ))
+ printk(KERN_WARNING GPIO#%d cannot be configured as
+ input\n, GPIO_RTCS35390A_IRQ);
+ am3517evm_i2c_boardinfo[1].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
+
+ i2c_register_board_info(1, am3517evm_i2c_boardinfo,
+ ARRAY_SIZE(am3517evm_i2c_boardinfo));
}
static void __init am3517_evm_map_io(void)
--
1.6.2.4
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[PATCH 1/4-V1] AM3517: Enable basic I2C Support
From: Vaibhav Hiremath hvaib...@ti.com
Add basic I2C board Hook-up support, where all the 3 I2C instances
are getting registered.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 8cce7d1..300b165 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -33,6 +33,15 @@
#include mux.h
+static int __init am3517_evm_i2c_init(void)
+{
+ omap_register_i2c_bus(1, 400, NULL, 0);
+ omap_register_i2c_bus(2, 400, NULL, 0);
+ omap_register_i2c_bus(3, 400, NULL, 0);
+
+ return 0;
+}
+
/*
* Board initialization
*/
@@ -73,6 +82,8 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init am3517_evm_init(void)
{
+ am3517_evm_i2c_init();
+
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
platform_add_devices(am3517_evm_devices,
ARRAY_SIZE(am3517_evm_devices));
--
1.6.2.4
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[PATCH 4/4-V1] AM3517: Enable I2C-GPIO Expander driver support for AM3517EVM
From: Vaibhav Hiremath hvaib...@ti.com
Add platform hook-up interface to support I2C based GPIo expander
(TCA6416).
There are 3 instances of I2C Expander on AM3517EVM,
- One is over I2C-2 mounted on Base board
- Two are over I2C3 mounted on UI Card
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c | 37 +++-
1 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 67edb0f..1e1ab68 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -22,6 +22,7 @@
#include linux/gpio.h
#include linux/irq.h
#include linux/i2c/tsc2004.h
+#include linux/i2c/pca953x.h
#include mach/hardware.h
#include mach/am35xx.h
@@ -97,12 +98,44 @@ static struct i2c_board_info __initdata
am3517evm_i2c_boardinfo[] = {
},
};
+/*
+ * I2C GPIO Expander - TCA6416
+ */
+/* Mounted on Base-Board */
+static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = {
+ .gpio_base = OMAP_MAX_GPIO_LINES,
+};
+static struct i2c_board_info __initdata am3517evm_tca6516_info_0[] = {
+ {
+ I2C_BOARD_INFO(tca6416, 0x21),
+ .platform_data = am3517evm_gpio_expander_info_0,
+ },
+};
+/* Mounted on UI Card */
+static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_1 = {
+ .gpio_base = OMAP_MAX_GPIO_LINES + 16,
+};
+static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = {
+ .gpio_base = OMAP_MAX_GPIO_LINES + 32,
+};
+static struct i2c_board_info __initdata am3517evm_ui_tca6516_info[] = {
+ {
+ I2C_BOARD_INFO(tca6416, 0x20),
+ .platform_data = am3517evm_ui_gpio_expander_info_1,
+ },
+ {
+ I2C_BOARD_INFO(tca6416, 0x21),
+ .platform_data = am3517evm_ui_gpio_expander_info_2,
+ },
+};
static int __init am3517_evm_i2c_init(void)
{
omap_register_i2c_bus(1, 400, NULL, 0);
- omap_register_i2c_bus(2, 400, NULL, 0);
- omap_register_i2c_bus(3, 400, NULL, 0);
+ omap_register_i2c_bus(2, 400, am3517evm_tca6516_info_0,
+ ARRAY_SIZE(am3517evm_tca6516_info_0));
+ omap_register_i2c_bus(3, 400, am3517evm_ui_tca6516_info,
+ ARRAY_SIZE(am3517evm_ui_tca6516_info));
return 0;
}
--
1.6.2.4
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RE: [PATCH 2/3] Input:TouchScreen: Introduce TSC2004 driver support
-Original Message-
From: Hiremath, Vaibhav
Sent: Thursday, November 19, 2009 8:17 PM
To: linux-in...@vger.kernel.org
Cc: linux-omap@vger.kernel.org; Hiremath, Vaibhav
Subject: [PATCH 2/3] Input:TouchScreen: Introduce TSC2004 driver
support
From: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
drivers/input/touchscreen/Kconfig | 11 +
drivers/input/touchscreen/Makefile |1 +
drivers/input/touchscreen/tsc2004.c | 525
+++
include/linux/i2c/tsc2004.h | 17 ++
4 files changed, 554 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/touchscreen/tsc2004.c
create mode 100644 include/linux/i2c/tsc2004.h
[Hiremath, Vaibhav] Dmitry,
Any update on this? This driver support is important for AM3517EVM, can we
merge this patch?
Thanks,
Vaibhav
diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index 8cc453c..08aba0b 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -512,6 +512,17 @@ config TOUCHSCREEN_TSC2007
To compile this driver as a module, choose M here: the
module will be called tsc2007.
+config TOUCHSCREEN_TSC2004
+ tristate TSC2004 based touchscreens
+ depends on I2C
+ help
+ Say Y here if you have a TSC2004 based touchscreen.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called tsc2004.
+
config TOUCHSCREEN_W90X900
tristate W90P910 touchscreen driver
depends on HAVE_CLK
diff --git a/drivers/input/touchscreen/Makefile
b/drivers/input/touchscreen/Makefile
index 15fa62c..4ac5b81 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213)+=
touchit213.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o
obj-$(CONFIG_TOUCHSCREEN_TSC2007)+= tsc2007.o
+obj-$(CONFIG_TOUCHSCREEN_TSC2004)+= tsc2004.o
obj-$(CONFIG_TOUCHSCREEN_UCB1400)+= ucb1400_ts.o
obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001)+= wacom_w8001.o
obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o
diff --git a/drivers/input/touchscreen/tsc2004.c
b/drivers/input/touchscreen/tsc2004.c
new file mode 100644
index 000..0bba2e6
--- /dev/null
+++ b/drivers/input/touchscreen/tsc2004.c
@@ -0,0 +1,525 @@
+/*
+ * drivers/input/touchscreen/tsc2004.c
+ *
+ * Copyright (C) 2009 Texas Instruments Inc
+ * Author: Vaibhav Hiremath hvaib...@ti.com
+ *
+ * Using code from:
+ * - tsc2007.c
+ *
+ * This package is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2
as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include linux/module.h
+#include linux/slab.h
+#include linux/input.h
+#include linux/interrupt.h
+#include linux/i2c.h
+#include linux/i2c/tsc2004.h
+
+
+#define TS_POLL_DELAY1 /* ms delay between samples */
+#define TS_POLL_PERIOD 1 /* ms delay between samples */
+
+/* Control byte 0 */
+#define TSC2004_CMD0(addr, pnd, rw) ((addr3)|(pnd1)|rw)
+/* Control byte 1 */
+#define TSC2004_CMD1(cmd, mode, rst)
((17)|(cmd4)|(mode2)|(rst1))
+
+/* Command Bits */
+#define READ_REG 1
+#define WRITE_REG0
+#define SWRST_TRUE 1
+#define SWRST_FALSE 0
+#define PND0_TRUE1
+#define PND0_FALSE 0
+
+/* Converter function mapping */
+enum convertor_function {
+ MEAS_X_Y_Z1_Z2, /* Measure X,Y,z1 and Z2: 0x0 */
+ MEAS_X_Y, /* Measure X and Y only:0x1 */
+ MEAS_X, /* Measure X only: 0x2 */
+ MEAS_Y, /* Measure Y only: 0x3 */
+ MEAS_Z1_Z2, /* Measure Z1 and Z2 only: 0x4 */
+ MEAS_AUX, /* Measure Auxillary input: 0x5 */
+ MEAS_TEMP1, /* Measure Temparature1:0x6 */
+ MEAS_TEMP2, /* Measure Temparature2:0x7 */
+ MEAS_AUX_CONT, /* Continuously measure Auxillary input: 0x8
*/
+ X_DRV_TEST, /* X-Axis drivers tested0x9 */
+ Y_DRV_TEST, /* Y-Axis drivers tested0xA */
+ /*Command Reserved*/
+ SHORT_CKT_TST = 0xC,/* Short circuit test: 0xC */
+ XP_XN_DRV_STAT, /* X+,Y- drivers status:0xD */
+ YP_YN_DRV_STAT, /* X+,Y-
RE: [PATCH 0/2] OMAP3: Add V4L2 display driver support
-Original Message- From: Hiremath, Vaibhav Sent: Monday, January 04, 2010 8:12 PM To: linux-me...@vger.kernel.org Cc: linux-omap@vger.kernel.org; hverk...@xs4all.nl; t...@atomide.com; Hiremath, Vaibhav Subject: [PATCH 0/2] OMAP3: Add V4L2 display driver support From: Vaibhav Hiremath hvaib...@ti.com This series of patch-set adds support for V4L2 display driver ontop of DSS2 framework. Please note that this patch is dependent on patch which add ti-media directory (submitted earlier to this patch series) Vaibhav Hiremath (2): OMAP2/3 V4L2: Add support for OMAP2/3 V4L2 driver on top of DSS2 OMAP2/3: Add V4L2 DSS driver support in device.c arch/arm/plat-omap/devices.c| 29 + drivers/media/video/ti-media/Kconfig| 10 + drivers/media/video/ti-media/Makefile |4 + drivers/media/video/ti-media/omap_vout.c| 2654 +++ drivers/media/video/ti-media/omap_voutdef.h | 148 ++ drivers/media/video/ti-media/omap_voutlib.c | 258 +++ drivers/media/video/ti-media/omap_voutlib.h | 34 + 7 files changed, 3137 insertions(+), 0 deletions(-) create mode 100644 drivers/media/video/ti-media/omap_vout.c create mode 100644 drivers/media/video/ti-media/omap_voutdef.h create mode 100644 drivers/media/video/ti-media/omap_voutlib.c create mode 100644 drivers/media/video/ti-media/omap_voutlib.h [Hiremath, Vaibhav] Hans and others, Since we do not have any comments on this, can we merge this patch series? Thanks, Vaibhav -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 0/9] Feature enhancement of VPFE/CCDC Capture driver
-Original Message- From: Hiremath, Vaibhav Sent: Monday, January 04, 2010 7:33 PM To: linux-me...@vger.kernel.org Cc: linux-omap@vger.kernel.org; hverk...@xs4all.nl; davinci-linux- open-sou...@linux.davincidsp.com; Karicheri, Muralidharan; Hiremath, Vaibhav Subject: [PATCH 0/9] Feature enhancement of VPFE/CCDC Capture driver From: Vaibhav Hiremath hvaib...@ti.com While adding support for AM3517/05 devices I have implemented/came- across these features/enhancement/bug-fixes for VPFE-Capture driver. Also the important change added is, to introduced ti-media directory for all TI devices. Vaibhav Hiremath (9): Makfile:Removed duplicate entry of davinci TVP514x:Switch to automode for querystd tvp514x: add YUYV format support Introducing ti-media directory DMx:Update board files for ti-media directory change Davinci VPFE Capture:Return 0 from suspend/resume DM644x CCDC : Add Suspend/Resume Support VPFE Capture: Add call back function for interrupt clear to vpfe_cfg DM644x CCDC: Add 10bit BT support arch/arm/mach-davinci/include/mach/dm355.h |2 +- arch/arm/mach-davinci/include/mach/dm644x.h |2 +- drivers/media/video/Kconfig | 84 +- drivers/media/video/Makefile|4 +- drivers/media/video/davinci/Makefile| 17 - drivers/media/video/davinci/ccdc_hw_device.h| 110 -- drivers/media/video/davinci/dm355_ccdc.c| 1081 --- drivers/media/video/davinci/dm355_ccdc_regs.h | 310 drivers/media/video/davinci/dm644x_ccdc.c | 966 -- drivers/media/video/davinci/dm644x_ccdc_regs.h | 145 -- drivers/media/video/davinci/vpfe_capture.c | 2055 - drivers/media/video/davinci/vpif.c | 296 --- drivers/media/video/davinci/vpif.h | 642 --- drivers/media/video/davinci/vpif_capture.c | 2168 --- drivers/media/video/davinci/vpif_capture.h | 165 -- drivers/media/video/davinci/vpif_display.c | 1654 - drivers/media/video/davinci/vpif_display.h | 175 -- drivers/media/video/davinci/vpss.c | 301 drivers/media/video/ti-media/Kconfig| 88 + drivers/media/video/ti-media/Makefile | 17 + drivers/media/video/ti-media/ccdc_hw_device.h | 110 ++ drivers/media/video/ti-media/dm355_ccdc.c | 1081 +++ drivers/media/video/ti-media/dm355_ccdc_regs.h | 310 drivers/media/video/ti-media/dm644x_ccdc.c | 1090 drivers/media/video/ti-media/dm644x_ccdc_regs.h | 153 ++ drivers/media/video/ti-media/vpfe_capture.c | 2067 + drivers/media/video/ti-media/vpif.c | 296 +++ drivers/media/video/ti-media/vpif.h | 642 +++ drivers/media/video/ti-media/vpif_capture.c | 2168 +++ drivers/media/video/ti-media/vpif_capture.h | 165 ++ drivers/media/video/ti-media/vpif_display.c | 1654 + drivers/media/video/ti-media/vpif_display.h | 175 ++ drivers/media/video/ti-media/vpss.c | 301 drivers/media/video/tvp514x.c | 15 + include/media/davinci/ccdc_types.h | 43 - include/media/davinci/dm355_ccdc.h | 321 include/media/davinci/dm644x_ccdc.h | 184 -- include/media/davinci/vpfe_capture.h| 200 --- include/media/davinci/vpfe_types.h | 51 - include/media/davinci/vpss.h| 69 - include/media/ti-media/ccdc_types.h | 43 + include/media/ti-media/dm355_ccdc.h | 321 include/media/ti-media/dm644x_ccdc.h| 184 ++ include/media/ti-media/vpfe_capture.h | 202 +++ include/media/ti-media/vpfe_types.h | 51 + include/media/ti-media/vpss.h | 69 + 46 files changed, 11207 insertions(+), 11040 deletions(-) delete mode 100644 drivers/media/video/davinci/Makefile delete mode 100644 drivers/media/video/davinci/ccdc_hw_device.h delete mode 100644 drivers/media/video/davinci/dm355_ccdc.c delete mode 100644 drivers/media/video/davinci/dm355_ccdc_regs.h delete mode 100644 drivers/media/video/davinci/dm644x_ccdc.c delete mode 100644 drivers/media/video/davinci/dm644x_ccdc_regs.h delete mode 100644 drivers/media/video/davinci/vpfe_capture.c delete mode 100644 drivers/media/video/davinci/vpif.c delete mode 100644 drivers/media/video/davinci/vpif.h delete mode 100644 drivers/media/video/davinci/vpif_capture.c delete mode 100644 drivers/media/video/davinci/vpif_capture.h delete mode 100644 drivers/media/video/davinci/vpif_display.c delete mode 100644 drivers/media/video/davinci/vpif_display.h delete mode 100644 drivers/media/video/davinci/vpss.c create mode 100644 drivers/media/video/ti-media/Kconfig
Re: Issue in oamp nand driver with 32-bit reads in prefetch mode
On Sun, Jan 10, 2010 at 2:16 PM, Artem Bityutskiy dedeki...@gmail.com wrote:
On Thu, 2009-12-31 at 17:50 +0530, Vimal Singh wrote:
There is a bug in nand prefetch read routine, which comes into effect
only if nand device is a 16-bit device (as we have in zoom boards).
This bug is effective only with below combination of conditions:
1. nand deivce, in use, is a 16 bit device
2. nand driver supports 'subpage' read
3. SW ECC is in use
This was not seen old kernel (ex: .23), because when, in early days,
we tested this (nand prefetch read in LDP boards) there was no
'subpage read' support.
Later when we had subpage read in (.27) kernel, we had hw ecc enabled
always in our internal tree. So, we missed this bug.
Here is a patch to fix this issue:
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 1bb799f..75004fe 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -295,11 +295,14 @@ static void omap_read_buf_pref(struct
u32 *p = (u32 *)buf;
/* take care of subpage reads */
- for (; len % 4 != 0; ) {
- *buf++ = __raw_readb(info-nand.IO_ADDR_R);
- len--;
+ if (len % 4) {
+ if (info-nand.options NAND_BUSWIDTH_16)
+ omap_read_buf16(mtd, buf, len % 4);
+ else
+ omap_read_buf8(mtd, buf, len % 4);
+ p = (u32 *) (buf + len % 4);
+ len -= len % 4;
}
- p = (u32 *) buf;
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info-gpmc_cs, 0x0, len, 0x0);
Pushed this patch to my l2-mtd-2.6.git/dunno.
I have posted this patch formally in patch series:
[PATCH 0/3][NAND][OMAP]: fixing omap nand driver issues
Corresponding patch is:
[PATCH 3/3][NAND][OMAP] : Fixing issue in oamp nand driver in prefetch mode read
Can you please give a look for this patch series?
--
Regards,
Vimal Singh
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RE: [PATCH 0/6] Added DSS2/FBDEV support for OMAP3EVM AM3517EVM
\ -Original Message- From: Hiremath, Vaibhav Sent: Monday, January 04, 2010 8:04 PM To: linux-omap@vger.kernel.org Cc: tomi.valkei...@nokia.com; t...@atomide.com; Hiremath, Vaibhav Subject: [PATCH 0/6] Added DSS2/FBDEV support for OMAP3EVM AM3517EVM From: Vaibhav Hiremath hvaib...@ti.com This patch added DSS2 + OMAPFB support for OMAP3EVM and AM3517/05 EVM along with sharp LQ043T1DG01 panel support. Vaibhav Hiremath (4): OMAP: DSS2: Fix compile warning OMAP: DSS2: Add Sharp LQ043T1DG01 panel drivers OMAP: Enable DSS2 for OMAP3EVM board OMAP: AM3517: Enable DSS2 for AM3517EVM board [Hiremath, Vaibhav] Tomi, Do you see any issues with this patch-series? It has been reviewed multiple times. Can we merge these patches? You had only taken warning fix patch, any specific reason? Thanks, Vaibhav arch/arm/configs/am3517_evm_defconfig | 52 - arch/arm/configs/omap3_evm_defconfig | 51 - arch/arm/mach-omap2/board-am3517evm.c | 144 arch/arm/mach-omap2/board-omap3evm.c | 246 +++- drivers/video/omap2/displays/Kconfig |6 + drivers/video/omap2/displays/Makefile |1 + .../video/omap2/displays/panel-sharp-lq043t1dg01.c | 120 ++ drivers/video/omap2/dss/core.c |2 + 8 files changed, 609 insertions(+), 13 deletions(-) create mode 100644 drivers/video/omap2/displays/panel-sharp- lq043t1dg01.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] omap iommu: cleanup iommu page address mask and definitions
From: Hiroshi DOYU hiroshi.d...@nokia.com Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com --- arch/arm/plat-omap/iopgtable.h | 50 +++ 1 files changed, 39 insertions(+), 11 deletions(-) diff --git a/arch/arm/plat-omap/iopgtable.h b/arch/arm/plat-omap/iopgtable.h index 37dac43..ab23b6a 100644 --- a/arch/arm/plat-omap/iopgtable.h +++ b/arch/arm/plat-omap/iopgtable.h @@ -1,7 +1,7 @@ /* * omap iommu: pagetable definitions * - * Copyright (C) 2008-2009 Nokia Corporation + * Copyright (C) 2008-2010 Nokia Corporation * * Written by Hiroshi DOYU hiroshi.d...@nokia.com * @@ -13,26 +13,52 @@ #ifndef __PLAT_OMAP_IOMMU_H #define __PLAT_OMAP_IOMMU_H +/* + * L2 table address mask and size definitions. + */ #define IOPGD_SHIFT20 -#define IOPGD_SIZE (1 IOPGD_SHIFT) +#define IOPGD_SIZE (1UL IOPGD_SHIFT) #define IOPGD_MASK (~(IOPGD_SIZE - 1)) -#define IOSECTION_MASK IOPGD_MASK -#define PTRS_PER_IOPGD (1 (32 - IOPGD_SHIFT)) -#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32)) -#define IOSUPER_SIZE (IOPGD_SIZE 4) +/* + * section address mask and size definitions. + */ +#define IOSECTION_SHIFT20 +#define IOSECTION_SIZE (1UL IOSECTION_SHIFT) +#define IOSECTION_MASK (~(IOSECTION_SIZE - 1)) + +/* + * supersection address mask and size definitions. + */ +#define IOSUPER_SHIFT 24 +#define IOSUPER_SIZE (1UL IOSUPER_SHIFT) #define IOSUPER_MASK (~(IOSUPER_SIZE - 1)) +#define PTRS_PER_IOPGD (1UL (32 - IOPGD_SHIFT)) +#define IOPGD_TABLE_SIZE (PTRS_PER_IOPGD * sizeof(u32)) + +/* + * small page address mask and size definitions. + */ #define IOPTE_SHIFT12 -#define IOPTE_SIZE (1 IOPTE_SHIFT) +#define IOPTE_SIZE (1UL IOPTE_SHIFT) #define IOPTE_MASK (~(IOPTE_SIZE - 1)) -#define IOPAGE_MASKIOPTE_MASK -#define PTRS_PER_IOPTE (1 (IOPGD_SHIFT - IOPTE_SHIFT)) -#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32)) -#define IOLARGE_SIZE (IOPTE_SIZE 4) +/* + * large page address mask and size definitions. + */ +#define IOLARGE_SHIFT 16 +#define IOLARGE_SIZE (1UL IOLARGE_SHIFT) #define IOLARGE_MASK (~(IOLARGE_SIZE - 1)) +#define PTRS_PER_IOPTE (1UL (IOPGD_SHIFT - IOPTE_SHIFT)) +#define IOPTE_TABLE_SIZE (PTRS_PER_IOPTE * sizeof(u32)) + +#define IOPAGE_MASKIOPTE_MASK + +/* + * some descriptor attributes. + */ #define IOPGD_TABLE(1 0) #define IOPGD_SECTION (2 0) #define IOPGD_SUPER(1 18 | 2 0) @@ -40,12 +66,14 @@ #define IOPTE_SMALL(2 0) #define IOPTE_LARGE(1 0) +/* to find an entry in a page-table-directory */ #define iopgd_index(da)(((da) IOPGD_SHIFT) (PTRS_PER_IOPGD - 1)) #define iopgd_offset(obj, da) ((obj)-iopgd + iopgd_index(da)) #define iopte_paddr(iopgd) (*iopgd ~((1 10) - 1)) #define iopte_vaddr(iopgd) ((u32 *)phys_to_virt(iopte_paddr(iopgd))) +/* to find an entry in the second-level page table. */ #define iopte_index(da)(((da) IOPTE_SHIFT) (PTRS_PER_IOPTE - 1)) #define iopte_offset(iopgd, da)(iopte_vaddr(iopgd) + iopte_index(da)) -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] omap iommu: fix incorrect address for supersection 1st entry
From: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Hari Nagalla hnaga...@ti.com
---
arch/arm/plat-omap/iommu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index ccf25b3..ce0072a 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -667,7 +667,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj,
u32 da)
if ((*iopgd IOPGD_SUPER) == IOPGD_SUPER) {
nent *= 16;
/* rewind to the 1st entry */
- iopgd = (u32 *)((u32)iopgd IOSUPER_MASK);
+ iopgd = iopgd_offset(obj, (da IOSUPER_MASK));
}
bytes *= nent;
}
--
1.6.0.4
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[PATCH 2/3] omap iommu: fix incorrect address for large page 1st entry
From: Hiroshi DOYU hiroshi.d...@nokia.com
Reported-by: Hari Nagalla hnaga...@ti.com
Signed-off-by: Hiroshi DOYU hiroshi.d...@nokia.com
Signed-off-by: Hari Nagalla hnaga...@ti.com
---
arch/arm/plat-omap/iommu.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index c0ff1e3..ccf25b3 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -1,7 +1,7 @@
/*
* omap iommu: tlb and pagetable primitives
*
- * Copyright (C) 2008-2009 Nokia Corporation
+ * Copyright (C) 2008-2010 Nokia Corporation
*
* Written by Hiroshi DOYU hiroshi.d...@nokia.com,
* Paul Mundt and Toshihiro Kobayashi
@@ -646,7 +646,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj,
u32 da)
if (*iopte IOPTE_LARGE) {
nent *= 16;
/* rewind to the 1st entry */
- iopte = (u32 *)((u32)iopte IOLARGE_MASK);
+ iopte = iopte_offset(iopgd, (da IOLARGE_MASK));
}
bytes *= nent;
memset(iopte, 0, nent * sizeof(*iopte));
--
1.6.0.4
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