NAND misreads on omap beagle and overo
I'm getting occasional bad reads from NAND on a rev B7 Beagleboard and a Gumstix Overo Water. Both use OMAP3530 with 16-bit 256MB NAND, omap-patched kernels from 2.6.31 to 2.6.32.6 (Ubuntu beagleboard kernel binaries and my own compiled from source), and software ECC. Sometimes a read request will read back the last written command byte several times before the page data. The problem occurs with or without prefetch mode, and increasing chip_delay to 100 or 200 doesn't fix it. The chip is only supposed to need 25us anyway. If I prepare the flash with a pattern 00 01 02 03 ... fc fd fe ff ff fe fd fc ... 03 02 01 00 and then read every page (full or partial), sometimes I will get e0 ff e0 ff e0 ff e0 ff ... e0 ff 00 01 02 03 ... or 30 ff 30 ff 30 ff 30 ff ... 30 ff 00 01 02 03 ... 0x30 and 0xE0 are probably the read and change-column commands echoing back for some reason. This can cause uncorrectable ECC errors, so you can do a simple read of the mtd char device (no pattern necessary, erased flash will do) and run into the problem on the console if you're patient. (while dd if=/dev/mtd4 of=/dev/null bs=2048; do sleep 1; done) I can usually get at least one bad read within 4 full 250MB partition reads at 512-bytes per read call (more commands that way). For some reason some kernels, like the Ubuntu beagleboard 2.6.31.6-x6.0 binary, make this harder to reproduce. If you flip enough (unrelated) settings in the build config, it will happen more often. For example, removing the built-in (=y) RT2800USB wireless driver from that kernel can somehow make the difference between seeing an error in a couple minutes and not seeing an error for over 10 minutes of continuous reading. I've tried adding some udelays, and adjusting timings in the OMAP GPMC and checking for incorrect config. A long udelay in the read_buf function helped in one test, but also cut the transfer rate in half and may not have eliminated the problem. What event would cause the command byte to echo back anyway? Is that a typical busy NAND response, or something the OMAP memory controller has to be doing? -- Jeff DeFouw je...@i2k.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [alsa-devel] [PATCH 0/4] ASOC: Add AM3517 EVM support in ASOC
-Original Message- From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com] Sent: Friday, October 30, 2009 4:00 AM To: Aggarwal, Anuj Cc: alsa-de...@alsa-project.org; linux-omap@vger.kernel.org; t...@atomide.com Subject: Re: [alsa-devel] [PATCH 0/4] ASOC: Add AM3517 EVM support in ASOC On Fri, Oct 30, 2009 at 12:22:17AM +0530, Anuj Aggarwal wrote: This patch series add support for OMAP3517 / AM3517 EVM in ASOC. It also enables the required drivers - I2C and McBSP, along with Alsa SoC subsystem, in the default configuration for the EVM. Anuj Aggarwal (4): Audio: Adding OMAP3517 / AM3517 EVM support in ASOC Audio: Modifying Kconfig/Makefile for AM3517 EVM Audio: Modifying board-evm file for audio codec Audio: Modifying the defconfig for OMAP3517 / AM3517 EVM These all look good - I've applied patches 1 and 2 to ASoC, patches 3 and 4 should go via OMAP and are Tony, I could not find patches 3 4 on l-o master. Am I looking at the right branch? Acked-by: Mark Brown broo...@opensource.wolfsonmicro.com if it helps (or even if it doesn't!). Thanks. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: NAND misreads on omap beagle and overo
I did not went through complete mail. Still, you may want to try this patch: http://git.infradead.org/users/dedekind/l2-mtd-2.6.git/commitdiff/dcb2469bdd3d12f760bae509f86b4069081a99c5 On Fri, Jan 29, 2010 at 1:40 PM, Jeff DeFouw je...@i2k.com wrote: I'm getting occasional bad reads from NAND on a rev B7 Beagleboard and a Gumstix Overo Water. Both use OMAP3530 with 16-bit 256MB NAND, omap-patched kernels from 2.6.31 to 2.6.32.6 (Ubuntu beagleboard kernel binaries and my own compiled from source), and software ECC. Sometimes a read request will read back the last written command byte several times before the page data. The problem occurs with or without prefetch mode, and increasing chip_delay to 100 or 200 doesn't fix it. The chip is only supposed to need 25us anyway. If I prepare the flash with a pattern 00 01 02 03 ... fc fd fe ff ff fe fd fc ... 03 02 01 00 and then read every page (full or partial), sometimes I will get e0 ff e0 ff e0 ff e0 ff ... e0 ff 00 01 02 03 ... or 30 ff 30 ff 30 ff 30 ff ... 30 ff 00 01 02 03 ... 0x30 and 0xE0 are probably the read and change-column commands echoing back for some reason. This can cause uncorrectable ECC errors, so you can do a simple read of the mtd char device (no pattern necessary, erased flash will do) and run into the problem on the console if you're patient. (while dd if=/dev/mtd4 of=/dev/null bs=2048; do sleep 1; done) I can usually get at least one bad read within 4 full 250MB partition reads at 512-bytes per read call (more commands that way). For some reason some kernels, like the Ubuntu beagleboard 2.6.31.6-x6.0 binary, make this harder to reproduce. If you flip enough (unrelated) settings in the build config, it will happen more often. For example, removing the built-in (=y) RT2800USB wireless driver from that kernel can somehow make the difference between seeing an error in a couple minutes and not seeing an error for over 10 minutes of continuous reading. I've tried adding some udelays, and adjusting timings in the OMAP GPMC and checking for incorrect config. A long udelay in the read_buf function helped in one test, but also cut the transfer rate in half and may not have eliminated the problem. What event would cause the command byte to echo back anyway? Is that a typical busy NAND response, or something the OMAP memory controller has to be doing? -- Jeff DeFouw je...@i2k.com __ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Regards, Vimal Singh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] ASoC: AIC23: Fixing writes to non-existing registers in resume function
Commit e9ff5eb2 (Fixing infinite loop in resume path) uses wrong AIC23
register in resume function because of which register writes happen
on some non-existing registers.
Signed-off-by: Anuj Aggarwal anuj.aggar...@ti.com
---
sound/soc/codecs/tlv320aic23.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c
index a9dc5fb..da589d8 100644
--- a/sound/soc/codecs/tlv320aic23.c
+++ b/sound/soc/codecs/tlv320aic23.c
@@ -627,7 +627,7 @@ static int tlv320aic23_resume(struct platform_device *pdev)
u16 reg;
/* Sync reg_cache with the hardware */
- for (reg = 0; reg TLV320AIC23_RESET; reg++) {
+ for (reg = 0; reg = TLV320AIC23_ACTIVE; reg++) {
u16 val = tlv320aic23_read_reg_cache(codec, reg);
tlv320aic23_write(codec, reg, val);
}
--
1.6.2.4
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[PATCH 1/1] ASoC: AM3517: ASoC driver not getting compiled
Commit 761c9d45 (ASoC: Fix build of OMAP sound drivers) changes CONFIG_MACH_OMAP3517EVM - CONFIG_SND_OMAP_SOC_OMAP3517EVM in the Makefile. Whereas the config option defined in Kconfig is SND_OMAP_SOC_AM3517EVM. Because of this, ASoC driver for AM3517 was not getting compiled. Signed-off-by: Anuj Aggarwal anuj.aggar...@ti.com --- sound/soc/omap/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile index 3db8a6c..19283e5 100644 --- a/sound/soc/omap/Makefile +++ b/sound/soc/omap/Makefile @@ -25,7 +25,7 @@ obj-$(CONFIG_SND_OMAP_SOC_OSK5912) += snd-soc-osk5912.o obj-$(CONFIG_SND_OMAP_SOC_OVERO) += snd-soc-overo.o obj-$(CONFIG_SND_OMAP_SOC_OMAP2EVM) += snd-soc-omap2evm.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3EVM) += snd-soc-omap3evm.o -obj-$(CONFIG_SND_OMAP_SOC_OMAP3517EVM) += snd-soc-am3517evm.o +obj-$(CONFIG_SND_OMAP_SOC_AM3517EVM) += snd-soc-am3517evm.o obj-$(CONFIG_SND_OMAP_SOC_SDP3430) += snd-soc-sdp3430.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE) += snd-soc-omap3beagle.o -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2] OMAP: UART: fix full-fifo write abort
This patch is addition to the already merged commit on non-empty
uart fifo read abort. ce13d4716a276f4331d78ba28a5093a63822ab95
OMAP3630 and OMAP4430 UART IP blocks have a restriction on TX FIFO
too. If you try to write to the tx fifo when it is full, the system aborts.
This can be easily reproducible by not suppressing interconnect errors or
long duration testing where continuous prints over console from multiple
threads. This patch is addressing the issue by ensuring that write is
not issued while fifo is full. A timeout is added to avoid any hang
on fifo-full for 10 mS which is unlikely case.
Patch is validated on OMAP3630 and OMAP4 SDP.
V2 version removed the additional 1 uS on every TX as per
Tony's suggestion
Signed-off-by: Woodruff Richard r-woodru...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
CC: Ghorai Sukumar s-gho...@ti.com
---
arch/arm/mach-omap2/serial.c | 30 --
1 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 8c964be..324928d 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -23,6 +23,7 @@
#include linux/serial_reg.h
#include linux/clk.h
#include linux/io.h
+#include linux/delay.h
#include plat/common.h
#include plat/board.h
@@ -139,6 +140,13 @@ static inline unsigned int serial_read_reg(struct
plat_serial8250_port *up,
return (unsigned int)__raw_readb(up-membase + offset);
}
+static inline void __serial_write_reg(struct uart_port *up, int offset,
+ int value)
+{
+ offset = up-regshift;
+ __raw_writeb(value, up-membase + offset);
+}
+
static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
int value)
{
@@ -598,6 +606,20 @@ static unsigned int serial_in_override(struct uart_port
*up, int offset)
return __serial_read_reg(up, offset);
}
+static void serial_out_override(struct uart_port *up, int offset, int value)
+{
+ unsigned int status, tmout = 1;
+
+ status = __serial_read_reg(up, UART_LSR);
+ while (!(status UART_LSR_THRE)) {
+ /* Wait up to 10ms for the character(s) to be sent. */
+ if (--tmout == 0)
+ break;
+ udelay(1);
+ status = __serial_read_reg(up, UART_LSR);
+ }
+ __serial_write_reg(up, offset, value);
+}
void __init omap_serial_early_init(void)
{
int i;
@@ -698,11 +720,15 @@ void __init omap_serial_init_port(int port)
* omap3xxx: Never read empty UART fifo on UARTs
* with IP rev =0x52
*/
- if (cpu_is_omap44xx())
+ if (cpu_is_omap44xx()) {
uart-p-serial_in = serial_in_override;
+ uart-p-serial_out = serial_out_override;
+ }
else if ((serial_read_reg(uart-p, UART_OMAP_MVER) 0xFF)
- = UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
+ = UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) {
uart-p-serial_in = serial_in_override;
+ uart-p-serial_out = serial_out_override;
+ }
}
/**
--
1.6.0.4
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Re: [PATCH RE-SEND-3] ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
On Fri, Jan 29, 2010 at 03:43:35PM +0900, Kukjin Kim wrote: Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with L1 cache lines which are 64bytes to indicate this without having to alter the arch/arm/mm/Kconfig entry each time. Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6. This looks fine, thanks. Who's going to handle this patch? -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: Select CPU_32v6K for CPU_V7 only if ARCH_OMAP2 isnot selected
On Thu, 2010-01-28 at 18:33 +, Jamie Lokier wrote: Catalin Marinas wrote: Hmm, but then we can't compile in SMP for single core systems and keep it bootable on single core v6? Not with the current kernel since it hardcodes the shareability bit in the page tables and the LDREX/STREX operations don't work as expected on uniprocessor hardware. My understanding of LDREX/STREX is that it's allowed to be quite different on uniprocessors (and CPU-local activity on SMP), but if it's used properly it still works ok. Can you say a bit more about assumptions made by the kernel using LDREX/STREX that fail on uniprocessor hardware? Is it just the shareability bit in page tables having the wrong value? The kernel doesn't make any assumptions. It's the CPU that behaved differently when the page was marked as shareable in a UP system. I tried in the past and it looked like STREX was expecting some kind of global exclusive monitor and it was always failing. Anyway, it is possible that I don't recall correctly and it may have been just an ARM11MPCore but with the SMP/nAMP mode disabled but the STREX had already implemented with other expectations. It's worth giving it a try though. -- Catalin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: Select CPU_32v6K for CPU_V7 only if ARCH_OMAP2 isnot selected
On Thu, 2010-01-28 at 17:47 +, Tony Lindgren wrote: * Catalin Marinas catalin.mari...@arm.com [100128 02:58]: On Tue, 2010-01-26 at 19:37 +, Tony Lindgren wrote: Otherwise the kernel built with both CPU_V6 and CPU_V7 will not boot on omap2. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mm/Kconfig |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index baf6384..4c2e90d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -399,7 +399,7 @@ config CPU_V6 config CPU_32v6K bool Support ARM V6K processor extensions if !SMP depends on CPU_V6 - default y if SMP !ARCH_MX3 + default y if SMP !(ARCH_MX3 || ARCH_OMAP2) help Say Y here if your ARMv6 processor supports the 'K' extension. This enables the kernel to use some instructions not present @@ -410,7 +410,7 @@ config CPU_32v6K # ARMv7 config CPU_V7 bool Support ARM V7 processor if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX - select CPU_32v6K + select CPU_32v6K if !ARCH_OMAP2 I suspect that would be an issue for all ARMv6 platforms without the MP extensions (v6K). Could we do something like: select CPU_32v6K if SMP || !CPU_V6 Hmm, but then we can't compile in SMP for single core systems and keep it bootable on single core v6? Assuming that there is no issue with LDREX/STREX and the page shareability attribute (or that we sort it out), there is also the TLS register. The HAS_TLS_REG option gets enabled if SMP but I think that's a v6K extension. -- Catalin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [alsa-devel] [PATCH 1/1] ASoC: AIC23: Fixing writes to non-existing registers in resume function
On Fri, 2010-01-29 at 13:58 +0530, Anuj Aggarwal wrote: Commit e9ff5eb2 (Fixing infinite loop in resume path) uses wrong AIC23 register in resume function because of which register writes happen on some non-existing registers. Signed-off-by: Anuj Aggarwal anuj.aggar...@ti.com Acked-by: Liam Girdwood l...@slimlogic.co.uk -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: AM3517 EVM defconfig
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Doug Kehn Sent: Friday, January 29, 2010 2:57 AM To: linux-omap@vger.kernel.org Subject: AM3517 EVM defconfig Hi All, I received my AM3517 EVM. It came with kernel 2.6.31-rc7 that looks to have been built with omap3517_evm_defconfig. linux-omap appears to be at 2.6.33-rc5. However, I don't see an omap3517_evm_defconfig. Does linux-omap contain a default config for the AM3517 EVM? Does omap_evm_defconfig, or omap_zoom3_defconfig correlate to omap3517_evm_defconfig? [Hiremath, Vaibhav] Please use am3517_evm_defconfig. Thanks, Vaibhav Thanks, ...doug -- To unsubscribe from this list: send the line unsubscribe linux- omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] OMAP4: Enable L2 cache
Tony, Here is the rebased series against 2.6.33-rc5 which adds L2 cache support on OMAP4430. I have dropped the l2 errata patch from earlier post [1] in this series since it will go through Russell's patch system. The link for patches is [2] The following changes since commit 92dcffb916d309aa01778bf8963a6932e4014d07: Linus Torvalds (1): Linux 2.6.33-rc5 Santosh Shilimkar (3): OMAP4: Add L2 Cache support OMAP4: Clean the secondary_data from L2 OMAP4: Enable L2 Cache arch/arm/configs/omap_4430sdp_defconfig|2 + arch/arm/mach-omap2/board-4430sdp.c| 33 arch/arm/mach-omap2/omap-smp.c |2 + arch/arm/mm/Kconfig|2 +- arch/arm/plat-omap/include/plat/omap44xx.h |1 + 5 files changed, 39 insertions(+), 1 deletions(-) Regards, Santosh [1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg20553.html [2] http://www.spinics.net/lists/arm-kernel/msg81122.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 0/2] Get rid of ifdef in board file
Here is the Version 4 of the 2 patch series based on top of Felipe's for-tony branch at [1]. [1] git://gitorious.org/usb/usb.git for-tony Maulik Mankad (2): [PATCH 1/2] USB : Add empty functions in otg.h [PATCH 2/2] ARM : OMAP : Remove #ifdef from board-omap3evm.c The Version 4 of the patch set fixes the build break issue with Version 3 at [2] [2] http://patchwork.kernel.org/patch/70950/ Patch 2/2 depends on Patch 1/2. The patches are compile tested and do not report any checkpatch warnings. Thanks, Maulik -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 1/2] USB: Add empty functions in otg.h
USB : Add empty functions in otg.h
Add empty functions for usb_nop_xceiv_register()
and usb_nop_xceiv_unregister() in otg.h so that
these functions can be called even when
CONFIG_NOP_USB_XCEIV is not enabled.
It allows to remove ifdef's from board file.
Signed-off-by: Maulik Mankad x0082...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Greg Kroah-Hartman gre...@suse.de
Cc: Olof Johansson o...@lixom.net
Cc: Sergei Shtylyov sshtyl...@ru.mvista.com
Cc: Gupta, Ajay Kumar ajay.gu...@ti.com
---
Index: felipe_musb/include/linux/usb/otg.h
===
--- felipe_musb.orig/include/linux/usb/otg.h
+++ felipe_musb/include/linux/usb/otg.h
@@ -110,9 +110,19 @@ struct otg_transceiver {
/* for board-specific init logic */
extern int otg_set_transceiver(struct otg_transceiver *);
+#if defined(CONFIG_NOP_USB_XCEIV) || defined(CONFIG_NOP_USB_XCEIV_MODULE)
/* sometimes transceivers are accessed only through e.g. ULPI */
extern void usb_nop_xceiv_register(void);
extern void usb_nop_xceiv_unregister(void);
+#else
+static inline void usb_nop_xceiv_register(void)
+{
+}
+
+static inline void usb_nop_xceiv_unregister(void)
+{
+}
+#endif
/* helpers for direct access thru low-level io interface */
static inline int otg_io_read(struct otg_transceiver *otg, u32 reg)
--
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[PATCH v4 2/2] ARM : OMAP : Remove #ifdef from board-omap3evm.c
ARM : OMAP : Remove #ifdef from board-omap3evm.c
This patch removes #ifdef around usb_nop_xceiv_register()
from board-omap3evm.c
Signed-off-by: Maulik Mankad x0082...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Felipe Balbi felipe.ba...@nokia.com
Cc: Greg Kroah-Hartman gre...@suse.de
Cc: Olof Johansson o...@lixom.net
---
Index: felipe_musb/arch/arm/mach-omap2/board-omap3evm.c
===
--- felipe_musb.orig/arch/arm/mach-omap2/board-omap3evm.c
+++ felipe_musb/arch/arm/mach-omap2/board-omap3evm.c
@@ -444,10 +444,10 @@ static void __init omap3_evm_init(void)
ARRAY_SIZE(omap3evm_spi_board_info));
omap_serial_init();
-#ifdef CONFIG_NOP_USB_XCEIV
+
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
usb_nop_xceiv_register();
-#endif
+
if (get_omap3_evm_rev() = OMAP3EVM_BOARD_GEN_2) {
/* enable EHCI VBUS using GPIO22 */
omap_mux_init_gpio(22, OMAP_PIN_INPUT_PULLUP);
--
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RE: [PATCH 0/3] OMAP4: Enable L2 cache
Resending patches with numbers. -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Shilimkar, Santosh Sent: Friday, January 29, 2010 5:01 PM To: Tony Lindgren Cc: Russell King; Catalin Marinas; linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org Subject: [PATCH 0/3] OMAP4: Enable L2 cache Tony, Here is the rebased series against 2.6.33-rc5 which adds L2 cache support on OMAP4430. I have dropped the l2 errata patch from earlier post [1] in this series since it will go through Russell's patch system. The link for patches is [2] The following changes since commit 92dcffb916d309aa01778bf8963a6932e4014d07: Linus Torvalds (1): Linux 2.6.33-rc5 Santosh Shilimkar (3): OMAP4: Add L2 Cache support OMAP4: Clean the secondary_data from L2 OMAP4: Enable L2 Cache arch/arm/configs/omap_4430sdp_defconfig|2 + arch/arm/mach-omap2/board-4430sdp.c| 33 arch/arm/mach-omap2/omap-smp.c |2 + arch/arm/mm/Kconfig|2 +- arch/arm/plat-omap/include/plat/omap44xx.h |1 + 5 files changed, 39 insertions(+), 1 deletions(-) Regards, Santosh [1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg20553.html [2] http://www.spinics.net/lists/arm-kernel/msg81122.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] OMAP4: Add L2 Cache support
This patch adds L2 Cache support for OMAP4. External L2 cache
is used in OMPA4
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c| 33
arch/arm/mm/Kconfig|2 +-
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
3 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 0c6be6b..194d633 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,38 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata
= {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache using secure api
+* r0 contains the value to be modified and r12 contains
+* the monitor API number. This API uses few CPU registers
+* internally and hence they need be backed up including
+* link register lr.
+*/
+ __asm__ __volatile__(
+ stmfd r13!, {r0-r12, r14}\n
+ mov r0, #1\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r0-r12, r14});
+
+ /* 32KB way size, 16-way associativity,
+ * parity disabled
+ */
+ l2x0_init(l2cache_base, 0x0e05, 0xcfff);
+
+ return 0;
+}
+early_initcall(omap_l2_cache_init);
+#endif
static void __init gic_init_irq(void)
{
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index baf6384..696e83e 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -754,7 +754,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0
bool Enable the L2x0 outer cache controller
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP ||
MACH_REALVIEW_PB1176 || \
- REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 ||
MACH_REALVIEW_PBX || ARCH_NOMADIK
+ REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 ||
MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
default y
select OUTER_CACHE
help
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h
b/arch/arm/plat-omap/include/plat/omap44xx.h
index ef870de..c7d628e 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -40,6 +40,7 @@
#define OMAP44XX_GIC_CPU_BASE 0x48240100
#define OMAP44XX_SCU_BASE 0x4824
#define OMAP44XX_LOCAL_TWD_BASE0x48240600
+#define OMAP44XX_L2CACHE_BASE 0x48242000
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
--
1.6.0.4
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[PATCH 2/3] OMAP4: Clean the secondary_data from L2
The boot_secondary() needs to call outer_clean_range() because the L2 cache is already enabled in the kernel boot with early_initcall Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com --- arch/arm/mach-omap2/omap-smp.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 38153e5..2d0733a 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -73,6 +73,8 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * the AuxCoreBoot1 register is updated with cpu state * A barrier is added to ensure that write buffer is drained */ + flush_cache_all(); + outer_clean_range(__pa(secondary_data), __pa(secondary_data + 1)); omap_modify_auxcoreboot0(0x200, 0x0); flush_cache_all(); smp_wmb(); -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] OMAP4: Enable L2 Cache
This patch enables L2 cache and associated Errata on the OMAP4430 SDP. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com --- arch/arm/configs/omap_4430sdp_defconfig |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig index 3de640a..781770f 100644 --- a/arch/arm/configs/omap_4430sdp_defconfig +++ b/arch/arm/configs/omap_4430sdp_defconfig @@ -242,6 +242,8 @@ CONFIG_CPU_CP15_MMU=y # CONFIG_CPU_DCACHE_DISABLE is not set # CONFIG_CPU_BPREDICT_DISABLE is not set CONFIG_HAS_TLS_REG=y +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y CONFIG_ARM_L1_CACHE_SHIFT=5 # CONFIG_ARM_ERRATA_430973 is not set # CONFIG_ARM_ERRATA_458693 is not set -- 1.6.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [alsa-devel] [PATCH 2/2] ASoC: OMAP-McBSP: ASoC interface for McBSP sidetone
Hi,
From: ext Liam Girdwood [mailto:l...@slimlogic.co.uk]
Sent: 28 January, 2010 18:22
On Thu, 2010-01-28 at 17:46 +0200, Ilkka Koskinen wrote:
Add ASoC interface for OMAP McBSP2 and McBSP3 sidetones.
Signed-off-by: Ilkka Koskinen ilkka.koski...@nokia.com
---
sound/soc/omap/omap-mcbsp.c | 187
+++
sound/soc/omap/omap-mcbsp.h |2 +
2 files changed, 189 insertions(+), 0 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c
b/sound/soc/omap/omap-mcbsp.c
index 6bbbd2a..295620b 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -39,6 +39,14 @@
snip
+/* McBSP Sidetone Switch */
+static const char *omap_mcbsp_st_status[] = {
+off,
+on,
+};
+
Should this not be a switch (like a mute switch) rather than an enum
kcontrol ?
Makes sense. I'll change it.
+static const struct soc_enum omap_mcbsp_st_status_enum[] = {
+SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(omap_mcbsp_st_status),
+omap_mcbsp_st_status),
+};
+
+static const struct snd_kcontrol_new omap_mcbsp2_st_controls[] = {
+SOC_ENUM_EXT(McBSP2 Sidetone Switch,
omap_mcbsp_st_status_enum[0],
+omap_mcbsp2_st_get_mode,
omap_mcbsp2_st_set_mode),
+OMAP_MCBSP_SOC_SINGLE_S16_EXT(McBSP2 Sidetone Channel
0 Volume,
+ -32768, 32767,
+ omap_mcbsp2_get_st_ch0_volume,
+ omap_mcbsp2_set_st_ch0_volume),
+OMAP_MCBSP_SOC_SINGLE_S16_EXT(McBSP2 Sidetone Channel
1 Volume,
+ -32768, 32767,
+ omap_mcbsp2_get_st_ch1_volume,
+ omap_mcbsp2_set_st_ch1_volume),
+};
+
+static const struct snd_kcontrol_new omap_mcbsp3_st_controls[] = {
+SOC_ENUM_EXT(McBSP3 Sidetone Switch,
omap_mcbsp_st_status_enum[0],
+omap_mcbsp3_st_get_mode,
omap_mcbsp3_st_set_mode),
+OMAP_MCBSP_SOC_SINGLE_S16_EXT(McBSP3 Sidetone Channel
0 Volume,
+ -32768, 32767,
+ omap_mcbsp3_get_st_ch0_volume,
+ omap_mcbsp3_set_st_ch0_volume),
+OMAP_MCBSP_SOC_SINGLE_S16_EXT(McBSP3 Sidetone Channel
1 Volume,
+ -32768, 32767,
+ omap_mcbsp3_get_st_ch1_volume,
+ omap_mcbsp3_set_st_ch1_volume),
+};
+
+int omap_mcbsp_st_add_controls(struct snd_soc_codec *codec,
int mcbsp_id)
+{
+if (!cpu_is_omap34xx())
+return -ENODEV;
+
+switch (mcbsp_id) {
+case 2: /* McBSP 2 */
+return snd_soc_add_controls(codec,
omap_mcbsp2_st_controls,
+
ARRAY_SIZE(omap_mcbsp2_st_controls));
+case 3: /* McBSP 3 */
+return snd_soc_add_controls(codec,
omap_mcbsp3_st_controls,
+
ARRAY_SIZE(omap_mcbsp3_st_controls));
+default:
+break;
+}
+
+return -1;
-EINVAL;
Oops, thanks.
Cheers, Ilkka
+}
+EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls);
+
static int __init snd_omap_mcbsp_init(void)
{
return snd_soc_register_dais(omap_mcbsp_dai,
diff --git a/sound/soc/omap/omap-mcbsp.h
b/sound/soc/omap/omap-mcbsp.h
index 647d2f9..7537435 100644
--- a/sound/soc/omap/omap-mcbsp.h
+++ b/sound/soc/omap/omap-mcbsp.h
@@ -57,4 +57,6 @@ enum omap_mcbsp_div {
extern struct snd_soc_dai omap_mcbsp_dai[NUM_LINKS];
+int omap_mcbsp_st_add_controls(struct snd_soc_codec *codec,
int mcbsp_id);
+
#endif
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Re: [PATCH 1/3] OMAP4: Add L2 Cache support
On Fri, 2010-01-29 at 11:46 +, Santosh Shilimkar wrote:
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,38 @@ static struct omap_lcd_config sdp4430_lcd_config
__initdata = {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache using secure api
+* r0 contains the value to be modified and r12 contains
+* the monitor API number. This API uses few CPU registers
+* internally and hence they need be backed up including
+* link register lr.
+*/
+ __asm__ __volatile__(
+ stmfd r13!, {r0-r12, r14}\n
+ mov r0, #1\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r0-r12, r14});
Same comments as on the cache-l2x0.c changes - can you not let the
compiler choose what to saved by declaring the clobbered register in the
asm directive?
--
Catalin
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RE: [PATCH 1/3] OMAP4: Add L2 Cache support
Thanks for quick comment.
-Original Message-
From: Catalin Marinas [mailto:catalin.mari...@arm.com]
Sent: Friday, January 29, 2010 5:46 PM
To: Shilimkar, Santosh
Cc: t...@atomide.com; linux-arm-ker...@lists.infradead.org;
r...@arm.linux.org.uk; linux-
o...@vger.kernel.org
Subject: Re: [PATCH 1/3] OMAP4: Add L2 Cache support
On Fri, 2010-01-29 at 11:46 +, Santosh Shilimkar wrote:
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,38 @@ static struct omap_lcd_config sdp4430_lcd_config
__initdata = {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache using secure api
+* r0 contains the value to be modified and r12 contains
+* the monitor API number. This API uses few CPU registers
+* internally and hence they need be backed up including
+* link register lr.
+*/
+ __asm__ __volatile__(
+ stmfd r13!, {r0-r12, r14}\n
+ mov r0, #1\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r0-r12, r14});
Same comments as on the cache-l2x0.c changes - can you not let the
compiler choose what to saved by declaring the clobbered register in the
asm directive?
Since this code was used only ones in init, I haven't converted it to function.
With clobber list
as well as you know adding r12 to clobber list, compiler don't generate the
save code
and r11 can't be added to clobber list.
But I can do the same change as I did in the cache-l2x0.c Will send updated
version.
Regards,
Santosh
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RE: [PATCHv2 0/4] Regulator: OMAP: Removing common code for TWL4030 from OMAP3- board-evms
-Original Message- From: Mark Brown [mailto:broo...@opensource.wolfsonmicro.com] Sent: Friday, January 15, 2010 4:43 PM To: Aggarwal, Anuj Cc: linux-omap@vger.kernel.org; l...@slimlogic.co.uk Subject: Re: [PATCHv2 0/4] Regulator: OMAP: Removing common code for TWL4030 from OMAP3- board-evms On Tue, Jan 12, 2010 at 02:43:45PM +0530, Anuj Aggarwal wrote: Anuj Aggarwal (4): Regulator: OMAP: Creating TWL4030 file having supplies init data I'd expect to see the header file here have ifdef guards and also include the headers it depends on (linux/regulator/machine.h at least) but both of those could be fixed up later. Otherwise it all looks OK from a regulator point of view Acked-by: Mark Brown broo...@opensource.wolfsonmicro.com Tony, Have you pulled these patches? I need to send another patch set for other PMICs which would be based on the first set. Are you expecting some change in the original set? Please let me know if that is the case. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3 v2] OMAP4: Add L2 Cache support
This patch adds L2 Cache support for OMAP4. External L2 cache
is used in OMPA4
v2 version incorporates Catalin's commnet on the register
save/restore list
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
CC: Catalin Marinas catalin.mari...@arm.com
---
arch/arm/mach-omap2/board-4430sdp.c| 45
arch/arm/mm/Kconfig|2 +-
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
3 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 0c6be6b..a828c77 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,50 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata
= {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static noinline void omap_l2x_control(unsigned long val)
+{
+ register unsigned long r0 asm(r0) = val;
+
+ /* This API modifies Pl310 Control Register.
+* r0 contains the value to be modified and r12 contains
+* the monitor API number. It uses few CPU registers
+* internally and hence they need be backed up including
+* link register lr.
+* Explicitly save r11 and r12 since the compiler generated
+* code won't save it.
+*/
+ __asm__ __volatile__(
+ __asmeq(%0, r0)
+ stmfd r13!, {r11,r12}\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r11,r12}\n
+ : : r (r0)
+ : r4, r5, r10, lr);
+}
+
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache controller */
+ omap_l2x_control(0x1);
+
+ /* 32KB way size, 16-way associativity,
+ * parity disabled
+ */
+ l2x0_init(l2cache_base, 0x0e05, 0xcfff);
+
+ return 0;
+}
+early_initcall(omap_l2_cache_init);
+#endif
static void __init gic_init_irq(void)
{
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index baf6384..696e83e 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -754,7 +754,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0
bool Enable the L2x0 outer cache controller
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP ||
MACH_REALVIEW_PB1176 || \
- REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 ||
MACH_REALVIEW_PBX || ARCH_NOMADIK
+ REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 ||
MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
default y
select OUTER_CACHE
help
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h
b/arch/arm/plat-omap/include/plat/omap44xx.h
index ef870de..c7d628e 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -40,6 +40,7 @@
#define OMAP44XX_GIC_CPU_BASE 0x48240100
#define OMAP44XX_SCU_BASE 0x4824
#define OMAP44XX_LOCAL_TWD_BASE0x48240600
+#define OMAP44XX_L2CACHE_BASE 0x48242000
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
--
1.6.0.4
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Re: [PATCH 1/1] ASoC: AIC23: Fixing writes to non-existing registers in resume function
On Fri, Jan 29, 2010 at 01:58:55PM +0530, Anuj Aggarwal wrote: Commit e9ff5eb2 (Fixing infinite loop in resume path) uses wrong AIC23 register in resume function because of which register writes happen on some non-existing registers. Signed-off-by: Anuj Aggarwal anuj.aggar...@ti.com Applied, thanks. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ASoC: AM3517: ASoC driver not getting compiled
On Fri, Jan 29, 2010 at 03:49:22PM +0530, Anuj Aggarwal wrote: Commit 761c9d45 (ASoC: Fix build of OMAP sound drivers) changes CONFIG_MACH_OMAP3517EVM - CONFIG_SND_OMAP_SOC_OMAP3517EVM in the Makefile. Whereas the config option defined in Kconfig is SND_OMAP_SOC_AM3517EVM. Because of this, ASoC driver for AM3517 was not getting compiled. Signed-off-by: Anuj Aggarwal anuj.aggar...@ti.com Applied, thanks. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] OMAP4: Add L2 Cache support
On Fri, Jan 29, 2010 at 05:56:55PM +0530, Shilimkar, Santosh wrote:
Thanks for quick comment.
-Original Message-
From: Catalin Marinas [mailto:catalin.mari...@arm.com]
Sent: Friday, January 29, 2010 5:46 PM
To: Shilimkar, Santosh
Cc: t...@atomide.com; linux-arm-ker...@lists.infradead.org;
r...@arm.linux.org.uk; linux-
o...@vger.kernel.org
Subject: Re: [PATCH 1/3] OMAP4: Add L2 Cache support
On Fri, 2010-01-29 at 11:46 +, Santosh Shilimkar wrote:
+#ifdef CONFIG_CACHE_L2X0
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache using secure api
+* r0 contains the value to be modified and r12 contains
+* the monitor API number. This API uses few CPU registers
+* internally and hence they need be backed up including
+* link register lr.
+*/
+ __asm__ __volatile__(
+ stmfd r13!, {r0-r12, r14}\n
+ mov r0, #1\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r0-r12, r14});
Same comments as on the cache-l2x0.c changes - can you not let the
compiler choose what to saved by declaring the clobbered register in the
asm directive?
Since this code was used only ones in init, I haven't converted it to
function. With clobber list as well as you know adding r12 to clobber
list, compiler don't generate the save code and r11 can't be added to
clobber list.
Well, we seem to have two places with the same code structure. Let's
pull them together into a common function, such as:
void omap_smc1(u32 fn, u32 arg)
{
register u32 r12 asm(r12) = fn;
register u32 r0 asm(r0) = arg;
asm volatile(
str r11, [sp], #-4\n
dsb\n
smc\n
ldr r11, [sp, #4]!
: +r (r0), +r (r12)
:
: r0-r10, lr, cc);
}
EXPORT_SYMBOL(omap_smc1);
The code there probably may not be Thumb-2 compatible.
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Re: [PATCH 0/2] McBSP: OMAP3: Add sidetone feature
Hi, On Thu, 28 Jan 2010, ext Jarkko Nikula wrote: On Thu, 28 Jan 2010 17:46:25 +0200 Ilkka Koskinen ilkka.koski...@nokia.com wrote: The first patch implements McBSP sidetone feature on OMAP3 while the second one provides ALSA interface for using it. The patch set is based on the patch Eduardo Valentin sent to alsa-devel mailing list in October 2009. Channel gain control and enabling the sidetone have been moved to ALSA interface as suggested in comments. Eero Nurkkala (1): McBSP: OMAP3: Add sidetone feature Ilkka Koskinen (1): ASoC: OMAP-McBSP: ASoC interface for McBSP sidetone arch/arm/mach-omap2/mcbsp.c |2 + arch/arm/plat-omap/include/plat/mcbsp.h | 63 + arch/arm/plat-omap/mcbsp.c | 402 ++- sound/soc/omap/omap-mcbsp.c | 187 ++ sound/soc/omap/omap-mcbsp.h |2 + 5 files changed, 655 insertions(+), 1 deletions(-) For me the separation between arch/arm/plat-omap/mcbsp.c and sound/soc/omap/omap-mcbsp.c and board specific control registration function omap_mcbsp_st_add_controls looks ok. Set applies well on top of vanilla but the patch 1 doesn't apply on linux-omap due commit bcbb73c6fe8544bb50cddb8b5df0e2fcbb08b4b0. I guess that's the case, since I just tested the patches on top linux-omap-2.6 master and sound tree... I was thinking that it makes sense to base the patch 1 on top of McBSP register cache patches from Janusz Krzysztofik after Tony applies them (+ having cache for ST regs). That avoid conflicts in mainline and makes the sidetone also ready for McBSP context save/restore functionality. I'm ok with that. So would you suggest me to prepare the cache patch for ST registers? If so, would it be possible to make it as follow-up patch? Cheers, Ilkka -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] McBSP: OMAP3: Add sidetone feature
On Fri, 29 Jan 2010 16:51:16 +0200 (EET) Ilkka Koskinen ikosk...@nokia.com wrote: Set applies well on top of vanilla but the patch 1 doesn't apply on linux-omap due commit bcbb73c6fe8544bb50cddb8b5df0e2fcbb08b4b0. I guess that's the case, since I just tested the patches on top linux-omap-2.6 master and sound tree... Yeah, McBSP is always bit problematic as it spreads between two subsystems. Some recent patches has been pushed via ALSA tree but now that would lead to conflict. I was thinking that it makes sense to base the patch 1 on top of McBSP register cache patches from Janusz Krzysztofik after Tony applies them (+ having cache for ST regs). That avoid conflicts in mainline and makes the sidetone also ready for McBSP context save/restore functionality. I'm ok with that. So would you suggest me to prepare the cache patch for ST registers? If so, would it be possible to make it as follow-up patch? That's ok. As there is no currently implementation for context save/restore in McBSP, the follow-up patch is even better than doing everything in the patch 2. -- Jarkko -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: NAND misreads on omap beagle and overo
On Fri, Jan 29, 2010 at 01:56:59PM +0530, Vimal Singh wrote: I did not went through complete mail. Still, you may want to try this patch: http://git.infradead.org/users/dedekind/l2-mtd-2.6.git/commitdiff/dcb2469bdd3d12f760bae509f86b4069081a99c5 I disabled prefetch after the first few tests to make sure this wasn't an issue. -- Jeff DeFouw je...@i2k.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] OMAP4: Add L2 Cache support
* Santosh Shilimkar santosh.shilim...@ti.com [100129 03:44]:
This patch adds L2 Cache support for OMAP4. External L2 cache
is used in OMPA4
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c| 33
arch/arm/mm/Kconfig|2 +-
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
3 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 0c6be6b..194d633 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,38 @@ static struct omap_lcd_config sdp4430_lcd_config
__initdata = {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
Since this is an initcall, you need to return here early to avoid
running on other omaps:
if (!cpu_is_omap44xx())
return -ENODEV;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache using secure api
+ * r0 contains the value to be modified and r12 contains
+ * the monitor API number. This API uses few CPU registers
+ * internally and hence they need be backed up including
+ * link register lr.
+ */
+ __asm__ __volatile__(
+ stmfd r13!, {r0-r12, r14}\n
+ mov r0, #1\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r0-r12, r14});
+
+ /* 32KB way size, 16-way associativity,
+ * parity disabled
+ */
+ l2x0_init(l2cache_base, 0x0e05, 0xcfff);
+
+ return 0;
+}
+early_initcall(omap_l2_cache_init);
+#endif
Regards,
Tony
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Re: [PATCH 1/3 v2] OMAP4: Add L2 Cache support
Hi,
Sorry, replied to the older version. Same comment here again.
* Santosh Shilimkar santosh.shilim...@ti.com [100129 05:28]:
This patch adds L2 Cache support for OMAP4. External L2 cache
is used in OMPA4
v2 version incorporates Catalin's commnet on the register
save/restore list
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
CC: Catalin Marinas catalin.mari...@arm.com
---
arch/arm/mach-omap2/board-4430sdp.c| 45
arch/arm/mm/Kconfig|2 +-
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
3 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 0c6be6b..a828c77 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -28,6 +28,7 @@
#include plat/control.h
#include plat/timer-gp.h
#include asm/hardware/gic.h
+#include asm/hardware/cache-l2x0.h
static struct platform_device sdp4430_lcd_device = {
.name = sdp4430_lcd,
@@ -49,6 +50,50 @@ static struct omap_lcd_config sdp4430_lcd_config
__initdata = {
static struct omap_board_config_kernel sdp4430_config[] __initdata = {
{ OMAP_TAG_LCD, sdp4430_lcd_config },
};
+#ifdef CONFIG_CACHE_L2X0
+static noinline void omap_l2x_control(unsigned long val)
+{
+ register unsigned long r0 asm(r0) = val;
+
+ /* This API modifies Pl310 Control Register.
+ * r0 contains the value to be modified and r12 contains
+ * the monitor API number. It uses few CPU registers
+ * internally and hence they need be backed up including
+ * link register lr.
+ * Explicitly save r11 and r12 since the compiler generated
+ * code won't save it.
+ */
+ __asm__ __volatile__(
+ __asmeq(%0, r0)
+ stmfd r13!, {r11,r12}\n
+ ldr r12, =0x102\n
+ dsb\n
+ smc\n
+ ldmfd r13!, {r11,r12}\n
+ : : r (r0)
+ : r4, r5, r10, lr);
+}
+
+static int __init omap_l2_cache_init(void)
+{
+ void __iomem *l2cache_base;
if (!cpu_is_omap44xx())
return -ENODEV;
+
+ /* Static mapping, never released */
+ l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
+ BUG_ON(!l2cache_base);
+
+ /* Enable L2 Cache controller */
+ omap_l2x_control(0x1);
+
+ /* 32KB way size, 16-way associativity,
+ * parity disabled
+ */
+ l2x0_init(l2cache_base, 0x0e05, 0xcfff);
+
+ return 0;
+}
+early_initcall(omap_l2_cache_init);
+#endif
Because it's an initcall.
Tony
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Re: [PATCH RE-SEND-3] ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
* Russell King - ARM Linux li...@arm.linux.org.uk [100129 02:27]: On Fri, Jan 29, 2010 at 03:43:35PM +0900, Kukjin Kim wrote: Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with L1 cache lines which are 64bytes to indicate this without having to alter the arch/arm/mm/Kconfig entry each time. Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6. This looks fine, thanks. Who's going to handle this patch? I recommend RMK handle this. Acked-by: Tony Lindgren t...@atomide.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP2/3: update default defconfig, towards smaller kernel
Update omap3_defconfig to work towards a minimal kernel by building most things as modules. Some drivers that cannot currently be built as modules and need to be fixed: - MMC: platform code uses MMC core regulator functions directly - ASoC: drivers call omap_ctrl_[read|write] directly In addition some additional changes: - use new SLUB allocator instead of SLAB (increased debugability) - compile with PREEMPT enabled by default - disable OABI_COMPAT. We should not pretend to support this IMHO - disable CPUfreq: not yet supported in mainline - disable PM_DEBUG_VERBOSE - enable fb/DSS2 as modules - disable Kprobes zImage size comparison before: 3160272 after: 2610108 Some ideas for reducing this further: - fix MMC and ASoC, then build those as modules - disable all the kernel debug features - convert MTD and all flash fs to modules Then, we should have platform specific initramfs configs so rootfs from flash, MMC, etc. could be done using modules in initramfs. Signed-off-by: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/configs/omap3_defconfig | 215 -- 1 files changed, 112 insertions(+), 103 deletions(-) diff --git a/arch/arm/configs/omap3_defconfig b/arch/arm/configs/omap3_defconfig index 2bc80d7..247f191 100644 --- a/arch/arm/configs/omap3_defconfig +++ b/arch/arm/configs/omap3_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.33-rc5 -# Tue Jan 26 11:05:31 2010 +# Fri Jan 29 16:02:40 2010 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -32,6 +32,7 @@ CONFIG_CONSTRUCTORS=y # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION= CONFIG_LOCALVERSION_AUTO=y @@ -105,16 +106,16 @@ CONFIG_AIO=y # Kernel Performance Events And Counters # CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_SLUB_DEBUG is not set CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y +CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_KRETPROBES=y +# CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_CLK=y @@ -125,7 +126,6 @@ CONFIG_HAVE_CLK=y # CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y @@ -251,7 +251,7 @@ CONFIG_OMAP_MUX=y CONFIG_OMAP_MUX_DEBUG=y CONFIG_OMAP_MUX_WARNINGS=y CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set +CONFIG_OMAP_MBOX_FWK=m # CONFIG_OMAP_MPU_TIMER is not set CONFIG_OMAP_32K_TIMER=y CONFIG_OMAP_32K_TIMER_HZ=128 @@ -354,13 +354,14 @@ CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC000 -CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set +CONFIG_PREEMPT=y CONFIG_HZ=128 # CONFIG_THUMB2_KERNEL is not set CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_HIGHMEM is not set @@ -394,21 +395,12 @@ CONFIG_ATAGS_PROC=y # # CPU Power Management # -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set # CONFIG_CPU_IDLE is not set # @@ -439,11 +431,10 @@ CONFIG_BINFMT_MISC=y # CONFIG_PM=y CONFIG_PM_DEBUG=y -CONFIG_PM_VERBOSE=y +# CONFIG_PM_VERBOSE is not set CONFIG_CAN_PM_TRACE=y CONFIG_PM_SLEEP=y CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set CONFIG_SUSPEND_FREEZER=y # CONFIG_APM_EMULATION is not set # CONFIG_PM_RUNTIME is not set @@ -539,32 +530,31 @@ CONFIG_NETFILTER_ADVANCED=y # Network testing # # CONFIG_NET_PKTGEN is not set -# CONFIG_NET_TCPPROBE is not set # CONFIG_NET_DROP_MONITOR is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set -CONFIG_BT=y -CONFIG_BT_L2CAP=y -CONFIG_BT_SCO=y -CONFIG_BT_RFCOMM=y +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=y +CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=y +CONFIG_BT_HIDP=m # # Bluetooth device drivers #
Re: [PATCH] OMAP2/3: update default defconfig, towards smaller kernel
Kevin Hilman had written, on 01/29/2010 06:26 PM, the following: Update omap3_defconfig to work towards a minimal kernel by building most things as modules. Some drivers that cannot currently be built as modules and need to be fixed: - MMC: platform code uses MMC core regulator functions directly - ASoC: drivers call omap_ctrl_[read|write] directly In addition some additional changes: - use new SLUB allocator instead of SLAB (increased debugability) - compile with PREEMPT enabled by default - disable OABI_COMPAT. We should not pretend to support this IMHO Curious: Does'nt most of busybox build's fail to boot without this? - disable CPUfreq: not yet supported in mainline - disable PM_DEBUG_VERBOSE - enable fb/DSS2 as modules - disable Kprobes zImage size comparison before: 3160272 after: 2610108 Some ideas for reducing this further: - fix MMC and ASoC, then build those as modules - disable all the kernel debug features - convert MTD and all flash fs to modules Then, we should have platform specific initramfs configs so rootfs from flash, MMC, etc. could be done using modules in initramfs. How would we boot a system such as beagleboard new generation which may only have MMC from defconfig? hmm.. we could in theory get u-boot to load up an initial intramfs with modules, use that to mount a final filesystem etc.. but it is going to be a big pain if we were to do it.. IMHO, having flash, MMC, network will ease for developers to send quick tested solutions to us. Now, not that I am saying that the idea is bad - it is just a matter of trouble we might cause- how about a omap3_tiny_defconfig? Signed-off-by: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/configs/omap3_defconfig | 215 -- 1 files changed, 112 insertions(+), 103 deletions(-) diff --git a/arch/arm/configs/omap3_defconfig b/arch/arm/configs/omap3_defconfig index 2bc80d7..247f191 100644 --- a/arch/arm/configs/omap3_defconfig +++ b/arch/arm/configs/omap3_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.33-rc5 -# Tue Jan 26 11:05:31 2010 +# Fri Jan 29 16:02:40 2010 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -32,6 +32,7 @@ CONFIG_CONSTRUCTORS=y # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION= CONFIG_LOCALVERSION_AUTO=y @@ -105,16 +106,16 @@ CONFIG_AIO=y # Kernel Performance Events And Counters # CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_SLUB_DEBUG is not set CONFIG_COMPAT_BRK=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y +CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_KRETPROBES=y +# CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_CLK=y @@ -125,7 +126,6 @@ CONFIG_HAVE_CLK=y # CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y @@ -251,7 +251,7 @@ CONFIG_OMAP_MUX=y CONFIG_OMAP_MUX_DEBUG=y CONFIG_OMAP_MUX_WARNINGS=y CONFIG_OMAP_MCBSP=y -# CONFIG_OMAP_MBOX_FWK is not set +CONFIG_OMAP_MBOX_FWK=m # CONFIG_OMAP_MPU_TIMER is not set CONFIG_OMAP_32K_TIMER=y CONFIG_OMAP_32K_TIMER_HZ=128 @@ -354,13 +354,14 @@ CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC000 -CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set +CONFIG_PREEMPT=y CONFIG_HZ=128 # CONFIG_THUMB2_KERNEL is not set CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_HIGHMEM is not set @@ -394,21 +395,12 @@ CONFIG_ATAGS_PROC=y # # CPU Power Management # -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set # CONFIG_CPU_IDLE is not set # @@ -439,11 +431,10 @@ CONFIG_BINFMT_MISC=y # CONFIG_PM=y CONFIG_PM_DEBUG=y -CONFIG_PM_VERBOSE=y +# CONFIG_PM_VERBOSE is not set CONFIG_CAN_PM_TRACE=y CONFIG_PM_SLEEP=y CONFIG_SUSPEND=y -# CONFIG_PM_TEST_SUSPEND is not set CONFIG_SUSPEND_FREEZER=y
[PATCH 1/9] omap: Move multi-omap ifdeffery into it's own header file
This way we can include it easily as needed also for .S files. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/include/plat/cpu.h | 70 --- arch/arm/plat-omap/include/plat/multi.h | 94 +++ 2 files changed, 95 insertions(+), 69 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/multi.h diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 995466d..b80151c 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -31,6 +31,7 @@ #define __ASM_ARCH_OMAP_CPU_H #include linux/bitops.h +#include plat/multi.h /* * Omap device type i.e. EMU/HS/TST/GP/BAD @@ -76,75 +77,6 @@ unsigned int omap_rev(void); #define GET_OMAP_REVISION()((omap_rev() 8) 0xff) /* - * Test if multicore OMAP support is needed - */ -#undef MULTI_OMAP1 -#undef MULTI_OMAP2 -#undef OMAP_NAME - -#ifdef CONFIG_ARCH_OMAP730 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap730 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP850 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap850 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP15XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap1510 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP16XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap16xx -# endif -#endif -#if (defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) -# if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) -# error OMAP1 and OMAP2 can't be selected at the same time -# endif -#endif -#ifdef CONFIG_ARCH_OMAP2420 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2420 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP2430 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2430 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP3430 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap3430 -# endif -#endif - -/* * Macros to group OMAP into cpu classes. * These can be used in most places. * cpu_is_omap7xx(): True for OMAP730, OMAP850 diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h new file mode 100644 index 000..f235d32 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/multi.h @@ -0,0 +1,94 @@ +/* + * Support for compiling in multiple OMAP processors + * + * Copyright (C) 2010 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __PLAT_OMAP_MULTI_H +#define __PLAT_OMAP_MULTI_H + +/* + * Test if multicore OMAP support is needed + */ +#undef MULTI_OMAP1 +#undef MULTI_OMAP2 +#undef OMAP_NAME + +#ifdef CONFIG_ARCH_OMAP730 +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap730 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP850 +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap850 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP15XX +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap1510 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP16XX +# ifdef OMAP_NAME +# undef MULTI_OMAP1 +# define MULTI_OMAP1 +# else +# define OMAP_NAME omap16xx +# endif +#endif +#if (defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) +# if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) +# error OMAP1 and OMAP2 can't be selected at the same time +# endif +#endif +#ifdef CONFIG_ARCH_OMAP2420 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap2420 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP2430 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap2430 +# endif +#endif +#ifdef CONFIG_ARCH_OMAP3430 +# ifdef OMAP_NAME +# undef MULTI_OMAP2 +# define MULTI_OMAP2 +# else +# define OMAP_NAME omap3430 +# endif +#endif + +#endif /* __PLAT_OMAP_MULTI_H */ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at
[PATCH 2/9] omap2/3/4: Clean up defines for entry-macro.S
Define the irq base the same way as for omap2 and omap3, and start using get_irqnr_preamble. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/include/mach/entry-macro.S | 15 +++ 1 files changed, 7 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 4fd6b1b..3e63aaa 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -19,6 +19,12 @@ #include plat/omap34xx.h #include plat/omap44xx.h +#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) +#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) +#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ +#defineACTIVEIRQ_MASK 0x7f/* omap2/3 active interrupt bits */ + .macro disable_fiq .endm @@ -27,11 +33,6 @@ #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) -#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ -#defineACTIVEIRQ_MASK 0x7f/* Active interrupt bits */ - .pushsection .data omap_irq_base: .word 0 .popsection @@ -90,8 +91,6 @@ omap_irq_base:.word 0 #ifdef CONFIG_ARCH_OMAP4 -#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) - .macro get_irqnr_preamble, base, tmp .endm @@ -115,7 +114,7 @@ omap_irq_base: .word 0 * valid range for an IRQ (30-1020 inclusive). */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =OMAP44XX_VA_GIC_CPU_BASE + ldr \base, =OMAP4_IRQ_BASE ldr \irqstat, [\base, #GIC_CPU_INTACK] ldr \tmp, =1021 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/9] Initial multi-omap support for omap4
Hi all, These patches allow compiling in also omap4 into the multi-omap configuration. As I don't yet have omap4, I've only boot tested these on omap2 and omap3. Somebody with an omap4 board please boot test these with the omap3_defconfig and see what happens.. You might want to enable DEBUG_LL and EARLY_PRINTK with earlyprintk on the cmdline too. Regards, Tony --- Tony Lindgren (9): omap: Move multi-omap ifdeffery into it's own header file omap2/3/4: Clean up defines for entry-macro.S omap4: Use get_irqnr_preamble omap2/3/4: Clean up entry-macro.s for adding support for omap4 multiboot omap2/3/4: Allow booting omap4 with multi-omap configuration omap3/4: Fix compile for multi-omap for clkops_noncore_dpll_ops omap: Fix gpio.c for multi-omap for omap4 omap2/3/4: Fix mach-omap2/serial.c for multiboot omap2/3/4: Add omap4 into omap3_defconfnig arch/arm/configs/omap3_defconfig |6 + arch/arm/mach-omap2/clock34xx.c|2 arch/arm/mach-omap2/clock34xx.h|2 arch/arm/mach-omap2/clock34xx_data.c |6 - arch/arm/mach-omap2/clock44xx.c|2 arch/arm/mach-omap2/clock44xx.h|2 arch/arm/mach-omap2/clock44xx_data.c | 12 + arch/arm/mach-omap2/include/mach/entry-macro.S | 81 +++-- arch/arm/mach-omap2/serial.c | 18 +- arch/arm/plat-omap/gpio.c | 217 ++-- arch/arm/plat-omap/include/plat/cpu.h | 70 arch/arm/plat-omap/include/plat/multi.h| 94 ++ 12 files changed, 316 insertions(+), 196 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/multi.h -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/9] omap4: Use get_irqnr_preamble
Use get_irqnr_preamble Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/include/mach/entry-macro.S |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 3e63aaa..101ed79 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -92,6 +92,7 @@ omap_irq_base:.word 0 #ifdef CONFIG_ARCH_OMAP4 .macro get_irqnr_preamble, base, tmp + ldr \base, =OMAP4_IRQ_BASE .endm /* @@ -114,7 +115,6 @@ omap_irq_base: .word 0 * valid range for an IRQ (30-1020 inclusive). */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =OMAP4_IRQ_BASE ldr \irqstat, [\base, #GIC_CPU_INTACK] ldr \tmp, =1021 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/9] omap2/3/4: Clean up entry-macro.s for adding support for omap4 multiboot
Move defines around and set up handlers based on MULTI_OMAP2. Note that this will only allow compiling in omap4 with omap2 and omap3. It will not yet make omap4 boot with multi-omap. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/include/mach/entry-macro.S | 38 +--- 1 files changed, 34 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 101ed79..fe3c9ad 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -19,6 +19,8 @@ #include plat/omap34xx.h #include plat/omap44xx.h +#include plat/multi.h + #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) #define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) @@ -31,13 +33,15 @@ .macro arch_ret_to_user, tmp1, tmp2 .endm -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +/* + * Unoptimized irq functions for multi-omap2, 3 and 4 + */ +#ifdef MULTI_OMAP2 .pushsection .data omap_irq_base: .word 0 .popsection -#if defined(CONFIG_ARCH_OMAP2) defined(CONFIG_ARCH_OMAP3) /* Configure the interrupt base on the first interrupt */ .macro get_irqnr_preamble, base, tmp 9: @@ -62,7 +66,32 @@ omap_irq_base: .word 0 b 9b 9998: .endm -#else + + /* Check the pending interrupts. Note that base already set */ + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ + cmp \irqnr, #0x0 + bne f + ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ + cmp \irqnr, #0x0 + bne f + ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ + cmp \irqnr, #0x0 +: + ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] + and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ + + .endm + + +#else /* MULTI_OMAP2 */ + + +/* + * Optimized irq functions for omap2, 3 and 4 + */ + +#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) .macro get_irqnr_preamble, base, tmp #ifdef CONFIG_ARCH_OMAP2 ldr \base, =OMAP2_IRQ_BASE @@ -70,7 +99,7 @@ omap_irq_base:.word 0 ldr \base, =OMAP3_IRQ_BASE #endif .endm -#endif + /* Check the pending interrupts. Note that base already set */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ @@ -155,6 +184,7 @@ omap_irq_base: .word 0 cmp \tmp, #0 .endm #endif +#endif /* MULTI_OMAP2 */ .macro irq_prio_table .endm -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/9] omap2/3/4: Allow booting omap4 with multi-omap configuration
Allow booting omap4 with multi-omap configuration. Tested only on omap2 and omap3, please somebody test on omap4 and ack. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/include/mach/entry-macro.S | 36 +++- 1 files changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index fe3c9ad..ff25c7e 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -48,14 +48,18 @@ omap_irq_base: .word 0 ldr \base, =omap_irq_base @ irq base address ldr \base, [\base, #0] @ irq base value cmp \base, #0 @ already configured? - bne 9998f @ nothing to do + bne 9997f @ nothing to do mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision and \tmp, \tmp, #0x000f @ only check architecture cmp \tmp, #0x0006 @ is v6? beq 2400f @ found v6 so it's omap24xx - cmp \tmp, #0x000f @ is cortex? - beq 3400f @ found v7 so it's omap34xx + mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision + and \tmp, \tmp, #0x00f0 @ check cortex 8 or 9 + cmp \tmp, #0x0080 @ cortex A-8? + beq 3400f @ found A-8 so it's omap34xx + cmp \tmp, #0x0090 @ cortex A-9? + beq 4400f @ found A-9 so it's omap44xx 2400: ldr \base, =OMAP2_IRQ_BASE ldr \tmp, =omap_irq_base str \base, [\tmp, #0] @@ -64,23 +68,41 @@ omap_irq_base: .word 0 ldr \tmp, =omap_irq_base str \base, [\tmp, #0] b 9b -9998: +4400: ldr \base, =OMAP4_IRQ_BASE + ldr \tmp, =omap_irq_base + str \base, [\tmp, #0] + b 9b +9997: .endm /* Check the pending interrupts. Note that base already set */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + tst \base, #0x100 @ gic address? + bne 4401f @ found gic + + /* Handle omap2 and omap3 */ ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ cmp \irqnr, #0x0 - bne f + bne 9998f ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ cmp \irqnr, #0x0 - bne f + bne 9998f ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 -: +9998: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ + b f + /* Handle omap4 */ +4401: ldr \irqstat, [\base, #GIC_CPU_INTACK] + ldr \tmp, =1021 + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #29 + cmpcc \irqnr, \irqnr + cmpne \irqnr, \tmp + cmpcs \irqnr, \irqnr +: .endm -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 6/9] omap3/4: Fix compile for multi-omap for clkops_noncore_dpll_ops
Rename clkops_noncore_dpll_ops for omap3 and omap4.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/clock34xx.c |2 +-
arch/arm/mach-omap2/clock34xx.h |2 +-
arch/arm/mach-omap2/clock34xx_data.c |6 +++---
arch/arm/mach-omap2/clock44xx.c |2 +-
arch/arm/mach-omap2/clock44xx.h |2 +-
arch/arm/mach-omap2/clock44xx_data.c | 12 ++--
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1f1b5a6..ae9e2c8 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -130,7 +130,7 @@ const struct clkops clkops_omap3430es2_hsotgusb_wait = {
.find_companion = omap2_clk_dflt_find_companion,
};
-const struct clkops clkops_noncore_dpll_ops = {
+const struct clkops omap3_clkops_noncore_dpll_ops = {
.enable = omap3_noncore_dpll_enable,
.disable= omap3_noncore_dpll_disable,
};
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 73f2109..313efc0 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -20,6 +20,6 @@ extern struct clk *arm_fck_p;
extern const struct clkops clkops_omap3430es2_ssi_wait;
extern const struct clkops clkops_omap3430es2_hsotgusb_wait;
extern const struct clkops clkops_omap3430es2_dss_usbhost_wait;
-extern const struct clkops clkops_noncore_dpll_ops;
+extern const struct clkops omap3_clkops_noncore_dpll_ops;
#endif
diff --git a/arch/arm/mach-omap2/clock34xx_data.c
b/arch/arm/mach-omap2/clock34xx_data.c
index 0d04f92..8728f1f 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -337,7 +337,7 @@ static struct dpll_data dpll2_dd = {
static struct clk dpll2_ck = {
.name = dpll2_ck,
- .ops= clkops_noncore_dpll_ops,
+ .ops= omap3_clkops_noncore_dpll_ops,
.parent = sys_ck,
.dpll_data = dpll2_dd,
.round_rate = omap2_dpll_round_rate,
@@ -554,7 +554,7 @@ static struct dpll_data dpll4_dd = {
static struct clk dpll4_ck = {
.name = dpll4_ck,
- .ops= clkops_noncore_dpll_ops,
+ .ops= omap3_clkops_noncore_dpll_ops,
.parent = sys_ck,
.dpll_data = dpll4_dd,
.round_rate = omap2_dpll_round_rate,
@@ -854,7 +854,7 @@ static struct dpll_data dpll5_dd = {
static struct clk dpll5_ck = {
.name = dpll5_ck,
- .ops= clkops_noncore_dpll_ops,
+ .ops= omap3_clkops_noncore_dpll_ops,
.parent = sys_ck,
.dpll_data = dpll5_dd,
.round_rate = omap2_dpll_round_rate,
diff --git a/arch/arm/mach-omap2/clock44xx.c b/arch/arm/mach-omap2/clock44xx.c
index c238717..84ee6b0 100644
--- a/arch/arm/mach-omap2/clock44xx.c
+++ b/arch/arm/mach-omap2/clock44xx.c
@@ -13,7 +13,7 @@
#include linux/errno.h
#include clock.h
-const struct clkops clkops_noncore_dpll_ops = {
+const struct clkops omap4_clkops_noncore_dpll_ops = {
.enable = omap3_noncore_dpll_enable,
.disable= omap3_noncore_dpll_disable,
};
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
index 1f55b6b..efe8494 100644
--- a/arch/arm/mach-omap2/clock44xx.h
+++ b/arch/arm/mach-omap2/clock44xx.h
@@ -12,6 +12,6 @@
int omap4xxx_clk_init(void);
-extern const struct clkops clkops_noncore_dpll_ops;
+extern const struct clkops omap4_clkops_noncore_dpll_ops;
#endif
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 35ffe63..86af31d 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -279,7 +279,7 @@ static struct clk dpll_abe_ck = {
.parent = abe_dpll_refclk_mux_ck,
.dpll_data = dpll_abe_dd,
.init = omap2_init_dpll_parent,
- .ops= clkops_noncore_dpll_ops,
+ .ops= omap4_clkops_noncore_dpll_ops,
.recalc = omap3_dpll_recalc,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
@@ -668,7 +668,7 @@ static struct clk dpll_iva_ck = {
.parent = dpll_sys_ref_clk,
.dpll_data = dpll_iva_dd,
.init = omap2_init_dpll_parent,
- .ops= clkops_noncore_dpll_ops,
+ .ops= omap4_clkops_noncore_dpll_ops,
.recalc = omap3_dpll_recalc,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
@@ -731,7 +731,7 @@ static struct clk dpll_mpu_ck = {
.parent = dpll_sys_ref_clk,
.dpll_data = dpll_mpu_dd,
.init = omap2_init_dpll_parent,
- .ops= clkops_noncore_dpll_ops,
+ .ops=
[PATCH 7/9] omap: Fix gpio.c for multi-omap for omap4
Set up METHOD_GPIO_44XX instead of trying to use the METHOD_GPIO_24XX.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/plat-omap/gpio.c | 217 ++---
1 files changed, 126 insertions(+), 91 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index a888304..4395d15 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -202,6 +202,7 @@ struct gpio_bank {
#define METHOD_GPIO_1610 2
#define METHOD_GPIO_7XX3
#define METHOD_GPIO_24XX 5
+#define METHOD_GPIO_44XX 6
#ifdef CONFIG_ARCH_OMAP16XX
static struct gpio_bank gpio_bank_1610[5] = {
@@ -312,17 +313,17 @@ static struct omap3_gpio_regs
gpio_context[OMAP34XX_NR_GPIOS];
#ifdef CONFIG_ARCH_OMAP4
static struct gpio_bank gpio_bank_44xx[6] = {
{ OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
{ OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
{ OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
{ OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
{ OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
{ OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
- METHOD_GPIO_24XX },
+ METHOD_GPIO_44XX },
};
#endif
@@ -430,7 +431,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int
gpio, int is_input)
break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
- case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
reg += OMAP4_GPIO_OE;
break;
#endif
@@ -501,7 +502,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int
gpio, int enable)
break;
#endif
#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
if (enable)
reg += OMAP4_GPIO_SETDATAOUT;
else
@@ -550,7 +551,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int
gpio)
break;
#endif
#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
reg += OMAP4_GPIO_DATAIN;
break;
#endif
@@ -592,6 +593,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int
gpio)
#endif
#ifdef CONFIG_ARCH_OMAP2PLUS
case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
reg += OMAP24XX_GPIO_DATAOUT;
break;
#endif
@@ -622,11 +624,12 @@ void omap_set_gpio_debounce(int gpio, int enable)
bank = get_gpio_bank(gpio);
reg = bank-base;
-#ifdef CONFIG_ARCH_OMAP4
- reg += OMAP4_GPIO_DEBOUNCENABLE;
-#else
- reg += OMAP24XX_GPIO_DEBOUNCE_EN;
-#endif
+
+ if (cpu_is_omap44xx())
+ reg += OMAP4_GPIO_DEBOUNCENABLE;
+ else
+ reg += OMAP24XX_GPIO_DEBOUNCE_EN;
+
if (!(bank-mod_usage l)) {
printk(KERN_ERR GPIO %d not requested\n, gpio);
return;
@@ -672,11 +675,12 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
}
enc_time = 0xff;
-#ifdef CONFIG_ARCH_OMAP4
- reg += OMAP4_GPIO_DEBOUNCINGTIME;
-#else
- reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
-#endif
+
+ if (cpu_is_omap44xx())
+ reg += OMAP4_GPIO_DEBOUNCINGTIME;
+ else
+ reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
+
__raw_writel(enc_time, reg);
}
EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@ -854,6 +858,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int
gpio, int trigger)
#endif
#ifdef CONFIG_ARCH_OMAP2PLUS
case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
set_24xx_gpio_triggering(bank, gpio, trigger);
break;
#endif
@@ -938,7 +943,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int
gpio_mask)
break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
- case METHOD_GPIO_24XX:
+ case METHOD_GPIO_44XX:
reg += OMAP4_GPIO_IRQSTATUS0;
break;
#endif
@@ -949,12 +954,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
__raw_writel(gpio_mask, reg);
/* Workaround for clearing DSP GPIO interrupts to allow retention */
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- reg = bank-base + OMAP24XX_GPIO_IRQSTATUS2;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- reg = bank-base + OMAP4_GPIO_IRQSTATUS1;
-#endif
+ if (cpu_is_omap24xx() || cpu_is_omap34xx())
+ reg = bank-base +
[PATCH 8/9] omap2/3/4: Fix mach-omap2/serial.c for multiboot
Initialize UART4 only for 3630 and 44xx.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/serial.c | 27 ---
1 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 21e51c5..9bbc2c5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,7 +108,7 @@ static struct plat_serial8250_port serial_platform_data2[]
= {
}
};
-#ifdef CONFIG_ARCH_OMAP4
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
static struct plat_serial8250_port serial_platform_data3[] = {
{
.irq= 70,
@@ -120,6 +120,15 @@ static struct plat_serial8250_port serial_platform_data3[]
= {
.flags = 0
}
};
+
+static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
+{
+ serial_platform_data3[0].mapbase = omap2_globals-uart4_phys;
+}
+#else
+static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
+{
+}
#endif
void __init omap2_set_globals_uart(struct omap_globals *omap2_globals)
@@ -127,9 +136,8 @@ void __init omap2_set_globals_uart(struct omap_globals
*omap2_globals)
serial_platform_data0[0].mapbase = omap2_globals-uart1_phys;
serial_platform_data1[0].mapbase = omap2_globals-uart2_phys;
serial_platform_data2[0].mapbase = omap2_globals-uart3_phys;
-#ifdef CONFIG_ARCH_OMAP4
- serial_platform_data3[0].mapbase = omap2_globals-uart4_phys;
-#endif
+ if (cpu_is_omap3630() || cpu_is_omap44xx())
+ omap2_set_globals_uart4(omap2_globals);
}
static inline unsigned int __serial_read_reg(struct uart_port *up,
@@ -574,7 +582,7 @@ static struct omap_uart_state omap_uart[] = {
},
},
},
-#ifdef CONFIG_ARCH_OMAP4
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
{
.pdev = {
.name = serial8250,
@@ -722,8 +730,13 @@ void __init omap_serial_init_port(int port)
*/
void __init omap_serial_init(void)
{
- int i;
+ int i, nr_ports;
+
+ if (!(cpu_is_omap3630() || cpu_is_omap4430()))
+ nr_ports = 3;
+ else
+ nr_ports = ARRAY_SIZE(omap_uart);
- for (i = 0; i ARRAY_SIZE(omap_uart); i++)
+ for (i = 0; i nr_ports; i++)
omap_serial_init_port(i);
}
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 9/9] omap2/3/4: Add omap4 into omap3_defconfnig
Add omap4 into omap3_defconfig. Note that this does not yet boot on omap4, but boots on omap2 and omap3. Also note that CONFIG_SMP does not currently work on uniprocessor ARMs. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/configs/omap3_defconfig |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/omap3_defconfig b/arch/arm/configs/omap3_defconfig index 2bc80d7..714835e 100644 --- a/arch/arm/configs/omap3_defconfig +++ b/arch/arm/configs/omap3_defconfig @@ -239,7 +239,7 @@ CONFIG_ARCH_OMAP_OTG=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_ARCH_OMAP2=y CONFIG_ARCH_OMAP3=y -# CONFIG_ARCH_OMAP4 is not set +CONFIG_ARCH_OMAP4=y # # OMAP Feature Selections @@ -295,6 +295,7 @@ CONFIG_MACH_OMAP_ZOOM3=y CONFIG_MACH_CM_T35=y CONFIG_MACH_IGEP0020=y CONFIG_MACH_OMAP_3630SDP=y +CONFIG_MACH_OMAP_4430SDP=y # CONFIG_OMAP3_EMU is not set # CONFIG_OMAP3_SDRC_AC_TIMING is not set @@ -334,6 +335,7 @@ CONFIG_ARM_L1_CACHE_SHIFT=6 # CONFIG_ARM_ERRATA_430973 is not set # CONFIG_ARM_ERRATA_458693 is not set # CONFIG_ARM_ERRATA_460075 is not set +CONFIG_ARM_GIC=y CONFIG_COMMON_CLKDEV=y # @@ -350,6 +352,7 @@ CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_SMP is not set CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set @@ -361,6 +364,7 @@ CONFIG_HZ=128 # CONFIG_THUMB2_KERNEL is not set CONFIG_AEABI=y CONFIG_OABI_COMPAT=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_HIGHMEM is not set -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 2/2] OMAP: UART: omap_device converions, remove implicit 8520 assumptions
Hi Kevin,
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Kevin Hilman
Sent: Wednesday, January 13, 2010 5:29 AM
To: linux-omap@vger.kernel.org
Cc: Raja, Govindraj
Subject: [PATCH 2/2] OMAP: UART: omap_device converions,
remove implicit 8520 assumptions
Major rework of OMAP UART init for omap_device conversion as well as
use with either 8250 driver or new omap-serial driver.
Signifcant contributions and testing from Govindraj R
govindraj.r...@ti.com.
In preparation for a new omap-serial driver, remove 8250 assumptions
and dependencies from the serial core.
Convert UART core and PM support to use omap_device layer. Also add
support for both console on 8250 or omap-serial driver.
omap_device conversion:
- Convert clock API calls to omap_device calls
- Remove all static platform_data setup and configuration. This is
all done by the omap_device build phase.
Known issues:
- broken on OMAP4 until OMAP4 UART hwmods are available
Cc: Govindraj R govindraj.r...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/serial.c | 474
+-
1 files changed, 242 insertions(+), 232 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c
b/arch/arm/mach-omap2/serial.c
index 8c964be..9060fb8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -19,18 +19,30 @@
*/
#include linux/kernel.h
#include linux/init.h
-#include linux/serial_8250.h
#include linux/serial_reg.h
#include linux/clk.h
#include linux/io.h
+#include linux/platform_device.h
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+#include linux/serial_8250.h
+#endif
+
+#ifdef CONFIG_SERIAL_OMAP_CONSOLE
+#include plat/omap-serial.h
+#endif
#include plat/common.h
#include plat/board.h
#include plat/clock.h
#include plat/control.h
+#include plat/dma.h
+#include plat/omap_hwmod.h
+#include plat/omap_device.h
#include prm.h
#include pm.h
+#include cm.h
#include prm-regbits-34xx.h
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
@@ -38,6 +50,8 @@
#define DEFAULT_TIMEOUT (5 * HZ)
+#define MAX_UART_HWMOD_NAME_LEN 16
+
struct omap_uart_state {
int num;
int can_sleep;
@@ -48,14 +62,21 @@ struct omap_uart_state {
void __iomem *wk_en;
u32 wk_mask;
u32 padconf;
+ u32 dma_enabled;
struct clk *ick;
struct clk *fck;
int clocked;
- struct plat_serial8250_port *p;
+ int irq;
+ int regshift;
+ int irqflags;
+ void __iomem *membase;
+ resource_size_t mapbase;
+
struct list_head node;
- struct platform_device pdev;
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
#if defined(CONFIG_ARCH_OMAP3) defined(CONFIG_PM)
int context_valid;
@@ -71,60 +92,16 @@ struct omap_uart_state {
};
static LIST_HEAD(uart_list);
+static u8 num_uarts;
-static struct plat_serial8250_port serial_platform_data0[] = {
+static struct omap_device_pm_latency omap_uart_latency[] = {
{
- .mapbase= OMAP_UART1_BASE,
- .irq= 72,
- .flags = UPF_BOOT_AUTOCONF,
- .iotype = UPIO_MEM,
- .regshift = 2,
- .uartclk= OMAP24XX_BASE_BAUD * 16,
- }, {
- .flags = 0
- }
-};
-
-static struct plat_serial8250_port serial_platform_data1[] = {
- {
- .mapbase= OMAP_UART2_BASE,
- .irq= 73,
- .flags = UPF_BOOT_AUTOCONF,
- .iotype = UPIO_MEM,
- .regshift = 2,
- .uartclk= OMAP24XX_BASE_BAUD * 16,
- }, {
- .flags = 0
- }
-};
-
-static struct plat_serial8250_port serial_platform_data2[] = {
- {
- .mapbase= OMAP_UART3_BASE,
- .irq= 74,
- .flags = UPF_BOOT_AUTOCONF,
- .iotype = UPIO_MEM,
- .regshift = 2,
- .uartclk= OMAP24XX_BASE_BAUD * 16,
- }, {
- .flags = 0
- }
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
};
-#ifdef CONFIG_ARCH_OMAP4
-static struct plat_serial8250_port serial_platform_data3[] = {
- {
- .mapbase= OMAP_UART4_BASE,
- .irq= 70,
- .flags = UPF_BOOT_AUTOCONF,
- .iotype = UPIO_MEM,
- .regshift = 2,
- .uartclk= OMAP24XX_BASE_BAUD * 16,
- }, {
- .flags = 0
- }
-};
-#endif
static inline unsigned int
