[PATCH] mmc-omap: Add support for 16-bit and 32-bit registers
From: Marek Belisko marek.beli...@open-nandra.com
The omap850 and omap730 use 16-bit registers instead of 32-bit, requiring
a modification of the register addresses in the mmc-omap driver. To resolve
this, a bit shift is performed on base register addresses, either by 1 or 2
bits depending on the CPU in use. This yields the correct registers for
each CPU.
Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
Signed-off-by: Cory Maccarrone darkstar6...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap.c | 62 +--
1 files changed, 33 insertions(+), 29 deletions(-)
This is a resubmit of a patch I sent in several months ago. Tony Lindgren
merged
this into linux-omap's master and testing branches but has stated that he will
not
merge it further as linux-mmc needs to approve this. There hasn't been any
comments
raised on either of the linux-omap or linux-mmc mailing lists about problems.
Due to
the unique nature of the omap7xx platform, this patch is required for MMC card
access.
Is there any chance this can be included into the next -rc cycle, as it is a
fix for
devices that have 16-bit registers?
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index c6d7e8e..53362c4 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -38,30 +38,30 @@
#include plat/fpga.h
#defineOMAP_MMC_REG_CMD0x00
-#defineOMAP_MMC_REG_ARGL 0x04
-#defineOMAP_MMC_REG_ARGH 0x08
-#defineOMAP_MMC_REG_CON0x0c
-#defineOMAP_MMC_REG_STAT 0x10
-#defineOMAP_MMC_REG_IE 0x14
-#defineOMAP_MMC_REG_CTO0x18
-#defineOMAP_MMC_REG_DTO0x1c
-#defineOMAP_MMC_REG_DATA 0x20
-#defineOMAP_MMC_REG_BLEN 0x24
-#defineOMAP_MMC_REG_NBLK 0x28
-#defineOMAP_MMC_REG_BUF0x2c
-#define OMAP_MMC_REG_SDIO 0x34
-#defineOMAP_MMC_REG_REV0x3c
-#defineOMAP_MMC_REG_RSP0 0x40
-#defineOMAP_MMC_REG_RSP1 0x44
-#defineOMAP_MMC_REG_RSP2 0x48
-#defineOMAP_MMC_REG_RSP3 0x4c
-#defineOMAP_MMC_REG_RSP4 0x50
-#defineOMAP_MMC_REG_RSP5 0x54
-#defineOMAP_MMC_REG_RSP6 0x58
-#defineOMAP_MMC_REG_RSP7 0x5c
-#defineOMAP_MMC_REG_IOSR 0x60
-#defineOMAP_MMC_REG_SYSC 0x64
-#defineOMAP_MMC_REG_SYSS 0x68
+#defineOMAP_MMC_REG_ARGL 0x01
+#defineOMAP_MMC_REG_ARGH 0x02
+#defineOMAP_MMC_REG_CON0x03
+#defineOMAP_MMC_REG_STAT 0x04
+#defineOMAP_MMC_REG_IE 0x05
+#defineOMAP_MMC_REG_CTO0x06
+#defineOMAP_MMC_REG_DTO0x07
+#defineOMAP_MMC_REG_DATA 0x08
+#defineOMAP_MMC_REG_BLEN 0x09
+#defineOMAP_MMC_REG_NBLK 0x0a
+#defineOMAP_MMC_REG_BUF0x0b
+#defineOMAP_MMC_REG_SDIO 0x0d
+#defineOMAP_MMC_REG_REV0x0f
+#defineOMAP_MMC_REG_RSP0 0x10
+#defineOMAP_MMC_REG_RSP1 0x11
+#defineOMAP_MMC_REG_RSP2 0x12
+#defineOMAP_MMC_REG_RSP3 0x13
+#defineOMAP_MMC_REG_RSP4 0x14
+#defineOMAP_MMC_REG_RSP5 0x15
+#defineOMAP_MMC_REG_RSP6 0x16
+#defineOMAP_MMC_REG_RSP7 0x17
+#defineOMAP_MMC_REG_IOSR 0x18
+#defineOMAP_MMC_REG_SYSC 0x19
+#defineOMAP_MMC_REG_SYSS 0x1a
#defineOMAP_MMC_STAT_CARD_ERR (1 14)
#defineOMAP_MMC_STAT_CARD_IRQ (1 13)
@@ -77,8 +77,9 @@
#defineOMAP_MMC_STAT_CARD_BUSY (1 2)
#defineOMAP_MMC_STAT_END_OF_CMD(1 0)
-#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG_##reg)
-#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)-virt_base +
OMAP_MMC_REG_##reg)
+#define OMAP_MMC_REG(host, reg)(OMAP_MMC_REG_##reg
(host)-reg_shift)
+#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG(host, reg))
+#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)-virt_base +
OMAP_MMC_REG(host, reg))
/*
* Command types
@@ -132,6 +133,7 @@ struct mmc_omap_host {
int irq;
unsigned char bus_mode;
unsigned char hw_bus_mode;
+ unsigned intreg_shift;
struct work_struct cmd_abort_work;
unsignedabort:1;
@@ -679,9 +681,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
host-data-bytes_xfered += n;
if (write) {
- __raw_writesw(host-virt_base + OMAP_MMC_REG_DATA,
host-buffer, n);
+ __raw_writesw(host-virt_base + OMAP_MMC_REG(host, DATA),
host-buffer, n);
} else {
-
Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote:
This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.
This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-...@vger.kernel.org/msg02281.html
This updated verion has a depedancy on Add support for 16-bit registers
posted on linux-omap. Below is the patch-works link for the same
http://patchwork.kernel.org/patch/72295/
currently even with this patch applied it doesn't apply cleanly.
Signed-off-by: Syed Rafiuddin rafiuddin.s...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
Reviewed-by: Paul Walmsley p...@pwsan.com
Reviewed-by: Tony Lindgren t...@atomide.com
Cc: Ben Dooks ben-li...@fluff.org
Cc: Cory Maccarrone darkstar6...@gmail.com
---
drivers/i2c/busses/i2c-omap.c | 146
-
1 files changed, 114 insertions(+), 32 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 9c3ce4d..7c15496 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -44,29 +44,37 @@
/* I2C controller revisions present on specific hardware */
#define OMAP_I2C_REV_ON_2430 0x36
#define OMAP_I2C_REV_ON_3430 0x3C
+#define OMAP_I2C_REV_ON_4430 0x40
/* timeout waiting for the controller to respond */
#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
-#define OMAP_I2C_REV_REG 0x00
-#define OMAP_I2C_IE_REG 0x01
-#define OMAP_I2C_STAT_REG0x02
-#define OMAP_I2C_IV_REG 0x03
/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG 0x03
-#define OMAP_I2C_SYSS_REG0x04
-#define OMAP_I2C_BUF_REG 0x05
-#define OMAP_I2C_CNT_REG 0x06
-#define OMAP_I2C_DATA_REG0x07
-#define OMAP_I2C_SYSC_REG0x08
-#define OMAP_I2C_CON_REG 0x09
-#define OMAP_I2C_OA_REG 0x0a
-#define OMAP_I2C_SA_REG 0x0b
-#define OMAP_I2C_PSC_REG 0x0c
-#define OMAP_I2C_SCLL_REG0x0d
-#define OMAP_I2C_SCLH_REG0x0e
-#define OMAP_I2C_SYSTEST_REG 0x0f
-#define OMAP_I2C_BUFSTAT_REG 0x10
+enum {
+ OMAP_I2C_REV_REG = 0,
+ OMAP_I2C_IE_REG,
+ OMAP_I2C_STAT_REG,
+ OMAP_I2C_IV_REG,
+ OMAP_I2C_WE_REG,
+ OMAP_I2C_SYSS_REG,
+ OMAP_I2C_BUF_REG,
+ OMAP_I2C_CNT_REG,
+ OMAP_I2C_DATA_REG,
+ OMAP_I2C_SYSC_REG,
+ OMAP_I2C_CON_REG,
+ OMAP_I2C_OA_REG,
+ OMAP_I2C_SA_REG,
+ OMAP_I2C_PSC_REG,
+ OMAP_I2C_SCLL_REG,
+ OMAP_I2C_SCLH_REG,
+ OMAP_I2C_SYSTEST_REG,
+ OMAP_I2C_BUFSTAT_REG,
+ OMAP_I2C_REVNB_LO,
+ OMAP_I2C_REVNB_HI,
+ OMAP_I2C_IRQSTATUS_RAW,
+ OMAP_I2C_IRQENABLE_SET,
+ OMAP_I2C_IRQENABLE_CLR,
+};
/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
#define OMAP_I2C_IE_XDR (1 14) /* TX Buffer drain int
enable */
@@ -169,6 +177,7 @@ struct omap_i2c_dev {
u32 speed; /* Speed of bus in Khz */
u16 cmd_err;
u8 *buf;
+ u8 *regs;
size_t buf_len;
struct i2c_adapter adapter;
u8 fifo_size; /* use as flag and value
@@ -187,15 +196,64 @@ struct omap_i2c_dev {
u16 westate;
};
+const static u8 reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x00,
+ [OMAP_I2C_IE_REG] = 0x01,
+ [OMAP_I2C_STAT_REG] = 0x02,
+ [OMAP_I2C_IV_REG] = 0x03,
+ [OMAP_I2C_WE_REG] = 0x03,
+ [OMAP_I2C_SYSS_REG] = 0x04,
+ [OMAP_I2C_BUF_REG] = 0x05,
+ [OMAP_I2C_CNT_REG] = 0x06,
+ [OMAP_I2C_DATA_REG] = 0x07,
+ [OMAP_I2C_SYSC_REG] = 0x08,
+ [OMAP_I2C_CON_REG] = 0x09,
+ [OMAP_I2C_OA_REG] = 0x0a,
+ [OMAP_I2C_SA_REG] = 0x0b,
+ [OMAP_I2C_PSC_REG] = 0x0c,
+ [OMAP_I2C_SCLL_REG] = 0x0d,
+ [OMAP_I2C_SCLH_REG] = 0x0e,
+ [OMAP_I2C_SYSTEST_REG] = 0x0f,
+ [OMAP_I2C_BUFSTAT_REG] = 0x10,
+};
+
+const static u8 omap4_reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x04,
+ [OMAP_I2C_IE_REG] = 0x2c,
+ [OMAP_I2C_STAT_REG] = 0x28,
+ [OMAP_I2C_IV_REG] = 0x34,
+ [OMAP_I2C_WE_REG] = 0x34,
+ [OMAP_I2C_SYSS_REG] = 0x90,
+ [OMAP_I2C_BUF_REG] = 0x94,
+ [OMAP_I2C_CNT_REG] = 0x98,
+ [OMAP_I2C_DATA_REG] = 0x9c,
+ [OMAP_I2C_SYSC_REG] = 0x20,
+
Re: [PATCH] mmc-omap: Add support for 16-bit and 32-bit registers
On Sun, Mar 07, 2010 at 09:47:58AM -0800, Cory Maccarrone wrote:
From: Marek Belisko marek.beli...@open-nandra.com
The omap850 and omap730 use 16-bit registers instead of 32-bit, requiring
a modification of the register addresses in the mmc-omap driver. To resolve
this, a bit shift is performed on base register addresses, either by 1 or 2
bits depending on the CPU in use. This yields the correct registers for
each CPU.
merged the previous one into my tree earlier today.
Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
Signed-off-by: Cory Maccarrone darkstar6...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap.c | 62
+--
1 files changed, 33 insertions(+), 29 deletions(-)
This is a resubmit of a patch I sent in several months ago. Tony Lindgren
merged
this into linux-omap's master and testing branches but has stated that he
will not
merge it further as linux-mmc needs to approve this. There hasn't been any
comments
raised on either of the linux-omap or linux-mmc mailing lists about problems.
Due to
the unique nature of the omap7xx platform, this patch is required for MMC
card access.
Is there any chance this can be included into the next -rc cycle, as it is a
fix for
devices that have 16-bit registers?
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index c6d7e8e..53362c4 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -38,30 +38,30 @@
#include plat/fpga.h
#define OMAP_MMC_REG_CMD0x00
-#define OMAP_MMC_REG_ARGL 0x04
-#define OMAP_MMC_REG_ARGH 0x08
-#define OMAP_MMC_REG_CON0x0c
-#define OMAP_MMC_REG_STAT 0x10
-#define OMAP_MMC_REG_IE 0x14
-#define OMAP_MMC_REG_CTO0x18
-#define OMAP_MMC_REG_DTO0x1c
-#define OMAP_MMC_REG_DATA 0x20
-#define OMAP_MMC_REG_BLEN 0x24
-#define OMAP_MMC_REG_NBLK 0x28
-#define OMAP_MMC_REG_BUF0x2c
-#define OMAP_MMC_REG_SDIO0x34
-#define OMAP_MMC_REG_REV0x3c
-#define OMAP_MMC_REG_RSP0 0x40
-#define OMAP_MMC_REG_RSP1 0x44
-#define OMAP_MMC_REG_RSP2 0x48
-#define OMAP_MMC_REG_RSP3 0x4c
-#define OMAP_MMC_REG_RSP4 0x50
-#define OMAP_MMC_REG_RSP5 0x54
-#define OMAP_MMC_REG_RSP6 0x58
-#define OMAP_MMC_REG_RSP7 0x5c
-#define OMAP_MMC_REG_IOSR 0x60
-#define OMAP_MMC_REG_SYSC 0x64
-#define OMAP_MMC_REG_SYSS 0x68
+#define OMAP_MMC_REG_ARGL 0x01
+#define OMAP_MMC_REG_ARGH 0x02
+#define OMAP_MMC_REG_CON0x03
+#define OMAP_MMC_REG_STAT 0x04
+#define OMAP_MMC_REG_IE 0x05
+#define OMAP_MMC_REG_CTO0x06
+#define OMAP_MMC_REG_DTO0x07
+#define OMAP_MMC_REG_DATA 0x08
+#define OMAP_MMC_REG_BLEN 0x09
+#define OMAP_MMC_REG_NBLK 0x0a
+#define OMAP_MMC_REG_BUF0x0b
+#define OMAP_MMC_REG_SDIO 0x0d
+#define OMAP_MMC_REG_REV0x0f
+#define OMAP_MMC_REG_RSP0 0x10
+#define OMAP_MMC_REG_RSP1 0x11
+#define OMAP_MMC_REG_RSP2 0x12
+#define OMAP_MMC_REG_RSP3 0x13
+#define OMAP_MMC_REG_RSP4 0x14
+#define OMAP_MMC_REG_RSP5 0x15
+#define OMAP_MMC_REG_RSP6 0x16
+#define OMAP_MMC_REG_RSP7 0x17
+#define OMAP_MMC_REG_IOSR 0x18
+#define OMAP_MMC_REG_SYSC 0x19
+#define OMAP_MMC_REG_SYSS 0x1a
#define OMAP_MMC_STAT_CARD_ERR (1 14)
#define OMAP_MMC_STAT_CARD_IRQ (1 13)
@@ -77,8 +77,9 @@
#define OMAP_MMC_STAT_CARD_BUSY (1 2)
#define OMAP_MMC_STAT_END_OF_CMD(1 0)
-#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG_##reg)
-#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val),
(host)-virt_base + OMAP_MMC_REG_##reg)
+#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg
(host)-reg_shift)
+#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG(host, reg))
+#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val),
(host)-virt_base + OMAP_MMC_REG(host, reg))
/*
* Command types
@@ -132,6 +133,7 @@ struct mmc_omap_host {
int irq;
unsigned char bus_mode;
unsigned char hw_bus_mode;
+ unsigned intreg_shift;
struct work_struct cmd_abort_work;
unsignedabort:1;
@@ -679,9 +681,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
host-data-bytes_xfered += n;
if (write) {
- __raw_writesw(host-virt_base + OMAP_MMC_REG_DATA,
host-buffer, n);
Re: [PATCH] mmc-omap: Add support for 16-bit and 32-bit registers
On Sun, Mar 7, 2010 at 2:59 PM, Ben Dooks b...@fluff.org wrote:
On Sun, Mar 07, 2010 at 09:47:58AM -0800, Cory Maccarrone wrote:
From: Marek Belisko marek.beli...@open-nandra.com
The omap850 and omap730 use 16-bit registers instead of 32-bit, requiring
a modification of the register addresses in the mmc-omap driver. To resolve
this, a bit shift is performed on base register addresses, either by 1 or 2
bits depending on the CPU in use. This yields the correct registers for
each CPU.
merged the previous one into my tree earlier today.
Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
Signed-off-by: Cory Maccarrone darkstar6...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/mmc/host/omap.c | 62
+--
1 files changed, 33 insertions(+), 29 deletions(-)
This is a resubmit of a patch I sent in several months ago. Tony Lindgren
merged
this into linux-omap's master and testing branches but has stated that he
will not
merge it further as linux-mmc needs to approve this. There hasn't been any
comments
raised on either of the linux-omap or linux-mmc mailing lists about
problems. Due to
the unique nature of the omap7xx platform, this patch is required for MMC
card access.
Is there any chance this can be included into the next -rc cycle, as it is a
fix for
devices that have 16-bit registers?
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index c6d7e8e..53362c4 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -38,30 +38,30 @@
#include plat/fpga.h
#define OMAP_MMC_REG_CMD 0x00
-#define OMAP_MMC_REG_ARGL 0x04
-#define OMAP_MMC_REG_ARGH 0x08
-#define OMAP_MMC_REG_CON 0x0c
-#define OMAP_MMC_REG_STAT 0x10
-#define OMAP_MMC_REG_IE 0x14
-#define OMAP_MMC_REG_CTO 0x18
-#define OMAP_MMC_REG_DTO 0x1c
-#define OMAP_MMC_REG_DATA 0x20
-#define OMAP_MMC_REG_BLEN 0x24
-#define OMAP_MMC_REG_NBLK 0x28
-#define OMAP_MMC_REG_BUF 0x2c
-#define OMAP_MMC_REG_SDIO 0x34
-#define OMAP_MMC_REG_REV 0x3c
-#define OMAP_MMC_REG_RSP0 0x40
-#define OMAP_MMC_REG_RSP1 0x44
-#define OMAP_MMC_REG_RSP2 0x48
-#define OMAP_MMC_REG_RSP3 0x4c
-#define OMAP_MMC_REG_RSP4 0x50
-#define OMAP_MMC_REG_RSP5 0x54
-#define OMAP_MMC_REG_RSP6 0x58
-#define OMAP_MMC_REG_RSP7 0x5c
-#define OMAP_MMC_REG_IOSR 0x60
-#define OMAP_MMC_REG_SYSC 0x64
-#define OMAP_MMC_REG_SYSS 0x68
+#define OMAP_MMC_REG_ARGL 0x01
+#define OMAP_MMC_REG_ARGH 0x02
+#define OMAP_MMC_REG_CON 0x03
+#define OMAP_MMC_REG_STAT 0x04
+#define OMAP_MMC_REG_IE 0x05
+#define OMAP_MMC_REG_CTO 0x06
+#define OMAP_MMC_REG_DTO 0x07
+#define OMAP_MMC_REG_DATA 0x08
+#define OMAP_MMC_REG_BLEN 0x09
+#define OMAP_MMC_REG_NBLK 0x0a
+#define OMAP_MMC_REG_BUF 0x0b
+#define OMAP_MMC_REG_SDIO 0x0d
+#define OMAP_MMC_REG_REV 0x0f
+#define OMAP_MMC_REG_RSP0 0x10
+#define OMAP_MMC_REG_RSP1 0x11
+#define OMAP_MMC_REG_RSP2 0x12
+#define OMAP_MMC_REG_RSP3 0x13
+#define OMAP_MMC_REG_RSP4 0x14
+#define OMAP_MMC_REG_RSP5 0x15
+#define OMAP_MMC_REG_RSP6 0x16
+#define OMAP_MMC_REG_RSP7 0x17
+#define OMAP_MMC_REG_IOSR 0x18
+#define OMAP_MMC_REG_SYSC 0x19
+#define OMAP_MMC_REG_SYSS 0x1a
#define OMAP_MMC_STAT_CARD_ERR (1 14)
#define OMAP_MMC_STAT_CARD_IRQ (1 13)
@@ -77,8 +77,9 @@
#define OMAP_MMC_STAT_CARD_BUSY (1 2)
#define OMAP_MMC_STAT_END_OF_CMD (1 0)
-#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG_##reg)
-#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val),
(host)-virt_base + OMAP_MMC_REG_##reg)
+#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg
(host)-reg_shift)
+#define OMAP_MMC_READ(host, reg) __raw_readw((host)-virt_base +
OMAP_MMC_REG(host, reg))
+#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val),
(host)-virt_base + OMAP_MMC_REG(host, reg))
/*
* Command types
@@ -132,6 +133,7 @@ struct mmc_omap_host {
int irq;
unsigned char bus_mode;
unsigned char hw_bus_mode;
+ unsigned int reg_shift;
struct work_struct cmd_abort_work;
unsigned abort:1;
@@ -679,9 +681,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
host-data-bytes_xfered += n;
if (write) {
-
RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
-Original Message-
From: Ben Dooks [mailto:ben-li...@fluff.org]
Sent: Monday, March 08, 2010 3:48 AM
To: Shilimkar, Santosh
Cc: ben-li...@fluff.org; linux-omap@vger.kernel.org;
linux-...@vger.kernel.org; Syed, Rafiuddin; Cory
Maccarrone
Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform
On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote:
This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.
This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-...@vger.kernel.org/msg02281.html
This updated verion has a depedancy on Add support for 16-bit registers
posted on linux-omap. Below is the patch-works link for the same
http://patchwork.kernel.org/patch/72295/
currently even with this patch applied it doesn't apply cleanly.
May be it needs refresh after recent merges? Are you ok if I refresh this patch
against latest mainline on top of below patch and repost
http://patchwork.kernel.org/patch/72295/
Signed-off-by: Syed Rafiuddin rafiuddin.s...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
Reviewed-by: Paul Walmsley p...@pwsan.com
Reviewed-by: Tony Lindgren t...@atomide.com
Cc: Ben Dooks ben-li...@fluff.org
Cc: Cory Maccarrone darkstar6...@gmail.com
---
drivers/i2c/busses/i2c-omap.c | 146
-
1 files changed, 114 insertions(+), 32 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 9c3ce4d..7c15496 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -44,29 +44,37 @@
/* I2C controller revisions present on specific hardware */
#define OMAP_I2C_REV_ON_2430 0x36
#define OMAP_I2C_REV_ON_3430 0x3C
+#define OMAP_I2C_REV_ON_4430 0x40
/* timeout waiting for the controller to respond */
#define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
-#define OMAP_I2C_REV_REG 0x00
-#define OMAP_I2C_IE_REG0x01
-#define OMAP_I2C_STAT_REG 0x02
-#define OMAP_I2C_IV_REG0x03
/* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
-#define OMAP_I2C_WE_REG0x03
-#define OMAP_I2C_SYSS_REG 0x04
-#define OMAP_I2C_BUF_REG 0x05
-#define OMAP_I2C_CNT_REG 0x06
-#define OMAP_I2C_DATA_REG 0x07
-#define OMAP_I2C_SYSC_REG 0x08
-#define OMAP_I2C_CON_REG 0x09
-#define OMAP_I2C_OA_REG0x0a
-#define OMAP_I2C_SA_REG0x0b
-#define OMAP_I2C_PSC_REG 0x0c
-#define OMAP_I2C_SCLL_REG 0x0d
-#define OMAP_I2C_SCLH_REG 0x0e
-#define OMAP_I2C_SYSTEST_REG 0x0f
-#define OMAP_I2C_BUFSTAT_REG 0x10
+enum {
+ OMAP_I2C_REV_REG = 0,
+ OMAP_I2C_IE_REG,
+ OMAP_I2C_STAT_REG,
+ OMAP_I2C_IV_REG,
+ OMAP_I2C_WE_REG,
+ OMAP_I2C_SYSS_REG,
+ OMAP_I2C_BUF_REG,
+ OMAP_I2C_CNT_REG,
+ OMAP_I2C_DATA_REG,
+ OMAP_I2C_SYSC_REG,
+ OMAP_I2C_CON_REG,
+ OMAP_I2C_OA_REG,
+ OMAP_I2C_SA_REG,
+ OMAP_I2C_PSC_REG,
+ OMAP_I2C_SCLL_REG,
+ OMAP_I2C_SCLH_REG,
+ OMAP_I2C_SYSTEST_REG,
+ OMAP_I2C_BUFSTAT_REG,
+ OMAP_I2C_REVNB_LO,
+ OMAP_I2C_REVNB_HI,
+ OMAP_I2C_IRQSTATUS_RAW,
+ OMAP_I2C_IRQENABLE_SET,
+ OMAP_I2C_IRQENABLE_CLR,
+};
/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
#define OMAP_I2C_IE_XDR(1 14) /* TX Buffer drain int
enable */
@@ -169,6 +177,7 @@ struct omap_i2c_dev {
u32 speed; /* Speed of bus in Khz */
u16 cmd_err;
u8 *buf;
+ u8 *regs;
size_t buf_len;
struct i2c_adapter adapter;
u8 fifo_size; /* use as flag and value
@@ -187,15 +196,64 @@ struct omap_i2c_dev {
u16 westate;
};
+const static u8 reg_map[] = {
+ [OMAP_I2C_REV_REG] = 0x00,
+ [OMAP_I2C_IE_REG] = 0x01,
+ [OMAP_I2C_STAT_REG] = 0x02,
+ [OMAP_I2C_IV_REG] = 0x03,
+ [OMAP_I2C_WE_REG] = 0x03,
+ [OMAP_I2C_SYSS_REG] = 0x04,
+ [OMAP_I2C_BUF_REG] = 0x05,
+ [OMAP_I2C_CNT_REG] = 0x06,
+ [OMAP_I2C_DATA_REG] = 0x07,
+ [OMAP_I2C_SYSC_REG] = 0x08,
+ [OMAP_I2C_CON_REG] = 0x09,
+ [OMAP_I2C_OA_REG] = 0x0a,
+ [OMAP_I2C_SA_REG] = 0x0b,
+ [OMAP_I2C_PSC_REG] = 0x0c,
+
RE: [PATCH] omap: i2c: Add i2c support on omap4 platform
Ben, -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Shilimkar, Santosh Sent: Monday, March 08, 2010 10:31 AM To: Ben Dooks Cc: linux-omap@vger.kernel.org; linux-...@vger.kernel.org; Syed, Rafiuddin; Cory Maccarrone Subject: RE: [PATCH] omap: i2c: Add i2c support on omap4 platform -Original Message- From: Ben Dooks [mailto:ben-li...@fluff.org] Sent: Monday, March 08, 2010 3:48 AM To: Shilimkar, Santosh Cc: ben-li...@fluff.org; linux-omap@vger.kernel.org; linux-...@vger.kernel.org; Syed, Rafiuddin; Cory Maccarrone Subject: Re: [PATCH] omap: i2c: Add i2c support on omap4 platform On Fri, Feb 19, 2010 at 10:03:00PM +0530, Santosh Shilimkar wrote: This patch is rebased version of earlier post to add I2C driver support to OMAP4 platform. On OMAP4, all I2C register address offsets are changed from OMAP1/2/3 I2C. In order to not have #ifdef's at various places in code, as well as to support multi-OMAP build, an array is created to hold the register addresses with it's offset. This patch was submitted, reviewed and acked on mailing list already. For more details refer below link http://www.mail-archive.com/linux-...@vger.kernel.org/msg02281.html This updated verion has a depedancy on Add support for 16-bit registers posted on linux-omap. Below is the patch-works link for the same http://patchwork.kernel.org/patch/72295/ currently even with this patch applied it doesn't apply cleanly. May be it needs refresh after recent merges? Are you ok if I refresh this patch against latest mainline on top of below patch and repost http://patchwork.kernel.org/patch/72295/ Attached refreshed version which directly applies against the mainline since Add support for 16-bit registers is already merged. Boot tested on OMAP4 SDP platform. Regards, Santosh 0001-omap-i2c-Add-i2c-support-on-omap4-platform.patch Description: 0001-omap-i2c-Add-i2c-support-on-omap4-platform.patch
