Re: [PATCHv3 2/2] crypto: omap-sham - omap sha1 & md5 driver
On Wed, Apr 14, 2010 at 09:41:28AM +0300, Dmitry Kasatkin wrote:
>
> what do you mean "exporting shash object"?
>
> Providing shash alg?
>
> I was not sure if it is needed if ahash is available.
>
> Should I remove shash alg at all?
In that case please remove the shash object. ahash by itself
is enough.
Cheers,
--
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Email: Herbert Xu ~{PmV>HI~}
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Re: [PATCHv3 2/2] crypto: omap-sham - omap sha1 & md5 driver
On 14/04/10 09:20, ext Herbert Xu wrote: Dmitry Kasatkin wrote: Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree. - implements async and sync crypto API using dma and cpu. - supports multiple sham instances if available Signed-off-by: Dmitry Kasatkin You have not addressed my objections raised earlier. Also, why are you exporting a shash object? You cannot sleep during shash operations (except for setkey). what do you mean "exporting shash object"? Providing shash alg? I was not sure if it is needed if ahash is available. Should I remove shash alg at all? Cheers, -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 2/2] crypto: omap-sham - omap sha1 & md5 driver
Hi, I am thinking to update to have: - concurrent requests with queue. - import/export problem but it takes a time. - Dmitry On 14/04/10 09:20, ext Herbert Xu wrote: Dmitry Kasatkin wrote: Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree. - implements async and sync crypto API using dma and cpu. - supports multiple sham instances if available Signed-off-by: Dmitry Kasatkin You have not addressed my objections raised earlier. Also, why are you exporting a shash object? You cannot sleep during shash operations (except for setkey). Cheers, -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv3 2/2] crypto: omap-sham - omap sha1 & md5 driver
Dmitry Kasatkin wrote:
> Earlier kernel contained omap sha1 and md5 driver, which was not maintained,
> was not ported to new crypto APIs and removed from the source tree.
>
> - implements async and sync crypto API using dma and cpu.
> - supports multiple sham instances if available
>
> Signed-off-by: Dmitry Kasatkin
You have not addressed my objections raised earlier.
Also, why are you exporting a shash object? You cannot sleep during
shash operations (except for setkey).
Cheers,
--
Visit Openswan at http://www.openswan.org/
Email: Herbert Xu ~{PmV>HI~}
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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RE: [PATCH v2] OMAP3: I2C: Errata ID i207: Clear wrong RDR interrupt
> -Original Message-
> From: Menon, Nishanth
> Sent: Tuesday, April 13, 2010 10:18 PM
> To: G, Manjunath Kondaiah
> Cc: linux-...@vger.kernel.org; linux-omap@vger.kernel.org;
> ben-li...@fluff.org; Kalliguddi, Hema
> Subject: Re: [PATCH v2] OMAP3: I2C: Errata ID i207: Clear
> wrong RDR interrupt
>
> On 04/13/2010 07:01 AM, G, Manjunath Kondaiah wrote:
> > Under certain rare conditions, I2C_STAT[13].RDR bit may be set
> > and the corresponding interrupt fire, even there is no data in
> > the receive FIFO, or the I2C data transfer is still ongoing.
> > These spurious RDR events must be ignored by the software.
> >
> > This patch handles and ignores RDR spurious interrupts.
> >
> > Patch tested on OMAP zoom3 board.
> >
> > Signed-off-by: Manjunatha GK
> > Cc: linux-omap@vger.kernel.org
> > Cc: linux-...@vger.kernel.org
> > Cc: ben-li...@fluff.org
> > Cc: Kalliguddi, Hema
> > Cc: Nishanth Menon
> > ---
> > Review comments for earlier post can be found at:
> > https://patchwork.kernel.org/patch/90122/
> Overall, the comments have not been implemented, so my NAK continues
> unfortunately. please review the comments again.
This errata is applicable to OMAP2 and OMAP3 and not applicable to
OMAP4. I will update the same in patch description.
Rest of review comments will be taken care as explained below.
>
> >
> > drivers/i2c/busses/i2c-omap.c | 32
> +++-
> > 1 files changed, 31 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/i2c/busses/i2c-omap.c
> b/drivers/i2c/busses/i2c-omap.c
> > index ae6f5c1..d4ec886 100644
> > --- a/drivers/i2c/busses/i2c-omap.c
> > +++ b/drivers/i2c/busses/i2c-omap.c
> > @@ -733,10 +733,40 @@ complete:
> > }
> > if (stat& (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
> > u8 num_bytes = 1;
> > +
> > + /*
> > +* I2C Errata(Errata Nos. OMAP2: 1.67,
> OMAP3: 1.8)
> > +* Not applicable for OMAP4.
> > +* Under certain rare conditions, RDR
> could be set again
> > +* when the bus is busy, then ignore
> the interrupt and
> > +* clear the interrupt.
> > +*/
> > + if ((stat& OMAP_I2C_STAT_RDR)&&
> !cpu_is_omap44xx()) {
> > + /* Step 1: If RDR is set, clear it */
> > + omap_i2c_ack_stat(dev, stat&
> OMAP_I2C_STAT_RDR);
> > +
> > + /* Step 2: */
> > + if(!(omap_i2c_read_reg(dev,
> OMAP_I2C_STAT_REG)
> > + &
> OMAP_I2C_STAT_BB)) {
> > + /* Step 3: */
> > + while(omap_i2c_read_reg(dev,
> > + OMAP_I2C_STAT_REG)
> > + &
> OMAP_I2C_STAT_RDR) {
> > +
> omap_i2c_ack_stat(dev, stat
> > + &
> OMAP_I2C_STAT_RDR);
> > + dev_err(dev->dev,
> > + "I2C : RDR when
> the bus is busy.\n");
> > + continue;
> continue in the inner while loop? NAK. should have been an if
> condition
> here.
It's my bad. I will fix it.
>
> > + }
> > +
> > + }
> > + else
> > + return IRQ_HANDLED;
> using a continue is better as commented for patch v1.
Agreed.
>
> > + }
> > if (dev->fifo_size) {
> > if (stat& OMAP_I2C_STAT_RRDY)
> > num_bytes = dev->fifo_size;
> > - else/* read RXSTAT on RDR
> interrupt */
> > + else /* Step4: read RXSTAT on
> RDR interrupt */
> dont really need this..
I have changed only comment. I will revert if it is not required.
-Manjunath--
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Re: [RFC] [PATCH 2/3] OMAP4: Keyboard Board Support
On Wed, Apr 14, 2010 at 6:40 AM, Arce, Abraham wrote:
> From: Syed Rafiuddin
>
> Keyboard support for SDP OMAP4430
>
> Signed-off-by: Abraham Arce
> ---
'Form: Syed Rafiuddin', but not 'Signed-off-by:'... is it correct?
> arch/arm/mach-omap2/board-4430sdp.c | 61 ++
> 1 files changed, 25 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-4430sdp.c
> b/arch/arm/mach-omap2/board-4430sdp.c
> index 9a35367..747a4d8 100644
> --- a/arch/arm/mach-omap2/board-4430sdp.c
> +++ b/arch/arm/mach-omap2/board-4430sdp.c
> @@ -35,16 +35,13 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> #include
> #include "mmc-twl4030.h"
>
> -#define OMAP4_KBDOCP_BASE 0x4A31C000
> -
> -static int omap_keymap[] = {
> +static int sdp4430_keymap[] = {
> KEY(0, 0, KEY_E),
> KEY(0, 1, KEY_D),
> KEY(0, 2, KEY_X),
> @@ -52,7 +49,7 @@ static int omap_keymap[] = {
> KEY(0, 4, KEY_W),
> KEY(0, 5, KEY_S),
> KEY(0, 6, KEY_Q),
> - KEY(0, 7, KEY_UNKNOWN),
> + KEY(0, 7, KEY_PROG1),
>
> KEY(1, 0, KEY_R),
> KEY(1, 1, KEY_F),
> @@ -61,7 +58,7 @@ static int omap_keymap[] = {
> KEY(1, 4, KEY_Y),
> KEY(1, 5, KEY_H),
> KEY(1, 6, KEY_A),
> - KEY(1, 7, KEY_UNKNOWN),
> + KEY(1, 7, KEY_PROG2),
>
> KEY(2, 0, KEY_T),
> KEY(2, 1, KEY_G),
> @@ -70,23 +67,23 @@ static int omap_keymap[] = {
> KEY(2, 4, KEY_U),
> KEY(2, 5, KEY_J),
> KEY(2, 6, KEY_N),
> - KEY(2, 7, KEY_UNKNOWN),
> + KEY(2, 7, KEY_PROG3),
>
> KEY(3, 0, KEY_HOME),
> KEY(3, 1, KEY_SEND),
> KEY(3, 2, KEY_END),
> KEY(3, 3, KEY_F1),
> - KEY(3, 4, KEY_LEFTSHIFT),
> + KEY(3, 4, KEY_F2),
> KEY(3, 5, KEY_F3),
> KEY(3, 6, KEY_BACK),
> - KEY(3, 7, KEY_UNKNOWN),
> + KEY(3, 7, KEY_PROG4),
>
> - KEY(4, 0, KEY_UNKNOWN),
> - KEY(4, 1, KEY_UNKNOWN),
> - KEY(4, 2, KEY_UNKNOWN),
> - KEY(4, 3, KEY_UNKNOWN),
> + KEY(4, 0, KEY_F5),
> + KEY(4, 1, KEY_F6),
> + KEY(4, 2, KEY_F7),
> + KEY(4, 3, KEY_F8),
> KEY(4, 4, KEY_VOLUMEUP),
> - KEY(4, 5, KEY_UNKNOWN),
> + KEY(4, 5, KEY_F9),
> KEY(4, 6, KEY_BACKSPACE),
> KEY(4, 7, KEY_F4),
>
> @@ -108,7 +105,7 @@ static int omap_keymap[] = {
> KEY(6, 6, KEY_P),
> KEY(6, 7, KEY_OK),
>
> - KEY(7, 0, KEY_UNKNOWN),
> + KEY(7, 0, KEY_LEFTSHIFT),
> KEY(7, 1, KEY_ENTER),
> KEY(7, 2, KEY_CAPSLOCK),
> KEY(7, 3, KEY_SPACE),
> @@ -119,31 +116,23 @@ static int omap_keymap[] = {
> 0,
> };
Are you aware of that interpretation of 'row' and 'col' get reversed
in matrix keymap framework.
Also last element '0' should be removed.
--
Regards,
Vimal Singh
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RE: [PATCH] nand support on omap3 boards
> -Original Message- > From: Vimal Singh [mailto:vimal.neww...@gmail.com] > Sent: 2010-04-14 10:05 > To: Ghorai, Sukumar > Cc: linux-omap@vger.kernel.org > Subject: Re: [PATCH] nand support on omap3 boards > > You post this mail in previous thread. Do not do that. ($SUBJECT is > same as last one). > Post it in different thread. > > And why this is not posted as a series? > In fact these patches should be posted in two set of patches: > 1. patches related to IRQ mode support > 2. patches related ROM code ecc layout [Ghorai] Agree. > > And IMHO, these patches should in revers order: > > omap: NAND: ecc layout select from board file > > omap: NAND: Making ecc layout as compatible with romcode ecc [Ghorai] But this is the order it's in SYNC/ manju's dev tree. I think. > > One more thing all these patches should also be posted to MTD list. In > fact, most of these patches should go through mtd tree itself. [Ghorai] ok. I will.. > > -- > Regards, > Vimal Singh > > > > On Tue, Apr 13, 2010 at 11:07 PM, Sukumar Ghorai wrote: > > The following set of patches applies on top of the Tony's master > branch. > > And dependency on following series of patch - > > > > > > Sukumar Ghorai (3): > > omap3: GPMC register definition at common location > > omap3: NAND Prefetch in IRQ mode support > > omap-3630 NAND: enable NAND io in prefetch-irq mode > > omap: NAND: ecc layout select from board file > > omap: NAND: Making ecc layout as compatible with romcode ecc > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > > the body of a message to majord...@vger.kernel.org > > More majordomo info at http://vger.kernel.org/majordomo-info.html > > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] nand support on omap3 boards
On Wed, Apr 14, 2010 at 10:05 AM, Vimal Singh wrote: > You post this mail in previous thread. Do not do that. ($SUBJECT is > same as last one). > Post it in different thread. > > And why this is not posted as a series? > In fact these patches should be posted in two set of patches: > 1. patches related to IRQ mode support > 2. patches related ROM code ecc layout > > And IMHO, these patches should in revers order: >> omap: NAND: ecc layout select from board file >> omap: NAND: Making ecc layout as compatible with romcode ecc I saw them again. Please discard this comment. It looks OK to me. -- Regards, Vimal Singh -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] nand support on omap3 boards
You post this mail in previous thread. Do not do that. ($SUBJECT is same as last one). Post it in different thread. And why this is not posted as a series? In fact these patches should be posted in two set of patches: 1. patches related to IRQ mode support 2. patches related ROM code ecc layout And IMHO, these patches should in revers order: > omap: NAND: ecc layout select from board file > omap: NAND: Making ecc layout as compatible with romcode ecc One more thing all these patches should also be posted to MTD list. In fact, most of these patches should go through mtd tree itself. -- Regards, Vimal Singh On Tue, Apr 13, 2010 at 11:07 PM, Sukumar Ghorai wrote: > The following set of patches applies on top of the Tony's master branch. > And dependency on following series of patch - > > > Sukumar Ghorai (3): > omap3: GPMC register definition at common location > omap3: NAND Prefetch in IRQ mode support > omap-3630 NAND: enable NAND io in prefetch-irq mode > omap: NAND: ecc layout select from board file > omap: NAND: Making ecc layout as compatible with romcode ecc > > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 10/11] omap hsmmc: fix the hsmmc driver for am3517.
Adrian Hunter wrote:
Stanley.Miao wrote:
am3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the
regulators
like "vmmc", so we don't need set "set_power" function for it.
It would be better to leave omap_hsmmc alone and either:
- define fixed voltage regulators
- or make a noop set_power function
There are no voltage regulator for mmc, I will make a noop set_power
function.
How is the power supplied?
I didn't found it in TRM. The pin vmmc was removed, no pin was added.
With regard to pbias the change should be:
I will accept the below change.
Thanks for the review.
Stanley.
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 9ad2295..595b24a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -150,7 +150,7 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
-} else {
+} else if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
@@ -216,12 +216,24 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
*/
mmc->slots[0].ocr_mask = c->ocr_mask;
+if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
+switch (c->mmc) {
+case 1:
+/* on-chip level shifting via PBIAS0/PBIAS1 */
+mmc->slots[0].before_set_reg = hsmmc1_before_set_reg;
+mmc->slots[0].after_set_reg = hsmmc1_after_set_reg;
+break;
+case 2:
+case 3:
+/* off-chip level shifting, or none */
+mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
+mmc->slots[0].after_set_reg = NULL;
+break;
+}
+}
+
switch (c->mmc) {
case 1:
-/* on-chip level shifting via PBIAS0/PBIAS1 */
-mmc->slots[0].before_set_reg = hsmmc1_before_set_reg;
-mmc->slots[0].after_set_reg = hsmmc1_after_set_reg;
-
/* Omap3630 HSMMC1 supports only 4-bit */
if (cpu_is_omap3630() && c->wires > 4) {
c->wires = 4;
@@ -235,9 +247,6 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
c->wires = 4;
/* FALLTHROUGH */
case 3:
-/* off-chip level shifting, or none */
-mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
-mmc->slots[0].after_set_reg = NULL;
break;
default:
pr_err("MMC%d configuration not supported!\n", c->mmc);
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/hsmmc.c |4 +++-
drivers/mmc/host/omap_hsmmc.c | 28 +---
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 9ad2295..a6e6c86 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -150,7 +150,7 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
-} else {
+} else if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
@@ -216,6 +216,7 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
*/
mmc->slots[0].ocr_mask = c->ocr_mask;
+#ifndef CONFIG_MACH_OMAP3517EVM
ifdef CONFIG_MACH_OMAP3517EVM
switch (c->mmc) {
case 1:
/* on-chip level shifting via PBIAS0/PBIAS1 */
@@ -244,6 +245,7 @@ void __init omap2_hsmmc_init(struct
omap2_hsmmc_info *controllers)
kfree(mmc);
continue;
}
+#endif
hsmmc_data[c->mmc - 1] = mmc;
}
diff --git a/drivers/mmc/host/omap_hsmmc.c
b/drivers/mmc/host/omap_hsmmc.c
index 83f0aff..f3c64a2 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -236,7 +236,7 @@ static int omap_hsmmc_resume_cdirq(struct device
*dev, int slot)
#endif
-#ifdef CONFIG_REGULATOR
+#if defined(CONFIG_REGULATOR) && !defined(CONFIG_MACH_OMAP3517EVM)
static int omap_hsmmc_1_set_power(struct device *dev, int slot, int
power_on,
int vdd)
@@ -1086,12 +1086,15 @@ static int omap_hsmmc_switch_opcond(struct
omap_hsmmc_host *host, int vdd)
clk_disable(host->dbclk);
/* Turn the power off */
-ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
+if (mmc_slot(host).set_power) {
+ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
+
+/* Tur
Re: [PATCH 03/11] AM3517: rename the i2c boardinfo to make it more readable
Hiremath, Vaibhav wrote: -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Stanley.Miao Sent: Tuesday, April 13, 2010 3:02 PM To: linux-omap@vger.kernel.org Cc: t...@atomide.com Subject: [PATCH 03/11] AM3517: rename the i2c boardinfo to make it more readable There are three i3c buses on am3517, [Hiremath, Vaibhav] Please correct the typo here. I will correct it in V2. Thanks. now rename these three boardinfo structure name to am3517evm_i2c1_boardinfo, am3517evm_i2c2_boardinfo, and am3517evm_i2c3_boardinfo, to make it more readable. } @@ -425,8 +425,8 @@ static void __init am3517_evm_init(void) /* RTC - S35390A */ am3517_evm_rtc_init(); - i2c_register_board_info(1, am3517evm_i2c_boardinfo, - ARRAY_SIZE(am3517evm_i2c_boardinfo)); + i2c_register_board_info(1, am3517evm_i2c1_boardinfo, + ARRAY_SIZE(am3517evm_i2c1_boardinfo)); } [Hiremath, Vaibhav] personally I like the idea of specifying explicitly the I2C instance here which you did, I have seen other board files using slave device name while defining the I2C board info. I am not sure about whether we have any standard thing to follow here. Let's take opinion from other folks here; if they are ok with this approach then I think we can merge this patch. There are many slave devices on each i2c bus. I2C1: S35390, TPS65023, TSC2004, four INA219. I2C2: TCA6416PW, two TLV320AIC23 I2C3: two TCA6416PW, TLV320AIC23, TVP5146. So we can't name the i2c board files with the slave device names Stanley. Thanks, Vaibhav static void __init am3517_evm_map_io(void) -- 1.5.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 11/11] AM3517: Add mmc platform data for am3517evm
Hiremath, Vaibhav wrote: -Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Stanley.Miao Sent: Tuesday, April 13, 2010 3:05 PM To: linux-omap@vger.kernel.org Cc: t...@atomide.com; Chikkature Rajashekar, Madhusudhan Subject: [PATCH 11/11] AM3517: Add mmc platform data for am3517evm Add mmc platform data. Besides, the mmc slot on UI board has a pin conflict with LCD, so add macros to resolve it. [Hiremath, Vaibhav] I am not sure whether your statement is right here. As far I know he conflicts is between UI card USB and Base-board LCD panel. There is no conflict between MMC2 (which is on UI card) with LCD interface. I may be wrong here, can you please point me to the docs/schematics where you got this info. Both MMC2_WP and LCD_PANEL_PWR_MFP connected to the pin uP_SPI1_SCSn2. You can found it in schematics. Stanley. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC] [PATCH 3/3] OMAP4: Keyboard Kernel Configuration
From: Syed Rafiuddin Update OMAP4430 default configuration to add OMAP4 keyboard driver Signed-off-by: Abraham Arce --- arch/arm/configs/omap_4430sdp_defconfig |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig index a52094f..e9d804a 100644 --- a/arch/arm/configs/omap_4430sdp_defconfig +++ b/arch/arm/configs/omap_4430sdp_defconfig @@ -443,7 +443,8 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD=y CONFIG_KEYBOARD_ATKBD=y -CONFIG_KEYBOARD_OMAP=y +# CONFIG_KEYBOARD_OMAP is not set +CONFIG_KEYBOARD_OMAP4=y # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set -- 1.5.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC] [PATCH 2/3] OMAP4: Keyboard Board Support
From: Syed Rafiuddin
Keyboard support for SDP OMAP4430
Signed-off-by: Abraham Arce
---
arch/arm/mach-omap2/board-4430sdp.c | 61 ++
1 files changed, 25 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 9a35367..747a4d8 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -35,16 +35,13 @@
#include
#include
#include
-#include
#include
#include
#include
#include
#include "mmc-twl4030.h"
-#define OMAP4_KBDOCP_BASE 0x4A31C000
-
-static int omap_keymap[] = {
+static int sdp4430_keymap[] = {
KEY(0, 0, KEY_E),
KEY(0, 1, KEY_D),
KEY(0, 2, KEY_X),
@@ -52,7 +49,7 @@ static int omap_keymap[] = {
KEY(0, 4, KEY_W),
KEY(0, 5, KEY_S),
KEY(0, 6, KEY_Q),
- KEY(0, 7, KEY_UNKNOWN),
+ KEY(0, 7, KEY_PROG1),
KEY(1, 0, KEY_R),
KEY(1, 1, KEY_F),
@@ -61,7 +58,7 @@ static int omap_keymap[] = {
KEY(1, 4, KEY_Y),
KEY(1, 5, KEY_H),
KEY(1, 6, KEY_A),
- KEY(1, 7, KEY_UNKNOWN),
+ KEY(1, 7, KEY_PROG2),
KEY(2, 0, KEY_T),
KEY(2, 1, KEY_G),
@@ -70,23 +67,23 @@ static int omap_keymap[] = {
KEY(2, 4, KEY_U),
KEY(2, 5, KEY_J),
KEY(2, 6, KEY_N),
- KEY(2, 7, KEY_UNKNOWN),
+ KEY(2, 7, KEY_PROG3),
KEY(3, 0, KEY_HOME),
KEY(3, 1, KEY_SEND),
KEY(3, 2, KEY_END),
KEY(3, 3, KEY_F1),
- KEY(3, 4, KEY_LEFTSHIFT),
+ KEY(3, 4, KEY_F2),
KEY(3, 5, KEY_F3),
KEY(3, 6, KEY_BACK),
- KEY(3, 7, KEY_UNKNOWN),
+ KEY(3, 7, KEY_PROG4),
- KEY(4, 0, KEY_UNKNOWN),
- KEY(4, 1, KEY_UNKNOWN),
- KEY(4, 2, KEY_UNKNOWN),
- KEY(4, 3, KEY_UNKNOWN),
+ KEY(4, 0, KEY_F5),
+ KEY(4, 1, KEY_F6),
+ KEY(4, 2, KEY_F7),
+ KEY(4, 3, KEY_F8),
KEY(4, 4, KEY_VOLUMEUP),
- KEY(4, 5, KEY_UNKNOWN),
+ KEY(4, 5, KEY_F9),
KEY(4, 6, KEY_BACKSPACE),
KEY(4, 7, KEY_F4),
@@ -108,7 +105,7 @@ static int omap_keymap[] = {
KEY(6, 6, KEY_P),
KEY(6, 7, KEY_OK),
- KEY(7, 0, KEY_UNKNOWN),
+ KEY(7, 0, KEY_LEFTSHIFT),
KEY(7, 1, KEY_ENTER),
KEY(7, 2, KEY_CAPSLOCK),
KEY(7, 3, KEY_SPACE),
@@ -119,31 +116,23 @@ static int omap_keymap[] = {
0,
};
-static struct resource sdp4430_kp_resources[] = {
- {
- .start = OMAP4_KBDOCP_BASE,
- .end= OMAP4_KBDOCP_BASE,
- .flags = IORESOURCE_MEM,
- },
-};
+static struct matrix_keymap_data sdp4430_keymap_data = {
+ .keymap = sdp4430_keymap,
+ .keymap_size= ARRAY_SIZE(sdp4430_keymap),
+ };
-static struct omap_kp_platform_data omap_kp_data = {
- .rows = 8,
- .cols = 8,
- .keymap = omap_keymap,
- .keymapsize = ARRAY_SIZE(omap_keymap),
- .delay = 4,
- .rep= 1,
-};
+static struct matrix_keypad_platform_data sdp4430_keypad_data = {
+ .keymap_data= &sdp4430_keymap_data,
+ .num_row_gpios = 8,
+ .num_col_gpios = 8,
+ };
-static struct platform_device omap_kp_device = {
- .name = "omap-keypad",
+static struct platform_device sdp4430_keypad_device = {
+ .name = "omap4-keypad",
.id = -1,
.dev= {
- .platform_data = &omap_kp_data,
+ .platform_data = &sdp4430_keypad_data,
},
- .num_resources = ARRAY_SIZE(sdp4430_kp_resources),
- .resource = sdp4430_kp_resources,
};
/* Begin Synaptic Touchscreen TM-01217 */
@@ -210,7 +199,7 @@ static struct platform_device sdp4430_lcd_device = {
static struct platform_device *sdp4430_devices[] __initdata = {
&sdp4430_lcd_device,
- &omap_kp_device,
+ &sdp4430_keypad_device,
};
static __attribute__ ((unused)) struct
--
1.5.4.3
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[RFC] [PATCH 1/3] OMAP4: Keyboard Controller Support
Keyboard controller for OMAP4 with built-in scanning algorithm.
The following implementations are used:
- matrix_keypac.c logic
- hwmod framework
- threaded irq
Signed-off-by: Syed Rafiuddin
Signed-off-by: Abraham Arce
---
drivers/input/keyboard/Kconfig|9 +
drivers/input/keyboard/Makefile |1 +
drivers/input/keyboard/omap4-keypad.c | 367 +
3 files changed, 377 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/keyboard/omap4-keypad.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 5049c3c..8a4103e 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -390,6 +390,15 @@ config KEYBOARD_OMAP
To compile this driver as a module, choose M here: the
module will be called omap-keypad.
+config KEYBOARD_OMAP4
+tristate "TI OMAP4 keypad support"
+depends on (ARCH_OMAP4)
+help
+ Say Y here if you want to use the OMAP4 keypad.
+
+ To compile this driver as a module, choose M here: the
+ module will be called omap4-keypad.
+
config KEYBOARD_TWL4030
tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"
depends on TWL4030_CORE
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 78654ef..1b3dfbe 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_KEYBOARD_MATRIX) += matrix_keypad.o
obj-$(CONFIG_KEYBOARD_MAX7359) += max7359_keypad.o
obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
obj-$(CONFIG_KEYBOARD_OMAP)+= omap-keypad.o
+obj-$(CONFIG_KEYBOARD_OMAP4) += omap4-keypad.o
obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o
obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keypad.o
obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o
diff --git a/drivers/input/keyboard/omap4-keypad.c
b/drivers/input/keyboard/omap4-keypad.c
new file mode 100644
index 000..b656b4f
--- /dev/null
+++ b/drivers/input/keyboard/omap4-keypad.c
@@ -0,0 +1,367 @@
+/*
+ * linux/drivers/input/keyboard/omap4-keypad.c
+ *
+ * OMAP4 Keypad Driver
+ *
+ * Copyright (C) 2010 Texas Instruments
+ *
+ * Author: Abraham Arce
+ * Initial Code: Syed Rafiuddin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* OMAP4 registers */
+#define OMAP4_KBD_REVISION 0x00
+#define OMAP4_KBD_SYSCONFIG0x10
+#define OMAP4_KBD_SYSSTATUS0x14
+#define OMAP4_KBD_IRQSTATUS0x18
+#define OMAP4_KBD_IRQENABLE0x1C
+#define OMAP4_KBD_WAKEUPENABLE 0x20
+#define OMAP4_KBD_PENDING 0x24
+#define OMAP4_KBD_CTRL 0x28
+#define OMAP4_KBD_DEBOUNCINGTIME 0x2C
+#define OMAP4_KBD_LONGKEYTIME 0x30
+#define OMAP4_KBD_TIMEOUT 0x34
+#define OMAP4_KBD_STATEMACHINE 0x38
+#define OMAP4_KBD_ROWINPUTS0x3C
+#define OMAP4_KBD_COLUMNOUTPUTS0x40
+#define OMAP4_KBD_FULLCODE31_0 0x44
+#define OMAP4_KBD_FULLCODE63_320x48
+
+/* OMAP4 bit definitions */
+#define OMAP4_DEF_SYSCONFIG_SOFTRST(1 << 1)
+#define OMAP4_DEF_SYSCONFIG_ENAWKUP(1 << 2)
+#define OMAP4_DEF_IRQENABLE_EVENTEN(1 << 0)
+#define OMAP4_DEF_IRQENABLE_LONGKEY(1 << 1)
+#define OMAP4_DEF_IRQENABLE_TIMEOUTEN (1 << 2)
+#define OMAP4_DEF_CTRL_NOSOFTMODE (1 << 1)
+#define OMAP4_DEF_CTRLPTVVALUE (1 << 2)
+#define OMAP4_DEF_CTRLPTV (1 << 1)
+#define OMAP4_DEF_IRQDISABLE 0x00
+
+/* OMAP4 values */
+#define OMAP4_VAL_DEBOUNCINGTIME 0x07
+#define OMAP4_VAL_FUNCTIONALCFG0x1E
+
+#define OMAP4_MASK_IRQSTATUSDISABLE0x
+
+struct omap_keypad {
+
+ struct platform_device *pdev;
+ struct omap_hwmod *oh;
+ const struct matrix_keypad_platform_data *pdata;
+
+ void __iomem*base;
+
+ struct input_dev *input;
+
+ int irq;
+
+ unsigned short *keycodes;
+ unsigned int rows;
+ unsigned int cols;
+ unsigned int debounce;
+ unsigned int row_shift;
+ unsigned char key_state[8
[RFC] [PATCH 0/3] OMAP4 Keyboard Controller Support
Keyboard controller for OMAP4 includes - built-in scanning algorithm - debouncing feature - handling mechanism up to 9 x 9 keys - wake-up event generation These patches have been tested in a SDP4430 board. Taking OMAP4 TI tree as code base, omap4_next-wip branch http://dev.omapzoom.org/?p=santosh/kernel-omap4-base.git;a=summary --- arch/arm/configs/omap_4430sdp_defconfig |3 +- arch/arm/mach-omap2/board-4430sdp.c | 61 ++--- drivers/input/keyboard/Kconfig |9 + drivers/input/keyboard/Makefile |1 + drivers/input/keyboard/omap4-keypad.c | 366 +++ 5 files changed, 403 insertions(+), 37 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCHV3 1/2] OMAP3: Set MPU and IVA bypass Clock Divider
> -Original Message- > From: Sripathy, Vishwanath > Sent: Tuesday, April 06, 2010 6:45 PM > To: Premi, Sanjeev; Paul Walmsley > Cc: linux-omap@vger.kernel.org > Subject: RE: [PATCHV3 1/2] OMAP3: Set MPU and IVA bypass Clock Divider > [snip]--[snip] > > I have been trying to find a good place for the same myself. Though, > > my reason is different. The default kernel boots with the OPP3 for > > OMAP34xx; but when mpurate is used to set 720; I feel sometimes the > > boot may fail if the voltage isn't right. > I thought uboot would have set the right voltage while > setting the MPU rate. Isn't that true? "mpurate" is argument passed to kernel. u-boot is not doing much with it. > > > > The voltage does stabilize when smartrelex reflex is initialized. > Why do you have dependency on SR for voltage stabilization? > You can set the right voltage even w/o SR (via VP). SR is > only for optimizing Voltage for a given OPP. In the default flow, clock_arch_init() where mpurate is acted upon, I didn't want to start changing the VP. Else some part of the code in SR - related to VP - will be duplicated. OR needs to be exported. Still not made my mind; as I have been away from this problem for a while now :( ~sanjeev > > Regards > Vishwa > > > > I was trying to move smartreflex above in the init sequence; after > > i2c has been initialized. > > > > Comments/ thoughts? > > > > Best regards, > > Sanjeev > > [snip]--[snip] -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] nand support on omap3 boards
The following set of patches applies on top of the Tony's master branch. And these are the patches required to enable nand (nor and onenand for sdp only) for different platform. Sukumar Ghorai (3): OMAP: ZOOM: Introducing 'board-zoom-flash.c' omap3: add support for NAND on zoom2 board omap3: add support for NAND on zoom3 board omap-3630-sdp : Add support for Flash omap-3630-sdp: enable Flash device support omap3: add support for NAND on LDP board zoom2: enable NAND support zoom3: enable NAND support arch/arm/configs/omap_3630sdp_defconfig | 77 +- arch/arm/configs/omap_zoom2_defconfig | 90 - arch/arm/configs/omap_zoom3_defconfig | 90 - arch/arm/mach-omap2/Makefile |4 + arch/arm/mach-omap2/board-3630sdp.c | 110 + arch/arm/mach-omap2/board-ldp.c | 41 + arch/arm/mach-omap2/board-sdp-flash.c |2 + arch/arm/mach-omap2/board-zoom-flash.c| 82 ++ arch/arm/mach-omap2/board-zoom2.c | 49 +++ arch/arm/mach-omap2/board-zoom3.c | 48 +++ arch/arm/mach-omap2/include/mach/board-zoom.h | 11 +++ 11 files changed, 601 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-omap2/board-zoom-flash.c -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH] omap3: NAND Prefetch in IRQ mode support
Ghorai, Sukumar would like to recall the message, "[PATCH] omap3: NAND Prefetch in IRQ mode support".-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH 8/8] omap3: GPMC register definition at common location
Ghorai, Sukumar would like to recall the message, "[PATCH 8/8] omap3: GPMC register definition at common location".-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH] omap-3630 NAND: enable NAND io in prefetch-irq mode
Ghorai, Sukumar would like to recall the message, "[PATCH] omap-3630 NAND: enable NAND io in prefetch-irq mode".-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH] omap: NAND: ecc layout select from board file
Ghorai, Sukumar would like to recall the message, "[PATCH] omap: NAND: ecc layout select from board file".-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH] omap: NAND: Making ecc layout as compatible with romcode ecc
Ghorai, Sukumar would like to recall the message, "[PATCH] omap: NAND: Making ecc layout as compatible with romcode ecc".-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Recall: [PATCH] nand support on omap3 boards
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[PATCH v3 2/8] omap3: add support for NAND on zoom2 board
This patch adds NAND support to ZOOM2 board.
This uses 'board-zoom-flash.c' for NAND initialization.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-zoom2.c | 49 +
2 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 4b9fc57..f8d9a42 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -124,6 +124,7 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o
\
board-rx51-peripherals.o \
hsmmc.o
obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \
+ board-zoom-flash.o \
board-zoom-peripherals.o \
hsmmc.o \
board-zoom-debugboard.o
diff --git a/arch/arm/mach-omap2/board-zoom2.c
b/arch/arm/mach-omap2/board-zoom2.c
index 9a26f84..e0f4901 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -77,10 +77,59 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
+static struct mtd_partition zoom_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = 4 * (64 * 2048), /* 512KB, 0x8 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 10 * (64 * 2048), /* 1.25MB, 0x14 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c */
+ .size = 2 * (64 * 2048), /* 256KB, 0x4 */
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x020*/
+ .size = 240 * (64 * 2048),/* 30M, 0x1E0 */
+ },
+ {
+ .name = "system",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x200 */
+ .size = 3328 * (64 * 2048), /* 416M, 0x1A00 */
+ },
+ {
+ .name = "userdata",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C00*/
+ .size = 256 * (64 * 2048),/* 32M, 0x200 */
+ },
+ {
+ .name = "cache",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E00*/
+ .size = 256 * (64 * 2048),/* 32M, 0x200 */
+ },
+};
+
+static struct flash_partitions zoom_flash_partitions[] = {
+ {
+ .parts = zoom_nand_partitions,
+ .nr_parts = ARRAY_SIZE(zoom_nand_partitions),
+ },
+};
+
static void __init omap_zoom2_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
zoom_peripherals_init();
+ zoom_flash_init(zoom_flash_partitions, ZOOM_NAND_CS);
zoom_debugboard_init();
}
--
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[PATCH 8/8] omap3: GPMC register definition at common location
GPMC register definition move to common place in gpmc.h.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/gpmc.c | 38 +--
arch/arm/plat-omap/include/plat/gpmc.h | 36 +++--
drivers/mtd/nand/omap2.c | 14 ---
3 files changed, 40 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5bc3ca0..9c77af0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -28,40 +28,6 @@
#include
-/* GPMC register offsets */
-#define GPMC_REVISION 0x00
-#define GPMC_SYSCONFIG 0x10
-#define GPMC_SYSSTATUS 0x14
-#define GPMC_IRQSTATUS 0x18
-#define GPMC_IRQENABLE 0x1c
-#define GPMC_TIMEOUT_CONTROL 0x40
-#define GPMC_ERR_ADDRESS 0x44
-#define GPMC_ERR_TYPE 0x48
-#define GPMC_CONFIG0x50
-#define GPMC_STATUS0x54
-#define GPMC_PREFETCH_CONFIG1 0x1e0
-#define GPMC_PREFETCH_CONFIG2 0x1e4
-#define GPMC_PREFETCH_CONTROL 0x1ec
-#define GPMC_PREFETCH_STATUS 0x1f0
-#define GPMC_ECC_CONFIG0x1f4
-#define GPMC_ECC_CONTROL 0x1f8
-#define GPMC_ECC_SIZE_CONFIG 0x1fc
-
-#define GPMC_CS0 0x60
-#define GPMC_CS_SIZE 0x30
-
-#define GPMC_MEM_START 0x
-#define GPMC_MEM_END 0x3FFF
-#define BOOT_ROM_SPACE 0x10/* 1MB */
-
-#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
-#define GPMC_SECTION_SHIFT 28 /* 128 MB */
-
-#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
-#define CS_NUM_SHIFT 24
-#define ENABLE_PREFETCH(0x1 << 7)
-#define DMA_MPU_MODE 2
-
/* Structure to save gpmc cs context */
struct gpmc_cs_config {
u32 config1;
@@ -112,7 +78,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
{
void __iomem *reg_addr;
- reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+ reg_addr = gpmc_base + GPMC_CS0_BASE + (cs * GPMC_CS_SIZE) + idx;
__raw_writel(val, reg_addr);
}
@@ -120,7 +86,7 @@ u32 gpmc_cs_read_reg(int cs, int idx)
{
void __iomem *reg_addr;
- reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+ reg_addr = gpmc_base + GPMC_CS0_BASE + (cs * GPMC_CS_SIZE) + idx;
return __raw_readl(reg_addr);
}
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index 145838a..347d212 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -25,10 +25,40 @@
#define GPMC_CS_NAND_ADDRESS 0x20
#define GPMC_CS_NAND_DATA 0x24
-#define GPMC_CONFIG0x50
-#define GPMC_STATUS0x54
+/* GPMC register offsets */
+#define GPMC_REVISION 0x00
+#define GPMC_SYSCONFIG 0x10
+#define GPMC_SYSSTATUS 0x14
+#define GPMC_IRQSTATUS 0x18
+#define GPMC_IRQENABLE 0x1c
+#define GPMC_TIMEOUT_CONTROL0x40
+#define GPMC_ERR_ADDRESS0x44
+#define GPMC_ERR_TYPE 0x48
+#define GPMC_CONFIG 0x50
+#define GPMC_STATUS 0x54
+#define GPMC_PREFETCH_CONFIG1 0x1e0
+#define GPMC_PREFETCH_CONFIG2 0x1e4
+#define GPMC_PREFETCH_CONTROL 0x1ec
+#define GPMC_PREFETCH_STATUS0x1f0
+#define GPMC_ECC_CONFIG 0x1f4
+#define GPMC_ECC_CONTROL0x1f8
+#define GPMC_ECC_SIZE_CONFIG0x1fc
+#define GPMC_ECC1_RESULT0x200
+
#define GPMC_CS0_BASE 0x60
-#define GPMC_CS_SIZE 0x30
+#define GPMC_CS_SIZE0x30
+
+#define GPMC_MEM_START 0x
+#define GPMC_MEM_END0x3FFF
+#define BOOT_ROM_SPACE 0x10/* 1MB */
+
+#define GPMC_CHUNK_SHIFT24 /* 16 MB */
+#define GPMC_SECTION_SHIFT 28 /* 128 MB */
+
+#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
+#define CS_NUM_SHIFT24
+#define ENABLE_PREFETCH (0x1 << 7)
+#define DMA_MPU_MODE2
#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 26aec00..ceb3877 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -22,12 +22,6 @@
#include
#include
-#define GPMC_IRQ_STATUS0x18
-#define GPMC_ECC_CONFIG0x1F4
-#define GPMC_ECC_CONTROL 0x1F8
-#define GPMC_ECC_SIZE_CONFIG 0x1FC
-#define GPMC_ECC1_RESULT 0x200
-
#defineDRIVER_NAME "omap2-nand"
#defineNAND_WP_OFF 0
@@ -36,6 +30,7 @@
#defineGPMC_BUF_FULL 0x0001
#defineGPMC_BUF_EMPTY 0x
+#ifdef CONFIG_MTD_NAND_OMAP_HWECC
#define NAND_Ecc_P1e (1 << 0)
#define NAND_Ecc_P2e (1 << 1)
#define NAND_Ecc_P4e (1 << 2)
@@ -102,6 +97,7 @@
#define P4e_s(a) (TF(a & NAND
[PATCH] nand support on omap3 boards
The following set of patches applies on top of the Tony's master branch. And dependency on following series of patch - Sukumar Ghorai (3): omap3: GPMC register definition at common location omap3: NAND Prefetch in IRQ mode support omap-3630 NAND: enable NAND io in prefetch-irq mode omap: NAND: ecc layout select from board file omap: NAND: Making ecc layout as compatible with romcode ecc -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 8/8] zoom3: enable NAND support
update config file to support for NAND on zoom3 board. Signed-off-by: Sukumar Ghorai --- arch/arm/configs/omap_zoom3_defconfig | 90 - 1 files changed, 89 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig index 5e55b55..1a12e3e --- a/arch/arm/configs/omap_zoom3_defconfig +++ b/arch/arm/configs/omap_zoom3_defconfig @@ -461,7 +461,95 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_OMAP_PREFETCH=y +# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set -- 1.5.4.7 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/8] omap-3630-sdp : Add support for Flash
add support for NAND, OneNAND, NOR on omap 3630-sdp board.
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-3630sdp.c | 110 +
arch/arm/mach-omap2/board-sdp-flash.c |2 +
3 files changed, 113 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 57f418b..0b0481d
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_MACH_OMAP_ZOOM3) +=
board-zoom3.o \
board-zoom-debugboard.o
obj-$(CONFIG_MACH_OMAP_3630SDP)+= board-3630sdp.o \
board-zoom-peripherals.o \
+ board-sdp-flash.o \
hsmmc.o
obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \
hsmmc.o
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 504d2bd..0919dca
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -25,6 +25,7 @@
#include "mux.h"
#include "sdram-hynix-h8mbx00u0mer-0em.h"
+extern void sdp_flash_init(struct flash_partitions[]);
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
@@ -93,12 +94,121 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
+static struct mtd_partition sdp_nor_partitions[] = {
+ /* bootloader (U-Boot, etc) in first sector */
+ {
+ .name = "Bootloader-NOR",
+ .offset = 0,
+ .size = SZ_256K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ /* bootloader params in the next sector */
+ {
+ .name = "Params-NOR",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_256K,
+ .mask_flags = 0,
+ },
+ /* kernel */
+ {
+ .name = "Kernel-NOR",
+ .offset = MTDPART_OFS_APPEND,
+ .size = SZ_2M,
+ .mask_flags = 0
+ },
+ /* file system */
+ {
+ .name = "Filesystem-NOR",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ .mask_flags = 0
+ }
+};
+
+static struct mtd_partition sdp_onenand_partitions[] = {
+ {
+ .name = "X-Loader-OneNAND",
+ .offset = 0,
+ .size = 4 * (64 * 2048),
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ },
+ {
+ .name = "U-Boot-OneNAND",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 2 * (64 * 2048),
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ },
+ {
+ .name = "U-Boot Environment-OneNAND",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 1 * (64 * 2048),
+ },
+ {
+ .name = "Kernel-OneNAND",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 16 * (64 * 2048),
+ },
+ {
+ .name = "File System-OneNAND",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition sdp_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = 4 * (64 * 2048),
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 10 * (64 * 2048),
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c */
+ .size = 6 * (64 * 2048),
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x28 */
+ .size = 40 * (64 * 2048),
+ },
+ {
+ .name = "File System - NAND",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x78 */
+ },
+};
+
+static struct flash_partitions sdp_flash_partitions[] =
[PATCH v3 1/8] omap3: zoom: Introducing 'board-zoom-flash.c'
This patch adds 'board-zoom-flash.c', which could be utilized by boards similar
to ZOOM2. (For ex: LDP, ZOOM2, ZOOM3). This does initialization for NAND device
based on the 'cs' number and partition information passed from board file
(ex: board-zoom2.c).
Signed-off-by: Vimal Singh
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/board-zoom-flash.c| 82 +
arch/arm/mach-omap2/include/mach/board-zoom.h | 11 +++
2 files changed, 93 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-zoom-flash.c
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
new file mode 100644
index 000..55e173b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -0,0 +1,82 @@
+/*
+ * board-zoom-flash.c
+ *
+ * Copyright (C) 2009 Texas Instruments Inc.
+ * Vimal Singh
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+
+#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
+
+/* Note that all values in this struct are in nanoseconds */
+static struct gpmc_timings nand_timings = {
+
+ .sync_clk = 0,
+
+ .cs_on = 0,
+ .cs_rd_off = 36,
+ .cs_wr_off = 36,
+
+ .adv_on = 6,
+ .adv_rd_off = 24,
+ .adv_wr_off = 36,
+
+ .we_off = 30,
+ .oe_off = 48,
+
+ .access = 54,
+ .rd_cycle = 72,
+ .wr_cycle = 72,
+
+ .wr_access = 30,
+ .wr_data_mux_bus = 0,
+};
+
+/* NAND chip access: 16 bit */
+static struct omap_nand_platform_data zoom_nand_data = {
+ .nand_setup = NULL,
+ .gpmc_t = &nand_timings,
+ .dma_channel= 3,/* disable DMA in OMAP NAND driver */
+ .dev_ready = NULL,
+ .devsize= 1,/* '0' for 8-bit, '1' for 16-bit device */
+};
+
+/**
+ * zoom_flash_init - Identify devices connected to GPMC and register.
+ *
+ * @return - void.
+ */
+void __init zoom_flash_init(struct flash_partitions zoom_nand_parts[], int cs)
+{
+ u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
+
+ zoom_nand_data.cs = cs;
+ zoom_nand_data.parts= zoom_nand_parts[0].parts;
+ zoom_nand_data.nr_parts = zoom_nand_parts[0].nr_parts;
+ zoom_nand_data.gpmc_baseaddr= (void *)(gpmc_base_add);
+ zoom_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
+ GPMC_CS0_BASE + cs * GPMC_CS_SIZE);
+ gpmc_nand_init(&zoom_nand_data);
+}
+#else
+void __init zoom_flash_init(struct flash_partitions zoom_nand_parts[], int cs)
+{
+}
+#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h
b/arch/arm/mach-omap2/include/mach/board-zoom.h
index c93b29e..f4469d3 100644
--- a/arch/arm/mach-omap2/include/mach/board-zoom.h
+++ b/arch/arm/mach-omap2/include/mach/board-zoom.h
@@ -1,5 +1,16 @@
/*
* Defines for zoom boards
*/
+#include
+#include
+
+struct flash_partitions {
+ struct mtd_partition *parts;
+ int nr_parts;
+};
+
+#define ZOOM_NAND_CS 0
+
+extern void __init zoom_flash_init(struct flash_partitions [], int);
extern int __init zoom_debugboard_init(void);
extern void __init zoom_peripherals_init(void);
--
1.5.4.7
--
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[PATCH v2 6/8] omap3: add support for NAND on LDP board
patch adds NAND support to LDP board.
Signed-off-by: Vimal Singh
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/Makefile|1 +
arch/arm/mach-omap2/board-ldp.c | 41 +++
2 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 0cf463c..7556e72
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -108,6 +108,7 @@ obj-$(CONFIG_MACH_OMAP3_BEAGLE) +=
board-omap3beagle.o \
obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \
hsmmc.o
obj-$(CONFIG_MACH_OMAP_LDP)+= board-ldp.o \
+ board-zoom-flash.o \
hsmmc.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o \
hsmmc.o
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 5fcb52e..0976bd9 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -38,6 +38,7 @@
#include
#include
#include
+#include
#include
#include
@@ -389,6 +390,45 @@ static struct omap_musb_board_data musb_board_data = {
.power = 100,
};
+static struct mtd_partition zoom_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = 4 * (64 * 2048), /* 512KB, 0x8 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 10 * (64 * 2048), /* 1.25MB, 0x14 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c */
+ .size = 2 * (64 * 2048), /* 256KB, 0x4 */
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x020*/
+ .size = 240 * (64 * 2048),/* 30M, 0x1E0 */
+ },
+ {
+ .name = "File System - NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x200 */
+ .size = MTDPART_SIZ_FULL, /* 96MB, 0x600 */
+ },
+
+};
+
+static struct flash_partitions zoom_flash_partitions[] = {
+ {
+ .parts = zoom_nand_partitions,
+ .nr_parts = ARRAY_SIZE(zoom_nand_partitions),
+ },
+};
+
static void __init omap_ldp_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -401,6 +441,7 @@ static void __init omap_ldp_init(void)
ads7846_dev_init();
omap_serial_init();
usb_musb_init(&musb_board_data);
+ zoom_flash_init(zoom_flash_partitions, ZOOM_NAND_CS);
omap2_hsmmc_init(mmc);
/* link regulators to MMC adapters */
--
1.5.4.7
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[PATCH] omap3: NAND Prefetch in IRQ mode support
This patch enable prefetch-irq mode for NAND.
Signed-off-by: Vimal Singh
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/board-sdp-flash.c |1 +
arch/arm/mach-omap2/board-zoom-flash.c |1 +
arch/arm/plat-omap/include/plat/nand.h |1 +
drivers/mtd/nand/Kconfig | 14 ++-
drivers/mtd/nand/omap2.c | 190 +++-
5 files changed, 201 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 0604cfb..663c9c2 100644
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -151,6 +151,7 @@ static struct omap_nand_platform_data sdp_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings,
.dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .gpmc_irq = 20,
.dev_ready = NULL,
.devsize= 0,/* '0' for 8-bit, '1' for 16-bit device */
};
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 55e173b..6a5dcf4 100644
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -54,6 +54,7 @@ static struct omap_nand_platform_data zoom_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings,
.dma_channel= 3,/* disable DMA in OMAP NAND driver */
+ .gpmc_irq = 20,
.dev_ready = NULL,
.devsize= 1,/* '0' for 8-bit, '1' for 16-bit device */
};
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 6ba88d2..8ba2e3e 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -20,6 +20,7 @@ struct omap_nand_platform_data {
int (*nand_setup)(void);
int (*dev_ready)(struct omap_nand_platform_data *);
int dma_channel;
+ int gpmc_irq;
unsigned long phys_base;
void __iomem*gpmc_cs_baseaddr;
void __iomem*gpmc_baseaddr;
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 42e5ea4..376da8c 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -85,6 +85,9 @@ config MTD_NAND_OMAP_PREFETCH
help
The NAND device can be accessed for Read/Write using GPMC PREFETCH
engine
to improve the performance.
+GPMC PREFETCH can be configured eigther in MPU interrupt mode or in DMA
+interrupt mode. If not selected any of them prefetch will be used in
+polling mode.
config MTD_NAND_OMAP_PREFETCH_DMA
depends on MTD_NAND_OMAP_PREFETCH
@@ -93,7 +96,16 @@ config MTD_NAND_OMAP_PREFETCH_DMA
help
The GPMC PREFETCH engine can be configured eigther in MPU interrupt
mode
or in DMA interrupt mode.
-Say y for DMA mode or MPU mode will be used
+Say y for DMA mode
+
+config MTD_NAND_OMAP_PREFETCH_IRQ
+ depends on MTD_NAND_OMAP_PREFETCH && !MTD_NAND_OMAP_PREFETCH_DMA
+ bool "IRQ mode"
+ default n
+ help
+The GPMC PREFETCH engine can be configured eigther in MPU interrupt
mode
+or in DMA interrupt mode.
+Say y for IRQ mode
config MTD_NAND_TS7250
tristate "NAND Flash device on TS-7250 board"
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index ceb3877..5b49c84 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -111,17 +112,27 @@ module_param(use_prefetch, bool, 0);
MODULE_PARM_DESC(use_prefetch, "enable/disable use of PREFETCH");
#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH_DMA
+const int use_interrupt;
static int use_dma = 1;
/* "modprobe ... use_dma=0" etc */
module_param(use_dma, bool, 0);
-MODULE_PARM_DESC(use_dma, "enable/disable use of DMA");
+MODULE_PARM_DESC(use_dma, "enable/disable use of DMA mode");
+#elif defined(CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ)
+const int use_dma;
+static int use_interrupt = 1;
+
+/* "modprobe ... use_dma=0" etc */
+module_param(use_interrupt, bool, 0);
+MODULE_PARM_DESC(use_interrupt, "enable/disable use of IRQ mode");
#else
const int use_dma;
+const int use_interrupt;
#endif
#else
const int use_prefetch;
const int use_dma;
+const int use_interrupt;
#endif
struct omap_nand_info {
@@ -139,6 +150,8 @@ struct omap_nand_info {
void __iomem*nand_pref_fifo_add;
struct completion comp;
int dma_ch;
+ int gpmc_irq;
+ u_char *buf;
};
/**
@@ -500,6 +513,151 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd,
omap_nand_dma_transfer(mtd, buf, len, 0
[PATCH] omap-3630 NAND: enable NAND io in prefetch-irq mode
Update config file to enable NAND in prefetch IRQ mode for ZOOM3 and 3630SDP . Signed-off-by: Sukumar Ghorai --- arch/arm/configs/omap_3630sdp_defconfig |1 + arch/arm/configs/omap_zoom3_defconfig |1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig index a623927..9dfce1a --- a/arch/arm/configs/omap_3630sdp_defconfig +++ b/arch/arm/configs/omap_3630sdp_defconfig @@ -525,6 +525,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_OMAP_PREFETCH=y # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ=y CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig index 1a12e3e..27b16ed --- a/arch/arm/configs/omap_zoom3_defconfig +++ b/arch/arm/configs/omap_zoom3_defconfig @@ -534,6 +534,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_OMAP_PREFETCH=y # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ=y CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set -- 1.5.4.7 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] omap: NAND: Making ecc layout as compatible with romcode ecc
This patch overrides nand ecc layout and bad block descriptor (for 8-bit
device) to support hw ecc in romcode layout. So as to have in sync with ecc
layout throughout; i.e. x-laod, u-boot and kernel.
This patch also enables to use romcode ecc for spd and zoom, by default.
This enables to flash x-load, u-boot, kernel, FS images from kernel itself
and compatiable with other tools.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/board-sdp-flash.c |2 +-
arch/arm/mach-omap2/board-zoom-flash.c |2 +-
drivers/mtd/nand/omap2.c | 42
3 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 29e0768..f1002cf 100644
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -162,7 +162,7 @@ __init board_nand_init(struct flash_partitions
sdp_nand_parts, u8 cs)
sdp_nand_data.cs= cs;
sdp_nand_data.parts = sdp_nand_parts.parts;
sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
- sdp_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
+ sdp_nand_data.ecc_opt = 0x2; /* HW ECC layout as in ROMCODE */
if (cpu_is_omap3630())
sdp_nand_data.devsize = 1; /* 0: 8-bit, 1: 16-bit device */
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 1547bdb..53eeaa6 100644
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -71,7 +71,7 @@ void __init zoom_flash_init(struct flash_partitions
zoom_nand_parts[], int cs)
zoom_nand_data.cs = cs;
zoom_nand_data.parts= zoom_nand_parts[0].parts;
zoom_nand_data.nr_parts = zoom_nand_parts[0].nr_parts;
- zoom_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
+ zoom_nand_data.ecc_opt = 0x2; /* HW ECC in romcode layout */
zoom_nand_data.gpmc_baseaddr= (void *)(gpmc_base_add);
zoom_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
GPMC_CS0_BASE + cs * GPMC_CS_SIZE);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index b42d058..1ff5609 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -152,6 +152,39 @@ struct omap_nand_info {
u_char *buf;
};
+static struct nand_ecclayout hw_x8_romcode_oob_64 = {
+ .eccbytes = 12,
+ .eccpos = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
+ },
+ .oobfree = {
+ {.offset = 13,
+.length = 51}
+ }
+};
+
+/* Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks
+ */
+static uint8_t scan_ff_pattern[] = { 0xff };
+static struct nand_bbt_descr bb_descrip_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 0,
+ .len = 1,
+ .pattern = scan_ff_pattern,
+};
+
+static struct nand_ecclayout hw_x16_romcode_oob_64 = {
+ .eccbytes = 12,
+ .eccpos = {
+ 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
+ },
+ .oobfree = {
+ {.offset = 14,
+.length = 50}
+ }
+};
+
/**
* omap_nand_wp - This function enable or disable the Write Protect feature
* @mtd: MTD device structure
@@ -1142,6 +1175,15 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
info->nand.verify_buf = omap_verify_buf;
if (pdata->ecc_opt & 0x3) {
+ if (pdata->ecc_opt == 0x2) {
+ if (info->nand.options & NAND_BUSWIDTH_16) {
+ info->nand.ecc.layout = &hw_x16_romcode_oob_64;
+ } else {
+ info->nand.ecc.layout = &hw_x8_romcode_oob_64;
+ info->nand.badblock_pattern =
+ &bb_descrip_flashbased;
+ }
+ }
info->nand.ecc.bytes= 3;
info->nand.ecc.size = 512;
info->nand.ecc.calculate= omap_calculate_ecc;
--
1.5.4.7
--
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[PATCH] omap: NAND: ecc layout select from board file
This patch makes it possible to select sw or hw (different layout options)
ecc scheme supported by omap nand driver. And hw ecc layout selected for
sdp and zoom boards, by default.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/board-sdp-flash.c |1 +
arch/arm/mach-omap2/board-zoom-flash.c |1 +
arch/arm/plat-omap/include/plat/nand.h |4
drivers/mtd/nand/omap2.c | 28
4 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 663c9c2..29e0768
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -162,6 +162,7 @@ __init board_nand_init(struct flash_partitions
sdp_nand_parts, u8 cs)
sdp_nand_data.cs= cs;
sdp_nand_data.parts = sdp_nand_parts.parts;
sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
+ sdp_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
if (cpu_is_omap3630())
sdp_nand_data.devsize = 1; /* 0: 8-bit, 1: 16-bit device */
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 6a5dcf4..1547bdb
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -71,6 +71,7 @@ void __init zoom_flash_init(struct flash_partitions
zoom_nand_parts[], int cs)
zoom_nand_data.cs = cs;
zoom_nand_data.parts= zoom_nand_parts[0].parts;
zoom_nand_data.nr_parts = zoom_nand_parts[0].nr_parts;
+ zoom_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
zoom_nand_data.gpmc_baseaddr= (void *)(gpmc_base_add);
zoom_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
GPMC_CS0_BASE + cs * GPMC_CS_SIZE);
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 8ba2e3e..b2ccd68 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -25,6 +25,10 @@ struct omap_nand_platform_data {
void __iomem*gpmc_cs_baseaddr;
void __iomem*gpmc_baseaddr;
int devsize;
+ int ecc_opt; /* 0x0 - sw ecc
+ * 0x1 - hw ecc default ecc layout
+ * 0x2 - hw ecc in romcode layout
+ */
};
/* size (4 KiB) for IO mapping */
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b49c84..b42d058
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -31,7 +31,6 @@
#defineGPMC_BUF_FULL 0x0001
#defineGPMC_BUF_EMPTY 0x
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
#define NAND_Ecc_P1e (1 << 0)
#define NAND_Ecc_P2e (1 << 1)
#define NAND_Ecc_P4e (1 << 2)
@@ -98,7 +97,6 @@
#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
-#endif /* CONFIG_MTD_NAND_OMAP_HWECC */
#ifdef CONFIG_MTD_PARTITIONS
static const char *part_probes[] = { "cmdlinepart", NULL };
@@ -679,7 +677,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const
u_char * buf, int len)
return 0;
}
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
/**
* omap_hwecc_init - Initialize the HW ECC for NAND flash in GPMC controller
* @mtd: MTD device structure
@@ -957,7 +954,6 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int
mode)
__raw_writel(val, info->gpmc_baseaddr + GPMC_ECC_CONFIG);
}
-#endif
/**
* omap_wait - wait until the command is done
@@ -1145,19 +1141,19 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
}
info->nand.verify_buf = omap_verify_buf;
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
- info->nand.ecc.bytes= 3;
- info->nand.ecc.size = 512;
- info->nand.ecc.calculate= omap_calculate_ecc;
- info->nand.ecc.hwctl= omap_enable_hwecc;
- info->nand.ecc.correct = omap_correct_data;
- info->nand.ecc.mode = NAND_ECC_HW;
+ if (pdata->ecc_opt & 0x3) {
+ info->nand.ecc.bytes= 3;
+ info->nand.ecc.size = 512;
+ info->nand.ecc.calculate= omap_calculate_ecc;
+ info->nand.ecc.hwctl= omap_enable_hwecc;
+ info->nand.ecc.correct = omap_correct_data;
+ info->nand.ecc.mode = NAND_ECC_HW;
- /* init HW ECC */
- omap_hwecc_init(&info->mtd);
-#else
- info->nand.ecc.mode = NAND_ECC_SOFT;
-#endif
+ /* init HW ECC */
+ omap_hwecc_init(&info->mtd);
+
[PATCH v2 5/8] omap-3630-sdp: enable Flash device support
update config file to support for NAND, OneNAND, NOR on omap 3630-sdp board. Signed-off-by: Sukumar Ghorai --- arch/arm/configs/omap_3630sdp_defconfig | 77 ++- 1 files changed, 76 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig index 609f348..a623927 100644 --- a/arch/arm/configs/omap_3630sdp_defconfig +++ b/arch/arm/configs/omap_3630sdp_defconfig @@ -461,7 +461,82 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_OMAP_PREFETCH=y +# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_ONENAND=y +# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set +# CONFIG_MTD_ONENAND_GENERIC is not set +CONFIG_MTD_ONENAND_OMAP2=y +# CONFIG_MTD_ONENAND_OTP is not set +# CONFIG_MTD_ONENAND_2X_PROGRAM is not set +# CONFIG_MTD_ONENAND_SIM is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set -- 1.5.4.7 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 3/8] omap3: add support for NAND on zoom3 board
patch adds NAND support to zoom3 board.
Signed-off-by: SUkumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-zoom3.c | 48 +
2 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f8d9a42..57f418b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -129,6 +129,7 @@ obj-$(CONFIG_MACH_OMAP_ZOOM2) +=
board-zoom2.o \
hsmmc.o \
board-zoom-debugboard.o
obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom3.o \
+ board-zoom-flash.o \
board-zoom-peripherals.o \
hsmmc.o \
board-zoom-debugboard.o
diff --git a/arch/arm/mach-omap2/board-zoom3.c
b/arch/arm/mach-omap2/board-zoom3.c
index cd3e40c..8a9811e 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -34,6 +34,53 @@ static void __init omap_zoom_map_io(void)
static struct omap_board_config_kernel zoom_config[] __initdata = {
};
+static struct mtd_partition zoom_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = 4 * (64 * 2048), /* 512KB, 0x8 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 10 * (64 * 2048), /* 1.25MB, 0x14 */
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c */
+ .size = 2 * (64 * 2048), /* 256KB, 0x4 */
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x020*/
+ .size = 240 * (64 * 2048),/* 30M, 0x1E0 */
+ },
+ {
+ .name = "system",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x200 */
+ .size = 3328 * (64 * 2048), /* 416M, 0x1A00 */
+ },
+ {
+ .name = "userdata",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C00*/
+ .size = 256 * (64 * 2048),/* 32M, 0x200 */
+ },
+ {
+ .name = "cache",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E00*/
+ .size = 256 * (64 * 2048),/* 32M, 0x200 */
+ },
+};
+
+static struct flash_partitions zoom_flash_partitions[] = {
+ {
+ .parts = zoom_nand_partitions,
+ .nr_parts = ARRAY_SIZE(zoom_nand_partitions),
+ },
+};
static void __init omap_zoom_init_irq(void)
{
omap_board_config = zoom_config;
@@ -66,6 +113,7 @@ static void __init omap_zoom_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
zoom_peripherals_init();
+ zoom_flash_init(zoom_flash_partitions, ZOOM_NAND_CS);
zoom_debugboard_init();
omap_mux_init_gpio(64, OMAP_PIN_OUTPUT);
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[PATCH 7/8] zoom2: enable NAND support
update config file to support for NAND in zoom2. Signed-off-by: Sukumar Ghorai --- arch/arm/configs/omap_zoom2_defconfig | 90 - 1 files changed, 89 insertions(+), 1 deletions(-) diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig old mode 100644 new mode 100755 index 881faea..29f6f71 --- a/arch/arm/configs/omap_zoom2_defconfig +++ b/arch/arm/configs/omap_zoom2_defconfig @@ -440,7 +440,95 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_OMAP_PREFETCH=y +# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set -- 1.5.4.7 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] nand support on omap3 boards
The following set of patches applies on top of the Tony's master branch. And these are the patches required to enable nand (nor and onenand for sdp only) for different platform. Sukumar Ghorai (3): OMAP: ZOOM: Introducing 'board-zoom-flash.c' omap3: add support for NAND on zoom2 board omap3: add support for NAND on zoom3 board omap-3630-sdp : Add support for Flash omap-3630-sdp: enable Flash device support omap3: add support for NAND on LDP board zoom2: enable NAND support zoom3: enable NAND support arch/arm/configs/omap_3630sdp_defconfig | 77 +- arch/arm/configs/omap_zoom2_defconfig | 90 - arch/arm/configs/omap_zoom3_defconfig | 90 - arch/arm/mach-omap2/Makefile |4 + arch/arm/mach-omap2/board-3630sdp.c | 110 + arch/arm/mach-omap2/board-ldp.c | 41 + arch/arm/mach-omap2/board-sdp-flash.c |2 + arch/arm/mach-omap2/board-zoom-flash.c| 82 ++ arch/arm/mach-omap2/board-zoom2.c | 49 +++ arch/arm/mach-omap2/board-zoom3.c | 48 +++ arch/arm/mach-omap2/include/mach/board-zoom.h | 11 +++ 11 files changed, 601 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-omap2/board-zoom-flash.c -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] DSPBRIDGE:Fix Kernel memory poison overwritten after DSP_MMUFAULT
kmalloc() does not guarantee page aligned memory always,hence
resulting in virtual addresses not getting aligned to page boundary.
This patch replaces kmalloc() with __get_free_pages() which
allocates kernel memory in terms of PAGES fixing the Kernel
memory corruption after DSP_MMUFAULT.
Cc: Ameya Palande
Cc: Felipe Contreras
Cc: Hiroshi Doyu
Cc: Omar Ramirez Luna
Cc: Nishanth Menon
Signed-off-by: Deepak Chitriki
---
drivers/dsp/bridge/wmd/ue_deh.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/ue_deh.c b/drivers/dsp/bridge/wmd/ue_deh.c
index 14dd8ae..7ed5f60 100644
--- a/drivers/dsp/bridge/wmd/ue_deh.c
+++ b/drivers/dsp/bridge/wmd/ue_deh.c
@@ -239,7 +239,8 @@ void bridge_deh_notify(struct deh_mgr *hdeh_mgr, u32
ulEventMask, u32 dwErrInfo)
"bridge_deh_notify: DSP_MMUFAULT, fault "
"address = 0x%x\n", (unsigned int)fault_addr);
dummy_va_addr =
- (u32) mem_calloc(sizeof(char) * 0x1000, MEM_PAGED);
+ (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO,
+0);
mem_physical =
VIRT_TO_PHYS(PG_ALIGN_LOW
((u32) dummy_va_addr, PG_SIZE4K));
@@ -338,6 +339,6 @@ dsp_status bridge_deh_get_info(struct deh_mgr *hdeh_mgr,
*/
void bridge_deh_release_dummy_mem(void)
{
- kfree((void *)dummy_va_addr);
+ free_pages((void *)dummy_va_addr, 0);
dummy_va_addr = 0;
}
--
1.6.3.3
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Re: [PATCH] DSPBRIDGE:Fix Kernel memory poison overwritten after DSP_MMUFAULT
Please ignore this patch.
Thanks,
Deepak
Chitriki Rudramuni, Deepak wrote:
kmalloc() does not guarantee page aligned memory always,hence
resulting in virtual addresses not getting aligned to page boundary.
This patch replaces kmalloc() with __get_free_pages() which
allocates kernel memory in terms of PAGES fixing the Kernel
memory corruption after DSP_MMUFAULT.
Signed-off-by: Deepak Chitriki
---
drivers/dsp/bridge/wmd/ue_deh.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/ue_deh.c b/drivers/dsp/bridge/wmd/ue_deh.c
index 14dd8ae..7ed5f60 100644
--- a/drivers/dsp/bridge/wmd/ue_deh.c
+++ b/drivers/dsp/bridge/wmd/ue_deh.c
@@ -239,7 +239,8 @@ void bridge_deh_notify(struct deh_mgr *hdeh_mgr, u32
ulEventMask, u32 dwErrInfo)
"bridge_deh_notify: DSP_MMUFAULT, fault "
"address = 0x%x\n", (unsigned int)fault_addr);
dummy_va_addr =
- (u32) mem_calloc(sizeof(char) * 0x1000, MEM_PAGED);
+ (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO,
+0);
mem_physical =
VIRT_TO_PHYS(PG_ALIGN_LOW
((u32) dummy_va_addr, PG_SIZE4K));
@@ -338,6 +339,6 @@ dsp_status bridge_deh_get_info(struct deh_mgr *hdeh_mgr,
*/
void bridge_deh_release_dummy_mem(void)
{
- kfree((void *)dummy_va_addr);
+ free_pages((void *)dummy_va_addr, 0);
dummy_va_addr = 0;
}
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Re: [PATCH v2] OMAP3: I2C: Errata ID i207: Clear wrong RDR interrupt
On 04/13/2010 07:01 AM, G, Manjunath Kondaiah wrote:
Under certain rare conditions, I2C_STAT[13].RDR bit may be set
and the corresponding interrupt fire, even there is no data in
the receive FIFO, or the I2C data transfer is still ongoing.
These spurious RDR events must be ignored by the software.
This patch handles and ignores RDR spurious interrupts.
Patch tested on OMAP zoom3 board.
Signed-off-by: Manjunatha GK
Cc: linux-omap@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: ben-li...@fluff.org
Cc: Kalliguddi, Hema
Cc: Nishanth Menon
---
Review comments for earlier post can be found at:
https://patchwork.kernel.org/patch/90122/
Overall, the comments have not been implemented, so my NAK continues
unfortunately. please review the comments again.
drivers/i2c/busses/i2c-omap.c | 32 +++-
1 files changed, 31 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ae6f5c1..d4ec886 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -733,10 +733,40 @@ complete:
}
if (stat& (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+
+ /*
+* I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8)
+* Not applicable for OMAP4.
+* Under certain rare conditions, RDR could be set again
+* when the bus is busy, then ignore the interrupt and
+* clear the interrupt.
+*/
+ if ((stat& OMAP_I2C_STAT_RDR)&& !cpu_is_omap44xx()) {
+ /* Step 1: If RDR is set, clear it */
+ omap_i2c_ack_stat(dev, stat&
OMAP_I2C_STAT_RDR);
+
+ /* Step 2: */
+ if(!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
+ & OMAP_I2C_STAT_BB)) {
+ /* Step 3: */
+ while(omap_i2c_read_reg(dev,
+ OMAP_I2C_STAT_REG)
+ & OMAP_I2C_STAT_RDR) {
+ omap_i2c_ack_stat(dev, stat
+ & OMAP_I2C_STAT_RDR);
+ dev_err(dev->dev,
+ "I2C : RDR when the bus is
busy.\n");
+ continue;
continue in the inner while loop? NAK. should have been an if condition
here.
+ }
+
+ }
+ else
+ return IRQ_HANDLED;
using a continue is better as commented for patch v1.
+ }
if (dev->fifo_size) {
if (stat& OMAP_I2C_STAT_RRDY)
num_bytes = dev->fifo_size;
- else/* read RXSTAT on RDR interrupt */
+ else /* Step4: read RXSTAT on RDR interrupt */
dont really need this..
num_bytes = (omap_i2c_read_reg(dev,
OMAP_I2C_BUFSTAT_REG)
>> 8)& 0x3F;
Regards,
Nishanth Menon
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[PATCH] DSPBRIDGE:Fix Kernel memory poison overwritten after DSP_MMUFAULT
kmalloc() does not guarantee page aligned memory always,hence
resulting in virtual addresses not getting aligned to page boundary.
This patch replaces kmalloc() with __get_free_pages() which
allocates kernel memory in terms of PAGES fixing the Kernel
memory corruption after DSP_MMUFAULT.
Signed-off-by: Deepak Chitriki
---
drivers/dsp/bridge/wmd/ue_deh.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/ue_deh.c b/drivers/dsp/bridge/wmd/ue_deh.c
index 14dd8ae..7ed5f60 100644
--- a/drivers/dsp/bridge/wmd/ue_deh.c
+++ b/drivers/dsp/bridge/wmd/ue_deh.c
@@ -239,7 +239,8 @@ void bridge_deh_notify(struct deh_mgr *hdeh_mgr, u32
ulEventMask, u32 dwErrInfo)
"bridge_deh_notify: DSP_MMUFAULT, fault "
"address = 0x%x\n", (unsigned int)fault_addr);
dummy_va_addr =
- (u32) mem_calloc(sizeof(char) * 0x1000, MEM_PAGED);
+ (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO,
+0);
mem_physical =
VIRT_TO_PHYS(PG_ALIGN_LOW
((u32) dummy_va_addr, PG_SIZE4K));
@@ -338,6 +339,6 @@ dsp_status bridge_deh_get_info(struct deh_mgr *hdeh_mgr,
*/
void bridge_deh_release_dummy_mem(void)
{
- kfree((void *)dummy_va_addr);
+ free_pages((void *)dummy_va_addr, 0);
dummy_va_addr = 0;
}
--
1.6.3.3
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RE: [PATCH 03/11] AM3517: rename the i2c boardinfo to make it more readable
> -Original Message-
> From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> ow...@vger.kernel.org] On Behalf Of Stanley.Miao
> Sent: Tuesday, April 13, 2010 3:02 PM
> To: linux-omap@vger.kernel.org
> Cc: t...@atomide.com
> Subject: [PATCH 03/11] AM3517: rename the i2c boardinfo to make it more
> readable
>
> There are three i3c buses on am3517,
[Hiremath, Vaibhav] Please correct the typo here.
> now rename these three boardinfo
> structure name to am3517evm_i2c1_boardinfo, am3517evm_i2c2_boardinfo,
> and am3517evm_i2c3_boardinfo, to make it more readable.
>
> Signed-off-by: Stanley.Miao
> ---
> arch/arm/mach-omap2/board-am3517evm.c | 20 ++--
> 1 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-
> omap2/board-am3517evm.c
> index db542b2..5abf333 100644
> --- a/arch/arm/mach-omap2/board-am3517evm.c
> +++ b/arch/arm/mach-omap2/board-am3517evm.c
> @@ -152,7 +152,7 @@ void am3517_evm_ethernet_init(struct emac_platform_data
> *pdata)
> return ;
> }
>
> -static struct i2c_board_info __initdata am3517evm_i2c_boardinfo[] = {
> +static struct i2c_board_info __initdata am3517evm_i2c1_boardinfo[] = {
> {
> I2C_BOARD_INFO("s35390a", 0x30),
> .type = "s35390a",
> @@ -182,7 +182,7 @@ static void __init am3517_evm_rtc_init(void)
> gpio_free(GPIO_RTCS35390A_IRQ);
> return;
> }
> - am3517evm_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
> + am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
> }
>
> /*
> @@ -193,7 +193,7 @@ static void __init am3517_evm_rtc_init(void)
> static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = {
> .gpio_base = OMAP_MAX_GPIO_LINES,
> };
> -static struct i2c_board_info __initdata am3517evm_tca6416_info_0[] = {
> +static struct i2c_board_info __initdata am3517evm_i2c2_boardinfo[] = {
> {
> I2C_BOARD_INFO("tca6416", 0x21),
> .platform_data = &am3517evm_gpio_expander_info_0,
> @@ -207,7 +207,7 @@ static struct pca953x_platform_data
> am3517evm_ui_gpio_expander_info_1 = {
> static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = {
> .gpio_base = OMAP_MAX_GPIO_LINES + 32,
> };
> -static struct i2c_board_info __initdata am3517evm_ui_tca6416_info[] = {
> +static struct i2c_board_info __initdata am3517evm_i2c3_boardinfo[] = {
> {
> I2C_BOARD_INFO("tca6416", 0x20),
> .platform_data = &am3517evm_ui_gpio_expander_info_1,
> @@ -221,10 +221,10 @@ static struct i2c_board_info __initdata
> am3517evm_ui_tca6416_info[] = {
> static int __init am3517_evm_i2c_init(void)
> {
> omap_register_i2c_bus(1, 400, NULL, 0);
> - omap_register_i2c_bus(2, 400, am3517evm_tca6416_info_0,
> - ARRAY_SIZE(am3517evm_tca6416_info_0));
> - omap_register_i2c_bus(3, 400, am3517evm_ui_tca6416_info,
> - ARRAY_SIZE(am3517evm_ui_tca6416_info));
> + omap_register_i2c_bus(2, 400, am3517evm_i2c2_boardinfo,
> + ARRAY_SIZE(am3517evm_i2c2_boardinfo));
> + omap_register_i2c_bus(3, 400, am3517evm_i2c3_boardinfo,
> + ARRAY_SIZE(am3517evm_i2c3_boardinfo));
>
> return 0;
> }
> @@ -425,8 +425,8 @@ static void __init am3517_evm_init(void)
> /* RTC - S35390A */
> am3517_evm_rtc_init();
>
> - i2c_register_board_info(1, am3517evm_i2c_boardinfo,
> - ARRAY_SIZE(am3517evm_i2c_boardinfo));
> + i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
> + ARRAY_SIZE(am3517evm_i2c1_boardinfo));
> }
[Hiremath, Vaibhav] personally I like the idea of specifying explicitly the I2C
instance here which you did, I have seen other board files using slave device
name while defining the I2C board info. I am not sure about whether we have any
standard thing to follow here.
Let's take opinion from other folks here; if they are ok with this approach
then I think we can merge this patch.
Thanks,
Vaibhav
>
> static void __init am3517_evm_map_io(void)
> --
> 1.5.4.3
>
> --
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RE: [PATCH 11/11] AM3517: Add mmc platform data for am3517evm
> -Original Message-
> From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> ow...@vger.kernel.org] On Behalf Of Stanley.Miao
> Sent: Tuesday, April 13, 2010 3:05 PM
> To: linux-omap@vger.kernel.org
> Cc: t...@atomide.com; Chikkature Rajashekar, Madhusudhan
> Subject: [PATCH 11/11] AM3517: Add mmc platform data for am3517evm
>
> Add mmc platform data. Besides, the mmc slot on UI board has a pin conflict
> with LCD, so add macros to resolve it.
>
[Hiremath, Vaibhav] I am not sure whether your statement is right here. As far
I know he conflicts is between UI card USB and Base-board LCD panel.
There is no conflict between MMC2 (which is on UI card) with LCD interface. I
may be wrong here, can you please point me to the docs/schematics where you got
this info.
Thanks,
Vaibhav
> Signed-off-by: Stanley.Miao
> ---
> arch/arm/mach-omap2/Makefile |3 +-
> arch/arm/mach-omap2/board-am3517evm.c | 45
> +
> 2 files changed, 47 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 4b9fc57..e94afdd 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -142,7 +142,8 @@ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)+= board-
> omap3touchbook.o \
> hsmmc.o
> obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
>
> -obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
> +obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \
> +hsmmc.o
>
> # Platform specific device init code
> obj-y+= usb-musb.o
> diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-
> omap2/board-am3517evm.c
> index 6a82ac3..8054994 100644
> --- a/arch/arm/mach-omap2/board-am3517evm.c
> +++ b/arch/arm/mach-omap2/board-am3517evm.c
> @@ -26,6 +26,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -40,7 +41,9 @@
> #include
> #include
> #include
> +#include
>
> +#include "hsmmc.h"
> #include "mux.h"
>
> #define LCD_PANEL_PWR176
> @@ -440,6 +443,8 @@ static int __init am3517_evm_i2c_init(void)
> static int lcd_enabled;
> static int dvi_enabled;
>
> +#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
> + defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
> static void __init am3517_evm_display_init(void)
> {
> int r;
> @@ -501,6 +506,20 @@ static void am3517_evm_panel_disable_lcd(struct
> omap_dss_device *dssdev)
> gpio_set_value(LCD_PANEL_PWR, 0);
> lcd_enabled = 0;
> }
> +#else
> +static inline void __init am3517_evm_display_init(void)
> +{
> +}
> +
> +static inline int am3517_evm_panel_enable_lcd(struct omap_dss_device
> *dssdev)
> +{
> + return 0;
> +}
> +
> +static inline void am3517_evm_panel_disable_lcd(struct omap_dss_device
> *dssdev)
> +{
> +}
> +#endif
>
> static struct omap_dss_device am3517_evm_lcd_device = {
> .type = OMAP_DISPLAY_TYPE_DPI,
> @@ -613,6 +632,30 @@ static struct omap_board_mux board_mux[] __initdata = {
> #define board_muxNULL
> #endif
>
> +static struct omap2_hsmmc_info mmc[] = {
> + {
> + .mmc= 1,
> + .wires = 4,
> + .gpio_cd= 127,
> + .gpio_wp= 126,
> + .ocr_mask = MMC_VDD_165_195 |
> + MMC_VDD_26_27 | MMC_VDD_27_28 |
> + MMC_VDD_29_30 |
> + MMC_VDD_30_31 | MMC_VDD_31_32,
> + },
> +#if !defined(CONFIG_PANEL_SHARP_LQ043T1DG01) && \
> + !defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
> + {
> + .mmc= 2,
> + .wires = 4,
> + .gpio_cd= 175,
> + .gpio_wp= 176,
> + .ocr_mask = MMC_VDD_165_195,
> + },
> +#endif
> + {} /* Terminator */
> +};
> +
> static void __init am3517_evm_init(void)
> {
> omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
> @@ -636,6 +679,8 @@ static void __init am3517_evm_init(void)
>
> i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
> ARRAY_SIZE(am3517evm_i2c1_boardinfo));
> + /* MMC init function */
> + omap2_hsmmc_init(mmc);
> }
>
> static void __init am3517_evm_map_io(void)
> --
> 1.5.4.3
>
> --
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Re: [PATCH] board-omap3-beagle: add DSS2 support
Op 12 apr 2010, om 13:15 heeft Grazvydas Ignotas het volgende geschreven:
> On Mon, Apr 12, 2010 at 1:37 PM, Tomi Valkeinen
> wrote:
>>
>> On Mon, 2010-04-12 at 11:19 +0200, ext Koen Kooi wrote:
>>> This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out
>>> are supported.
>>>
>>> Signed-off-by: Koen Kooi
>>
>> Fiddling with TWL directly in tv enable/disable functions is a bit ugly,
>> but I'm not sure if there's a better way for that. Otherwise:
>
> It's only toggling VDAC supply, don't we already do that in DSS2 core?
> I think beagle_panel_enable_tv and beagle_panel_disable_tv can be
> simply removed.
I can send an updated patch with those bits removed if needed. Tomi?
regards,
Koen
>
>> Acked-by: Tomi Valkeinen
>
> A bit premature?
>
>>
>> Tomi
>>
>>> ---
>>> arch/arm/mach-omap2/board-omap3beagle.c | 130
>>> ---
>>> 1 files changed, 103 insertions(+), 27 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
>>> b/arch/arm/mach-omap2/board-omap3beagle.c
>>> index 962d377..534316c 100644
>>> --- a/arch/arm/mach-omap2/board-omap3beagle.c
>>> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
>>> @@ -39,6 +39,7 @@
>>>
>>> #include
>>> #include
>>> +#include
>>> #include
>>> #include
>>> #include
>>> @@ -106,6 +107,105 @@ static struct platform_device omap3beagle_nand_device
>>> = {
>>> .resource = &omap3beagle_nand_resource,
>>> };
>>>
>>> +/* DSS */
>>> +
>>> +static int beagle_enable_dvi(struct omap_dss_device *dssdev)
>>> +{
>>> + if (dssdev->reset_gpio != -1)
>
> gpio_is_valid()?
>
>>> + gpio_set_value(dssdev->reset_gpio, 1);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static void beagle_disable_dvi(struct omap_dss_device *dssdev)
>>> +{
>>> + if (dssdev->reset_gpio != -1)
>>> + gpio_set_value(dssdev->reset_gpio, 0);
>>> +}
>>> +
>>> +static struct omap_dss_device beagle_dvi_device = {
>>> + .type = OMAP_DISPLAY_TYPE_DPI,
>>> + .name = "dvi",
>>> + .driver_name = "generic_panel",
>>> + .phy.dpi.data_lines = 24,
>>> + .reset_gpio = 170,
>>> + .platform_enable = beagle_enable_dvi,
>>> + .platform_disable = beagle_disable_dvi,
>>> +};
>>> +
>>> +static int beagle_panel_enable_tv(struct omap_dss_device *dssdev)
>>> +{
>>> +#define ENABLE_VDAC_DEDICATED 0x03
>>> +#define ENABLE_VDAC_DEV_GRP 0x20
>>> +
>>> + twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
>>> + ENABLE_VDAC_DEDICATED,
>>> + TWL4030_VDAC_DEDICATED);
>>> + twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
>>> + ENABLE_VDAC_DEV_GRP, TWL4030_VDAC_DEV_GRP);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static void beagle_panel_disable_tv(struct omap_dss_device *dssdev)
>>> +{
>>> + twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
>>> + TWL4030_VDAC_DEDICATED);
>>> + twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x00,
>>> + TWL4030_VDAC_DEV_GRP);
>>> +}
>>> +
>>> +static struct omap_dss_device beagle_tv_device = {
>>> + .name = "tv",
>>> + .driver_name = "venc",
>>> + .type = OMAP_DISPLAY_TYPE_VENC,
>>> + .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
>>> + .platform_enable = beagle_panel_enable_tv,
>>> + .platform_disable = beagle_panel_disable_tv,
>>> +};
>>> +
>>> +static struct omap_dss_device *beagle_dss_devices[] = {
>>> + &beagle_dvi_device,
>>> + &beagle_tv_device,
>>> +};
>>> +
>>> +static struct omap_dss_board_info beagle_dss_data = {
>>> + .num_devices = ARRAY_SIZE(beagle_dss_devices),
>>> + .devices = beagle_dss_devices,
>>> + .default_device = &beagle_dvi_device,
>>> +};
>>> +
>>> +static struct platform_device beagle_dss_device = {
>>> + .name = "omapdss",
>>> + .id= -1,
>>> + .dev= {
>>> + .platform_data = &beagle_dss_data,
>>> + },
>>> +};
>>> +
>>> +static struct regulator_consumer_supply beagle_vdac_supply = {
>>> + .supply = "vdda_dac",
>>> + .dev= &beagle_dss_device.dev,
>>> +};
>>> +
>>> +static struct regulator_consumer_supply beagle_vdvi_supply = {
>>> + .supply = "vdds_dsi",
>>> + .dev= &beagle_dss_device.dev,
>>> +};
>
> Regulator framework recommends using device names instead of dev pointer:
>
> static struct regulator_consumer_supply beagle_vdac_supply =
>REGULATOR_SUPPLY("vdda_dac", "omapdss");
>
> static struct regulator_consumer_supply beagle_vdvi_supply =
>REGULATOR_SUPPLY("vdds_dsi", "omapdss");
>
>>> +
>>> +static void __init beagle_display_init(void)
>>> +{
>>> + int r;
>>> +
>>> + r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset");
>>> + if (r < 0) {
>>> + printk(KERN_ERR "Unable to get DVI reset GPIO\n");
>>> + return;
>>> + }
>>> +
>>> + gpio_direction_output(beagle_dvi_device.reset_
[PATCH v2] OMAP3: I2C: Errata ID i207: Clear wrong RDR interrupt
Under certain rare conditions, I2C_STAT[13].RDR bit may be set
and the corresponding interrupt fire, even there is no data in
the receive FIFO, or the I2C data transfer is still ongoing.
These spurious RDR events must be ignored by the software.
This patch handles and ignores RDR spurious interrupts.
Patch tested on OMAP zoom3 board.
Signed-off-by: Manjunatha GK
Cc: linux-omap@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: ben-li...@fluff.org
Cc: Kalliguddi, Hema
Cc: Nishanth Menon
---
Review comments for earlier post can be found at:
https://patchwork.kernel.org/patch/90122/
drivers/i2c/busses/i2c-omap.c | 32 +++-
1 files changed, 31 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index ae6f5c1..d4ec886 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -733,10 +733,40 @@ complete:
}
if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
u8 num_bytes = 1;
+
+ /*
+* I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8)
+* Not applicable for OMAP4.
+* Under certain rare conditions, RDR could be set again
+* when the bus is busy, then ignore the interrupt and
+* clear the interrupt.
+*/
+ if ((stat & OMAP_I2C_STAT_RDR) && !cpu_is_omap44xx()) {
+ /* Step 1: If RDR is set, clear it */
+ omap_i2c_ack_stat(dev, stat &
OMAP_I2C_STAT_RDR);
+
+ /* Step 2: */
+ if(!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
+ & OMAP_I2C_STAT_BB)) {
+ /* Step 3: */
+ while(omap_i2c_read_reg(dev,
+ OMAP_I2C_STAT_REG)
+ & OMAP_I2C_STAT_RDR) {
+ omap_i2c_ack_stat(dev, stat
+ & OMAP_I2C_STAT_RDR);
+ dev_err(dev->dev,
+ "I2C : RDR when the bus is
busy.\n");
+ continue;
+ }
+
+ }
+ else
+ return IRQ_HANDLED;
+ }
if (dev->fifo_size) {
if (stat & OMAP_I2C_STAT_RRDY)
num_bytes = dev->fifo_size;
- else/* read RXSTAT on RDR interrupt */
+ else /* Step4: read RXSTAT on RDR interrupt */
num_bytes = (omap_i2c_read_reg(dev,
OMAP_I2C_BUFSTAT_REG)
>> 8) & 0x3F;
--
1.6.0.4
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Re: [PATCH 11/11] AM3517: Add mmc platform data for am3517evm
Stanley.Miao wrote:
Add mmc platform data. Besides, the mmc slot on UI board has a pin conflict
with LCD, so add macros to resolve it.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/board-am3517evm.c | 45 +
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 4b9fc57..e94afdd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -142,7 +142,8 @@ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) +=
board-omap3touchbook.o \
hsmmc.o
obj-$(CONFIG_MACH_OMAP_4430SDP)+= board-4430sdp.o
-obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
+obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \
+ hsmmc.o
# Platform specific device init code
obj-y += usb-musb.o
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 6a82ac3..8054994 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
@@ -40,7 +41,9 @@
#include
#include
#include
+#include
+#include "hsmmc.h"
#include "mux.h"
#define LCD_PANEL_PWR 176
@@ -440,6 +443,8 @@ static int __init am3517_evm_i2c_init(void)
static int lcd_enabled;
static int dvi_enabled;
+#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
+ defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
static void __init am3517_evm_display_init(void)
{
int r;
@@ -501,6 +506,20 @@ static void am3517_evm_panel_disable_lcd(struct
omap_dss_device *dssdev)
gpio_set_value(LCD_PANEL_PWR, 0);
lcd_enabled = 0;
}
+#else
+static inline void __init am3517_evm_display_init(void)
+{
+}
+
+static inline int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev)
+{
+ return 0;
+}
+
+static inline void am3517_evm_panel_disable_lcd(struct omap_dss_device *dssdev)
+{
+}
+#endif
static struct omap_dss_device am3517_evm_lcd_device = {
.type = OMAP_DISPLAY_TYPE_DPI,
@@ -613,6 +632,30 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
+static struct omap2_hsmmc_info mmc[] = {
+ {
+ .mmc= 1,
+ .wires = 4,
+ .gpio_cd= 127,
+ .gpio_wp= 126,
+ .ocr_mask = MMC_VDD_165_195 |
+ MMC_VDD_26_27 | MMC_VDD_27_28 |
+ MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32,
How can you support 1.8V and 3V cards without controlling power
to the card?
+ },
+#if !defined(CONFIG_PANEL_SHARP_LQ043T1DG01) && \
+ !defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
+ {
+ .mmc= 2,
+ .wires = 4,
+ .gpio_cd= 175,
+ .gpio_wp= 176,
+ .ocr_mask = MMC_VDD_165_195,
+ },
+#endif
+ {} /* Terminator */
+};
+
static void __init am3517_evm_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -636,6 +679,8 @@ static void __init am3517_evm_init(void)
i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
ARRAY_SIZE(am3517evm_i2c1_boardinfo));
+ /* MMC init function */
+ omap2_hsmmc_init(mmc);
}
static void __init am3517_evm_map_io(void)
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Re: [PATCH 10/11] omap hsmmc: fix the hsmmc driver for am3517.
Adrian Hunter wrote: Stanley.Miao wrote: am3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators like "vmmc", so we don't need set "set_power" function for it. @@ -216,6 +216,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) */ mmc->slots[0].ocr_mask = c->ocr_mask; +#ifndef CONFIG_MACH_OMAP3517EVM ifdef CONFIG_MACH_OMAP3517EVM That "ifdef CONFIG_MACH_OMAP3517EVM" was an accident, sorry. Please ignore. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 10/11] omap hsmmc: fix the hsmmc driver for am3517.
Stanley.Miao wrote:
am3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators
like "vmmc", so we don't need set "set_power" function for it.
It would be better to leave omap_hsmmc alone and either:
- define fixed voltage regulators
- or make a noop set_power function
How is the power supplied?
With regard to pbias the change should be:
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 9ad2295..595b24a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -150,7 +150,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
- } else {
+ } else if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
@@ -216,12 +216,24 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
*/
mmc->slots[0].ocr_mask = c->ocr_mask;
+ if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
+ switch (c->mmc) {
+ case 1:
+ /* on-chip level shifting via PBIAS0/PBIAS1 */
+ mmc->slots[0].before_set_reg =
hsmmc1_before_set_reg;
+ mmc->slots[0].after_set_reg =
hsmmc1_after_set_reg;
+ break;
+ case 2:
+ case 3:
+ /* off-chip level shifting, or none */
+ mmc->slots[0].before_set_reg =
hsmmc23_before_set_reg;
+ mmc->slots[0].after_set_reg = NULL;
+ break;
+ }
+ }
+
switch (c->mmc) {
case 1:
- /* on-chip level shifting via PBIAS0/PBIAS1 */
- mmc->slots[0].before_set_reg = hsmmc1_before_set_reg;
- mmc->slots[0].after_set_reg = hsmmc1_after_set_reg;
-
/* Omap3630 HSMMC1 supports only 4-bit */
if (cpu_is_omap3630() && c->wires > 4) {
c->wires = 4;
@@ -235,9 +247,6 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
c->wires = 4;
/* FALLTHROUGH */
case 3:
- /* off-chip level shifting, or none */
- mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
- mmc->slots[0].after_set_reg = NULL;
break;
default:
pr_err("MMC%d configuration not supported!\n", c->mmc);
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/hsmmc.c |4 +++-
drivers/mmc/host/omap_hsmmc.c | 28 +---
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 9ad2295..a6e6c86 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -150,7 +150,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
- } else {
+ } else if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
@@ -216,6 +216,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
*/
mmc->slots[0].ocr_mask = c->ocr_mask;
+#ifndef CONFIG_MACH_OMAP3517EVM
ifdef CONFIG_MACH_OMAP3517EVM
switch (c->mmc) {
case 1:
/* on-chip level shifting via PBIAS0/PBIAS1 */
@@ -244,6 +245,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
kfree(mmc);
continue;
}
+#endif
hsmmc_data[c->mmc - 1] = mmc;
}
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 83f0aff..f3c64a2 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -236,7 +236,7 @@ static int omap_hsmmc_resume_cdirq(struct device *dev, int
slot)
#endif
-#ifdef CONFIG_REGULATOR
+#if defined(CONFIG_REGULATOR) && !defined(CONFIG_MACH_OMAP3517EVM)
static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on,
int vdd)
@@ -1086,12 +1086,15 @@ static int omap
[PATCHV3] OMAP3: SDRC : Errata 1.176 Fix - Accesses to DDR stall in SDRC after a Warm-reset
From: Teerth Reddy
This patch has the workaround for errata 1.176.
In some cases, user is not able to access DDR memory after
warm-reset.This situation occurs while the warm-reset
happens during a read access to DDR memory. In that
particular conditions, DDR memory does not respond to a
corrupted read command due to the warm reset occurence but
SDRC is waiting for read completion.SDRC is not sensitive to
the warm reset, but the interconect is reset on the fly,
thus causing a misalignment between SDRC logic, interconect
logic and DDR memory state.
Root cause description: A corrupted read transaction is
issued to a closed row: (address0, bank0) instead of the
expected read access, violating protocol.
Failure signature: Once the failure occurs and system has
restarted, memory content is not accessible.SDRC registers
can be accessed successfully, until 1st access to memory
location is performed. After 1st access to memory is done,
SDRC is stuck.
WORKAROUND
Steps to perform before a SW reset is trigged, if user needs
to generate a SW reset and keep DDR memory content:
1. Enable self-refresh on idle request
2. Put SDRC in idle
3. Wait until SDRC goes to idle
4. Generate SW reset
Steps to perform after warm reset occurs:
If HW warm reset is the source, apply below steps before
any accesses to SDRAM:
1. Reset SMS and SDRC
2. Re-initialize SMS, SDRC and memory
This would need the u-boot/x-loader workaround changes
as well for the reboot to work correctly.
Signed-off-by: Teerth Reddy
Signed-off-by: Vishwanath BS
---
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 9537f6f..ac731b2
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
#include "clock.h"
#include "clock2xxx.h"
@@ -141,6 +142,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
omap2xxx_clk_prepare_for_reboot();
prcm_offs = WKUP_MOD;
+ prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
+ OMAP2_RM_RSTCTRL);
} else if (cpu_is_omap34xx()) {
u32 l;
@@ -152,14 +155,12 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
* cf. OMAP34xx TRM, Initialization / Software Booting
* Configuration. */
omap_writel(l, OMAP343X_SCRATCHPAD + 4);
+ omap3_configure_core_dpll_warmreset();
} else if (cpu_is_omap44xx())
prcm_offs = OMAP4430_PRM_DEVICE_MOD;
else
WARN_ON(1);
- if (cpu_is_omap24xx() | cpu_is_omap34xx())
- prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
-OMAP2_RM_RSTCTRL);
if (cpu_is_omap44xx())
prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
OMAP4_RM_RSTCTRL);
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index de99ba2..1a1be4d
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -33,6 +33,8 @@
#include "sdrc.h"
#include "cm.h"
+#include "prcm-common.h"
+#include "prm.h"
.text
@@ -68,6 +70,9 @@
/* CM_CLKSEL1_PLL bit settings */
#define CORE_DPLL_CLKOUT_DIV_SHIFT 0x1b
+/* PRM_RSTCTRL bit setting */
+#define EN_DPLL3_RESET 0x4
+
/*
* omap3_sram_configure_core_dpll - change DPLL3 M2 divider
*
@@ -313,3 +318,49 @@ core_m2_mask_val:
ENTRY(omap3_sram_configure_core_dpll_sz)
.word . - omap3_sram_configure_core_dpll
+
+/*
+* omap3_sram_configure_core_dpll_warmreset
+* Enable SDRC self refresh on idle request, put SDRC in idle,
+* wait until SDRC goes to idle
+* Enable DPLL3 reset bit in RM_RSTCTRL
+*/
+
+ENTRY(omap3_sram_configure_core_dpll_warmreset)
+
+ bl sdram_in_selfrefresh1
+ ldr r11, omap3_reset_cntrl
+ ldr r12, [r11]
+ orr r12, r12, #EN_DPLL3_RESET @ Enable DPLL3 reset bit
+ str r12, [r11]
+
+sdram_in_selfrefresh1:
+ ldr r11, omap3_sdrc_power1 @ read the SDRC_POWER register
+ ldr r12, [r11] @ read the contents of SDRC_POWER
+ mov r9, r12 @ keep a copy of SDRC_POWER bits
+ orr r12, r12, #SRFRONIDLEREQ_MASK @ enable self refresh on idle
+ str r12, [r11] @ write back to SDRC_POWER register
+ ldr r12, [r11] @ posted-write barrier for SDRC
+ ldr r11, omap3_cm_iclken1_core1 @ read the CM_ICLKEN1_CORE reg
+ ldr r12, [r11]
+ bic r12, r12, #EN_SDRC_MASK @ disable iclk bit for SDRC
+ str r12, [r11]
+wait_sdrc_idle2:
+ ldr r11, omap3_cm_idlest1_core1
+ ldr r12, [r11]
+ and r12, r12, #ST_SDRC_MASK @ check for SDRC idle
+ cmp r12, #ST_SDRC_MASK
+ bne wait_sdrc_idle2
+ bx lr
+
+omap3_reset_cntrl:
+
RE: [PATCH] OMAP GPTimer for OProfile(Errata#628216)
> -Original Message- > From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- > ow...@vger.kernel.org] On Behalf Of Siarhei Siamashka > Sent: 2010-04-01 21:02 > To: G, Manjunath Kondaiah; Koskinen Aaro (Nokia-D/Helsinki) > Cc: linux-omap@vger.kernel.org; DebBarma, Tarun Kanti > Subject: Re: [PATCH] OMAP GPTimer for OProfile(Errata#628216) > > On Thursday 01 April 2010 18:24:08 ext Manjunatha GK wrote: > > From: DebBarma, Tarun Kanti > > > > [ARM Cortex-A8 Errata 628216] > > If a Perf Counter OVFL occurs simultaneously with an update to a CP14 or > > CP15 register, the OVFL status can be lost. > > > > In order to workaround problem in Cortex-A8 Performance Counter, OMAP > > GPTIMER is used by OProfile. > > Thanks for digging this up. But even though GPTIMER has a lower overhead, > there is actually a better (more portable) fix which is on the way into > mainline kernel: > http://marc.info/?l=oprofile-list&m=126754919315010&w=2 > > Samples collection frequency can be adjusted by another patch (the default > 128Hz used on most ARM boards/devices is way too low). > > oprofile kernel module can be loaded with 'timer=1' parameter to override > the use of buggy Cortex-A8 PMU. [Ghorai] ok. Your patch did not work if I build inside kernel image. Here is the error - $>opcontrol --setup --vmlinux=/vmlinux cpu_type 'unset' is not valid you should upgrade oprofile or force the use of timer mode /usr/bin/objdump > > -- > Best regards, > Siarhei Siamashka > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] omap2_mcspi: add turbo mode support
Turbo mode allows to read data to shift register when rx-buffer
is full thus improving the perfomance. This feature is available
for RX-only mode.
In PIO turbo mode when the penultimate word is available
in RX-buffer the controller should be disabled before reading data
to prevent the next transaction triggering. The controller itself
handles the last word to be correctly loaded to shift-register and
then transferred to RX-buffer.
The turbo mode is enabled by setting turbo_mode parameter to 1.
This parameter is a part of omap2_mcspi_device_config structure
which is passed through the spi_device controller_data pointer.
Signed-off-by: Roman Tereshonkov
---
drivers/spi/omap2_mcspi.c | 132 +---
1 files changed, 111 insertions(+), 21 deletions(-)
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index d87ca43..ac1fef1 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -38,7 +38,7 @@
#include
#include
-
+#include
#define OMAP2_MCSPI_MAX_FREQ 4800
@@ -228,6 +228,8 @@ static void omap2_mcspi_set_enable(const struct spi_device
*spi, int enable)
l = enable ? OMAP2_MCSPI_CHCTRL_EN : 0;
mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCTRL0, l);
+ /* Flash post-writes */
+ mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCTRL0);
}
static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active)
@@ -302,11 +304,14 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct
spi_transfer *xfer)
unsigned intcount, c;
unsigned long base, tx_reg, rx_reg;
int word_len, data_type, element_count;
+ int elements;
+ u32 l;
u8 * rx;
const u8* tx;
mcspi = spi_master_get_devdata(spi->master);
mcspi_dma = &mcspi->dma_channels[spi->chip_select];
+ l = mcspi_cached_chconf0(spi);
count = xfer->len;
c = count;
@@ -345,8 +350,12 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct
spi_transfer *xfer)
}
if (rx != NULL) {
+ elements = element_count - 1;
+ if (l & OMAP2_MCSPI_CHCONF_TURBO)
+ elements--;
+
omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel,
- data_type, element_count - 1, 1,
+ data_type, elements, 1,
OMAP_DMA_SYNC_ELEMENT,
mcspi_dma->dma_rx_sync_dev, 1);
@@ -378,17 +387,42 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct
spi_transfer *xfer)
wait_for_completion(&mcspi_dma->dma_rx_completion);
dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE);
omap2_mcspi_set_enable(spi, 0);
+
+ if (l & OMAP2_MCSPI_CHCONF_TURBO) {
+
+ if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
+ & OMAP2_MCSPI_CHSTAT_RXS)) {
+ u32 w;
+
+ w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
+ if (word_len <= 8)
+ ((u8 *)xfer->rx_buf)[elements++] = w;
+ else if (word_len <= 16)
+ ((u16 *)xfer->rx_buf)[elements++] = w;
+ else /* word_len <= 32 */
+ ((u32 *)xfer->rx_buf)[elements++] = w;
+ } else {
+ dev_err(&spi->dev,
+ "DMA RX penultimate word empty");
+ count -= (word_len <= 8) ? 2 :
+ (word_len <= 16) ? 4 :
+ /* word_len <= 32 */ 8;
+ omap2_mcspi_set_enable(spi, 1);
+ return count;
+ }
+ }
+
if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
& OMAP2_MCSPI_CHSTAT_RXS)) {
u32 w;
w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
if (word_len <= 8)
- ((u8 *)xfer->rx_buf)[element_count - 1] = w;
+ ((u8 *)xfer->rx_buf)[elements] = w;
else if (word_len <= 16)
- ((u16 *)xfer->rx_buf)[element_count - 1] = w;
+ ((u16 *)xfer->rx_buf)[elements] = w;
else /* word_len <= 32 */
- ((u32 *)xfer->rx_buf)[element_count - 1] = w;
+ ((u32 *)xfer->rx_buf)[elements] = w;
} else {
Re: [PATCH] mmc: fix race condition between dma and omap_hsmmc callback
Venkatraman S wrote:
This patch addresses the possible race condition between the dma
callback and hsmmc callback.
Can you explain the problem in more detail? If the final DMA interrupt
comes before TC then all should be well. If it comes after, then we need
to be sure that the DMA has finished - particularly in the "read" case.
Neither the existing code nor this patch seems to address that issue.
Also, how can we be sure the final DMA interrupt doesn't race with the
start of the next request?
All the 'post data transfer' cleanup activities are now done in the
MMC TC handler.
The schedule_timeout in omap_hsmmc_start_dma_transfer is hence not
needed (which, incidentally,
was also throwing a "schedule while atomic" warning when executed).
Tested on OMAP4430 SDP.
CC: Adrian Hunter
CC: Madhusudhan C
CC: Tony Lindgren
Signed-off-by: Venkatraman S
---
drivers/mmc/host/omap_hsmmc.c | 40
1 files changed, 16 insertions(+), 24 deletions(-)
The previous discussion about this patch is here
https://patchwork.kernel.org/patch/82907/
As requested, this is now posted as a separate patch instead of
clubbing with another feature.
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 83f0aff..9a70b36 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1046,8 +1046,18 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
if (end_cmd || ((status & CC) && host->cmd))
omap_hsmmc_cmd_done(host, host->cmd);
- if ((end_trans || (status & TC)) && host->mrq)
+ if ((end_trans || (status & TC)) && host->mrq) {
+ if (host->dma_ch != -1) {
+ omap_free_dma(host->dma_ch);
+ host->dma_ch = -1;
+ /*
+* Callback run in interrupt context.
+* mutex_unlock will throw a kernel warning if used.
+*/
+ up(&host->sem);
+ }
omap_hsmmc_xfer_done(host, data);
+ }
spin_unlock(&host->irq_lock);
@@ -1267,13 +1277,6 @@ static void omap_hsmmc_dma_cb(int lch, u16
ch_status, void *data)
return;
}
- omap_free_dma(host->dma_ch);
- host->dma_ch = -1;
- /*
-* DMA Callback: run in interrupt context.
-* mutex_unlock will throw a kernel warning if used.
-*/
- up(&host->sem);
}
/*
@@ -1282,7 +1285,7 @@ static void omap_hsmmc_dma_cb(int lch, u16
ch_status, void *data)
static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
struct mmc_request *req)
{
- int dma_ch = 0, ret = 0, err = 1, i;
+ int dma_ch = 0, ret = 0, i;
struct mmc_data *data = req->data;
/* Sanity check: all the SG entries must be aligned by block size. */
@@ -1300,22 +1303,11 @@ static int
omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
return -EINVAL;
/*
-* If for some reason the DMA transfer is still active,
-* we wait for timeout period and free the dma
+* Can't process the request if the previous
+* request is still active
*/
- if (host->dma_ch != -1) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(100);
- if (down_trylock(&host->sem)) {
- omap_free_dma(host->dma_ch);
- host->dma_ch = -1;
- up(&host->sem);
- return err;
- }
- } else {
- if (down_trylock(&host->sem))
- return err;
- }
+ if (down_trylock(&host->sem))
+ return -EBUSY;
ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data),
"MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch);
--
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[PATCH 11/11] AM3517: Add mmc platform data for am3517evm
Add mmc platform data. Besides, the mmc slot on UI board has a pin conflict
with LCD, so add macros to resolve it.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/board-am3517evm.c | 45 +
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 4b9fc57..e94afdd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -142,7 +142,8 @@ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) +=
board-omap3touchbook.o \
hsmmc.o
obj-$(CONFIG_MACH_OMAP_4430SDP)+= board-4430sdp.o
-obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
+obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \
+ hsmmc.o
# Platform specific device init code
obj-y += usb-musb.o
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 6a82ac3..8054994 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
@@ -40,7 +41,9 @@
#include
#include
#include
+#include
+#include "hsmmc.h"
#include "mux.h"
#define LCD_PANEL_PWR 176
@@ -440,6 +443,8 @@ static int __init am3517_evm_i2c_init(void)
static int lcd_enabled;
static int dvi_enabled;
+#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
+ defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
static void __init am3517_evm_display_init(void)
{
int r;
@@ -501,6 +506,20 @@ static void am3517_evm_panel_disable_lcd(struct
omap_dss_device *dssdev)
gpio_set_value(LCD_PANEL_PWR, 0);
lcd_enabled = 0;
}
+#else
+static inline void __init am3517_evm_display_init(void)
+{
+}
+
+static inline int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev)
+{
+ return 0;
+}
+
+static inline void am3517_evm_panel_disable_lcd(struct omap_dss_device *dssdev)
+{
+}
+#endif
static struct omap_dss_device am3517_evm_lcd_device = {
.type = OMAP_DISPLAY_TYPE_DPI,
@@ -613,6 +632,30 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
+static struct omap2_hsmmc_info mmc[] = {
+ {
+ .mmc= 1,
+ .wires = 4,
+ .gpio_cd= 127,
+ .gpio_wp= 126,
+ .ocr_mask = MMC_VDD_165_195 |
+ MMC_VDD_26_27 | MMC_VDD_27_28 |
+ MMC_VDD_29_30 |
+ MMC_VDD_30_31 | MMC_VDD_31_32,
+ },
+#if !defined(CONFIG_PANEL_SHARP_LQ043T1DG01) && \
+ !defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
+ {
+ .mmc= 2,
+ .wires = 4,
+ .gpio_cd= 175,
+ .gpio_wp= 176,
+ .ocr_mask = MMC_VDD_165_195,
+ },
+#endif
+ {} /* Terminator */
+};
+
static void __init am3517_evm_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -636,6 +679,8 @@ static void __init am3517_evm_init(void)
i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
ARRAY_SIZE(am3517evm_i2c1_boardinfo));
+ /* MMC init function */
+ omap2_hsmmc_init(mmc);
}
static void __init am3517_evm_map_io(void)
--
1.5.4.3
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[PATCH 10/11] omap hsmmc: fix the hsmmc driver for am3517.
am3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators
like "vmmc", so we don't need set "set_power" function for it.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/hsmmc.c |4 +++-
drivers/mmc/host/omap_hsmmc.c | 28 +---
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 9ad2295..a6e6c86 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -150,7 +150,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
- } else {
+ } else if (!cpu_is_omap3517() && !cpu_is_omap3505()) {
control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
@@ -216,6 +216,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
*/
mmc->slots[0].ocr_mask = c->ocr_mask;
+#ifndef CONFIG_MACH_OMAP3517EVM
switch (c->mmc) {
case 1:
/* on-chip level shifting via PBIAS0/PBIAS1 */
@@ -244,6 +245,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info
*controllers)
kfree(mmc);
continue;
}
+#endif
hsmmc_data[c->mmc - 1] = mmc;
}
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 83f0aff..f3c64a2 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -236,7 +236,7 @@ static int omap_hsmmc_resume_cdirq(struct device *dev, int
slot)
#endif
-#ifdef CONFIG_REGULATOR
+#if defined(CONFIG_REGULATOR) && !defined(CONFIG_MACH_OMAP3517EVM)
static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on,
int vdd)
@@ -1086,12 +1086,15 @@ static int omap_hsmmc_switch_opcond(struct
omap_hsmmc_host *host, int vdd)
clk_disable(host->dbclk);
/* Turn the power off */
- ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
+ if (mmc_slot(host).set_power) {
+ ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
+
+ /* Turn the power ON with given VDD 1.8 or 3.0v */
+ if (!ret)
+ ret = mmc_slot(host).set_power(host->dev,
+ host->slot_id, 1, vdd);
+ }
- /* Turn the power ON with given VDD 1.8 or 3.0v */
- if (!ret)
- ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1,
- vdd);
clk_enable(host->iclk);
clk_enable(host->fclk);
if (host->got_dbclk)
@@ -1478,13 +1481,15 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
if (ios->power_mode != host->power_mode) {
switch (ios->power_mode) {
case MMC_POWER_OFF:
- mmc_slot(host).set_power(host->dev, host->slot_id,
-0, 0);
+ if (mmc_slot(host).set_power)
+ mmc_slot(host).set_power(host->dev,
+ host->slot_id, 0, 0);
host->vdd = 0;
break;
case MMC_POWER_UP:
- mmc_slot(host).set_power(host->dev, host->slot_id,
-1, ios->vdd);
+ if (mmc_slot(host).set_power)
+ mmc_slot(host).set_power(host->dev,
+ host->slot_id, 1, ios->vdd);
host->vdd = ios->vdd;
break;
case MMC_POWER_ON:
@@ -1714,7 +1719,8 @@ static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host
*host)
return 0;
}
- mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
+ if (mmc_slot(host).set_power)
+ mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
host->vdd = 0;
host->power_mode = MMC_POWER_OFF;
--
1.5.4.3
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[PATCH 09/11] omap: init the gpio pinmux for mmc
There is two gpio for mmc use, one is for card detecting, another is
used for checking write protect. Intialize its pinmux in case the bootloader
doesn't set it.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/devices.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 23e4d77..df9c62a 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -591,6 +591,13 @@ static inline void omap_hsmmc_reset(void) {}
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
+ if (mmc_controller->slots[0].switch_pin > 0)
+ omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
+ OMAP_PIN_INPUT_PULLUP);
+ if (mmc_controller->slots[0].gpio_wp > 0)
+ omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
+ OMAP_PIN_INPUT_PULLUP);
+
if (cpu_is_omap2420() && controller_nr == 0) {
omap_cfg_reg(H18_24XX_MMC_CMD);
omap_cfg_reg(H15_24XX_MMC_CLKI);
--
1.5.4.3
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[PATCH 06/11] AM3517: Add nand platform data for am3517evm
Add nand flash init code for am3517evm.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c | 84 +
1 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 879c13f..a76ff11 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -23,6 +23,9 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
@@ -35,6 +38,8 @@
#include
#include
#include
+#include
+#include
#include "mux.h"
@@ -42,6 +47,84 @@
#define LCD_PANEL_BKLIGHT_PWR 182
#define LCD_PANEL_PWM 181
+#define GPMC_CS0_BASE 0x60
+#define GPMC_CS_SIZE 0x30
+
+#define NAND_BLOCK_SIZESZ_128K
+
+static struct mtd_partition am3517evm_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "xloader",
+ .offset = 0,
+ .size = 4 * (SZ_128K),
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = "uboot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 14 * (SZ_128K),
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = "uboot-params",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 2 * (SZ_128K)
+ },
+ {
+ .name = "linux-kernel",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 40 * (SZ_128K)
+ },
+ {
+ .name = "rootfs",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct omap_nand_platform_data am3517evm_nand_data = {
+ .parts = am3517evm_nand_partitions,
+ .nr_parts = ARRAY_SIZE(am3517evm_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .devsize= 1,
+ .dev_ready = NULL,
+};
+
+void __init am3517evm_flash_init(void)
+{
+ u8 cs = 0;
+ u8 nandcs = GPMC_CS_NUM + 1;
+ u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
+
+ while (cs < GPMC_CS_NUM) {
+ u32 ret = 0;
+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+
+ if ((ret & 0xC00) == 0x800) {
+ /* Found it!! */
+ if (nandcs > GPMC_CS_NUM)
+ nandcs = cs;
+ }
+ cs++;
+ }
+ if (nandcs > GPMC_CS_NUM) {
+ printk(KERN_INFO "NAND: Unable to find configuration "
+ " in GPMC\n ");
+ return;
+ }
+
+ if (nandcs < GPMC_CS_NUM) {
+ am3517evm_nand_data.cs = nandcs;
+ am3517evm_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
+ GPMC_CS0_BASE + nandcs*GPMC_CS_SIZE);
+ am3517evm_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
+ gpmc_nand_init(&am3517evm_nand_data);
+ }
+}
+
+
#define AM35XX_EVM_PHY_MASK (0xF)
#define AM35XX_EVM_MDIO_FREQUENCY(100) /*PHY bus frequency */
@@ -539,6 +622,7 @@ static void __init am3517_evm_init(void)
ARRAY_SIZE(am3517_evm_devices));
omap_serial_init();
+ am3517evm_flash_init();
/* Configure GPIO for EHCI port */
omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
--
1.5.4.3
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[PATCH 08/11] OMAP: fix a gpmc nand problem
If gpmc_t isn't given, we don't need to set timing for gpmc, or it will cause a Oops. Signed-off-by: Stanley.Miao --- arch/arm/mach-omap2/gpmc-nand.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 64d74f0..e57fb29 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -39,6 +39,9 @@ static int omap2_nand_gpmc_retime(void) struct gpmc_timings t; int err; + if (!gpmc_nand_data->gpmc_t) + return 0; + memset(&t, 0, sizeof(t)); t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk); t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on); -- 1.5.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 07/11] AM3517: initialize i2c subsystem after mux subsystem
The initialize of i2c subsystem will set pinmux, so it should be done
after the initialize of mux subsystem initialization.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index a76ff11..6a82ac3 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -615,9 +615,9 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init am3517_evm_init(void)
{
- am3517_evm_i2c_init();
-
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+
+ am3517_evm_i2c_init();
platform_add_devices(am3517_evm_devices,
ARRAY_SIZE(am3517_evm_devices));
--
1.5.4.3
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[PATCH 05/11] AM3517: Add audio codec platform data
Codec tlv320aic23 is on the second i2c bus. Add the tlv320aic23 info in
i2c2 board_info.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 2d7fd08..879c13f 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -312,6 +312,9 @@ static struct pca953x_platform_data
am3517evm_gpio_expander_info_0 = {
};
static struct i2c_board_info __initdata am3517evm_i2c2_boardinfo[] = {
{
+ I2C_BOARD_INFO("tlv320aic23", 0x1A),
+ },
+ {
I2C_BOARD_INFO("tca6416", 0x21),
.platform_data = &am3517evm_gpio_expander_info_0,
},
--
1.5.4.3
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[PATCH 04/11] AM3517: Add platform init code for regulator driver
Add platform init code for regulator driver.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c | 122 +
1 files changed, 122 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 5abf333..2d7fd08 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -159,6 +160,122 @@ static struct i2c_board_info __initdata
am3517evm_i2c1_boardinfo[] = {
},
};
+/* TPS65023 specific initialization */
+/* VDCDC1 -> VDD_CORE */
+static struct regulator_consumer_supply am3517_evm_vdcdc1_supplies[] = {
+ {
+ .supply = "vdd_core",
+ },
+};
+
+/* VDCDC2 -> VDDSHV */
+static struct regulator_consumer_supply am3517_evm_vdcdc2_supplies[] = {
+ {
+ .supply = "vddshv",
+ },
+};
+
+/* VDCDC2 |-> VDDS
+ |-> VDDS_SRAM_CORE_BG
+ |-> VDDS_SRAM_MPU */
+static struct regulator_consumer_supply am3517_evm_vdcdc3_supplies[] = {
+ {
+ .supply = "vdds",
+ },
+ {
+ .supply = "vdds_sram_core_bg",
+ },
+ {
+ .supply = "vdds_sram_mpu",
+ },
+};
+
+/* LDO1 |-> VDDA1P8V_USBPHY
+|-> VDDA_DAC */
+static struct regulator_consumer_supply am3517_evm_ldo1_supplies[] = {
+ {
+ .supply = "vdda1p8v_usbphy",
+ },
+ {
+ .supply = "vdda_dac",
+ },
+};
+
+/* LDO2 -> VDDA3P3V_USBPHY */
+static struct regulator_consumer_supply am3517_evm_ldo2_supplies[] = {
+ {
+ .supply = "vdda3p3v_usbphy",
+ },
+};
+
+static struct regulator_init_data am3517_evm_regulator_data[] = {
+ /* DCDC1 */
+ {
+ .constraints = {
+ .min_uV = 120,
+ .max_uV = 120,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = false,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am3517_evm_vdcdc1_supplies),
+ .consumer_supplies = am3517_evm_vdcdc1_supplies,
+ },
+ /* DCDC2 */
+ {
+ .constraints = {
+ .min_uV = 330,
+ .max_uV = 330,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = false,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am3517_evm_vdcdc2_supplies),
+ .consumer_supplies = am3517_evm_vdcdc2_supplies,
+ },
+ /* DCDC3 */
+ {
+ .constraints = {
+ .min_uV = 180,
+ .max_uV = 180,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = false,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am3517_evm_vdcdc3_supplies),
+ .consumer_supplies = am3517_evm_vdcdc3_supplies,
+ },
+ /* LDO1 */
+ {
+ .constraints = {
+ .min_uV = 180,
+ .max_uV = 180,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = false,
+ .apply_uV = false,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am3517_evm_ldo1_supplies),
+ .consumer_supplies = am3517_evm_ldo1_supplies,
+ },
+ /* LDO2 */
+ {
+ .constraints = {
+ .min_uV = 330,
+ .max_uV = 330,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = false,
+ .apply_uV = false,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(am3517_evm_ldo2_supplies),
+ .consumer_supplies = am3517_evm_ldo2_supplies,
+ },
+};
+
/*
* RTC - S35390A
*/
@@ -216,6 +333,11 @@ static struct i2c_board_info __initdata
am3517evm_i2c3_boardinfo[] = {
I2C_BOARD_INFO("tca6416", 0x21),
.platform_data = &am3517evm_ui_gpio_expander_info_2,
},
+ {
+ I2C_BOARD_INFO("tps65023", 0x48),
+ .flags = I2C_CLIENT_WAKE,
+ .platform_data = &am3517_evm_regulator_data[0],
+ },
};
static
[PATCH 03/11] AM3517: rename the i2c boardinfo to make it more readable
There are three i3c buses on am3517, now rename these three boardinfo
structure name to am3517evm_i2c1_boardinfo, am3517evm_i2c2_boardinfo,
and am3517evm_i2c3_boardinfo, to make it more readable.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index db542b2..5abf333 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -152,7 +152,7 @@ void am3517_evm_ethernet_init(struct emac_platform_data
*pdata)
return ;
}
-static struct i2c_board_info __initdata am3517evm_i2c_boardinfo[] = {
+static struct i2c_board_info __initdata am3517evm_i2c1_boardinfo[] = {
{
I2C_BOARD_INFO("s35390a", 0x30),
.type = "s35390a",
@@ -182,7 +182,7 @@ static void __init am3517_evm_rtc_init(void)
gpio_free(GPIO_RTCS35390A_IRQ);
return;
}
- am3517evm_i2c_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
+ am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ);
}
/*
@@ -193,7 +193,7 @@ static void __init am3517_evm_rtc_init(void)
static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = {
.gpio_base = OMAP_MAX_GPIO_LINES,
};
-static struct i2c_board_info __initdata am3517evm_tca6416_info_0[] = {
+static struct i2c_board_info __initdata am3517evm_i2c2_boardinfo[] = {
{
I2C_BOARD_INFO("tca6416", 0x21),
.platform_data = &am3517evm_gpio_expander_info_0,
@@ -207,7 +207,7 @@ static struct pca953x_platform_data
am3517evm_ui_gpio_expander_info_1 = {
static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = {
.gpio_base = OMAP_MAX_GPIO_LINES + 32,
};
-static struct i2c_board_info __initdata am3517evm_ui_tca6416_info[] = {
+static struct i2c_board_info __initdata am3517evm_i2c3_boardinfo[] = {
{
I2C_BOARD_INFO("tca6416", 0x20),
.platform_data = &am3517evm_ui_gpio_expander_info_1,
@@ -221,10 +221,10 @@ static struct i2c_board_info __initdata
am3517evm_ui_tca6416_info[] = {
static int __init am3517_evm_i2c_init(void)
{
omap_register_i2c_bus(1, 400, NULL, 0);
- omap_register_i2c_bus(2, 400, am3517evm_tca6416_info_0,
- ARRAY_SIZE(am3517evm_tca6416_info_0));
- omap_register_i2c_bus(3, 400, am3517evm_ui_tca6416_info,
- ARRAY_SIZE(am3517evm_ui_tca6416_info));
+ omap_register_i2c_bus(2, 400, am3517evm_i2c2_boardinfo,
+ ARRAY_SIZE(am3517evm_i2c2_boardinfo));
+ omap_register_i2c_bus(3, 400, am3517evm_i2c3_boardinfo,
+ ARRAY_SIZE(am3517evm_i2c3_boardinfo));
return 0;
}
@@ -425,8 +425,8 @@ static void __init am3517_evm_init(void)
/* RTC - S35390A */
am3517_evm_rtc_init();
- i2c_register_board_info(1, am3517evm_i2c_boardinfo,
- ARRAY_SIZE(am3517evm_i2c_boardinfo));
+ i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
+ ARRAY_SIZE(am3517evm_i2c1_boardinfo));
}
static void __init am3517_evm_map_io(void)
--
1.5.4.3
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[PATCH 02/11] AM3517: Add platform init code for EMAC driver
Add platform init code for EMAC driver.
Signed-off-by: Stanley.Miao
---
arch/arm/mach-omap2/board-am3517evm.c | 114 +
arch/arm/mach-omap2/include/mach/am35xx.h |9 ++
2 files changed, 123 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 6ae8805..db542b2 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -30,6 +31,7 @@
#include
#include
+#include
#include
#include
@@ -39,6 +41,117 @@
#define LCD_PANEL_BKLIGHT_PWR 182
#define LCD_PANEL_PWM 181
+#define AM35XX_EVM_PHY_MASK (0xF)
+#define AM35XX_EVM_MDIO_FREQUENCY(100) /*PHY bus frequency */
+
+static struct emac_platform_data am3517_evm_emac_pdata = {
+ .phy_mask = AM35XX_EVM_PHY_MASK,
+ .mdio_max_freq = AM35XX_EVM_MDIO_FREQUENCY,
+ .rmii_en= 1,
+};
+
+static int __init eth_addr_setup(char *str)
+{
+ int i;
+ long res;
+
+ if (str == NULL)
+ return 0;
+ for (i = 0; i < ETH_ALEN; i++) {
+ if (!strict_strtol(&str[i * 3], 16, &res))
+ am3517_evm_emac_pdata.mac_addr[i] = res;
+ else
+ return -EINVAL;
+ }
+ return 1;
+}
+
+/* Get MAC address from kernel boot parameter eth=AA:BB:CC:DD:EE:FF */
+__setup("eth=", eth_addr_setup);
+
+static struct resource am3517_emac_resources[] = {
+ {
+ .start = AM35XX_IPSS_EMAC_BASE,
+ .end= AM35XX_IPSS_EMAC_BASE + 0x3,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
+ .end= INT_35XX_EMAC_C0_RXTHRESH_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
+ .end= INT_35XX_EMAC_C0_RX_PULSE_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
+ .end= INT_35XX_EMAC_C0_TX_PULSE_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
+ .end= INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device am3517_emac_device = {
+ .name = "davinci_emac",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(am3517_emac_resources),
+ .resource = am3517_emac_resources,
+};
+
+static void am3517_enable_ethernet_int(void)
+{
+ u32 regval;
+
+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+ regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
+ AM35XX_CPGMAC_C0_TX_PULSE_CLR |
+ AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
+ AM35XX_CPGMAC_C0_RX_THRESH_CLR);
+ omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+static void am3517_disable_ethernet_int(void)
+{
+ u32 regval;
+
+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+ regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
+ AM35XX_CPGMAC_C0_TX_PULSE_CLR);
+ omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+ regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
+{
+ u32 regval;
+
+ pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET;
+ pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET;
+ pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET;
+ pdata->mdio_reg_offset = AM35XX_EMAC_MDIO_OFFSET;
+ pdata->ctrl_ram_size= AM35XX_EMAC_CNTRL_RAM_SIZE;
+ pdata->version = EMAC_VERSION_2;
+ pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR;
+ pdata->interrupt_enable = am3517_enable_ethernet_int;
+ pdata->interrupt_disable= am3517_disable_ethernet_int;
+ am3517_emac_device.dev.platform_data = pdata;
+ platform_device_register(&am3517_emac_device);
+
+ regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+ regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
+ omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+ regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+
+ return ;
+ }
+
static struct i2c_board_info __initdata am3517evm_i2c_boardinfo[] = {
{
I2C_BOARD_INFO("s35390a", 0x30),
@@ -308,6 +421,7 @@ static void __init am3517_evm_init(void)
/* DSS */
am3517_evm_display_init();
+ am3517_evm_ethernet_init(&am3517_evm_emac_pdata
[PATCH 0/11] Some am3517 related patches
Some am3517 related patches. The detaild changelog is below: The following changes since commit eba014745cc806d625b6a553d1af6efd14e16321: Tony Lindgren (1): Linux-omap rebuilt: Updated to -rc3 are available in the git repository at: . devel Stanley.Miao (11): omap: remove one of the define of INT_34XX_BENCH_MPU_EMUL AM3517: Add platform init code for EMAC driver AM3517: rename the i2c boardinfo to make it more readable AM3517: Add platform init code for regulator driver AM3517: Add audio codec platform data AM3517: Add nand platform data for am3517evm AM3517: initialize i2c subsystem after mux subsystem OMAP: fix a gpmc nand problem omap: init the gpio pinmux for mmc omap hsmmc: fix the hsmmc driver for am3517. AM3517: Add mmc platform data for am3517evm arch/arm/mach-omap2/Makefile |3 +- arch/arm/mach-omap2/board-am3517evm.c | 392 - arch/arm/mach-omap2/devices.c |7 + arch/arm/mach-omap2/gpmc-nand.c |3 + arch/arm/mach-omap2/hsmmc.c |4 +- arch/arm/mach-omap2/include/mach/am35xx.h |9 + arch/arm/plat-omap/include/plat/irqs.h|2 - drivers/mmc/host/omap_hsmmc.c | 28 ++- 8 files changed, 421 insertions(+), 27 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/11] omap: remove one of the define of INT_34XX_BENCH_MPU_EMUL
INT_34XX_BENCH_MPU_EMUL was defined twice, another is at Line 312. Signed-off-by: Stanley.Miao --- arch/arm/plat-omap/include/plat/irqs.h |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index b65088a..4017019 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -345,8 +345,6 @@ #define INT_34XX_MMC3_IRQ 94 #define INT_34XX_GPT12_IRQ 95 -#defineINT_34XX_BENCH_MPU_EMUL 3 - #define INT_35XX_HECC0_IRQ 24 #define INT_35XX_HECC1_IRQ 28 #define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67 -- 1.5.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 0/2] omap-sham: OMAP SHA1/MD5 driver
Changes to v2: - Added multi omap kernel support based on comment - some redundant vars removed Dmitry Kasatkin (2): crypto: updates omap sham device related platform code crypto: omap-sham - omap sha1 & md5 driver arch/arm/mach-omap2/clock2420_data.c |2 +- arch/arm/mach-omap2/clock2430_data.c |2 +- arch/arm/mach-omap2/clock3xxx_data.c |2 +- arch/arm/mach-omap2/devices.c | 58 +- arch/arm/plat-omap/include/plat/omap34xx.h |5 + drivers/crypto/Kconfig |9 + drivers/crypto/Makefile|2 + drivers/crypto/omap-sham.c | 1347 8 files changed, 1414 insertions(+), 13 deletions(-) create mode 100644 drivers/crypto/omap-sham.c -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 1/2] crypto: updates omap sham device related platform code
- registration with multi OMAP kernels support
- clocks
Signed-off-by: Dmitry Kasatkin
---
arch/arm/mach-omap2/clock2420_data.c |2 +-
arch/arm/mach-omap2/clock2430_data.c |2 +-
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
arch/arm/mach-omap2/devices.c | 58 +++-
arch/arm/plat-omap/include/plat/omap34xx.h |5 ++
5 files changed, 56 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/clock2420_data.c
b/arch/arm/mach-omap2/clock2420_data.c
index d932b14..1820a55 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, "vlynq_ick",&vlynq_ick, CK_242X),
CLK(NULL, "vlynq_fck",&vlynq_fck, CK_242X),
CLK(NULL, "des_ick", &des_ick, CK_242X),
- CLK(NULL, "sha_ick", &sha_ick, CK_242X),
+ CLK("omap-sham","ick", &sha_ick, CK_242X),
CLK("omap_rng", "ick", &rng_ick, CK_242X),
CLK(NULL, "aes_ick", &aes_ick, CK_242X),
CLK(NULL, "pka_ick", &pka_ick, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c
b/arch/arm/mach-omap2/clock2430_data.c
index 0438b6e..5884ac6 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, "sdma_ick", &sdma_ick, CK_243X),
CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X),
CLK(NULL, "des_ick", &des_ick, CK_243X),
- CLK(NULL, "sha_ick", &sha_ick, CK_243X),
+ CLK("omap-sham","ick", &sha_ick, CK_243X),
CLK("omap_rng", "ick", &rng_ick, CK_243X),
CLK(NULL, "aes_ick", &aes_ick, CK_243X),
CLK(NULL, "pka_ick", &pka_ick, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d5153b6..5a974dc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK("mmci-omap-hs.2", "ick", &mmchs3_ick,CK_3430ES2 | CK_AM35XX),
CLK(NULL, "icr_ick", &icr_ick, CK_343X),
CLK(NULL, "aes2_ick", &aes2_ick, CK_343X),
- CLK(NULL, "sha12_ick",&sha12_ick, CK_343X),
+ CLK("omap-sham","ick", &sha12_ick, CK_343X),
CLK(NULL, "des2_ick", &des2_ick, CK_343X),
CLK("mmci-omap-hs.1", "ick", &mmchs2_ick,CK_3XXX),
CLK("mmci-omap-hs.0", "ick", &mmchs1_ick,CK_3XXX),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 23e4d77..7e7acc1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include "mux.h"
@@ -453,8 +454,10 @@ static void omap_init_mcspi(void)
static inline void omap_init_mcspi(void) {}
#endif
-#ifdef CONFIG_OMAP_SHA1_MD5
-static struct resource sha1_md5_resources[] = {
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) ||
defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP24XX
+static struct resource omap2_sham_resources[] = {
{
.start = OMAP24XX_SEC_SHA1MD5_BASE,
.end= OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
@@ -465,20 +468,55 @@ static struct resource sha1_md5_resources[] = {
.flags = IORESOURCE_IRQ,
}
};
+static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
+#else
+#define omap2_sham_resources NULL
+#define omap2_sham_resources_sz0
+#endif
-static struct platform_device sha1_md5_device = {
- .name = "OMAP SHA1/MD5",
+#ifdef CONFIG_ARCH_OMAP34XX
+static struct resource omap3_sham_resources[] = {
+ {
+ .start = OMAP34XX_SEC_SHA1MD5_BASE,
+ .end= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_SHA1MD52_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAP34XX_DMA_SHA1MD5_RX,
+ .flags = IORESOURCE_DMA,
+ }
+};
+static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
+#else
+#define omap3_sham_resources NULL
+#define omap3_sham_resources_sz0
+#endif
+
+static struct platform_device sham_device = {
+ .name = "omap-sham",
.id = -1,
- .num_resources = ARRAY_SIZE(sha1_md5_resources),
- .resource = sha1_md5_resources,
};
-static void omap_init_sha1_md5(void)
+static void omap_init_sham(void)
{
- platform_device_reg
[PATCHv3 2/2] crypto: omap-sham - omap sha1 & md5 driver
Earlier kernel contained omap sha1 and md5 driver, which was not maintained,
was not ported to new crypto APIs and removed from the source tree.
- implements async and sync crypto API using dma and cpu.
- supports multiple sham instances if available
Signed-off-by: Dmitry Kasatkin
---
drivers/crypto/Kconfig |9 +
drivers/crypto/Makefile|2 +
drivers/crypto/omap-sham.c | 1347
3 files changed, 1358 insertions(+), 0 deletions(-)
create mode 100644 drivers/crypto/omap-sham.c
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index b08403d..9073aa0 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -222,4 +222,13 @@ config CRYPTO_DEV_PPC4XX
help
This option allows you to have support for AMCC crypto acceleration.
+config CRYPTO_DEV_OMAP_SHAM
+ tristate "Support for OMAP SHA1/MD5 hw accelerator"
+ depends on ARCH_OMAP2 || ARCH_OMAP3
+ select CRYPTO_SHA1
+ select CRYPTO_MD5
+ help
+ OMAP processors have SHA1/MD5 hw accelerator. Select this if you
+ want to use the OMAP module for SHA1/MD5 algorithms.
+
endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 6ffcb3f..c9494e1 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -6,3 +6,5 @@ obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o
obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/
+obj-$(CONFIG_CRYPTO_DEV_OMAP_SHAM) += omap-sham.o
+
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
new file mode 100644
index 000..24680f0
--- /dev/null
+++ b/drivers/crypto/omap-sham.c
@@ -0,0 +1,1347 @@
+/*
+ * Cryptographic API.
+ *
+ * Support for OMAP SHA1/MD5 HW acceleration.
+ *
+ * Copyright (c) 2007 Instituto Nokia de Tecnologia - INdT
+ * Authors: David Cohen
+ * Dmitry Kasatkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This driver is based on padlock-sha.c driver.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
+#define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))
+
+#define SHA1_MD5_BLOCK_SIZESHA1_BLOCK_SIZE
+#define MD5_DIGEST_SIZE16
+
+#define SHA_REG_DIGCNT 0x14
+
+#define SHA_REG_CTRL 0x18
+#define SHA_REG_CTRL_LENGTH(0x << 5)
+#define SHA_REG_CTRL_CLOSE_HASH(1 << 4)
+#define SHA_REG_CTRL_ALGO_CONST(1 << 3)
+#define SHA_REG_CTRL_ALGO (1 << 2)
+#define SHA_REG_CTRL_INPUT_READY (1 << 1)
+#define SHA_REG_CTRL_OUTPUT_READY (1 << 0)
+
+#define SHA_REG_REV0x5C
+#define SHA_REG_REV_MAJOR 0xF0
+#define SHA_REG_REV_MINOR 0x0F
+
+#define SHA_REG_MASK 0x60
+#define SHA_REG_MASK_DMA_EN(1 << 3)
+#define SHA_REG_MASK_IT_EN (1 << 2)
+#define SHA_REG_MASK_SOFTRESET (1 << 1)
+#define SHA_REG_AUTOIDLE (1 << 0)
+
+#define SHA_REG_SYSSTATUS 0x64
+#define SHA_REG_SYSSTATUS_RESETDONE(1 << 0)
+
+#define DEFAULT_TIMEOUT_INTERVAL HZ
+
+struct omap_sham_desc {
+ /* should be last one to have desc area for fallback*/
+ struct shash_desc fallback;
+};
+
+#define FLAGS_UPDATE 0x0001
+#define FLAGS_FINUP0x0002
+#define FLAGS_FINAL0x0004
+#define FLAGS_MAY_SLEEP0x0008
+#define FLAGS_BYPASS_INIT 0x0010
+#define FLAGS_BYPASS 0x0030 /* it's a mask */
+#define FLAGS_FAST 0x0040
+#define FLAGS_SHA1 0x0080
+#define FLAGS_INPROGRESS 0x0100
+#define FLAGS_DMA_ACTIVE 0x0200
+#define FLAGS_READY0x0400
+#define FLAGS_CLEAN0x0800
+#define FLAGS_DMA 0x1000
+
+struct omap_sham_dev;
+
+struct omap_sham_ctx {
+ struct omap_sham_dev *dd;
+ unsigned long flags;
+ int digsize;
+ size_t bufcnt;
+ size_t digcnt;
+ u8 *buffer;
+ size_t buffer_size;
+
+ /* shash stuff */
+ struct crypto_shash *shash_fb;
+
+ /* ahash stuff */
+ struct crypto_ahash *ahash_fb;
+ struct ahash_request*req;
+
+ /* ahash walk state */
+ struct scatterlist *sg;
+ unsigned intoffset; /* offset in current sg */
+ unsigned in
