devkit8000 & omap3stalker LCD panel
Hi Thomas, Jason, I noticed that both devkit8000 and omap3stalker boards use the generic dpi driver for LCD. Why is that? If the boards have a normal fixed resolution LCD, the timings for the LCD should be added to the panel-generic-dpi.c. Tomi -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
On Thu, Sep 01, 2011 at 12:09:14AM -0400, Paul Walmsley wrote: > On Wed, 31 Aug 2011, Guenter Roeck wrote: > > > On Wed, Aug 31, 2011 at 08:36:43PM -0400, Paul Walmsley wrote: > > > Hi > > > > > > Some comments. > > > > > > On Wed, 31 Aug 2011, Keerthy wrote: > > > > > [ ... ] > > > > > > > +} > > > > + > > > > +/* Sysfs hook functions */ > > > > > > These should be conditionally compiled out if sysfs isn't compiled in. > > > > > The whole point of the hwmon subsystem is to expose hardware monitoring > > information > > to userland using sysfs. hwmon without sysfs doesn't make sense. > > > > So, if anything, it might make sense to disable the entire hwmon tree if > > sysfs is disabled. > > But please no conditionals in the code. > > Hmm. This IP block is more than just a sensor. It also can interrupt the > CPU and/or trigger a GPIO line (to shut down the chip) if the chip > temperature crosses some thresholds. On some OMAPs, the thresholds are > fixed; on others, they are software-programmable. That functionality > shouldn't require sysfs; it's almost closer to an x86 MCE. > > So based on your comments, it sounds like we should move that part of the > code to a different driver, and just leave the basic software thermal > monitoring here? > Good point. This definitely requires some thought. hwmon is meant to be hw monitoring, as the name says, not thermal management. Maybe this entire driver should be a thermal driver instead ? Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
On Wed, Aug 31, 2011 at 01:25:10PM -0400, Keerthy wrote: > On chip temperature sensor driver. The driver monitors the temperature of > the MPU subsystem of the OMAP4. It sends notifications to the user space if > the temperature crosses user defined thresholds via kobject_uevent interface. > The user is allowed to configure the temperature thresholds vis sysfs nodes > exposed using hwmon interface. > > Signed-off-by: Keerthy > Cc: Jean Delvare > Cc: Guenter Roeck > Cc: lm-sens...@lm-sensors.org > --- > Documentation/hwmon/omap_temp_sensor | 26 + > drivers/hwmon/Kconfig| 11 + > drivers/hwmon/Makefile |1 + > drivers/hwmon/omap_temp_sensor.c | 881 > ++ > 4 files changed, 919 insertions(+), 0 deletions(-) > create mode 100644 Documentation/hwmon/omap_temp_sensor > create mode 100644 drivers/hwmon/omap_temp_sensor.c > > diff --git a/Documentation/hwmon/omap_temp_sensor > b/Documentation/hwmon/omap_temp_sensor > new file mode 100644 > index 000..357f09a > --- /dev/null > +++ b/Documentation/hwmon/omap_temp_sensor > @@ -0,0 +1,26 @@ > +Kernel driver omap_temp_sensor > +== > + > +Supported chips: > + * Texas Instruments OMAP4460 > +Prefix: 'omap_temp_sensor' > + > +Author: > +J Keerthy > + > +Description > +--- > + > +The Texas Instruments OMAP4 family of chips have a bandgap temperature > sensor. > +The temperature sensor feature is used to convert the temperature of the > device > +into a decimal value coded on 10 bits. An internal ADC is used for > conversion. > +The recommended operating temperatures must be in the range -40 degree > Celsius > +to 123 degree celsius for standard conversion. > +The thresholds are programmable and upon crossing the thresholds an interrupt > +is generated. The OMAP temperature sensor has a programmable update rate in > +milli seconds. > +(Currently the driver programs a default of 2000 milliseconds). > + > +The driver provides the common sysfs-interface for temperatures (see > +Documentation/hwmon/sysfs-interface under Temperatures). > + > diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig > index 5f888f7..9c9cd8b 100644 > --- a/drivers/hwmon/Kconfig > +++ b/drivers/hwmon/Kconfig > @@ -323,6 +323,17 @@ config SENSORS_F71805F > This driver can also be built as a module. If so, the module > will be called f71805f. > > +config SENSORS_OMAP_BANDGAP_TEMP_SENSOR > + bool "OMAP on-die temperature sensor hwmon driver" > + depends on HWMON && ARCH_OMAP && OMAP_TEMP_SENSOR > + help > + If you say yes here you get support for hardware > + monitoring features of the OMAP on die temperature > + sensor. > + > + Continuous conversion programmable delay > + mode is used for temperature conversion. > + > config SENSORS_F71882FG > tristate "Fintek F71882FG and compatibles" > help > diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile > index 28061cf..d0f89f5 100644 > --- a/drivers/hwmon/Makefile > +++ b/drivers/hwmon/Makefile > @@ -91,6 +91,7 @@ obj-$(CONFIG_SENSORS_MAX6639) += max6639.o > obj-$(CONFIG_SENSORS_MAX6642) += max6642.o > obj-$(CONFIG_SENSORS_MAX6650) += max6650.o > obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o > +obj-$(CONFIG_SENSORS_OMAP_BANDGAP_TEMP_SENSOR) += omap_temp_sensor.o > obj-$(CONFIG_SENSORS_PC87360) += pc87360.o > obj-$(CONFIG_SENSORS_PC87427) += pc87427.o > obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o > diff --git a/drivers/hwmon/omap_temp_sensor.c > b/drivers/hwmon/omap_temp_sensor.c > new file mode 100644 > index 000..67fa424 > --- /dev/null > +++ b/drivers/hwmon/omap_temp_sensor.c > @@ -0,0 +1,881 @@ > +/* > + * OMAP4 Temperature sensor driver file > + * > + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ > + * Author: J Keerthy > + * Author: Moiz Sonasath > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, but > + * WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA > + * 02110-1301 USA > + * > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define TSHUT_HOT 920 /* 122 deg C */ > +#define
Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
On Wed, 31 Aug 2011, Guenter Roeck wrote: > On Wed, Aug 31, 2011 at 08:36:43PM -0400, Paul Walmsley wrote: > > Hi > > > > Some comments. > > > > On Wed, 31 Aug 2011, Keerthy wrote: > > > [ ... ] > > > > > +} > > > + > > > +/* Sysfs hook functions */ > > > > These should be conditionally compiled out if sysfs isn't compiled in. > > > The whole point of the hwmon subsystem is to expose hardware monitoring > information > to userland using sysfs. hwmon without sysfs doesn't make sense. > > So, if anything, it might make sense to disable the entire hwmon tree if > sysfs is disabled. > But please no conditionals in the code. Hmm. This IP block is more than just a sensor. It also can interrupt the CPU and/or trigger a GPIO line (to shut down the chip) if the chip temperature crosses some thresholds. On some OMAPs, the thresholds are fixed; on others, they are software-programmable. That functionality shouldn't require sysfs; it's almost closer to an x86 MCE. So based on your comments, it sounds like we should move that part of the code to a different driver, and just leave the basic software thermal monitoring here? - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/6 V4] OMAP4: Adding the temperature sensor register set bit fields
On Thu, Sep 1, 2011 at 5:34 AM, Paul Walmsley wrote: > On Wed, 31 Aug 2011, Keerthy wrote: > >> OMAP4460 specific temperature sensor register bit fields are added. >> Existing OMAP4 entries are renamed to OMAP4430. >> >> Signed-off-by: Keerthy >> Cc: t...@atomide.com > > At least one of these bitfields are incorrect. Please double-check them. > >> --- >> .../include/mach/ctrl_module_core_44xx.h | 70 >> >> 1 files changed, 57 insertions(+), 13 deletions(-) >> >> diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h >> b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h >> index 2f7ac70..725c1e1 100644 >> --- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h >> +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h >> @@ -256,19 +256,63 @@ >> #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0 >> #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0) >> >> -/* TEMP_SENSOR */ >> -#define OMAP4_BGAP_TEMPSOFF_SHIFT 12 >> -#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12) >> -#define OMAP4_BGAP_TSHUT_SHIFT 11 >> -#define OMAP4_BGAP_TSHUT_MASK (1 << 11) >> -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10 >> -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10) >> -#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9 >> -#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9) >> -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8 >> -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8) >> -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 >> -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0) >> +/* TEMP_SENSOR OMAP4430 */ >> +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12 >> +#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12) >> +#define OMAP4430_BGAP_TSHUT_SHIFT 11 >> +#define OMAP4430_BGAP_TSHUT_MASK (1 << 11) >> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10 >> +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10) >> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9 >> +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9) >> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8 >> +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8) >> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 >> +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) > > For example, this bitfield is only eight bits wide on 4430. I checked the 4430 TRM. It is 8 bits and the others are fine. I will correct this. > >> + >> +/* TEMP_SENSOR OMAP4460 */ >> +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13 >> +#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13) >> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11 >> +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11) >> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10 >> +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10) >> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 >> +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) >> + >> +/* BANDGAP_CTRL */ >> +#define OMAP4460_SINGLE_MODE_SHIFT 31 >> +#define OMAP4460_SINGLE_MODE_MASK (1 << 31) >> +#define OMAP4460_MASK_HOT_SHIFT 1 >> +#define OMAP4460_MASK_HOT_MASK (1 << 1) >> +#define OMAP4460_MASK_COLD_SHIFT 0 >> +#define OMAP4460_MASK_COLD_MASK (1 << 0) >> + >> +/* BANDGAP_COUNTER */ >> +#define OMAP4460_COUNTER_SHIFT 0 >> +#define OMAP4460_COUNTER_MASK (0xff << 0) >> + >> +/* BANDGAP_THRESHOLD */ >> +#define OMAP4460_T_HOT_SHIFT 16 >> +#define OMAP4460_T_HOT_MASK (0x3ff << 16) >> +#define OMAP4460_T_COLD_SHIFT 0 >> +#define OMAP4460_T_COLD_MASK (0x3ff << 0) >> + >> +/* TSHUT_THRESHOLD */ >> +#define OMAP4460_TSHUT_HOT_SHIFT 16 >> +#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16) >> +#define OMAP4460_TSHUT_COLD_SHIFT 0 >> +#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0) >> + >> +/* BANDGAP_STATUS */ >> +#define OMAP4460_CLEAN_STOP_SHIFT 3 >> +#define OMAP4460_CLEAN_STOP_MASK (1 << 3) >> +#define OMAP4460_BGAP_ALERT_SHIFT 2 >> +#define OMAP4460_BGAP_ALERT_MASK (1 << 2) >> +#define OMAP4460_HOT_FLAG_SHIFT 1 >> +#define OMAP4460_HOT_FLAG_MASK (1 << 1) >> +#define OMAP4460_COLD_FLAG_SHIFT
Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
On Wed, Aug 31, 2011 at 08:36:43PM -0400, Paul Walmsley wrote: > Hi > > Some comments. > > On Wed, 31 Aug 2011, Keerthy wrote: > [ ... ] > > > +} > > + > > +/* Sysfs hook functions */ > > These should be conditionally compiled out if sysfs isn't compiled in. > The whole point of the hwmon subsystem is to expose hardware monitoring information to userland using sysfs. hwmon without sysfs doesn't make sense. So, if anything, it might make sense to disable the entire hwmon tree if sysfs is disabled. But please no conditionals in the code. Guenter -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
Hi
Some comments.
On Wed, 31 Aug 2011, Keerthy wrote:
> diff --git a/drivers/hwmon/omap_temp_sensor.c
> b/drivers/hwmon/omap_temp_sensor.c
> new file mode 100644
> index 000..67fa424
> --- /dev/null
> +++ b/drivers/hwmon/omap_temp_sensor.c
> @@ -0,0 +1,881 @@
You've done almost all the hard work to create kerneldoc-NANO compliant
structure documentation, which is good. But a few important things are
missing. Please review Documentation/kernel-doc-nano-HOWTO.txt.
> +/*
Should be /** to indicate kerneldoc.
> + * omap_temp_sensor structure
Should be "struct omap_temp_sensor" and should include a short
description.
> + * @hwmon_dev - hwmon device pointer
> + * @pdev_dev - platform device pointer
> + * @clock - Clock pointer
> + * @registers - Pointer to structure with register offsets and bitfields
> + * @sensor_mutex - Mutex for sysfs, irq and PM
> + * @irq - MPU Irq number for thermal alert
> + * @phy_base - Physical base of the temp I/O
> + * @clk_rate - Holds current clock rate
> + * @temp_sensor_ctrl - temp sensor control register value
> + * @bg_ctrl - bandgap ctrl register value
> + * @bg_counter - bandgap counter value
> + * @bg_threshold - bandgap threshold register value
> + * @temp_sensor_tshut_threshold - bandgap tshut register value
> + * @clk_on - Manages the current clock state
> + */
> +struct omap_temp_sensor {
> + struct device *hwmon_dev;
> + struct device *pdev_dev;
> + struct clk *clock;
> + struct omap_temp_sensor_registers *registers;
> + struct mutexsensor_mutex; /* Mutex for sysfs, irq and PM */
> + unsigned intirq;
> + void __iomem*phy_base;
> + u32 clk_rate;
> + u32 temp_sensor_ctrl;
> + u32 bg_ctrl;
> + u32 bg_counter;
> + u32 bg_threshold;
> + u32 temp_sensor_tshut_threshold;
> + boolclk_on;
> +};
> +
> +/*
> + * Temperature values in milli degree celsius
> + * ADC code values from 530 to 923
> + */
> +static int adc_to_temp[394] = {
> + -4, -4, -4, -4, -39800, -39400, -39000, -38600, -38200,
> + -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800,
> + -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300,
> + -30800, -30400, -3, -29600, -29200, -28700, -28200, -27800,
> + -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400,
> + -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000,
> + -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600,
> + -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200,
> + -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700,
> + -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800,
> + -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000,
> + -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600,
> + 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400,
> + 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000,
> + 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800,
> + 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700,
> + 19200, 19600, 2, 20400, 20800, 21200, 21600, 22100, 22600,
> + 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400,
> + 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200,
> + 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000,
> + 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800,
> + 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600,
> + 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300,
> + 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000,
> + 49500, 5, 50400, 50800, 51200, 51600, 52000, 52400, 52800,
> + 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600,
> + 57000, 57400, 57800, 58200, 58700, 59200, 59600, 6, 60400,
> + 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200,
> + 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800,
> + 68200, 68700, 69200, 69600, 7, 70400, 70800, 71200, 71600,
> + 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400,
> + 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000,
> + 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800,
> + 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400,
> + 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200,
> + 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800,
> + 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600,
> + 98000, 98400, 98800, 99200, 99600, 10, 100400, 100800, 101200,
> + 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400,
> + 104800, 1052
Re: [PATCH 2/6 V4] OMAP4: Adding the temperature sensor register set bit fields
On Wed, 31 Aug 2011, Keerthy wrote: > OMAP4460 specific temperature sensor register bit fields are added. > Existing OMAP4 entries are renamed to OMAP4430. > > Signed-off-by: Keerthy > Cc: t...@atomide.com At least one of these bitfields are incorrect. Please double-check them. > --- > .../include/mach/ctrl_module_core_44xx.h | 70 > > 1 files changed, 57 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h > b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h > index 2f7ac70..725c1e1 100644 > --- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h > +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h > @@ -256,19 +256,63 @@ > #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0 > #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK (0x1f << 0) > > -/* TEMP_SENSOR */ > -#define OMAP4_BGAP_TEMPSOFF_SHIFT12 > -#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12) > -#define OMAP4_BGAP_TSHUT_SHIFT 11 > -#define OMAP4_BGAP_TSHUT_MASK(1 << 11) > -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT10 > -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10) > -#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9 > -#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9) > -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT8 > -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8) > -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 > -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK(0xff << 0) > +/* TEMP_SENSOR OMAP4430 */ > +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12 > +#define OMAP4430_BGAP_TEMPSOFF_MASK (1 << 12) > +#define OMAP4430_BGAP_TSHUT_SHIFT11 > +#define OMAP4430_BGAP_TSHUT_MASK (1 << 11) > +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10 > +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10) > +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT 9 > +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9) > +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8 > +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8) > +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT0 > +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) For example, this bitfield is only eight bits wide on 4430. > + > +/* TEMP_SENSOR OMAP4460 */ > +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13 > +#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13) > +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11 > +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11) > +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10 > +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10) > +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT0 > +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) > + > +/* BANDGAP_CTRL */ > +#define OMAP4460_SINGLE_MODE_SHIFT 31 > +#define OMAP4460_SINGLE_MODE_MASK(1 << 31) > +#define OMAP4460_MASK_HOT_SHIFT 1 > +#define OMAP4460_MASK_HOT_MASK (1 << 1) > +#define OMAP4460_MASK_COLD_SHIFT 0 > +#define OMAP4460_MASK_COLD_MASK (1 << 0) > + > +/* BANDGAP_COUNTER */ > +#define OMAP4460_COUNTER_SHIFT 0 > +#define OMAP4460_COUNTER_MASK(0xff << 0) > + > +/* BANDGAP_THRESHOLD */ > +#define OMAP4460_T_HOT_SHIFT 16 > +#define OMAP4460_T_HOT_MASK (0x3ff << 16) > +#define OMAP4460_T_COLD_SHIFT0 > +#define OMAP4460_T_COLD_MASK (0x3ff << 0) > + > +/* TSHUT_THRESHOLD */ > +#define OMAP4460_TSHUT_HOT_SHIFT 16 > +#define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16) > +#define OMAP4460_TSHUT_COLD_SHIFT0 > +#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0) > + > +/* BANDGAP_STATUS */ > +#define OMAP4460_CLEAN_STOP_SHIFT3 > +#define OMAP4460_CLEAN_STOP_MASK (1 << 3) > +#define OMAP4460_BGAP_ALERT_SHIFT2 > +#define OMAP4460_BGAP_ALERT_MASK (1 << 2) > +#define OMAP4460_HOT_FLAG_SHIFT 1 > +#define OMAP4460_HOT_FLAG_MASK (1 << 1) > +#define OMAP4460_COLD_FLAG_SHIFT 0 > +#define OMAP4460_COLD_FLAG_MASK (1 << 0) > > /* DPLL_NWELL_TRIM_0 */ > #define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29 > -- > 1.7.0.4 > > -- > To unsubscribe from this list: s
Re: [PATCH 1/6 V4] OMAP4: Clock: Associate clocks for OMAP temperature sensor
Hi,
a comment:
On Wed, 31 Aug 2011, Keerthy wrote:
> div_ts_ck feeds only the temperature sensor functional clock
> and also has a clksel associated (for divider selection). Mapping this
> as the functional clock for the temperature sensor in clkdev table,
> so a clk_set_rate() in the driver would have the effect of changing the
> temperature sensor clock rate indirectly.
>
> Signed-off-by: Keerthy
> Reviewed-by: Rajendra Nayak
> Cc: t...@atomide.com
> Cc: rna...@ti.com
> ---
> arch/arm/mach-omap2/clock44xx_data.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c
> b/arch/arm/mach-omap2/clock44xx_data.c
> index 2af0e3f..4a788f4 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -3187,7 +3187,7 @@ static struct omap_clk omap44xx_clks[] = {
> CLK(NULL, "bandgap_fclk", &bandgap_fclk,
> CK_443X),
> CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk,
> CK_446X),
> CLK(NULL, "des3des_fck", &des3des_fck,
> CK_443X),
> - CLK(NULL, "div_ts_ck",&div_ts_ck,
> CK_446X),
> + CLK("omap_temp_sensor.0", "fck", &div_ts_ck,
> CK_446X),
It shouldn't be necessary to add the device name/ID here. We're trying
to get rid of these. The omap_device code should take care of adding the
appropriate alias.
> CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck,
> CK_443X),
> CLK(NULL, "dmic_fck", &dmic_fck,
> CK_443X),
> CLK(NULL, "dsp_fck", &dsp_fck,
> CK_443X),
> --
> 1.7.0.4
>
> --
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>
- Paul
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Re: [PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
Hi, On Wed, 31 Aug 2011, Keerthy wrote: > On chip temperature sensor driver. The driver monitors the temperature of > the MPU subsystem of the OMAP4. It sends notifications to the user space if > the temperature crosses user defined thresholds via kobject_uevent interface. > The user is allowed to configure the temperature thresholds vis sysfs nodes > exposed using hwmon interface. I commented in a separate post that this driver should probably use an MFD driver for the System Control Module accesses, and then this hwmon driver should use functions from that to access the BANDGAP temperature sensor registers[1]. But I had another comment on this driver. A similar sensor is available on the OMAP34xx[2], OMAP36xx[3], and OMAP4430[4] chips. There are some register layout differences; the thermal shutdown threshold is configurable on the 4460 but fixed on the 4430; and also I'd assume, without looking, that the temperature mapping table is different on different chips. So it would seem to make sense to move the chip-specific code and data into chip-specific source files. I could see keeping a generic filename like "omap_temp_sensor.c" if you implemented a common interface to the bandgap sensors, ADCs and comparators, across all those different chips. That might be worth thinking about. But at least, this should probably be named drivers/hwmon/omap4460_temp_sensor.c, or something similar. - Paul 1. Walmsley, Paul. _Re: [PATCH 4/6 V4] OMAP4: Hwmod: OMAP temperature sensor_. Posted to the linux-omap@vger.kernel.org list on Wed, 31 Aug 2011 17:16:44 -0600. Available from (among others): http://marc.info/?l=linux-omap&m=131483260632685&w=2 2. Section 7.4.6 "Band Gap Voltage and Temperature Sensor". _OMAP34xx Multimedia Device Silicon Revision 3.1.x Version R (SWPU223R)_ (public version). Available from http://focus.ti.com/pdfs/wtbu/OMAP34xx_ES3.1.x_PUBLIC_TRM_vZR.zip 3. Section 13.4.6 "Band Gap Voltage and Temperature Sensor". _OMAP36xx Multimedia Device Silicon Revision 1.x Version V (SWPU177V)_ (public version). Available from http://focus.ti.com/pdfs/wtbu/OMAP36xx_ES1.x_PUBLIC_TRM_vV.zip 4. Section 18.4.10 "Band Gap Voltage and Temperature Sensor". _OMAP4430 Multimedia Device Silicon Revision 2.x Version V (SWPU231V)_ (public version). Available from http://focus.ti.com/pdfs/wtbu/OMAP4430_ES2.x_PUBLIC_TRM_vV.zip -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/6 V4] OMAP4: Hwmod: OMAP temperature sensor
Hi Keerthy, Benoît,
On Wed, 31 Aug 2011, Keerthy wrote:
> From: Benoit Cousson
>
> OMAP4460 temperature sensor hwmod cannot be auto generated
> since it is part of ctrl module. Hence populating the
> necessary hwmod info manually.
Looking at the 4460 1.x TRM Rev H, does it makes sense to create a
separate hwmod structure for this IP block? It looks to me like these
registers are integrated pretty tightly inside the SYSCTRL_GENERAL_CORE IP
block. So from a hwmod perspective, it seems to be a different situation
than, say, the RFBI block inside the DSS subsystem?
Just based on looking at Table 18-110 "Control Module Instance Summary"
and Table 18-111 "SYSCTRL_GENERAL_CORE Register Mapping Summary", it seems
to me that this IP block is best represented as an MFD. Something like
drivers/mfd/wm8350-core.c, which registers a hwmon device, which is then
driven by drivers/hwmon/wm8350-hwmon.c.
That should avoid the need for this hwmod entry too.
>
> Signed-off-by: Benoit Cousson
> Signed-off-by: Keerthy
> Cc: t...@atomide.com
> Cc: b-cous...@ti.com
> ---
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 61
>
> 1 files changed, 61 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index 6201422..28bf6d3 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -29,6 +29,7 @@
> #include
> #include
> #include
> +#include
>
> #include "omap_hwmod_common_data.h"
>
> @@ -832,6 +833,63 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
> };
>
> /*
> + * 'temperature_sensor' class
> + * temperature sensor module inside the bandgap / control module
> + */
> +
> +static struct omap_hwmod_class omap44xx_temperature_sensor_hwmod_class = {
> + .name = "temperature_sensor",
> +};
> +
> +static struct omap_hwmod_irq_info omap44xx_temperature_sensor_irqs[] = {
> + { .name = "thermal_alert", .irq = 126 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_temperature_sensor_addrs[] = {
> + {
> + .pa_start = 0x4a00232c,
> + .pa_end = 0x4a00238b,
> + },
> +};
> +
> +static struct omap_hwmod omap44xx_temperature_sensor_hwmod;
> +/* l4_cfg -> ctrl_module_core */
> +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__temperature_sensor = {
> + .master = &omap44xx_l4_cfg_hwmod,
> + .slave = &omap44xx_temperature_sensor_hwmod,
> + .clk= "l4_div_ck",
> + .addr = omap44xx_temperature_sensor_addrs,
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* ctrl_module_core slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_temperature_sensor_slaves[] = {
> + &omap44xx_l4_cfg__temperature_sensor,
> +};
> +
> +/* temperature sensor dev_attr */
> +static struct omap_temp_sensor_dev_attr temp_sensor_dev_attr = {
> + .name = "mpu",
> +};
> +
> +static struct omap_hwmod omap44xx_temperature_sensor_hwmod = {
> + .name = "temperature_sensor_mpu",
> + .class = &omap44xx_temperature_sensor_hwmod_class,
> + .mpu_irqs = omap44xx_temperature_sensor_irqs,
> + .main_clk = "bandgap_ts_fclk",
> + .slaves = omap44xx_temperature_sensor_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_temperature_sensor_slaves),
> + .clkdm_name = "l4_wkup_clkdm",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,
> + },
> + },
> + .dev_attr = &temp_sensor_dev_attr,
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> * 'bandgap' class
> * bangap reference for ldo regulators
> */
> @@ -5469,6 +5527,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[]
> = {
> &omap44xx_timer10_hwmod,
> &omap44xx_timer11_hwmod,
>
> + /* temperature sensor hwmod */
> + &omap44xx_temperature_sensor_hwmod,
> +
> /* uart class */
> &omap44xx_uart1_hwmod,
> &omap44xx_uart2_hwmod,
> --
> 1.7.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
- Paul
Re: [PATCH 7/7] OMAP2+: devices: Remove all omap_device_pm_latency structures
Benoit Cousson writes: > Remove all these duplicated structures since a default one is now > available. > > Signed-off-by: Benoit Cousson > Cc: Kevin Hilman > --- > arch/arm/mach-omap2/devices.c| 46 +++-- > arch/arm/mach-omap2/display.c| 11 + > arch/arm/mach-omap2/dma.c| 11 + > arch/arm/mach-omap2/gpio.c | 12 +- > arch/arm/mach-omap2/hsmmc.c | 18 +-- > arch/arm/mach-omap2/hwspinlock.c | 12 +- > arch/arm/mach-omap2/mcbsp.c | 11 + > arch/arm/mach-omap2/serial.c | 25 +--- > arch/arm/mach-omap2/sr_device.c | 11 + > arch/arm/mach-omap2/usb-musb.c | 11 + > arch/arm/plat-omap/i2c.c | 10 +--- > 11 files changed, 14 insertions(+), 164 deletions(-) Nice! queuing this for v3.2 (branch: for_3.2/omap_device) Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/7] OMAP: omap_device: Create a default omap_device_pm_latency
Benoit Cousson writes: > Most devices are using the same default omap_device_pm_latency structure > during device built. In order to avoid the duplication of the same > structure everywhere, add a default structure that will be used if > the device does not have an explicit one. > > Next patches will clean the duplicated structures. > > Signed-off-by: Benoit Cousson > Cc: Kevin Hilman > Cc: Paul Walmsley Excellent, queuing this for v3.2 (branch: for_3.2/omap_device) Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/7] OMAP2+: pm: Remove static devices variable for mpu, dsp, iva and l3 PM
Benoit Cousson writes:
> Since the device pointer is now retrieved using the hwmod name, remove
> the static variables used to store the device pointers for DSP, MPU, IVA
> and L3 devices for PM/DVFS usage.
>
> Signed-off-by: Benoit Cousson
> Cc: Kevin Hilman
Looks fine,
Kevin
> ---
> arch/arm/mach-omap2/pm.c | 47 ++---
> 1 files changed, 7 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
> index 17725d2..832577a 100644
> --- a/arch/arm/mach-omap2/pm.c
> +++ b/arch/arm/mach-omap2/pm.c
> @@ -26,38 +26,7 @@
>
> static struct omap_device_pm_latency *pm_lats;
>
> -static struct device *mpu_dev;
> -static struct device *iva_dev;
> -static struct device *l3_dev;
> -static struct device *dsp_dev;
> -
> -struct device *omap2_get_mpuss_device(void)
> -{
> - WARN_ON_ONCE(!mpu_dev);
> - return mpu_dev;
> -}
> -
> -struct device *omap2_get_iva_device(void)
> -{
> - WARN_ON_ONCE(!iva_dev);
> - return iva_dev;
> -}
> -
> -struct device *omap2_get_l3_device(void)
> -{
> - WARN_ON_ONCE(!l3_dev);
> - return l3_dev;
> -}
> -
> -struct device *omap4_get_dsp_device(void)
> -{
> - WARN_ON_ONCE(!dsp_dev);
> - return dsp_dev;
> -}
> -EXPORT_SYMBOL(omap4_get_dsp_device);
> -
> -/* static int _init_omap_device(struct omap_hwmod *oh, void *user) */
> -static int _init_omap_device(char *name, struct device **new_dev)
> +static int _init_omap_device(char *name)
> {
> struct omap_hwmod *oh;
> struct platform_device *pdev;
> @@ -72,8 +41,6 @@ static int _init_omap_device(char *name, struct device
> **new_dev)
>__func__, name))
> return -ENODEV;
>
> - *new_dev = &pdev->dev;
> -
> return 0;
> }
>
> @@ -82,16 +49,16 @@ static int _init_omap_device(char *name, struct device
> **new_dev)
> */
> static void omap2_init_processor_devices(void)
> {
> - _init_omap_device("mpu", &mpu_dev);
> + _init_omap_device("mpu");
> if (omap3_has_iva())
> - _init_omap_device("iva", &iva_dev);
> + _init_omap_device("iva");
>
> if (cpu_is_omap44xx()) {
> - _init_omap_device("l3_main_1", &l3_dev);
> - _init_omap_device("dsp", &dsp_dev);
> - _init_omap_device("iva", &iva_dev);
> + _init_omap_device("l3_main_1");
> + _init_omap_device("dsp");
> + _init_omap_device("iva");
> } else {
> - _init_omap_device("l3_main", &l3_dev);
> + _init_omap_device("l3_main");
> }
> }
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Re: [PATCH 4/7] OMAP2+: pm: Use hwmod name instead of dev pointer
Benoit Cousson writes:
> Replace the struct device parameter of omap2_set_init_voltage
> by the hwmod name. It will avoid having to store explicitely
> the device pointer into a static variable.
> Moreover, it will be a little bit more scalable if we introduce
> new DVFS devices.
>
> Signed-off-by: Benoit Cousson
> Cc: Kevin Hilman
> ---
> arch/arm/mach-omap2/pm.c | 22 +++---
> 1 files changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
> index 54281e5..17725d2 100644
> --- a/arch/arm/mach-omap2/pm.c
> +++ b/arch/arm/mach-omap2/pm.c
> @@ -171,18 +171,26 @@ err:
> * in the opp entry
> */
> static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
> - struct device *dev)
> + const char *oh_name)
> {
> struct voltagedomain *voltdm;
> struct clk *clk;
> struct opp *opp;
> unsigned long freq, bootup_volt;
> + struct device *dev;
>
> - if (!vdd_name || !clk_name || !dev) {
> + if (!vdd_name || !clk_name || !oh_name) {
> printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
> goto exit;
> }
>
> + dev = omap_hwmod_name_get_dev(oh_name);
> + if (IS_ERR(dev)) {
> + pr_err("%s: Unable to get dev pointer for hwmod %s\n",
> + __func__, oh_name);
> + goto exit;
> + }
> +
> voltdm = omap_voltage_domain_lookup(vdd_name);
> if (IS_ERR(voltdm)) {
> printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
> @@ -228,8 +236,8 @@ static void __init omap3_init_voltages(void)
> if (!cpu_is_omap34xx())
> return;
>
> - omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev);
> - omap2_set_init_voltage("core", "l3_ick", l3_dev);
> + omap2_set_init_voltage("mpu", "dpll1_ck", "mpu");
> + omap2_set_init_voltage("core", "l3_ick", "l3_main");
> }
>
> static void __init omap4_init_voltages(void)
> @@ -237,9 +245,9 @@ static void __init omap4_init_voltages(void)
> if (!cpu_is_omap44xx())
> return;
>
> - omap2_set_init_voltage("mpu", "dpll_mpu_ck", mpu_dev);
> - omap2_set_init_voltage("core", "l3_div_ck", l3_dev);
> - omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", iva_dev);
> + omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
> + omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
> + omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
> }
>
> static int __init omap2_common_pm_init(void)
Looks fine.
Kevin
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Re: [PATCH 3/7] OMAP3: beagle-board: Use the omap_hwmod_name_get_dev API
Benoit Cousson writes:
> Replace the multiple omap2_get_XXX_device APIs with the new
> omap_hwmod_name_get_dev that uses the hwmod name to get the proper
> device.
>
> Signed-off-by: Benoit Cousson
> Cc: Nishanth Menon
> ---
> arch/arm/mach-omap2/board-omap3beagle.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
> b/arch/arm/mach-omap2/board-omap3beagle.c
> index 3ae16b4..dab16e0 100644
> --- a/arch/arm/mach-omap2/board-omap3beagle.c
> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
> @@ -493,8 +493,8 @@ static void __init beagle_opp_init(void)
> if (cpu_is_omap3630()) {
> struct device *mpu_dev, *iva_dev;
>
> - mpu_dev = omap2_get_mpuss_device();
> - iva_dev = omap2_get_iva_device();
> + mpu_dev = omap_hwmod_name_get_dev("mpu");
> + iva_dev = omap_hwmod_name_get_dev("iva");
>
> if (!mpu_dev || !iva_dev) {
> pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
Looks fine.
Kevin
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Re: [PATCH 2/7] OMAP: PM: omap_device: add few quick access functions
Benoit Cousson writes:
> From: Nishanth Menon
>
> Provide a quick set of access functions:
> a) Convert omap_device to platform_device - This is the flip of
>to_omap_device for equivalent usage
> b) Convert omap_device to device pointer - This is useful for
>most devices that need to go through standard linux functions that
>take device pointer.
> c) Convert hwmod to device pointer - This wrapper provides ability for
>drivers to convert directly from hwmod name back to device pointer
>without having to handle this on a driver by driver basis
>
> Signed-off-by: Nishanth Menon
> [b-cous...@ti.com: Adapt it to the new pdev pointer inside od]
> Signed-off-by: Benoit Cousson
> ---
> arch/arm/plat-omap/include/plat/omap_device.h | 15 +++
> 1 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
> b/arch/arm/plat-omap/include/plat/omap_device.h
> index bdc2804..903f329 100644
> --- a/arch/arm/plat-omap/include/plat/omap_device.h
> +++ b/arch/arm/plat-omap/include/plat/omap_device.h
> @@ -152,6 +152,21 @@ static inline struct omap_device *to_omap_device(struct
> platform_device *pdev)
> return pdev ? pdev->archdata.od : NULL;
> }
>
> +/* Convert omap_device to platform device pointer */
> +#define omap_device_get_pdev(x) ((x)->pdev)
> +/* Convert omap_device to device pointer */
> +#define omap_device_get_dev(x) (&omap_device_get_pdev(x)->dev)
I don't see these used elsewhere, and I don't think they're needed...
> +/* Convert omap_hwmod name to device pointer */
> +static inline struct device *omap_hwmod_name_get_dev(const char *oh_name)
> +{
> + struct omap_device *od;
> + od = omap_hwmod_name_get_odev(oh_name);
> + if (IS_ERR_OR_NULL(od))
> + return ERR_PTR(od ? PTR_ERR(od) : -ENODEV);
> + return omap_device_get_dev(od);
> +}
> +
After comments on patch 1 are addressed, the
pdev = omap_hwmod_name_get_pdev(oh_name)
return &pdev->dev;
Kevin
> static inline
> void omap_device_disable_idle_on_suspend(struct platform_device *pdev)
> {
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Re: [PATCH 1/7] OMAP: PM: omap_device: add omap_hwmod_name_get_odev
Benoit Cousson writes:
> From: Nishanth Menon
>
> An API which translates a standard hwmod name to corresponding
> omap_device is useful for drivers when they need to look up the
> device associated with a hwmod name to map back into the device
> structure pointers. These ideally should be used by drivers in
> mach directory. Using a generic hwmod name like "gpu" instead of
> the actual device name which could change in the future, allows
> us to:
> a) Could in effect help replace apis such as omap2_get_mpuss_device,
> omap2_get_iva_device, omap2_get_l3_device, omap4_get_dsp_device,
> etc..
> b) Scale to more devices rather than be restricted to named functions
> c) Simplify driver's platform_data from passing additional fields
> all doing the same thing with different function pointer names
> just for accessing a different device name.
>
> Signed-off-by: Nishanth Menon
> [b-cous...@ti.com: rebased on top of Kevin's changes]
> Signed-off-by: Benoit Cousson
OK, I cerainly like this better than the omap2_get_*_device APIs, but
I don't see the point in returning an omap_device pointer.
In my series, I tried to make all the OMAP device APIs return/use a
platform_device pointer instead of an omap_device pointer, so I'd rather
just see this return the platform_device pointer directly.
Kevin
> ---
> arch/arm/plat-omap/include/plat/omap_device.h |1 +
> arch/arm/plat-omap/omap_device.c | 32
> +
> 2 files changed, 33 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
> b/arch/arm/plat-omap/include/plat/omap_device.h
> index d4d9b96..bdc2804 100644
> --- a/arch/arm/plat-omap/include/plat/omap_device.h
> +++ b/arch/arm/plat-omap/include/plat/omap_device.h
> @@ -101,6 +101,7 @@ struct platform_device *omap_device_build_ss(const char
> *pdev_name, int pdev_id,
>int pm_lats_cnt, int is_early_device);
>
> void __iomem *omap_device_get_rt_va(struct omap_device *od);
> +struct omap_device *omap_hwmod_name_get_odev(const char *oh_name);
>
> /* OMAP PM interface */
> int omap_device_align_pm_lat(struct platform_device *pdev,
> diff --git a/arch/arm/plat-omap/omap_device.c
> b/arch/arm/plat-omap/omap_device.c
> index d8f2299..455594a 100644
> --- a/arch/arm/plat-omap/omap_device.c
> +++ b/arch/arm/plat-omap/omap_device.c
> @@ -840,6 +840,38 @@ void __iomem *omap_device_get_rt_va(struct omap_device
> *od)
> return omap_hwmod_get_mpu_rt_va(od->hwmods[0]);
> }
>
> +/**
> + * omap_hwmod_name_get_odev() - convert a hwmod name to omap_device pointer
> + * @oh_name: name of the hwmod device
> + *
> + * returns back a struct omap_device * pointer associated with a hwmod
> + * device represented by a hwmod_name
> + */
> +struct omap_device *omap_hwmod_name_get_odev(const char *oh_name)
> +{
> + struct omap_hwmod *oh;
> +
> + if (!oh_name) {
> + WARN(1, "%s: no hwmod name!\n", __func__);
> + return ERR_PTR(-EINVAL);
> + }
> +
> + oh = omap_hwmod_lookup(oh_name);
> + if (IS_ERR_OR_NULL(oh)) {
> + WARN(1, "%s: no hwmod for %s\n", __func__,
> + oh_name);
> + return ERR_PTR(oh ? PTR_ERR(oh) : -ENODEV);
> + }
> + if (IS_ERR_OR_NULL(oh->od)) {
> + WARN(1, "%s: no omap_device for %s\n", __func__,
> + oh_name);
> + return ERR_PTR(oh->od ? PTR_ERR(oh->od) : -ENODEV);
> + }
> +
> + return oh->od;
> +}
> +EXPORT_SYMBOL(omap_hwmod_name_get_odev);
> +
> /*
> * Public functions intended for use in omap_device_pm_latency
> * .activate_func and .deactivate_func function pointers
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Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, 2011-08-31 at 13:49 -0500, Rob Herring wrote: > An outer_sync will only drain the write buffer of the L2. It does not > flush the cache though. If the write buffer does in fact keep data as > long as possible (until it needs a free slot or the line is full), then > long delays to write out data are certainly possible. The exact > operation is not documented AFAIR. Ah, thanks for that. I really haven't been paying close attention to ARMv6/7 hardware and I'm in the process of playing catch up. --Mark -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, Aug 31, 2011 at 07:19:33PM +0100, Rob Herring wrote: > On 08/31/2011 12:51 PM, Will Deacon wrote: > > Another thing that Marc and I tried on OMAP4 was not bringing up the > > secondary > > CPU during boot (by commenting out most of smp_init). In this case, I/O > > performance was good until we tried to online the secondary CPU. The online > > failed but after that the I/O performance was certainly degraded. > > > > Was the SCU enabled at that point? One diff between nosmp boot and > offlining the 2nd core would be that the SCU remains enabled in the > latter case. I think the SCU does not get enabled for nosmp. Our rudimentary test (printing out the SCU control register during boot) showed that it *was* enabled for nosmp. I think this is due to the secure world having to do that on OMAP so it's probably not true for other platforms. Will -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On 08/31/2011 01:35 PM, Mark Salter wrote:
> On Wed, 2011-08-31 at 13:19 -0500, Rob Herring wrote:
>> On 08/31/2011 12:51 PM, Will Deacon wrote:
>>> On Wed, Aug 31, 2011 at 06:46:50PM +0100, Nicolas Pitre wrote:
On Wed, 31 Aug 2011, Will Deacon wrote:
> On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote:
>> On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote:
>>> On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote:
One question: why this write buffer issue did not happen at UP ARM V7
platform, whose dma buffer
also uncache, but bufferable?
>>>
>>> Which CPU was on this platform?
>>
>> Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a
>> usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing
>> nosmp on the commandline, I see 20.3MB/s.
>>
>> Can someone explain why nosmp would make such a difference?
>
> Oh gawd, that's horrible. I have a feeling it's probably a separate issue
> though, caused by:
>
> omap_modify_auxcoreboot0(0x200, 0xfdff);
>
> in boot_secondary for OMAP. Unfortunately I have no idea what that line is
> doing because it ends up talking to the secure monitor.
Well, this issue is apparently affecting other ARMv9 implementations
too. In which case this code in arch/arm/mm/mmu.c could be responsible:
if (is_smp()) {
/*
* Mark memory with the "shared" attribute
* for SMP systems
*/
user_pgprot |= L_PTE_SHARED;
kern_pgprot |= L_PTE_SHARED;
vecs_pgprot |= L_PTE_SHARED;
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
mem_types[MT_DEVICE_CACHED].prot_sect |=
PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |=
L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |=
PMD_SECT_S;
mem_types[MT_MEMORY_NONCACHED].prot_pte |=
L_PTE_SHARED;
}
However I don't see the nosmp kernel argument having any effect on the
result from is_smp().
>>>
>>> Yes, the first thing that sprung to mind was the shared attribute, but like
>>> you say, that doesn't seem to be affected by the nosmp command line
>>> argument.
>>>
>>> Another thing that Marc and I tried on OMAP4 was not bringing up the
>>> secondary
>>> CPU during boot (by commenting out most of smp_init). In this case, I/O
>>> performance was good until we tried to online the secondary CPU. The online
>>> failed but after that the I/O performance was certainly degraded.
>>>
>>
>> Was the SCU enabled at that point? One diff between nosmp boot and
>> offlining the 2nd core would be that the SCU remains enabled in the
>> latter case. I think the SCU does not get enabled for nosmp.
>>
>> Do we really know which write buffer the data is sitting? Some
>> experiments to only flush the L1 write buffer would be interesting.
>> Perhaps something executed on the 2nd core has a mb which doesn't help
>> for SMP because the other core's L1 write buffer is not flushed, but it
>> helps for nosmp because everything runs on 1 core and any occurrence of
>> a mb will flush all data out. I wouldn't expect the behavior to be so
>> consistent though. Could it be something is not visible to the other
>> core rather than not visible to the EHCI controller?
>
> One experiment I did a few days ago was to pin processes and interrupts
> to core#0 (except IPI and local timer). This didn't make any noticeable
> difference.
>
> My current understanding is that the writes are getting hung up in a
> cache and not a write buffer. I am seeing delays of 10-15ms between
> queuing the urb and getting an interrupt for urb completion. That
> drops to a few hundred microseconds with the explicit flushing added
> to the ehci driver. I don't see how any write buffer could hold data
> that long without draining out on its own. What I see seems to suggest
> that the memory is only coherent among the cores and not coherent for
> CPU writes/device reads. Adding just a dsb() for the ehci flush does
> not help. An outer_sync() is also necessary.
>
An outer_sync will only drain the write buffer of the L2. It does not
flush the cache though. If the write buffer does in fact keep data as
long as possible (until it needs a free slot or the line is full), then
long delays to write out data are certainly possible. The exact
operation is not documented AFAIR.
Rob
--
To
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, 2011-08-31 at 13:19 -0500, Rob Herring wrote:
> On 08/31/2011 12:51 PM, Will Deacon wrote:
> > On Wed, Aug 31, 2011 at 06:46:50PM +0100, Nicolas Pitre wrote:
> >> On Wed, 31 Aug 2011, Will Deacon wrote:
> >>
> >>> On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote:
> On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote:
> > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote:
> >> One question: why this write buffer issue did not happen at UP ARM V7
> >> platform, whose dma buffer
> >> also uncache, but bufferable?
> >
> > Which CPU was on this platform?
>
> Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a
> usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing
> nosmp on the commandline, I see 20.3MB/s.
>
> Can someone explain why nosmp would make such a difference?
> >>>
> >>> Oh gawd, that's horrible. I have a feeling it's probably a separate issue
> >>> though, caused by:
> >>>
> >>> omap_modify_auxcoreboot0(0x200, 0xfdff);
> >>>
> >>> in boot_secondary for OMAP. Unfortunately I have no idea what that line is
> >>> doing because it ends up talking to the secure monitor.
> >>
> >> Well, this issue is apparently affecting other ARMv9 implementations
> >> too. In which case this code in arch/arm/mm/mmu.c could be responsible:
> >>
> >> if (is_smp()) {
> >> /*
> >> * Mark memory with the "shared" attribute
> >> * for SMP systems
> >> */
> >> user_pgprot |= L_PTE_SHARED;
> >> kern_pgprot |= L_PTE_SHARED;
> >> vecs_pgprot |= L_PTE_SHARED;
> >> mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
> >> mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
> >> mem_types[MT_DEVICE_CACHED].prot_sect |=
> >> PMD_SECT_S;
> >> mem_types[MT_DEVICE_CACHED].prot_pte |=
> >> L_PTE_SHARED;
> >> mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
> >> mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
> >> mem_types[MT_MEMORY_NONCACHED].prot_sect |=
> >> PMD_SECT_S;
> >> mem_types[MT_MEMORY_NONCACHED].prot_pte |=
> >> L_PTE_SHARED;
> >> }
> >>
> >> However I don't see the nosmp kernel argument having any effect on the
> >> result from is_smp().
> >
> > Yes, the first thing that sprung to mind was the shared attribute, but like
> > you say, that doesn't seem to be affected by the nosmp command line
> > argument.
> >
> > Another thing that Marc and I tried on OMAP4 was not bringing up the
> > secondary
> > CPU during boot (by commenting out most of smp_init). In this case, I/O
> > performance was good until we tried to online the secondary CPU. The online
> > failed but after that the I/O performance was certainly degraded.
> >
>
> Was the SCU enabled at that point? One diff between nosmp boot and
> offlining the 2nd core would be that the SCU remains enabled in the
> latter case. I think the SCU does not get enabled for nosmp.
>
> Do we really know which write buffer the data is sitting? Some
> experiments to only flush the L1 write buffer would be interesting.
> Perhaps something executed on the 2nd core has a mb which doesn't help
> for SMP because the other core's L1 write buffer is not flushed, but it
> helps for nosmp because everything runs on 1 core and any occurrence of
> a mb will flush all data out. I wouldn't expect the behavior to be so
> consistent though. Could it be something is not visible to the other
> core rather than not visible to the EHCI controller?
One experiment I did a few days ago was to pin processes and interrupts
to core#0 (except IPI and local timer). This didn't make any noticeable
difference.
My current understanding is that the writes are getting hung up in a
cache and not a write buffer. I am seeing delays of 10-15ms between
queuing the urb and getting an interrupt for urb completion. That
drops to a few hundred microseconds with the explicit flushing added
to the ehci driver. I don't see how any write buffer could hold data
that long without draining out on its own. What I see seems to suggest
that the memory is only coherent among the cores and not coherent for
CPU writes/device reads. Adding just a dsb() for the ehci flush does
not help. An outer_sync() is also necessary.
--Mark
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Re: status request of et8k8, ad5820 and their corresponding rx51 board code
On Wed, Aug 31, 2011 at 05:33:16PM +0200, Laurent Pinchart wrote: > Hi Sebastian, Hi, > (CC'ing Sakari Ailus) > > On Wednesday 31 August 2011 17:15:24 Sebastian Reichel wrote: > > Hi, > > > > What's the plan for the rx51 camera drivers from [0]? Is there a > > chance, that they get included in the mainline 3.2 or 3.3 kernel? > > The ad5820 driver will probably be the simplest one to upstream. It should be > possible to push it to v3.3. Someone needs to look at the lens-related > controls and how they can be standardized (if at all). I don't know enough of different lenses to give a definitive answer but so far what I have seen is that the way to drive a lens varies wildly from chip to another. It might not be possible to standarside them. I agree the ad5820 would be relatively easy to upstream. > The et8ek8 driver is a different story. I don't think it should get mainlined > in its current state. We need to get rid of the "camera firmware" support > from > the driver first, and if possible implement the V4L2 API correctly without > relying on register lists. I fully agree with this. One problem is that the documentation for this sensor is poor and not many of its registers are known. It's possible to use it with the existing register list (which should be part of the driver itself). -- Sakari Ailus sakari.ai...@iki.fi -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On 08/31/2011 12:51 PM, Will Deacon wrote:
> On Wed, Aug 31, 2011 at 06:46:50PM +0100, Nicolas Pitre wrote:
>> On Wed, 31 Aug 2011, Will Deacon wrote:
>>
>>> On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote:
On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote:
> On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote:
>> One question: why this write buffer issue did not happen at UP ARM V7
>> platform, whose dma buffer
>> also uncache, but bufferable?
>
> Which CPU was on this platform?
Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a
usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing
nosmp on the commandline, I see 20.3MB/s.
Can someone explain why nosmp would make such a difference?
>>>
>>> Oh gawd, that's horrible. I have a feeling it's probably a separate issue
>>> though, caused by:
>>>
>>> omap_modify_auxcoreboot0(0x200, 0xfdff);
>>>
>>> in boot_secondary for OMAP. Unfortunately I have no idea what that line is
>>> doing because it ends up talking to the secure monitor.
>>
>> Well, this issue is apparently affecting other ARMv9 implementations
>> too. In which case this code in arch/arm/mm/mmu.c could be responsible:
>>
>> if (is_smp()) {
>> /*
>> * Mark memory with the "shared" attribute
>> * for SMP systems
>> */
>> user_pgprot |= L_PTE_SHARED;
>> kern_pgprot |= L_PTE_SHARED;
>> vecs_pgprot |= L_PTE_SHARED;
>> mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
>> mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
>> mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
>> mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
>> mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
>> mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
>> mem_types[MT_MEMORY_NONCACHED].prot_sect |=
>> PMD_SECT_S;
>> mem_types[MT_MEMORY_NONCACHED].prot_pte |=
>> L_PTE_SHARED;
>> }
>>
>> However I don't see the nosmp kernel argument having any effect on the
>> result from is_smp().
>
> Yes, the first thing that sprung to mind was the shared attribute, but like
> you say, that doesn't seem to be affected by the nosmp command line
> argument.
>
> Another thing that Marc and I tried on OMAP4 was not bringing up the secondary
> CPU during boot (by commenting out most of smp_init). In this case, I/O
> performance was good until we tried to online the secondary CPU. The online
> failed but after that the I/O performance was certainly degraded.
>
Was the SCU enabled at that point? One diff between nosmp boot and
offlining the 2nd core would be that the SCU remains enabled in the
latter case. I think the SCU does not get enabled for nosmp.
Do we really know which write buffer the data is sitting? Some
experiments to only flush the L1 write buffer would be interesting.
Perhaps something executed on the 2nd core has a mb which doesn't help
for SMP because the other core's L1 write buffer is not flushed, but it
helps for nosmp because everything runs on 1 core and any occurrence of
a mb will flush all data out. I wouldn't expect the behavior to be so
consistent though. Could it be something is not visible to the other
core rather than not visible to the EHCI controller?
Rob
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Re: [PATCH 11/12] OMAP: Panda & Beagle: DVI: Add i2c_bus_num
On Wed, 2011-08-31 at 10:00 -0500, Andy Doan wrote:
> On 08/31/2011 08:23 AM, Tomi Valkeinen wrote:
> > Add i2c bus number for DVI output. The driver uses this to detect if a
> > panel is connected and to read EDID.
> >
> > Signed-off-by: Tomi Valkeinen
> > ---
> > arch/arm/mach-omap2/board-omap3beagle.c |1 +
> > arch/arm/mach-omap2/board-omap4panda.c |1 +
> > 2 files changed, 2 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
> > b/arch/arm/mach-omap2/board-omap3beagle.c
> > index 3ae16b4..13244e9 100644
> > --- a/arch/arm/mach-omap2/board-omap3beagle.c
> > +++ b/arch/arm/mach-omap2/board-omap3beagle.c
> > @@ -207,6 +207,7 @@ static struct panel_generic_dpi_data dvi_panel = {
> > .name = "generic",
> > .platform_enable = beagle_enable_dvi,
> > .platform_disable = beagle_disable_dvi,
> > + .i2c_bus_num = 3,
> > };
> >
> > static struct omap_dss_device beagle_dvi_device = {
> > diff --git a/arch/arm/mach-omap2/board-omap4panda.c
> > b/arch/arm/mach-omap2/board-omap4panda.c
> > index 9aaa960..d5760e3 100644
> > --- a/arch/arm/mach-omap2/board-omap4panda.c
> > +++ b/arch/arm/mach-omap2/board-omap4panda.c
> > @@ -459,6 +459,7 @@ static struct panel_generic_dpi_data omap4_dvi_panel = {
> > .name = "generic",
> > .platform_enable= omap4_panda_enable_dvi,
> > .platform_disable = omap4_panda_disable_dvi,
> > + .i2c_bus_num = 3,
> > };
> >
> > struct omap_dss_device omap4_panda_dvi_device = {
>
> Can you add a similar patch for board-overo.c? I've tested earlier
> versions of this patch series on a Tide+Tobi successfully. Here's a copy
> of my patch:
>
>http://tinyurl.com/3cek5m7
Sure. I only added the boards I know have the ddc i2c on bus 3 (i.e.
those I was able to test).
Tomi
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Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, Aug 31, 2011 at 06:46:50PM +0100, Nicolas Pitre wrote:
> On Wed, 31 Aug 2011, Will Deacon wrote:
>
> > On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote:
> > > On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote:
> > > > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote:
> > > > > One question: why this write buffer issue did not happen at UP ARM V7
> > > > > platform, whose dma buffer
> > > > > also uncache, but bufferable?
> > > >
> > > > Which CPU was on this platform?
> > >
> > > Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a
> > > usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing
> > > nosmp on the commandline, I see 20.3MB/s.
> > >
> > > Can someone explain why nosmp would make such a difference?
> >
> > Oh gawd, that's horrible. I have a feeling it's probably a separate issue
> > though, caused by:
> >
> > omap_modify_auxcoreboot0(0x200, 0xfdff);
> >
> > in boot_secondary for OMAP. Unfortunately I have no idea what that line is
> > doing because it ends up talking to the secure monitor.
>
> Well, this issue is apparently affecting other ARMv9 implementations
> too. In which case this code in arch/arm/mm/mmu.c could be responsible:
>
> if (is_smp()) {
> /*
> * Mark memory with the "shared" attribute
> * for SMP systems
> */
> user_pgprot |= L_PTE_SHARED;
> kern_pgprot |= L_PTE_SHARED;
> vecs_pgprot |= L_PTE_SHARED;
> mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
> mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
> mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
> mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
> mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
> mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
> mem_types[MT_MEMORY_NONCACHED].prot_sect |=
> PMD_SECT_S;
> mem_types[MT_MEMORY_NONCACHED].prot_pte |=
> L_PTE_SHARED;
> }
>
> However I don't see the nosmp kernel argument having any effect on the
> result from is_smp().
Yes, the first thing that sprung to mind was the shared attribute, but like
you say, that doesn't seem to be affected by the nosmp command line
argument.
Another thing that Marc and I tried on OMAP4 was not bringing up the secondary
CPU during boot (by commenting out most of smp_init). In this case, I/O
performance was good until we tried to online the secondary CPU. The online
failed but after that the I/O performance was certainly degraded.
Will
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Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, 31 Aug 2011, Will Deacon wrote:
> On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote:
> > On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote:
> > > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote:
> > > > One question: why this write buffer issue did not happen at UP ARM V7
> > > > platform, whose dma buffer
> > > > also uncache, but bufferable?
> > >
> > > Which CPU was on this platform?
> >
> > Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a
> > usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing
> > nosmp on the commandline, I see 20.3MB/s.
> >
> > Can someone explain why nosmp would make such a difference?
>
> Oh gawd, that's horrible. I have a feeling it's probably a separate issue
> though, caused by:
>
> omap_modify_auxcoreboot0(0x200, 0xfdff);
>
> in boot_secondary for OMAP. Unfortunately I have no idea what that line is
> doing because it ends up talking to the secure monitor.
Well, this issue is apparently affecting other ARMv9 implementations
too. In which case this code in arch/arm/mm/mmu.c could be responsible:
if (is_smp()) {
/*
* Mark memory with the "shared" attribute
* for SMP systems
*/
user_pgprot |= L_PTE_SHARED;
kern_pgprot |= L_PTE_SHARED;
vecs_pgprot |= L_PTE_SHARED;
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
}
However I don't see the nosmp kernel argument having any effect on the
result from is_smp().
Nicolas
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[PATCH 6/6 V4] hwmon: OMAP4: On die temperature sensor driver
On chip temperature sensor driver. The driver monitors the temperature of the MPU subsystem of the OMAP4. It sends notifications to the user space if the temperature crosses user defined thresholds via kobject_uevent interface. The user is allowed to configure the temperature thresholds vis sysfs nodes exposed using hwmon interface. Signed-off-by: Keerthy Cc: Jean Delvare Cc: Guenter Roeck Cc: lm-sens...@lm-sensors.org --- Documentation/hwmon/omap_temp_sensor | 26 + drivers/hwmon/Kconfig| 11 + drivers/hwmon/Makefile |1 + drivers/hwmon/omap_temp_sensor.c | 881 ++ 4 files changed, 919 insertions(+), 0 deletions(-) create mode 100644 Documentation/hwmon/omap_temp_sensor create mode 100644 drivers/hwmon/omap_temp_sensor.c diff --git a/Documentation/hwmon/omap_temp_sensor b/Documentation/hwmon/omap_temp_sensor new file mode 100644 index 000..357f09a --- /dev/null +++ b/Documentation/hwmon/omap_temp_sensor @@ -0,0 +1,26 @@ +Kernel driver omap_temp_sensor +== + +Supported chips: + * Texas Instruments OMAP4460 +Prefix: 'omap_temp_sensor' + +Author: +J Keerthy + +Description +--- + +The Texas Instruments OMAP4 family of chips have a bandgap temperature sensor. +The temperature sensor feature is used to convert the temperature of the device +into a decimal value coded on 10 bits. An internal ADC is used for conversion. +The recommended operating temperatures must be in the range -40 degree Celsius +to 123 degree celsius for standard conversion. +The thresholds are programmable and upon crossing the thresholds an interrupt +is generated. The OMAP temperature sensor has a programmable update rate in +milli seconds. +(Currently the driver programs a default of 2000 milliseconds). + +The driver provides the common sysfs-interface for temperatures (see +Documentation/hwmon/sysfs-interface under Temperatures). + diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 5f888f7..9c9cd8b 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -323,6 +323,17 @@ config SENSORS_F71805F This driver can also be built as a module. If so, the module will be called f71805f. +config SENSORS_OMAP_BANDGAP_TEMP_SENSOR + bool "OMAP on-die temperature sensor hwmon driver" + depends on HWMON && ARCH_OMAP && OMAP_TEMP_SENSOR + help + If you say yes here you get support for hardware + monitoring features of the OMAP on die temperature + sensor. + + Continuous conversion programmable delay + mode is used for temperature conversion. + config SENSORS_F71882FG tristate "Fintek F71882FG and compatibles" help diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 28061cf..d0f89f5 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -91,6 +91,7 @@ obj-$(CONFIG_SENSORS_MAX6639) += max6639.o obj-$(CONFIG_SENSORS_MAX6642) += max6642.o obj-$(CONFIG_SENSORS_MAX6650) += max6650.o obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o +obj-$(CONFIG_SENSORS_OMAP_BANDGAP_TEMP_SENSOR) += omap_temp_sensor.o obj-$(CONFIG_SENSORS_PC87360) += pc87360.o obj-$(CONFIG_SENSORS_PC87427) += pc87427.o obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o diff --git a/drivers/hwmon/omap_temp_sensor.c b/drivers/hwmon/omap_temp_sensor.c new file mode 100644 index 000..67fa424 --- /dev/null +++ b/drivers/hwmon/omap_temp_sensor.c @@ -0,0 +1,881 @@ +/* + * OMAP4 Temperature sensor driver file + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Author: J Keerthy + * Author: Moiz Sonasath + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TSHUT_HOT 920 /* 122 deg C */ +#define TSHUT_COLD 866 /* 100 deg C */ +#define T_HOT 800 /* 73 deg C */ +#define T_COLD 795 /* 71 deg C */ +#define OMAP_ADC_START_VALUE 530 +#define OMAP_ADC_END_VALUE 923 +#define MAX_FREQ 200 +#define MIN_FREQ 100 +#define MIN_TEMP -4
[PATCH 5/6 V4] OMAP4: Temperature sensor device support
The device file adds the device support for OMAP4
on die temperature sensor.
Signed-off-by: Keerthy
Cc: t...@atomide.com
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/temp_sensor_device.c | 188 ++
arch/arm/plat-omap/Kconfig | 12 ++
3 files changed, 201 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/temp_sensor_device.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2d5d981..5812fb4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common)
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
+obj-$(CONFIG_OMAP_TEMP_SENSOR) += temp_sensor_device.o
obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
# SMP support ONLY available for OMAP4
diff --git a/arch/arm/mach-omap2/temp_sensor_device.c
b/arch/arm/mach-omap2/temp_sensor_device.c
new file mode 100644
index 000..12d6789
--- /dev/null
+++ b/arch/arm/mach-omap2/temp_sensor_device.c
@@ -0,0 +1,188 @@
+/*
+ * OMAP on die Temperature sensor device file
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include "pm.h"
+#include
+
+
+int omap_temp_sensor_device_idle(struct omap_device *od)
+{
+ struct omap_temp_sensor_registers *registers;
+ struct resource*mem;
+ void__iomem *phy_base;
+ unsigned long timeout;
+ u32 ret = 0, temp;
+
+ mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
+ if (!mem) {
+ dev_err(&od->pdev.dev, "no mem resource\n");
+ ret = -EINVAL;
+ goto plat_res_err;
+ }
+
+ phy_base = ioremap(mem->start, resource_size(mem));
+
+ if (!phy_base) {
+ dev_err(&od->pdev.dev, "ioremap failed\n");
+ ret = -ENOMEM;
+ goto plat_res_err;
+ }
+
+ if (!strcmp(od->hwmods[0]->dev_attr, "mpu"))
+ registers = &omap_mpu_temp_sensor_registers;
+
+ temp = __raw_readl(phy_base + registers->temp_sensor_ctrl);
+ temp |= registers->bgap_tempsoff_mask;
+
+ /* BGAP_TEMPSOFF should be set to 1 before gating clock */
+ __raw_writel(temp, phy_base + registers->temp_sensor_ctrl);
+ temp = __raw_readl(phy_base + registers->bgap_status);
+ timeout = jiffies + msecs_to_jiffies(5);
+
+ /* wait till the clean stop bit is set or till the timeout expires */
+ while (!(temp | registers->status_clean_stop_mask) &&
+ !(time_after(jiffies, timeout))) {
+ temp = __raw_readl(phy_base + registers->bgap_status);
+ usleep_range(500, 2000);
+ }
+
+ if (time_after(jiffies, timeout))
+ dev_err(&od->pdev.dev, "Clean stop bit not set\n");
+
+ ret = omap_device_idle_hwmods(od);
+ iounmap(phy_base);
+plat_res_err:
+ return ret;
+}
+
+int omap_temp_sensor_device_activate(struct omap_device *od)
+{
+ struct omap_temp_sensor_registers *registers;
+ struct resource*mem;
+ void__iomem *phy_base;
+ u32 ret = 0, temp;
+
+ ret = omap_device_enable_hwmods(od);
+ if (ret < 0)
+ return ret;
+ mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
+ if (!mem) {
+ dev_err(&od->pdev.dev, "no mem resource\n");
+ return -EINVAL;
+ }
+
+ phy_base = ioremap(mem->start, resource_size(mem));
+ if (!phy_base) {
+ dev_err(&od->pdev.dev, "ioremap failed\n");
+ ret = -ENOMEM;
+ goto plat_res_err;
+ }
+
+ if (!strcmp(od->hwmods[0]->dev_attr, "mpu"))
+ registers = &omap_mpu_temp_sensor_registers;
+
+ temp = __raw_readl(phy_base + registers->temp_sensor_ctrl);
+ temp &= ~(registers->bgap_tempsoff_mask);
+ /* BGAP_TEMPSOFF should be reset to 0 */
+ __raw_writel(temp,
+ phy_base +
[PATCH 1/6 V4] OMAP4: Clock: Associate clocks for OMAP temperature sensor
div_ts_ck feeds only the temperature sensor functional clock
and also has a clksel associated (for divider selection). Mapping this
as the functional clock for the temperature sensor in clkdev table,
so a clk_set_rate() in the driver would have the effect of changing the
temperature sensor clock rate indirectly.
Signed-off-by: Keerthy
Reviewed-by: Rajendra Nayak
Cc: t...@atomide.com
Cc: rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 2af0e3f..4a788f4 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3187,7 +3187,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "bandgap_fclk", &bandgap_fclk,
CK_443X),
CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk,
CK_446X),
CLK(NULL, "des3des_fck", &des3des_fck,
CK_443X),
- CLK(NULL, "div_ts_ck",&div_ts_ck,
CK_446X),
+ CLK("omap_temp_sensor.0", "fck", &div_ts_ck,
CK_446X),
CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck,
CK_443X),
CLK(NULL, "dmic_fck", &dmic_fck,
CK_443X),
CLK(NULL, "dsp_fck", &dsp_fck,
CK_443X),
--
1.7.0.4
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[PATCH 4/6 V4] OMAP4: Hwmod: OMAP temperature sensor
From: Benoit Cousson
OMAP4460 temperature sensor hwmod cannot be auto generated
since it is part of ctrl module. Hence populating the
necessary hwmod info manually.
Signed-off-by: Benoit Cousson
Signed-off-by: Keerthy
Cc: t...@atomide.com
Cc: b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 61
1 files changed, 61 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 6201422..28bf6d3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include "omap_hwmod_common_data.h"
@@ -832,6 +833,63 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
};
/*
+ * 'temperature_sensor' class
+ * temperature sensor module inside the bandgap / control module
+ */
+
+static struct omap_hwmod_class omap44xx_temperature_sensor_hwmod_class = {
+ .name = "temperature_sensor",
+};
+
+static struct omap_hwmod_irq_info omap44xx_temperature_sensor_irqs[] = {
+ { .name = "thermal_alert", .irq = 126 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_temperature_sensor_addrs[] = {
+ {
+ .pa_start = 0x4a00232c,
+ .pa_end = 0x4a00238b,
+ },
+};
+
+static struct omap_hwmod omap44xx_temperature_sensor_hwmod;
+/* l4_cfg -> ctrl_module_core */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__temperature_sensor = {
+ .master = &omap44xx_l4_cfg_hwmod,
+ .slave = &omap44xx_temperature_sensor_hwmod,
+ .clk= "l4_div_ck",
+ .addr = omap44xx_temperature_sensor_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* ctrl_module_core slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_temperature_sensor_slaves[] = {
+ &omap44xx_l4_cfg__temperature_sensor,
+};
+
+/* temperature sensor dev_attr */
+static struct omap_temp_sensor_dev_attr temp_sensor_dev_attr = {
+ .name = "mpu",
+};
+
+static struct omap_hwmod omap44xx_temperature_sensor_hwmod = {
+ .name = "temperature_sensor_mpu",
+ .class = &omap44xx_temperature_sensor_hwmod_class,
+ .mpu_irqs = omap44xx_temperature_sensor_irqs,
+ .main_clk = "bandgap_ts_fclk",
+ .slaves = omap44xx_temperature_sensor_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_temperature_sensor_slaves),
+ .clkdm_name = "l4_wkup_clkdm",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,
+ },
+ },
+ .dev_attr = &temp_sensor_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
* 'bandgap' class
* bangap reference for ldo regulators
*/
@@ -5469,6 +5527,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_timer10_hwmod,
&omap44xx_timer11_hwmod,
+ /* temperature sensor hwmod */
+ &omap44xx_temperature_sensor_hwmod,
+
/* uart class */
&omap44xx_uart1_hwmod,
&omap44xx_uart2_hwmod,
--
1.7.0.4
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[PATCH 3/6 V4] OMAP4460: Temperature sensor data
The register set and the
bit fields might vary across OMAP versions. Hence
creating a structure comprising of all the registers
and bit fields to make the driver uniform for all the
versions with different register sets. The data file
contains the structure populated with register offsets
and bit fields corresponding to OMAP4460 on die sensor.
Signed-off-by: Keerthy
Cc: t...@atomide.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/temp_sensor4460_data.c | 63 +
.../plat-omap/include/plat/temperature_sensor.h| 93
3 files changed, 157 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/temp_sensor4460_data.c
create mode 100644 arch/arm/plat-omap/include/plat/temperature_sensor.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fb02937..2d5d981 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -86,7 +86,7 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o
prm2xxx_3xxx.o \
obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
cm44xx.o prcm_mpu44xx.o \
prminst44xx.o vc44xx_data.o \
- vp44xx_data.o
+ vp44xx_data.o temp_sensor4460_data.o
# OMAP voltage domains
ifeq ($(CONFIG_PM),y)
diff --git a/arch/arm/mach-omap2/temp_sensor4460_data.c
b/arch/arm/mach-omap2/temp_sensor4460_data.c
new file mode 100644
index 000..294963d
--- /dev/null
+++ b/arch/arm/mach-omap2/temp_sensor4460_data.c
@@ -0,0 +1,63 @@
+/*
+ * OMAP4460 on die Temperature sensor data file
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include
+#include "control.h"
+#include
+
+/*
+ * OMAP4460 has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+struct omap_temp_sensor_registers omap_mpu_temp_sensor_registers = {
+ .temp_sensor_ctrl = OMAP4460_TEMP_SENSOR_CTRL_OFFSET,
+ .bgap_tempsoff_mask = OMAP4460_BGAP_TEMPSOFF_MASK,
+ .bgap_soc_mask = OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK,
+ .bgap_eocz_mask = OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK,
+ .bgap_dtemp_mask= OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK,
+
+ .bgap_mask_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mask_hot_mask = OMAP4460_MASK_HOT_MASK,
+ .mask_cold_mask = OMAP4460_MASK_COLD_MASK,
+
+ .bgap_mode_ctrl = OMAP4460_BGAP_CTRL_OFFSET,
+ .mode_ctrl_mask = OMAP4460_SINGLE_MODE_MASK,
+
+ .bgap_counter = OMAP4460_BGAP_COUNTER_OFFSET,
+ .counter_mask = OMAP4460_COUNTER_MASK,
+
+ .bgap_threshold = OMAP4460_BGAP_THRESHOLD_OFFSET,
+ .threshold_thot_mask= OMAP4460_T_HOT_MASK,
+ .threshold_tcold_mask = OMAP4460_T_COLD_MASK,
+
+ .thsut_threshold= OMAP4460_BGAP_TSHUT_OFFSET,
+ .tshut_hot_mask = OMAP4460_TSHUT_HOT_MASK,
+ .tshut_cold_mask= OMAP4460_TSHUT_COLD_MASK,
+
+ .bgap_status= OMAP4460_BGAP_STATUS_OFFSET,
+ .status_clean_stop_mask = OMAP4460_CLEAN_STOP_MASK,
+ .status_bgap_alert_mask = OMAP4460_BGAP_ALERT_MASK,
+ .status_hot_mask= OMAP4460_HOT_FLAG_MASK,
+ .status_cold_mask = OMAP4460_COLD_FLAG_MASK,
+
+ .bgap_efuse = OMAP4460_FUSE_OPP_BGAP,
+};
diff --git a/arch/arm/plat-omap/include/plat/temperature_sensor.h
b/arch/arm/plat-omap/include/plat/temperature_sensor.h
new file mode 100644
index 000..9302ea8
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/temperature_sensor.h
@@ -0,0 +1,93 @@
+/*
+ * OMAP Temperature sensor header file
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Author: J Keerthy
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * ver
[PATCH 2/6 V4] OMAP4: Adding the temperature sensor register set bit fields
OMAP4460 specific temperature sensor register bit fields are added. Existing OMAP4 entries are renamed to OMAP4430. Signed-off-by: Keerthy Cc: t...@atomide.com --- .../include/mach/ctrl_module_core_44xx.h | 70 1 files changed, 57 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h index 2f7ac70..725c1e1 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h @@ -256,19 +256,63 @@ #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_SHIFT 0 #define OMAP4_LDOSRAMCORE_ACTMODE_VSET_OUT_MASK(0x1f << 0) -/* TEMP_SENSOR */ -#define OMAP4_BGAP_TEMPSOFF_SHIFT 12 -#define OMAP4_BGAP_TEMPSOFF_MASK (1 << 12) -#define OMAP4_BGAP_TSHUT_SHIFT 11 -#define OMAP4_BGAP_TSHUT_MASK (1 << 11) -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10 -#define OMAP4_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 10) -#define OMAP4_BGAP_TEMP_SENSOR_SOC_SHIFT 9 -#define OMAP4_BGAP_TEMP_SENSOR_SOC_MASK(1 << 9) -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8 -#define OMAP4_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 8) -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 -#define OMAP4_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0) +/* TEMP_SENSOR OMAP4430 */ +#define OMAP4430_BGAP_TEMPSOFF_SHIFT 12 +#define OMAP4430_BGAP_TEMPSOFF_MASK(1 << 12) +#define OMAP4430_BGAP_TSHUT_SHIFT 11 +#define OMAP4430_BGAP_TSHUT_MASK (1 << 11) +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 10 +#define OMAP4430_BGAP_TEMP_SENSOR_CONTCONV_MASK(1 << 10) +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_SHIFT9 +#define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK (1 << 9) +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_SHIFT 8 +#define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK(1 << 8) +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 +#define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) + +/* TEMP_SENSOR OMAP4460 */ +#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13 +#define OMAP4460_BGAP_TEMPSOFF_MASK(1 << 13) +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT11 +#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11) +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10 +#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK(1 << 10) +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 +#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) + +/* BANDGAP_CTRL */ +#define OMAP4460_SINGLE_MODE_SHIFT 31 +#define OMAP4460_SINGLE_MODE_MASK (1 << 31) +#define OMAP4460_MASK_HOT_SHIFT1 +#define OMAP4460_MASK_HOT_MASK (1 << 1) +#define OMAP4460_MASK_COLD_SHIFT 0 +#define OMAP4460_MASK_COLD_MASK(1 << 0) + +/* BANDGAP_COUNTER */ +#define OMAP4460_COUNTER_SHIFT 0 +#define OMAP4460_COUNTER_MASK (0xff << 0) + +/* BANDGAP_THRESHOLD */ +#define OMAP4460_T_HOT_SHIFT 16 +#define OMAP4460_T_HOT_MASK(0x3ff << 16) +#define OMAP4460_T_COLD_SHIFT 0 +#define OMAP4460_T_COLD_MASK (0x3ff << 0) + +/* TSHUT_THRESHOLD */ +#define OMAP4460_TSHUT_HOT_SHIFT 16 +#define OMAP4460_TSHUT_HOT_MASK(0x3ff << 16) +#define OMAP4460_TSHUT_COLD_SHIFT 0 +#define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0) + +/* BANDGAP_STATUS */ +#define OMAP4460_CLEAN_STOP_SHIFT 3 +#define OMAP4460_CLEAN_STOP_MASK (1 << 3) +#define OMAP4460_BGAP_ALERT_SHIFT 2 +#define OMAP4460_BGAP_ALERT_MASK (1 << 2) +#define OMAP4460_HOT_FLAG_SHIFT1 +#define OMAP4460_HOT_FLAG_MASK (1 << 1) +#define OMAP4460_COLD_FLAG_SHIFT 0 +#define OMAP4460_COLD_FLAG_MASK(1 << 0) /* DPLL_NWELL_TRIM_0 */ #define OMAP4_DPLL_ABE_NWELL_TRIM_MUX_CTRL_SHIFT 29 -- 1.7.0.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/6 V4] OMAP4: Temperature sensor driver
The patch series for the on die temperature sensor driver. The patch set has the device file, omap4 on die temperature sensor hwmon driver. hwmod, clk support. The patch set compiles on top of LO tree Master branch. This patch series is tested for boot-up on OMAP4460. The temperature reading and the interrupts generation on crossing the temperature thresholds also tested. V4: (1) Reordered the probe sequence in the driver. (2) Introduced iounmap in the driver in the error paths and remove function. (3) In case of user/application programming thresholds violating t_hot > t_cold condition, the driver automatically changes the other threshold to adhere to the condition. V3: (1) Fixed comments on the return values in the device file (2) Removed unnecessary error messages. (3) Redundant braces removed. (4) Implemented binary search in place of linear for temp to adc conversion. (5) Wrong usage of EINVAL corrected. V2: (1) Fixed comments on return values in the driver. (2) Moved the TEMPSOFF setting code to the activate/deactivate hooks. (3) Used idr to pass for the device id. Benoit Cousson (1): OMAP4: Hwmod: OMAP temperature sensor Keerthy (5): OMAP4: Clock: Associate clocks for OMAP temperature sensor OMAP4: Adding the temperature sensor register set bit fields OMAP4460: Temperature sensor data OMAP4: Temperature sensor device support hwmon: OMAP4: On die temperature sensor driver Documentation/hwmon/omap_temp_sensor | 26 + arch/arm/mach-omap2/Makefile |3 +- arch/arm/mach-omap2/clock44xx_data.c |2 +- .../include/mach/ctrl_module_core_44xx.h | 70 ++- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 61 ++ arch/arm/mach-omap2/temp_sensor4460_data.c | 63 ++ arch/arm/mach-omap2/temp_sensor_device.c | 188 + arch/arm/plat-omap/Kconfig | 12 + .../plat-omap/include/plat/temperature_sensor.h| 93 ++ drivers/hwmon/Kconfig | 11 + drivers/hwmon/Makefile |1 + drivers/hwmon/omap_temp_sensor.c | 881 12 files changed, 1396 insertions(+), 15 deletions(-) create mode 100644 Documentation/hwmon/omap_temp_sensor create mode 100644 arch/arm/mach-omap2/temp_sensor4460_data.c create mode 100644 arch/arm/mach-omap2/temp_sensor_device.c create mode 100644 arch/arm/plat-omap/include/plat/temperature_sensor.h create mode 100644 drivers/hwmon/omap_temp_sensor.c -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] iommu: omap_iovmm: support non page-aligned buffers in iommu_vmap
Hi Laurent, Joerg, On Wed, Aug 31, 2011 at 7:56 PM, Laurent Pinchart wrote: > On Wednesday 31 August 2011 15:06:42 Roedel, Joerg wrote: >> Do you mean the parts of the pages you map to the device that are not in >> the requested range (basically everything before offset and all after >> size)? >> This issue exists in other iommu drivers as well. It is inherent to how >> the dma-api is defined and how the iommu hardware works. >> The dma-api can work on byte granularity while the hardware usually only >> works on page granularity. > > True, but if we implement address rounding transparently in the IOMMU layer > Ohad's concern can be valid, depending on whether the device is trusted. If we > decide to push address rounding to the drivers that decision can be made on a > per-device basis. However, drivers are usually not aware of what granularity > the IOMMU works on, so that wouldn't be straightforward and clean. I think the confusion lies in the fact that omap's iovmm should be treated as the DMA-API (which will soon replace it altogether anyway) and not as an IOMMU driver, and in that sense, Laurent's patch does sound reasonable. However, one needs to keep this in mind (e.g. map only page-aligned buffers ?) when using the upcoming iommu-based DMA-API with untrusted devices (such as remote processors running arbitrary code). It is completely wrong to allow these devices access to random physical memory regions. We might want to come up with a way to prevent this from happening... Thanks, Ohad. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] iommu: omap_iovmm: support non page-aligned buffers in iommu_vmap
Hi Joerg, On Wednesday 31 August 2011 15:06:42 Roedel, Joerg wrote: > On Wed, Aug 31, 2011 at 06:52:08AM -0400, Ohad Ben-Cohen wrote: > > On Mon, Aug 29, 2011 at 10:36 PM, Ohad Ben-Cohen wrote: > > > From: Laurent Pinchart > > > > > > omap_iovmm requires page-aligned buffers, and that sometimes causes > > > omap3isp failures (i.e. whenever the buffer passed from userspace is > > > not page-aligned). > > > > > > Remove this limitation by rounding the address of the first page entry > > > down, and adding the offset back to the device address. > > > > I'm having second thoughts about this. > > > > Obviously it works for omap3isp and its users because the buffer gets > > mapped and everyone is happy. > > > > But I'm not sure this is a valid IOMMU interface that the kernel > > should have, because effectively we're now mapping physical memory > > which nobody asked us to, and which might contain sensitive stuff we > > don't want to give the device (e.g. a remote processor which might be > > running rogue code) access to. > > > > Thoughts ? > > Do you mean the parts of the pages you map to the device that are not in > the requested range (basically everything before offset and all after > size)? > This issue exists in other iommu drivers as well. It is inherent to how > the dma-api is defined and how the iommu hardware works. > The dma-api can work on byte granularity while the hardware usually only > works on page granularity. True, but if we implement address rounding transparently in the IOMMU layer Ohad's concern can be valid, depending on whether the device is trusted. If we decide to push address rounding to the drivers that decision can be made on a per-device basis. However, drivers are usually not aware of what granularity the IOMMU works on, so that wouldn't be straightforward and clean. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
Am Mittwoch 31 August 2011, 18:12:48 schrieb Marc Zyngier: > [...] > Oddly enough, this patch doesn't do anything on my Tegra setup. In both > cases, I get around 17MB/s from a crap SD card plugged in a USB reader. > > This leads me to suspect that this issue is very much OMAP4 specific. > Can anyone verify this theory on other some A9 platforms? That's odd. On my Tegra2 (on ac100) it boosts the transfer rate from 7 to 17 MB/s. Marc -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mfd: Combine MFD_SUPPORT and MFD_CORE
On Monday 29 August 2011, Luciano Coelho wrote: > From: Randy Dunlap > > Combine MFD_SUPPORT (which only enabled the remainder of the MFD > menu) and MFD_CORE. This allows other drivers to select MFD_CORE > without needing to also select MFD_SUPPORT, which fixes some > kconfig unmet dependency warnings. Modeled after I2C kconfig. > > [Forward-ported to 3.1-rc4. This fixes a warning when some drivers, > such as RADIO_WL1273, are selected, but MFD_SUPPORT is not. -- Luca] > > Signed-off-by: Randy Dunlap > Reported-by: Johannes Berg > Cc: Jean Delvare > Cc: Tony Lindgren > Cc: Grant Likely > Signed-off-by: Luciano Coelho > --- > > I guess this should fix the problem. I've simple forward-ported > Randy's patch to the latest mainline kernel. I don't know via which > tree this should go in, though. > > NOTE: I have not tested this very thoroughly. But at least > omap2plus stuff seems to work okay with this change. MFD_SUPPORT is > also selected by a couple of "tile" platforms defconfigs, but I guess > the Kconfig system should take care of it. Doing this is a good idea, but incidentally I have just spent some time with the same problem and ended up with a solution that I like better, which is removing CONFIG_MFD_SUPPORT altogether. The point is that there is no use enabling MFD_CORE if you don't also enable any of the specific drivers. MFD_SUPPORT was added as a 'menuconfig' before we had Kconfig warn about broken dependencies, so everything was fine. Since Kconfig now issues the warnings, I think it would be better to just turn the MFD menu into a plain 'menu' and remove all the 'depends on MFD_SUPPORT' and 'select MFD_SUPPORT' lines from the other Kconfig files. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mfd: Combine MFD_SUPPORT and MFD_CORE
Hi Luciano, On Mon, 29 Aug 2011 21:41:47 +0300, Luciano Coelho wrote: > From: Randy Dunlap > > Combine MFD_SUPPORT (which only enabled the remainder of the MFD > menu) and MFD_CORE. This allows other drivers to select MFD_CORE > without needing to also select MFD_SUPPORT, which fixes some > kconfig unmet dependency warnings. Modeled after I2C kconfig. > > [Forward-ported to 3.1-rc4. This fixes a warning when some drivers, > such as RADIO_WL1273, are selected, but MFD_SUPPORT is not. -- Luca] I like the idea in general, this makes things much simpler. There is at least one issue with your current implementation though. "make oldconfig" has this to complain about: drivers/mfd/Kconfig:5:error: recursive dependency detected! drivers/mfd/Kconfig:5: symbol MFD_CORE is selected by OLPC_XO1_PM arch/x86/Kconfig:2028: symbol OLPC_XO1_PM depends on MFD_CS5535 drivers/mfd/Kconfig:613:symbol MFD_CS5535 depends on MFD_CORE Not sure if it is really caused by your patch or only revealed by it, but it should be fixed anyway. The following should fix it, please consider folding in your patch: --- linux-3.1-rc4.orig/arch/x86/Kconfig 2011-08-16 11:49:42.0 +0200 +++ linux-3.1-rc4/arch/x86/Kconfig 2011-08-31 16:54:09.0 +0200 @@ -2028,7 +2028,6 @@ config OLPC config OLPC_XO1_PM bool "OLPC XO-1 Power Management" depends on OLPC && MFD_CS5535 && PM_SLEEP - select MFD_CORE ---help--- Add support for poweroff and suspend of the OLPC XO-1 laptop. @@ -2044,7 +2043,6 @@ config OLPC_XO1_SCI depends on OLPC && OLPC_XO1_PM select POWER_SUPPLY select GPIO_CS5535 - select MFD_CORE ---help--- Add support for SCI-based features of the OLPC XO-1 laptop: - EC-driven system wakeups > > Signed-off-by: Randy Dunlap > Reported-by: Johannes Berg > Cc: Jean Delvare > Cc: Tony Lindgren > Cc: Grant Likely > Signed-off-by: Luciano Coelho > --- > > I guess this should fix the problem. I've simple forward-ported > Randy's patch to the latest mainline kernel. I don't know via which > tree this should go in, though. Samuel Ortiz is the maintainer of the mfd subsystem, so his tree would be an obvious choice. > NOTE: I have *not* tested this very thoroughly. But at least > omap2plus stuff seems to work okay with this change. MFD_SUPPORT is > also selected by a couple of "tile" platforms defconfigs, but I guess > the Kconfig system should take care of it. I can't test it either, but it looks sane to me. If you merge the proposed changes above, you can add: Acked-by: Jean Delvare -- Jean Delvare -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On 31/08/11 16:27, Mark Salter wrote: > On Wed, 2011-08-31 at 16:21 +0100, Will Deacon wrote: >> On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote: >>> On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote: On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote: > One question: why this write buffer issue did not happen at UP ARM V7 > platform, whose dma buffer > also uncache, but bufferable? Which CPU was on this platform? >>> >>> Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a >>> usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing >>> nosmp on the commandline, I see 20.3MB/s. >>> >>> Can someone explain why nosmp would make such a difference? >> >> Oh gawd, that's horrible. I have a feeling it's probably a separate issue >> though, caused by: >> >> omap_modify_auxcoreboot0(0x200, 0xfdff); >> >> in boot_secondary for OMAP. Unfortunately I have no idea what that line is >> doing because it ends up talking to the secure monitor. > > Okay, I may poke around a bit with that to see I can get a better > understanding. > > With the patched ehci-q.c, I see no noticeable difference between smp > and nosmp. Both get me around 23.5MB/s with my setup. Oddly enough, this patch doesn't do anything on my Tegra setup. In both cases, I get around 17MB/s from a crap SD card plugged in a USB reader. This leads me to suspect that this issue is very much OMAP4 specific. Can anyone verify this theory on other some A9 platforms? Cheers, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
status request of et8k8, ad5820 and their corresponding rx51 board code
Hi, What's the plan for the rx51 camera drivers from [0]? Is there a chance, that they get included in the mainline 3.2 or 3.3 kernel? [0] http://git.linuxtv.org/pinchartl/media.git/shortlog/refs/heads/omap3isp-2.6.37-rx51 -- Sebastian signature.asc Description: Digital signature
[PATCH 14/14] omap: mcbsp: Start generalize signal muxing functions
This generalizes the omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src
implementation between generic McBSP and OMAP2 specific McBSP code. These
functions are used to select source for CLKR and FSR signals on OMAP2+.
Start generalizing the code by implementing an optional mux_signal function
pointer in platform data that will implement the actual muxing and which is
called now from omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src.
These functions are to be removed later and cleanup the API so that
mux_signal gets its arguments directly from client code.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap2/mcbsp.c | 43 +-
arch/arm/plat-omap/include/plat/mcbsp.h |1 +
arch/arm/plat-omap/mcbsp.c | 36 --
3 files changed, 53 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 8a534b9..9c3c51e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -34,33 +34,36 @@
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
-/* McBSP internal signal muxing functions */
-
-void omap2_mcbsp1_mux_clkr_src(u8 mux)
+/* McBSP internal signal muxing function */
+static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
+ const char *src)
{
u32 v;
v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
- if (mux == CLKR_SRC_CLKR)
- v &= ~OMAP2_MCBSP1_CLKR_MASK;
- else if (mux == CLKR_SRC_CLKX)
- v |= OMAP2_MCBSP1_CLKR_MASK;
- omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-}
-EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
-void omap2_mcbsp1_mux_fsr_src(u8 mux)
-{
- u32 v;
+ if (!strcmp(signal, "clkr")) {
+ if (!strcmp(src, "clkr"))
+ v &= ~OMAP2_MCBSP1_CLKR_MASK;
+ else if (!strcmp(src, "clkx"))
+ v |= OMAP2_MCBSP1_CLKR_MASK;
+ else
+ return -EINVAL;
+ } else if (!strcmp(signal, "fsr")) {
+ if (!strcmp(src, "fsr"))
+ v &= ~OMAP2_MCBSP1_FSR_MASK;
+ else if (!strcmp(src, "fsx"))
+ v |= OMAP2_MCBSP1_FSR_MASK;
+ else
+ return -EINVAL;
+ } else {
+ return -EINVAL;
+ }
- v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
- if (mux == FSR_SRC_FSR)
- v &= ~OMAP2_MCBSP1_FSR_MASK;
- else if (mux == FSR_SRC_FSX)
- v |= OMAP2_MCBSP1_FSR_MASK;
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
+
+ return 0;
}
-EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
/* McBSP CLKS source switching function */
static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
@@ -181,6 +184,8 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
return PTR_ERR(od);
}
pdata->set_clk_src = omap2_mcbsp_set_clk_src;
+ if (id == 1)
+ pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
omap_mcbsp_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index c8ebfc9..8fa74e2 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -309,6 +309,7 @@ struct omap_mcbsp_platform_data {
bool has_ccr; /* Transceiver has configuration control registers */
int (*enable_st_clock)(unsigned int, bool);
int (*set_clk_src)(struct device *dev, struct clk *clk, const char
*src);
+ int (*mux_signal)(struct device *dev, const char *signal, const char
*src);
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 38b67d9..4b15cd7 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -922,21 +922,41 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
-#ifndef CONFIG_ARCH_OMAP2PLUS
void omap2_mcbsp1_mux_clkr_src(u8 mux)
{
- WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
-__func__);
- return;
+ struct omap_mcbsp *mcbsp;
+ const char *src;
+
+ if (mux == CLKR_SRC_CLKR)
+ src = "clkr";
+ else if (mux == CLKR_SRC_CLKX)
+ src = "clkx";
+ else
+ return;
+
+ mcbsp = id_to_mcbsp_ptr(0);
+ if (mcbsp->pdata->mux_signal)
+ mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src);
}
+EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
void omap2_mcbsp1_mux_fsr_src(u8 mux)
{
- WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
-__func__);
- return;
+ struct omap_mcbsp *mcbsp;
+ const char *src;
+
+ if (mux == FSR_SRC_FSR)
+ src = "fsr";
+ else if (mux == FSR_SRC_FSX)
+
[PATCH 13/14] omap: mcbsp: Start generalize omap2_mcbsp_set_clks_src
This generalizes the omap2_mcbsp_set_clks_src implementation between generic
McBSP and OMAP2 specific McBSP code. Currently this function is used to
select either internal fclk or clks pin as a McBSP CLKS source on OMAP2+.
Implement generalization by having an optional set_clk_src function pointer
in platform data that is used to select parent for a given clock. Idea is to
pass higher level source clock name (later coming from client driver) that
platform specific code will map to platform specific clock name.
API cleanup between McBSP and client code comes later.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap2/mcbsp.c | 25 ---
arch/arm/plat-omap/include/plat/mcbsp.h |5 +---
arch/arm/plat-omap/mcbsp.c | 33 +++---
3 files changed, 35 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index bc51424..8a534b9 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -63,37 +63,30 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux)
EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
/* McBSP CLKS source switching function */
-
-int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
+static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
+ const char *src)
{
- struct omap_mcbsp *mcbsp;
struct clk *fck_src;
char *fck_src_name;
int r;
- if (!omap_mcbsp_check_valid_id(id)) {
- pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
- return -EINVAL;
- }
- mcbsp = id_to_mcbsp_ptr(id);
-
- if (fck_src_id == MCBSP_CLKS_PAD_SRC)
+ if (!strcmp(src, "clks_ext"))
fck_src_name = "pad_fck";
- else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
+ else if (!strcmp(src, "clks_fclk"))
fck_src_name = "prcm_fck";
else
return -EINVAL;
- fck_src = clk_get(mcbsp->dev, fck_src_name);
+ fck_src = clk_get(dev, fck_src_name);
if (IS_ERR_OR_NULL(fck_src)) {
pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
fck_src_name);
return -EINVAL;
}
- pm_runtime_put_sync(mcbsp->dev);
+ pm_runtime_put_sync(dev);
- r = clk_set_parent(mcbsp->fclk, fck_src);
+ r = clk_set_parent(clk, fck_src);
if (IS_ERR_VALUE(r)) {
pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
"clks", fck_src_name);
@@ -101,13 +94,12 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
return -EINVAL;
}
- pm_runtime_get_sync(mcbsp->dev);
+ pm_runtime_get_sync(dev);
clk_put(fck_src);
return 0;
}
-EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
@@ -188,6 +180,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
name, oh->name);
return PTR_ERR(od);
}
+ pdata->set_clk_src = omap2_mcbsp_set_clk_src;
omap_mcbsp_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index af5824a..c8ebfc9 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -296,7 +296,6 @@ typedef enum {
struct omap_mcbsp_ops {
void (*request)(unsigned int);
void (*free)(unsigned int);
- int (*set_clks_src)(u8, u8);
};
struct omap_mcbsp_platform_data {
@@ -309,6 +308,7 @@ struct omap_mcbsp_platform_data {
bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
int (*enable_st_clock)(unsigned int, bool);
+ int (*set_clk_src)(struct device *dev, struct clk *clk, const char
*src);
};
struct omap_mcbsp_st_data {
@@ -359,9 +359,6 @@ struct omap_mcbsp_dev_attr {
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count;
-#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
-#define id_to_mcbsp_ptr(id)mcbsp_ptr[id];
-
int omap_mcbsp_init(void);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *
config);
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f92227f..38b67d9 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -29,6 +29,9 @@
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count;
+#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
+#define id_to_mcbsp_ptr(id)mcbsp_ptr[id];
+
static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
@@ -894,18 +897,32 @@ void omap_mcbsp_stop(uns
[PATCH 11/14] omap: mcbsp: Update mcbsp.h include dependencies
hardware.h is not needed here and let the definition for struct clk to come via linux/clk.h. Signed-off-by: Jarkko Nikula --- arch/arm/plat-omap/include/plat/mcbsp.h |4 +--- 1 files changed, 1 insertions(+), 3 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 9802055..5d657d9 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -25,9 +25,7 @@ #define __ASM_ARCH_OMAP_MCBSP_H #include - -#include -#include +#include /* macro for building platform_device for McBSP ports */ #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr)\ -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/14] omap: mcbsp: Cleanup sidetone control initialization and make it generic
Sidetone resource is already registered for a device so there is no need
for cpu_is_omap34xx() and McBSP port number tests in the driver. We can
cleanup and make the code generic by dropping remaining CONFIG_ARCH_OMAP3
conditional compilations and then using sidetone resource and st_data
variable for runtime tests.
Signed-off-by: Jarkko Nikula
---
arch/arm/plat-omap/include/plat/mcbsp.h | 12 --
arch/arm/plat-omap/mcbsp.c | 67 ++-
2 files changed, 22 insertions(+), 57 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index e451a6e..9802055 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -353,9 +353,7 @@ struct omap_mcbsp {
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
-#endif
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
@@ -402,21 +400,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux);
int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
-#ifdef CONFIG_ARCH_OMAP3
/* Sidetone specific API */
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain);
int omap_st_enable(unsigned int id);
int omap_st_disable(unsigned int id);
int omap_st_is_enabled(unsigned int id);
-#else
-static inline int omap_st_set_chgain(unsigned int id, int channel,
-s16 chgain) { return 0; }
-static inline int omap_st_get_chgain(unsigned int id, int channel,
-s16 *chgain) { return 0; }
-static inline int omap_st_enable(unsigned int id) { return 0; }
-static inline int omap_st_disable(unsigned int id) { return 0; }
-static inline int omap_st_is_enabled(unsigned int id) { return 0; }
-#endif
#endif
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e96d747..f92227f 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -55,7 +55,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg,
bool from_cache)
}
}
-#ifdef CONFIG_ARCH_OMAP3
static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
__raw_writel(val, mcbsp->st_data->io_base_st + reg);
@@ -65,7 +64,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16
reg)
{
return __raw_readl(mcbsp->st_data->io_base_st + reg);
}
-#endif
#define MCBSP_READ(mcbsp, reg) \
omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
@@ -248,7 +246,6 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int
stream)
}
EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
-#ifdef CONFIG_ARCH_OMAP3
static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
@@ -482,11 +479,6 @@ int omap_st_is_enabled(unsigned int id)
}
EXPORT_SYMBOL(omap_st_is_enabled);
-#else
-static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
-static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
-#endif
-
/*
* omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
* The threshold parameter is 1 based, and it is converted (threshold - 1)
@@ -802,7 +794,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
}
mcbsp = id_to_mcbsp_ptr(id);
- if (cpu_is_omap34xx())
+ if (mcbsp->st_data)
omap_st_start(mcbsp);
/* Only enable SRG, if McBSP is master */
@@ -897,7 +889,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
}
- if (cpu_is_omap34xx())
+ if (mcbsp->st_data)
omap_st_stop(mcbsp);
}
EXPORT_SYMBOL(omap_mcbsp_stop);
@@ -1030,7 +1022,6 @@ static const struct attribute_group additional_attr_group
= {
.attrs = (struct attribute **)additional_attrs,
};
-#ifdef CONFIG_ARCH_OMAP3
static ssize_t st_taps_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1098,10 +1089,9 @@ static const struct attribute_group sidetone_attr_group
= {
.attrs = (struct attribute **)sidetone_attrs,
};
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
+static int __devinit omap_st_add(struct omap_mcbsp *mcbsp,
+struct resource *res)
{
- struct platform_device *pdev;
- struct resource *res;
struct omap_mcbsp_st_data *st_data;
int err;
@@ -,9 +1101,6 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
goto err1;
}
- pdev = container_of(mcbsp->dev, struct platform_device, dev);
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
st_data->io_base_st = iorem
[PATCH 12/14] omap: mcbsp: Move address definitions to arch/arm/mach-omap1/mcbsp.c
These address definitions are OMAP1 specific can be in single source file.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap1/mcbsp.c | 11 +++
arch/arm/plat-omap/include/plat/mcbsp.h | 11 ---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 36ab5d8..91f9abb 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -79,6 +79,17 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
.free = omap1_mcbsp_free,
};
+#define OMAP7XX_MCBSP1_BASE0xfffb1000
+#define OMAP7XX_MCBSP2_BASE0xfffb1800
+
+#define OMAP1510_MCBSP1_BASE 0xe1011800
+#define OMAP1510_MCBSP2_BASE 0xfffb1000
+#define OMAP1510_MCBSP3_BASE 0xe1017000
+
+#define OMAP1610_MCBSP1_BASE 0xe1011800
+#define OMAP1610_MCBSP2_BASE 0xfffb1000
+#define OMAP1610_MCBSP3_BASE 0xe1017000
+
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
struct resource omap7xx_mcbsp_res[][6] = {
{
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 5d657d9..af5824a 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -38,17 +38,6 @@ static struct platform_device omap_mcbsp##port_nr = {
\
#define MCBSP_CONFIG_TYPE3 0x3
#define MCBSP_CONFIG_TYPE4 0x4
-#define OMAP7XX_MCBSP1_BASE0xfffb1000
-#define OMAP7XX_MCBSP2_BASE0xfffb1800
-
-#define OMAP1510_MCBSP1_BASE 0xe1011800
-#define OMAP1510_MCBSP2_BASE 0xfffb1000
-#define OMAP1510_MCBSP3_BASE 0xe1017000
-
-#define OMAP1610_MCBSP1_BASE 0xe1011800
-#define OMAP1610_MCBSP2_BASE 0xfffb1000
-#define OMAP1610_MCBSP3_BASE 0xe1017000
-
/* McBSP register numbers. Register address offset = num * reg_step */
enum {
/* Common registers */
--
1.7.5.4
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: status request of et8k8, ad5820 and their corresponding rx51 board code
Hi Sebastian, (CC'ing Sakari Ailus) On Wednesday 31 August 2011 17:15:24 Sebastian Reichel wrote: > Hi, > > What's the plan for the rx51 camera drivers from [0]? Is there a > chance, that they get included in the mainline 3.2 or 3.3 kernel? The ad5820 driver will probably be the simplest one to upstream. It should be possible to push it to v3.3. Someone needs to look at the lens-related controls and how they can be standardized (if at all). The et8ek8 driver is a different story. I don't think it should get mainlined in its current state. We need to get rid of the "camera firmware" support from the driver first, and if possible implement the V4L2 API correctly without relying on register lists. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, 2011-08-31 at 16:21 +0100, Will Deacon wrote: > On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote: > > On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote: > > > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote: > > > > One question: why this write buffer issue did not happen at UP ARM V7 > > > > platform, whose dma buffer > > > > also uncache, but bufferable? > > > > > > Which CPU was on this platform? > > > > Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a > > usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing > > nosmp on the commandline, I see 20.3MB/s. > > > > Can someone explain why nosmp would make such a difference? > > Oh gawd, that's horrible. I have a feeling it's probably a separate issue > though, caused by: > > omap_modify_auxcoreboot0(0x200, 0xfdff); > > in boot_secondary for OMAP. Unfortunately I have no idea what that line is > doing because it ends up talking to the secure monitor. Okay, I may poke around a bit with that to see I can get a better understanding. With the patched ehci-q.c, I see no noticeable difference between smp and nosmp. Both get me around 23.5MB/s with my setup. --Mark -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 07/14] omap: mcbsp: Make threshold based transfer code generic
Remove CONFIG_ARCH_OMAP3 conditional compilation and cpu_is_omap34xx test
around buffer threshold based transfer and DMA operating mode control. Use
instead the buffer_size in platform data to determine when these sysfs
controls are exposed and when to access related McBSP registers. Rationale
for this is to make code generic and to allow to use it on OMAP4 that also
supports threshold based transfers.
Currently buffer_size variable is set only for OMAP3 SoCs but it is easy
to extend to OMAP4 and any later OMAP version.
Signed-off-by: Jarkko Nikula
---
arch/arm/plat-omap/include/plat/mcbsp.h | 15 +
arch/arm/plat-omap/mcbsp.c | 120 +++
2 files changed, 59 insertions(+), 76 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index eed20ef..0fad63c 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -354,10 +354,10 @@ struct omap_mcbsp {
struct clk *fclk;
#ifdef CONFIG_ARCH_OMAP3
struct omap_mcbsp_st_data *st_data;
+#endif
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
-#endif
void *reg_cache;
};
@@ -377,7 +377,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
int omap_mcbsp_init(void);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *
config);
-#ifdef CONFIG_ARCH_OMAP3
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
@@ -386,18 +385,6 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id);
u16 omap_mcbsp_get_tx_delay(unsigned int id);
u16 omap_mcbsp_get_rx_delay(unsigned int id);
int omap_mcbsp_get_dma_op_mode(unsigned int id);
-#else
-static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0;
}
-static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0;
}
-static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
-static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
-#endif
int omap_mcbsp_request(unsigned int id);
void omap_mcbsp_free(unsigned int id);
void omap_mcbsp_start(unsigned int id, int tx, int rx);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 97bcbfa..234ab16 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -492,6 +492,11 @@ int omap_st_is_enabled(unsigned int id)
}
EXPORT_SYMBOL(omap_st_is_enabled);
+#else
+static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
+static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
+#endif
+
/*
* omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
* The threshold parameter is 1 based, and it is converted (threshold - 1)
@@ -501,14 +506,13 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16
threshold)
{
struct omap_mcbsp *mcbsp;
- if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
- return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return;
if (threshold && threshold <= mcbsp->max_tx_thres)
MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
@@ -524,14 +528,13 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16
threshold)
{
struct omap_mcbsp *mcbsp;
- if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
- return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return;
if (threshold && threshold <= mcbsp->max_rx_thres)
MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
@@ -601,6 +604,8 @@ u16 omap_mcbsp_get_tx_delay(unsigned int id)
return -ENODEV;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return 0;
/* Returns the number of free locations in the buffer */
buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
@@ -624,6 +629,8 @@ u16 omap_mcbsp_get_rx_delay(unsigned int id)
return -ENODEV;
}
mcbsp = id_to_mcbsp_ptr(id);
+ if (mcbsp->pdata->buffer_size == 0)
+ return 0;
/* Returns the number of used locations in the buffer */
buffst
[PATCH 04/14] omap: mcbsp: Implement generic register access
Register access can be made more generic by calculating register address
offsets runtime from common register definitions and by using reg_size and
reg_step variables that are passed via platform data. Common register
definitions are possible since McBSP registers are ordered similarly between
OMAP versions.
Remove also references to OMAP2+ specific config_type variable from generic
McBSP code since other variables and feature flags are better to carry needed
information from platform code.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap1/mcbsp.c |2 +
arch/arm/mach-omap2/mcbsp.c |6 +-
arch/arm/plat-omap/include/plat/mcbsp.h | 145 ---
arch/arm/plat-omap/mcbsp.c | 45 --
4 files changed, 82 insertions(+), 116 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 3c985ac..36ab5d8 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -391,6 +391,8 @@ static void omap_mcbsp_register_board_cfg(struct resource
*res, int res_count,
continue;
platform_device_add_resources(new_mcbsp, &res[i * res_count],
res_count);
+ config[i].reg_size = 2;
+ config[i].reg_step = 2;
new_mcbsp->dev.platform_data = &config[i];
ret = platform_device_add(new_mcbsp);
if (ret) {
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 4a6ef6a..a157e3e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -126,7 +126,11 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
return -ENOMEM;
}
- pdata->mcbsp_config_type = oh->class->rev;
+ pdata->reg_step = 4;
+ if (oh->class->rev < MCBSP_CONFIG_TYPE2)
+ pdata->reg_size = 2;
+ else
+ pdata->reg_size = 4;
if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 7adfd92..14bc1cb 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -51,93 +51,60 @@ static struct platform_device omap_mcbsp##port_nr = {
\
#define OMAP1610_MCBSP2_BASE 0xfffb1000
#define OMAP1610_MCBSP3_BASE 0xe1017000
-#ifdef CONFIG_ARCH_OMAP1
-
-#define OMAP_MCBSP_REG_DRR20x00
-#define OMAP_MCBSP_REG_DRR10x02
-#define OMAP_MCBSP_REG_DXR20x04
-#define OMAP_MCBSP_REG_DXR10x06
-#define OMAP_MCBSP_REG_DRR 0x02
-#define OMAP_MCBSP_REG_DXR 0x06
-#define OMAP_MCBSP_REG_SPCR2 0x08
-#define OMAP_MCBSP_REG_SPCR1 0x0a
-#define OMAP_MCBSP_REG_RCR20x0c
-#define OMAP_MCBSP_REG_RCR10x0e
-#define OMAP_MCBSP_REG_XCR20x10
-#define OMAP_MCBSP_REG_XCR10x12
-#define OMAP_MCBSP_REG_SRGR2 0x14
-#define OMAP_MCBSP_REG_SRGR1 0x16
-#define OMAP_MCBSP_REG_MCR20x18
-#define OMAP_MCBSP_REG_MCR10x1a
-#define OMAP_MCBSP_REG_RCERA 0x1c
-#define OMAP_MCBSP_REG_RCERB 0x1e
-#define OMAP_MCBSP_REG_XCERA 0x20
-#define OMAP_MCBSP_REG_XCERB 0x22
-#define OMAP_MCBSP_REG_PCR00x24
-#define OMAP_MCBSP_REG_RCERC 0x26
-#define OMAP_MCBSP_REG_RCERD 0x28
-#define OMAP_MCBSP_REG_XCERC 0x2A
-#define OMAP_MCBSP_REG_XCERD 0x2C
-#define OMAP_MCBSP_REG_RCERE 0x2E
-#define OMAP_MCBSP_REG_RCERF 0x30
-#define OMAP_MCBSP_REG_XCERE 0x32
-#define OMAP_MCBSP_REG_XCERF 0x34
-#define OMAP_MCBSP_REG_RCERG 0x36
-#define OMAP_MCBSP_REG_RCERH 0x38
-#define OMAP_MCBSP_REG_XCERG 0x3A
-#define OMAP_MCBSP_REG_XCERH 0x3C
-
-/* Dummy defines, these are not available on omap1 */
-#define OMAP_MCBSP_REG_XCCR0x00
-#define OMAP_MCBSP_REG_RCCR0x00
-
-#else
-
-#define OMAP_MCBSP_REG_DRR20x00
-#define OMAP_MCBSP_REG_DRR10x04
-#define OMAP_MCBSP_REG_DXR20x08
-#define OMAP_MCBSP_REG_DXR10x0C
-#define OMAP_MCBSP_REG_DRR 0x00
-#define OMAP_MCBSP_REG_DXR 0x08
-#define OMAP_MCBSP_REG_SPCR2 0x10
-#define OMAP_MCBSP_REG_SPCR1 0x14
-#define OMAP_MCBSP_REG_RCR20x18
-#define OMAP_MCBSP_REG_RCR10x1C
-#define OMAP_MCBSP_REG_XCR20x20
-#define OMAP_MCBSP_REG_XCR10x24
-#define OMAP_MCBSP_REG_SRGR2 0x28
-#define OMAP_MCBSP_REG_SRGR1 0x2C
-#define OMAP_MCBSP_REG_MCR20x30
-#define OMAP_MCBSP_REG_MCR10x34
-#define OMAP_MCBSP_REG_RCERA 0x38
-#define OMAP_MCBSP_REG_RCERB 0x3C
-#define OMAP_MCBSP_REG_XCERA 0x40
-#define OMAP_MCBSP_REG_XCERB 0x44
-#define OMAP_MCBSP_REG_PCR00x48
-#define OMAP_MCBSP_REG_RCERC 0x4C
-#define OMAP_MCBSP_REG_RCERD 0x50
-#define OMAP_MCBSP_REG_XCERC 0x54
-#define OMAP_MCBSP_REG_XCERD 0x58
-#define OMAP_MCBSP_REG_RCERE 0x5C
-#define OMAP_MCBSP_REG_RCERF 0x60
-#define OMAP_MCBSP_REG_XCERE 0x64
-#define OMAP_MCBSP_REG_XCERF 0x68
-#define OMAP_MCBSP_REG_RCERG 0x6C
-#define OMAP_MCBSP_REG_RCERH
[PATCH 00/14] McBSP cleanup and generalization
Hi Updates and continuation to my McBSP cleanup RFC set I sent before vacation period. Motivation here is to get rid off all is_omap and CONFIG_ARCH stuff and to make code a step more generic (and for preparing to move code out under arch/arm/). I hope this version doesn't break OMAP1. I suppose it should work now as the register and dma addresses are calculated from common register numbers and not by mangling from OMAP2+ register offsets (Thanks for Janusz Krzysztofik for the idea). Also MCBSP_CONFIG_TYPEx defines are not used to replace is_omap tests in plat/mcbsp.c in this version but by using a feature flags (Thanks for Charulatha V for the idea). Note that patch 01/14 has from address to my disabled google account. This is since the patch is already committed in to for_3.2/omap_device branch of Kevin's git tree. Jarkko Nikula (14): omap: mcbsp: Remove omap device API omap: mcbsp: Remove unused variables from platform data omap: mcbsp: Move out omap_mcbsp_register_board_cfg from plat-omap/devices.c omap: mcbsp: Implement generic register access omap: mcbsp: Make wakeup control generic omap: mcbsp: Make tranceiver configuration control register access generic omap: mcbsp: Make threshold based transfer code generic omap: mcbsp: Use per instance register cache size omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c omap: mcbsp: Cleanup sidetone control initialization and make it generic omap: mcbsp: Update mcbsp.h include dependencies omap: mcbsp: Move address definitions to arch/arm/mach-omap1/mcbsp.c omap: mcbsp: Start generalize omap2_mcbsp_set_clks_src omap: mcbsp: Start generalize signal muxing functions arch/arm/mach-omap1/mcbsp.c | 45 arch/arm/mach-omap2/mcbsp.c | 103 ++--- arch/arm/plat-omap/devices.c| 46 arch/arm/plat-omap/include/plat/mcbsp.h | 208 ++ arch/arm/plat-omap/mcbsp.c | 385 +-- 5 files changed, 342 insertions(+), 445 deletions(-) -- 1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 05/14] omap: mcbsp: Make wakeup control generic
Currently wakeup control code is compiled only when CONFIG_ARCH_OMAP3 is
set even it should be available for CONFIG_ARCH_OMAP4 only builds also.
Fix this by making wakeup control generic so that it is executed whenever
new feature flag has_wakeup in platform data is set. Currently flag is set
for McBSP config types 3 and 4.
Remove also old comments about idle mode settings and HW bug workarounds
that were not updated during hwmod conversion.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap2/mcbsp.c |3 ++
arch/arm/plat-omap/include/plat/mcbsp.h |3 ++
arch/arm/plat-omap/mcbsp.c | 43 ++
3 files changed, 15 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index a157e3e..628497e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -141,6 +141,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
pdata->buffer_size = 0x80;
}
+ if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
+ pdata->has_wakeup = true;
+
oh_device[0] = oh;
if (oh->dev_attr) {
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 14bc1cb..ac48d83 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -317,6 +317,9 @@ struct omap_mcbsp_platform_data {
u16 buffer_size;
u8 reg_size;
u8 reg_step;
+
+ /* McBSP platform and instance specific features */
+ bool has_wakeup; /* Wakeup capability */
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 623f2c1..0338ad0 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -659,35 +659,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
}
EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
-{
- /*
-* Enable wakup behavior, smart idle and all wakeups
-* REVISIT: some wakeups may be unnecessary
-*/
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
- }
-}
-
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
-{
- /*
-* Disable wakup behavior, smart idle and all wakeups
-*/
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- /*
-* HW bug workaround - If no_idle mode is taken, we need to
-* go to smart_idle before going to always_idle, or the
-* device will not hit retention anymore.
-*/
-
- MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
- }
-}
#else
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
#endif
@@ -726,8 +698,9 @@ int omap_mcbsp_request(unsigned int id)
pm_runtime_get_sync(mcbsp->dev);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_request(mcbsp);
+ /* Enable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
/*
* Make sure that transmitter, receiver and sample-rate generator are
@@ -764,8 +737,9 @@ err_clk_disable:
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_free(mcbsp);
+ /* Disable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
pm_runtime_put_sync(mcbsp->dev);
@@ -794,8 +768,9 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- /* Do procedure specific to omap34xx arch, if applicable */
- omap34xx_mcbsp_free(mcbsp);
+ /* Disable wakeup behavior */
+ if (mcbsp->pdata->has_wakeup)
+ MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
pm_runtime_put_sync(mcbsp->dev);
--
1.7.5.4
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[PATCH 09/14] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c
From: Jarkko Nikula
Active sidetone requires that McBSP interface clock doesn't idle and there
is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3
in OMAP34xx share their interface clock with McBSP sidetone module and
that interface clock must be active when the sidetone is operating.
Sidetone has its own autoidle bit which should keep the interface clock
active but it is broken. Putting the McBSP core to no-idle mode when the
sidetone is active is no good either since it results to higher power
consumption when using the threshold based DMA transfers.
For making the McBSP code more generic, move this sidetone clock management
with fixme comments to mach-omap2/mcbsp.c and pass pointer to it via
platform data.
Signed-off-by: Jarkko Nikula
Cc: Paul Wamsley
---
Yep, just moving fixme code around but at least it can be fixing now under
right architecture. Even if plat/mcbsp.c is moved out.
---
arch/arm/mach-omap2/mcbsp.c | 26 ++
arch/arm/plat-omap/include/plat/mcbsp.h |1 +
arch/arm/plat-omap/mcbsp.c | 18 --
3 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 3c42adb..bc51424 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -27,6 +27,13 @@
#include "control.h"
+/*
+ * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
+ * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
+ */
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-34xx.h"
+
/* McBSP internal signal muxing functions */
void omap2_mcbsp1_mux_clkr_src(u8 mux)
@@ -102,6 +109,24 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
}
EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
+static int omap3_enable_st_clock(unsigned int id, bool enable)
+{
+ unsigned int w;
+
+ /*
+* Sidetone uses McBSP ICLK - which must not idle when sidetones
+* are enabled or sidetones start sounding ugly.
+*/
+ w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (enable)
+ w &= ~(1 << (id - 2));
+ else
+ w |= 1 << (id - 2);
+ omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+
+ return 0;
+}
+
struct omap_device_pm_latency omap2_mcbsp_latency[] = {
{
.deactivate_func = omap_device_idle_hwmods,
@@ -151,6 +176,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
if (oh->dev_attr) {
oh_device[1] = omap_hwmod_lookup((
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
+ pdata->enable_st_clock = omap3_enable_st_clock;
count++;
}
od = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 648344a..e451a6e 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -321,6 +321,7 @@ struct omap_mcbsp_platform_data {
/* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
+ int (*enable_st_clock)(unsigned int, bool);
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 3ad536e..e96d747 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -26,10 +26,6 @@
#include
#include
-/* XXX These "sideways" includes are a sign that something is wrong */
-#include "../mach-omap2/cm2xxx_3xxx.h"
-#include "../mach-omap2/cm-regbits-34xx.h"
-
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count;
@@ -257,13 +253,8 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
- /*
-* Sidetone uses McBSP ICLK - which must not idle when sidetones
-* are enabled or sidetones start sounding ugly.
-*/
- w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
- w &= ~(1 << (mcbsp->id - 2));
- omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (mcbsp->pdata->enable_st_clock)
+ mcbsp->pdata->enable_st_clock(mcbsp->id, 1);
/* Enable McBSP Sidetone */
w = MCBSP_READ(mcbsp, SSELCR);
@@ -284,9 +275,8 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
- w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
- w |= 1 << (mcbsp->id - 2);
- omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+ if (mcbsp->pdata->enable_st_clock)
+ mcbsp->pdata->enable_st_clock(mcbsp->id, 0);
}
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
--
1.7.5.4
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[PATCH 03/14] omap: mcbsp: Move out omap_mcbsp_register_board_cfg from plat-omap/devices.c
Only OMAP1s are using omap_mcbsp_register_board_cfg after OMAP2+ hwmod
conversion so it can be moved to mach-omap1/mcbsp.c.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap1/mcbsp.c | 32 +
arch/arm/plat-omap/devices.c| 46 ---
arch/arm/plat-omap/include/plat/mcbsp.h |2 -
3 files changed, 32 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index ab7395d..3c985ac 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -31,6 +31,7 @@
static int dsp_use;
static struct clk *api_clk;
static struct clk *dsp_clk;
+static struct platform_device **omap_mcbsp_devices;
static void omap1_mcbsp_request(unsigned int id)
{
@@ -369,6 +370,37 @@ static struct omap_mcbsp_platform_data
omap16xx_mcbsp_pdata[] = {
#define OMAP16XX_MCBSP_COUNT 0
#endif
+static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+ struct omap_mcbsp_platform_data *config, int size)
+{
+ int i;
+
+ omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
+GFP_KERNEL);
+ if (!omap_mcbsp_devices) {
+ printk(KERN_ERR "Could not register McBSP devices\n");
+ return;
+ }
+
+ for (i = 0; i < size; i++) {
+ struct platform_device *new_mcbsp;
+ int ret;
+
+ new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
+ if (!new_mcbsp)
+ continue;
+ platform_device_add_resources(new_mcbsp, &res[i * res_count],
+ res_count);
+ new_mcbsp->dev.platform_data = &config[i];
+ ret = platform_device_add(new_mcbsp);
+ if (ret) {
+ platform_device_put(new_mcbsp);
+ continue;
+ }
+ omap_mcbsp_devices[i] = new_mcbsp;
+ }
+}
+
static int __init omap1_mcbsp_init(void)
{
if (!cpu_class_is_omap1())
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ea28f98..bd9a06b 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -26,54 +26,8 @@
#include
#include
#include
-#include
#include
-/*-*/
-
-#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
-
-static struct platform_device **omap_mcbsp_devices;
-
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
- struct omap_mcbsp_platform_data *config, int size)
-{
- int i;
-
- omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
-GFP_KERNEL);
- if (!omap_mcbsp_devices) {
- printk(KERN_ERR "Could not register McBSP devices\n");
- return;
- }
-
- for (i = 0; i < size; i++) {
- struct platform_device *new_mcbsp;
- int ret;
-
- new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
- if (!new_mcbsp)
- continue;
- platform_device_add_resources(new_mcbsp, &res[i * res_count],
- res_count);
- new_mcbsp->dev.platform_data = &config[i];
- ret = platform_device_add(new_mcbsp);
- if (ret) {
- platform_device_put(new_mcbsp);
- continue;
- }
- omap_mcbsp_devices[i] = new_mcbsp;
- }
-}
-
-#else
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
- struct omap_mcbsp_platform_data *config, int size)
-{ }
-#endif
-
-/*-*/
-
#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 8ab14d8..7adfd92 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -407,8 +407,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
#define id_to_mcbsp_ptr(id)mcbsp_ptr[id];
int omap_mcbsp_init(void);
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
- struct omap_mcbsp_platform_data *config, int size);
void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *
config);
#ifdef CONFIG_ARCH_OMAP3
void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
--
1.7.5.4
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[PATCH 01/14] omap: mcbsp: Remove omap device API
From: Jarkko Nikula
struct omap_device *od is only set with find_omap_device_by_dev but not used
otherwise so remove them and references to omap device API.
Signed-off-by: Jarkko Nikula
---
arch/arm/plat-omap/mcbsp.c | 27 ---
1 files changed, 0 insertions(+), 27 deletions(-)
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 6c62af1..4b233e8 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -24,7 +24,6 @@
#include
#include
-#include
#include
/* XXX These "sideways" includes are a sign that something is wrong */
@@ -258,19 +257,9 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned
int stream)
EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
#ifdef CONFIG_ARCH_OMAP3
-static struct omap_device *find_omap_device_by_dev(struct device *dev)
-{
- struct platform_device *pdev = container_of(dev,
- struct platform_device, dev);
- return container_of(pdev, struct omap_device, pdev);
-}
-
static void omap_st_on(struct omap_mcbsp *mcbsp)
{
unsigned int w;
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
/*
* Sidetone uses McBSP ICLK - which must not idle when sidetones
@@ -292,9 +281,6 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
static void omap_st_off(struct omap_mcbsp *mcbsp)
{
unsigned int w;
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
w = MCBSP_ST_READ(mcbsp, SSELCR);
MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
@@ -310,9 +296,6 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
{
u16 val, i;
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
val = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -340,9 +323,6 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp)
{
u16 w;
struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
w = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -685,9 +665,6 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
{
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
/*
* Enable wakup behavior, smart idle and all wakeups
* REVISIT: some wakeups may be unnecessary
@@ -699,10 +676,6 @@ static inline void omap34xx_mcbsp_request(struct
omap_mcbsp *mcbsp)
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
{
- struct omap_device *od;
-
- od = find_omap_device_by_dev(mcbsp->dev);
-
/*
* Disable wakup behavior, smart idle and all wakeups
*/
--
1.7.5.4
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[PATCH 06/14] omap: mcbsp: Make tranceiver configuration control register access generic
McBSP transmit and receive configuration control registers must be set up
for OMAP2430 and later. Replace is_omap tests in generic code with a new
feature flag has_ccr in platform data so that there is no need to change
code for any upcoming OMAP version.
Signed-off-by: Jarkko Nikula
---
arch/arm/mach-omap2/mcbsp.c |6 --
arch/arm/plat-omap/include/plat/mcbsp.h |1 +
arch/arm/plat-omap/mcbsp.c |8
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 628497e..3c42adb 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -127,10 +127,12 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void
*unused)
}
pdata->reg_step = 4;
- if (oh->class->rev < MCBSP_CONFIG_TYPE2)
+ if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
pdata->reg_size = 2;
- else
+ } else {
pdata->reg_size = 4;
+ pdata->has_ccr = true;
+ }
if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index ac48d83..eed20ef 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -320,6 +320,7 @@ struct omap_mcbsp_platform_data {
/* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */
+ bool has_ccr; /* Transceiver has configuration control registers */
};
struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 0338ad0..97bcbfa 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -184,7 +184,7 @@ void omap_mcbsp_config(unsigned int id, const struct
omap_mcbsp_reg_cfg *config)
MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
MCBSP_WRITE(mcbsp, XCCR, config->xccr);
MCBSP_WRITE(mcbsp, RCCR, config->rccr);
}
@@ -848,7 +848,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
}
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
/* Release the transmitter and receiver */
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w &= ~(tx ? XDISABLE : 0);
@@ -878,7 +878,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset transmitter */
tx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w |= (tx ? XDISABLE : 0);
MCBSP_WRITE(mcbsp, XCCR, w);
@@ -888,7 +888,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset receiver */
rx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, RCCR);
w |= (rx ? RDISABLE : 0);
MCBSP_WRITE(mcbsp, RCCR, w);
--
1.7.5.4
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[PATCH 08/14] omap: mcbsp: Use per instance register cache size
Rationale here is to remove one global variable and to make possible to have
variable size McBSP register maps inside SoC.
Signed-off-by: Jarkko Nikula
---
arch/arm/plat-omap/include/plat/mcbsp.h |3 ++-
arch/arm/plat-omap/mcbsp.c |6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 0fad63c..648344a 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -359,6 +359,7 @@ struct omap_mcbsp {
u16 max_tx_thres;
u16 max_rx_thres;
void *reg_cache;
+ int reg_cache_size;
};
/**
@@ -370,7 +371,7 @@ struct omap_mcbsp_dev_attr {
};
extern struct omap_mcbsp **mcbsp_ptr;
-extern int omap_mcbsp_count, omap_mcbsp_cache_size;
+extern int omap_mcbsp_count;
#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
#define id_to_mcbsp_ptr(id)mcbsp_ptr[id];
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 234ab16..3ad536e 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -31,7 +31,7 @@
#include "../mach-omap2/cm-regbits-34xx.h"
struct omap_mcbsp **mcbsp_ptr;
-int omap_mcbsp_count, omap_mcbsp_cache_size;
+int omap_mcbsp_count;
static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
@@ -678,7 +678,7 @@ int omap_mcbsp_request(unsigned int id)
}
mcbsp = id_to_mcbsp_ptr(id);
- reg_cache = kzalloc(omap_mcbsp_cache_size, GFP_KERNEL);
+ reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL);
if (!reg_cache) {
return -ENOMEM;
}
@@ -1225,7 +1225,7 @@ static int __devinit omap_mcbsp_probe(struct
platform_device *pdev)
}
}
mcbsp->phys_base = res->start;
- omap_mcbsp_cache_size = resource_size(res);
+ mcbsp->reg_cache_size = resource_size(res);
mcbsp->io_base = ioremap(res->start, resource_size(res));
if (!mcbsp->io_base) {
ret = -ENOMEM;
--
1.7.5.4
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[PATCH 02/14] omap: mcbsp: Remove unused variables from platform data
These variables got unused after McBSP was converted to use resource
structures.
Signed-off-by: Jarkko Nikula
---
arch/arm/plat-omap/include/plat/mcbsp.h |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 9882c65..8ab14d8 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -348,14 +348,7 @@ struct omap_mcbsp_ops {
};
struct omap_mcbsp_platform_data {
- unsigned long phys_base;
- u8 dma_rx_sync, dma_tx_sync;
- u16 rx_irq, tx_irq;
struct omap_mcbsp_ops *ops;
-#ifdef CONFIG_ARCH_OMAP3
- /* Sidetone block for McBSP 2 and 3 */
- unsigned long phys_base_st;
-#endif
u16 buffer_size;
unsigned int mcbsp_config_type;
};
--
1.7.5.4
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Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, Aug 31, 2011 at 02:43:33PM +0100, Mark Salter wrote: > On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote: > > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote: > > > One question: why this write buffer issue did not happen at UP ARM V7 > > > platform, whose dma buffer > > > also uncache, but bufferable? > > > > Which CPU was on this platform? > > Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a > usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing > nosmp on the commandline, I see 20.3MB/s. > > Can someone explain why nosmp would make such a difference? Oh gawd, that's horrible. I have a feeling it's probably a separate issue though, caused by: omap_modify_auxcoreboot0(0x200, 0xfdff); in boot_secondary for OMAP. Unfortunately I have no idea what that line is doing because it ends up talking to the secure monitor. Will -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv5 2/4] omap: voltage: added mapping from voltagedomains to processor devices
This is needed so that SMPS regulators can be properly mapped to corresponding
processor devices.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/voltage.h |2 ++
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +++
3 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index b4c6259..bcbf0c0 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -53,6 +53,7 @@ struct omap_vfsm_instance {
/**
* struct voltagedomain - omap voltage domain global structure.
* @name: Name of the voltage domain which can be used as a unique identifier.
+ * @proc_dev: Name of the associated processor device / hwmod.
* @scalable: Whether or not this voltage domain is scalable
* @node: list_head linking all voltage domains
* @pwrdm_node: list_head linking all powerdomains in this voltagedomain
@@ -63,6 +64,7 @@ struct omap_vfsm_instance {
*/
struct voltagedomain {
char *name;
+ char *proc_dev;
bool scalable;
struct list_head node;
struct list_head pwrdm_list;
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index b0d0ae1..28f1908 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -45,6 +45,7 @@ static const struct omap_vfsm_instance omap3_vdd2_vfsm = {
static struct voltagedomain omap3_voltdm_mpu = {
.name = "mpu_iva",
+ .proc_dev = "mpu.0",
.scalable = true,
.read = omap3_prm_vcvp_read,
.write = omap3_prm_vcvp_write,
@@ -56,6 +57,7 @@ static struct voltagedomain omap3_voltdm_mpu = {
static struct voltagedomain omap3_voltdm_core = {
.name = "core",
+ .proc_dev = "l3_main.0",
.scalable = true,
.read = omap3_prm_vcvp_read,
.write = omap3_prm_vcvp_write,
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c4584e9..10c1d66 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -46,6 +46,7 @@ static const struct omap_vfsm_instance omap4_vdd_core_vfsm = {
static struct voltagedomain omap4_voltdm_mpu = {
.name = "mpu",
+ .proc_dev = "mpu.0",
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
@@ -57,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
static struct voltagedomain omap4_voltdm_iva = {
.name = "iva",
+ .proc_dev = "iva.0",
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
@@ -68,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = {
static struct voltagedomain omap4_voltdm_core = {
.name = "core",
+ .proc_dev = "l3_main_1.0",
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv5 3/4] omap: smps: add smps regulator init to voltage.c
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/voltage.c | 81 +
1 files changed, 81 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index cebc8b1..30102a4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -25,6 +25,9 @@
#include
#include
#include
+#include
+#include
+#include
#include
@@ -238,6 +241,42 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
}
}
+static void smps_add_regulator_info(struct platform_device *smps_dev,
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev->dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply->supply = "vcc";
+ supply->dev_name = voltdm->proc_dev;
+ init_data->constraints.min_uV =
+ voltdm->pmic->vsel_to_uv(voltdm->pmic->vp_vddmin);
+ init_data->constraints.max_uV =
+ voltdm->pmic->vsel_to_uv(voltdm->pmic->vp_vddmax);
+ init_data->constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+ init_data->constraints.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ init_data->num_consumer_supplies = 1;
+ init_data->consumer_supplies = supply;
+ init_data->driver_data = voltdm;
+
+ info->regulators[info->num_regulators++] = init_data;
+}
+
+
/**
* omap_voltage_late_init() - Init the various voltage parameters
*
@@ -248,6 +287,11 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
int __init omap_voltage_late_init(void)
{
struct voltagedomain *voltdm;
+ struct platform_device *smps_dev;
+ struct omap_smps_platform_data *smps_pdata;
+ struct regulator_init_data **reg_list;
+ int num_smps = 0;
+ int ret;
if (list_empty(&voltdm_list)) {
pr_err("%s: Voltage driver support not added\n",
@@ -279,8 +323,45 @@ int __init omap_voltage_late_init(void)
voltdm->scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
+
+ if (voltdm->vc && voltdm->vp)
+ num_smps++;
}
+ if (num_smps) {
+ smps_dev = platform_device_alloc("omap-smps", -1);
+
+ if (!smps_dev)
+ return -ENOMEM;
+
+ smps_pdata = kzalloc(sizeof(struct omap_smps_platform_data),
+ GFP_KERNEL);
+ reg_list = kzalloc(sizeof(void *) * num_smps, GFP_KERNEL);
+
+ if (!smps_pdata || !reg_list) {
+ kfree(smps_pdata);
+ kfree(reg_list);
+ return -ENOMEM;
+ }
+
+ smps_pdata->regulators = reg_list;
+
+ ret = platform_device_add_data(smps_dev, smps_pdata,
+ sizeof(struct omap_smps_platform_data));
+
+ if (ret) {
+ kfree(smps_pdata);
+ kfree(reg_list);
+ platform_device_put(smps_dev);
+ return ret;
+ }
+
+ list_for_each_entry(voltdm, &voltdm_list, node)
+ if (voltdm->vp && voltdm->vc)
+ smps_add_regulator_info(smps_dev, voltdm);
+
+ platform_device_add(smps_dev);
+ }
return 0;
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv5 4/4] TEMP: OMAP3: beagle rev-c4: enable OPP6
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/board-omap3beagle.c | 29 +
arch/arm/mach-omap2/opp3xxx_data.c |4
2 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 32f5f89..b07af4f 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -489,6 +489,35 @@ static void __init beagle_opp_init(void)
return;
}
+ if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) {
+ struct device *mpu_dev, *iva_dev;
+
+ mpu_dev = omap2_get_mpuss_device();
+ iva_dev = omap2_get_iva_device();
+
+ if (!mpu_dev || !iva_dev) {
+ pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
+ __func__, mpu_dev, iva_dev);
+ return;
+ }
+ /* Enable MPU 720MHz opp */
+ r = opp_enable(mpu_dev, 72000);
+
+ /* Enable IVA 520MHz opp */
+ r |= opp_enable(iva_dev, 52000);
+
+ if (r) {
+ pr_err("%s: failed to enable higher opp %d\n",
+ __func__, r);
+ /*
+* Cleanup - disable the higher freqs - we dont care
+* about the results
+*/
+ opp_disable(mpu_dev, 72000);
+ opp_disable(iva_dev, 52000);
+ }
+ }
+
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..a0f5fe1 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[]
= {
OPP_INITIALIZER("mpu", true, 55000, OMAP3430_VDD_MPU_OPP4_UV),
/* MPU OPP5 */
OPP_INITIALIZER("mpu", true, 6, OMAP3430_VDD_MPU_OPP5_UV),
+ /* MPU OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER("mpu", false, 72000, OMAP3430_VDD_MPU_OPP5_UV),
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -123,6 +125,8 @@ static struct omap_opp_def __initdata
omap34xx_opp_def_list[] = {
OPP_INITIALIZER("iva", true, 4, OMAP3430_VDD_MPU_OPP4_UV),
/* DSP OPP5 */
OPP_INITIALIZER("iva", true, 43000, OMAP3430_VDD_MPU_OPP5_UV),
+ /* DSP OPP6 : omap3530 high speed grade only */
+ OPP_INITIALIZER("iva", false, 52000, OMAP3430_VDD_MPU_OPP5_UV),
};
static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv5 1/4] regulator: omap smps regulator driver
OMAP SMPS regulator driver provides access to OMAP voltage processor
controlled regulators. These include VDD_MPU and VDD_CORE for OMAP3 and
additionally VDD_IVA for OMAP4. SMPS regulators use the OMAP voltage
layer for the actual voltage regulation operations.
Signed-off-by: Tero Kristo
Cc: Kevin Hilman
Cc: Tony Lindgren
Cc: Todd Poynor
Cc: Mark Brown
Cc: Liam Girdwood
Cc: Graeme Gregory
---
drivers/regulator/Kconfig |8 ++
drivers/regulator/Makefile |1 +
drivers/regulator/omap-smps-regulator.c | 178 +++
include/linux/regulator/omap-smps.h | 20
4 files changed, 207 insertions(+), 0 deletions(-)
create mode 100644 drivers/regulator/omap-smps-regulator.c
create mode 100644 include/linux/regulator/omap-smps.h
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index c7fd2c0..17c60bc 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -317,5 +317,13 @@ config REGULATOR_AAT2870
If you have a AnalogicTech AAT2870 say Y to enable the
regulator driver.
+config REGULATOR_OMAP_SMPS
+ tristate "TI OMAP SMPS Power Regulators"
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
+ help
+ This driver supports the OMAP3 / OMAP4 SMPS regulators for VDD1,
+ VDD2 and VDD3. These regulators are accessed using the voltage
+ processor interface of OMAP.
+
endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 040d5aa..42d3405 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -45,5 +45,6 @@ obj-$(CONFIG_REGULATOR_AB8500)+= ab8500.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o
+obj-$(CONFIG_REGULATOR_OMAP_SMPS) += omap-smps-regulator.o
ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/omap-smps-regulator.c
b/drivers/regulator/omap-smps-regulator.c
new file mode 100644
index 000..f07c42d
--- /dev/null
+++ b/drivers/regulator/omap-smps-regulator.c
@@ -0,0 +1,178 @@
+/*
+ * OMAP SMPS regulator driver
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * Author: Tero Kristo
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRIVER_NAME"omap-smps"
+
+struct omap_smps_reg_info {
+ const char *vdd_name;
+ struct regulator_dev*rdev;
+ struct voltagedomain*voltdm;
+ struct regulator_desc desc;
+};
+
+static int omap_smps_set_voltage(struct regulator_dev *rdev, int min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_scale(info->voltdm, min_uV);
+}
+
+static int omap_smps_get_voltage(struct regulator_dev *rdev)
+{
+ struct omap_smps_reg_info *info = rdev_get_drvdata(rdev);
+ return voltdm_get_voltage(info->voltdm);
+}
+
+static struct regulator_ops omap_smps_ops = {
+ .set_voltage= omap_smps_set_voltage,
+ .get_voltage= omap_smps_get_voltage,
+};
+
+#define SMPS_REG(name) { \
+ .vdd_name = #name, \
+ .desc = { \
+ .ops = &omap_smps_ops, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ }, \
+ }
+
+static struct omap_smps_reg_info omap_smps_regs[] = {
+ SMPS_REG(mpu),
+ SMPS_REG(mpu_iva),
+ SMPS_REG(iva),
+ SMPS_REG(core),
+};
+
+static void omap_smps_reg_cleanup(void)
+{
+ int i;
+ struct omap_smps_reg_info *info;
+
+ for (i = 0; i < ARRAY_SIZE(omap_smps_regs); i++) {
+ info = &omap_smps_regs[i];
+ if (info->rdev) {
+ regulator_unregister(info->rdev);
+ info->rdev = NULL;
+ }
+
+ kfree(info->desc.name);
+ info->desc.name = NULL;
+ }
+}
+
+static struct regulator_init_data dummy_initdata __devinitdata;
+
+static int __devinit omap_smps_reg_probe(struct platform_device *pdev)
+{
+ int i, j, ret;
+ struct omap_smps_reg_info *info;
+ struct omap_smps_platform_data *pdata;
+ struct regulator_dev*rdev;
+ struct regulator_init_data *initdata;
+ struct voltagedomain*voltdm;
+ char*name;
+
+ pdata = pdev->dev.platform_data;
+
+ for (i = 0; i < ARRAY_SIZE(omap
[PATCHv5 0/4] omap smps regulator driver
Hello, Changes compared to previous version of this set: - dropped stub header file patch as it is integrated to voltm branch already - PATCH 1: * fixed section mismatch * changed consumer supply naming to match with omap PM code better * refreshed so that it applies cleanly on latest codebase - PATCH 2: * new patch, needed for mapping from voltagedomains to processor devices (e.g. core voltdm -> l3_main processor device on OMAP4) - PATCH 3: * now uses sane names for supply devices, see patch 2 - PATCH 4: * fixed opp hacking not to touch hwmod internals -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 11/12] OMAP: Panda & Beagle: DVI: Add i2c_bus_num
On 08/31/2011 08:23 AM, Tomi Valkeinen wrote:
Add i2c bus number for DVI output. The driver uses this to detect if a
panel is connected and to read EDID.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/board-omap3beagle.c |1 +
arch/arm/mach-omap2/board-omap4panda.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 3ae16b4..13244e9 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -207,6 +207,7 @@ static struct panel_generic_dpi_data dvi_panel = {
.name = "generic",
.platform_enable = beagle_enable_dvi,
.platform_disable = beagle_disable_dvi,
+ .i2c_bus_num = 3,
};
static struct omap_dss_device beagle_dvi_device = {
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 9aaa960..d5760e3 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -459,6 +459,7 @@ static struct panel_generic_dpi_data omap4_dvi_panel = {
.name = "generic",
.platform_enable= omap4_panda_enable_dvi,
.platform_disable = omap4_panda_disable_dvi,
+ .i2c_bus_num = 3,
};
struct omap_dss_device omap4_panda_dvi_device = {
Can you add a similar patch for board-overo.c? I've tested earlier
versions of this patch series on a Tide+Tobi successfully. Here's a copy
of my patch:
http://tinyurl.com/3cek5m7
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Re: [PATCH] usb: ehci: make HC see up-to-date qh/qtd descriptor ASAP
On Wed, 2011-08-31 at 09:49 +0100, Will Deacon wrote: > On Wed, Aug 31, 2011 at 01:23:47AM +0100, Chen Peter-B29397 wrote: > > One question: why this write buffer issue did not happen at UP ARM V7 > > platform, whose dma buffer > > also uncache, but bufferable? > > Which CPU was on this platform? Using a 3.1.0-rc4+ kernel on a Pandaboard, and running 'hdparm -t' on a usb disk drive, I see ~5.8MB/s read speed. Same kernel, but passing nosmp on the commandline, I see 20.3MB/s. Can someone explain why nosmp would make such a difference? --Mark -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 12/25] gpio/omap: cleanup omap_gpio_mod_init function
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().
Signed-off-by: Tarun Kanti DebBarma
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio16xx.c | 35 +++-
drivers/gpio/gpio-omap.c | 71 +--
2 files changed, 51 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 46bb57a..86ac415 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -24,6 +24,9 @@
#define OMAP1610_GPIO4_BASE0xfffbbc00
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
+/* smart idle, enable wakeup */
+#define SYSCONFIG_WORD 0x14
+
/* mpu gpio */
static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
{
@@ -218,12 +221,42 @@ static struct __initdata platform_device *
omap16xx_gpio_dev[] = {
static int __init omap16xx_gpio_init(void)
{
int i;
+ void __iomem *base;
+ struct resource *res;
+ struct platform_device *pdev;
+ struct omap_gpio_platform_data *pdata;
if (!cpu_is_omap16xx())
return -EINVAL;
- for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
+ for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
+ pdev = omap16xx_gpio_dev[i];
+ pdata = pdev->dev.platform_data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (unlikely(!res)) {
+ dev_err(&pdev->dev, "Invalid mem resource.\n");
+ return -ENODEV;
+ }
+
+ base = ioremap(res->start, resource_size(res));
+ if (unlikely(!base)) {
+ dev_err(&pdev->dev, "ioremap failed.\n");
+ return -ENOMEM;
+ }
+
+ __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
+ iounmap(base);
+
+ /*
+* Enable system clock for GPIO module.
+* The CAM_CLK_CTRL *is* really the right place.
+*/
+ omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
+ ULPD_CAM_CLK_CTRL);
+
platform_device_register(omap16xx_gpio_dev[i]);
+ }
return 0;
}
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index ac0c346..fa2fb4f 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -601,7 +601,6 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
if (!(isr & 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -611,7 +610,6 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
*/
if (bank->toggle_mask & (1 << gpio_index))
_toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
generic_handle_irq(gpio_irq);
}
@@ -889,62 +887,24 @@ static void __init omap_gpio_show_rev(struct gpio_bank
*bank)
*/
static struct lock_class_key gpio_lock_class;
-/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
- if (cpu_class_is_omap2()) {
- if (cpu_is_omap44xx()) {
- __raw_writel(0x, bank->base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writel(0x, bank->base +
-OMAP4_GPIO_DEBOUNCENABLE);
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
- } else if (cpu_is_omap34xx()) {
- __raw_writel(0x, bank->base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0x, bank->base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writel(0x, bank->base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
-
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- }
- } else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank)) {
- __raw_writew(0x, bank->base +
- OMAP_MPUIO_GPIO_MASKIT / b
[PATCH v6 23/25] gpio/omap: enable irq at the end of all configuration in restore
From: Nishanth Menon
Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.
Signed-off-by: Nishanth Menon
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 67e08e9..db22df8 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1323,10 +1323,6 @@ void omap2_gpio_resume_after_idle(void)
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
- __raw_writel(bank->context.irqenable1,
- bank->base + bank->regs->irqenable);
- __raw_writel(bank->context.irqenable2,
- bank->base + bank->regs->irqenable2);
__raw_writel(bank->context.wake_en,
bank->base + bank->regs->wkup_en);
__raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
@@ -1347,6 +1343,10 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank->context.debounce_en,
bank->base + bank->regs->debounce_en);
}
+ __raw_writel(bank->context.irqenable1,
+ bank->base + bank->regs->irqenable);
+ __raw_writel(bank->context.irqenable2,
+ bank->base + bank->regs->irqenable2);
}
#else
#define omap_gpio_runtime_suspend NULL
--
1.7.0.4
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[PATCH v6 19/25] gpio/omap: cleanup prepare_for_idle and resume_after_idle
Cleanup omap2_gpio_prepare_for_idle() and omap2_gpio_resume_after_idle()
by moving most of the stuff to *_runtime_suspend() and *_runtime_resume().
Signed-off-by: Tarun Kanti DebBarma
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 234 -
1 files changed, 125 insertions(+), 109 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index a267a30..9d68b15 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1126,142 +1126,153 @@ static int omap_gpio_resume(struct device *dev)
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-void omap2_gpio_prepare_for_idle(int off_mode)
+static int omap_gpio_runtime_suspend(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ u32 l1 = 0, l2 = 0;
+ int j;
- list_for_each_entry(bank, &omap_gpio_list, node) {
- u32 l1 = 0, l2 = 0;
- int j;
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
+ clk_disable(bank->dbck);
- if (!bank->loses_context)
- continue;
+ /*
+* If going to OFF, remove triggering for all
+* non-wakeup GPIOs. Otherwise spurious IRQs will be
+* generated. See OMAP2420 Errata item 1.101.
+*/
+ if (!(bank->enabled_non_wakeup_gpios))
+ goto save_gpio_context;
- for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
- clk_disable(bank->dbck);
+ bank->saved_datain = __raw_readl(bank->base +
+ bank->regs->datain);
+ l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
+ l2 = __raw_readl(bank->base + bank->regs->risingdetect);
- if (!off_mode)
- continue;
+ bank->saved_fallingdetect = l1;
+ bank->saved_risingdetect = l2;
+ l1 &= ~bank->enabled_non_wakeup_gpios;
+ l2 &= ~bank->enabled_non_wakeup_gpios;
- if (IS_ERR_VALUE(pm_runtime_put_sync_suspend(bank->dev) < 0))
- dev_err(bank->dev, "%s: GPIO bank %d "
- "pm_runtime_put_sync_suspend failed\n",
- __func__, bank->id);
+ __raw_writel(l1, bank->base + bank->regs->fallingdetect);
+ __raw_writel(l2, bank->base + bank->regs->risingdetect);
+
+save_gpio_context:
+ if (bank->get_context_loss_count)
+ bank->context_loss_count =
+ bank->get_context_loss_count(bank->dev);
+ omap_gpio_save_context(bank);
- /* If going to OFF, remove triggering for all
-* non-wakeup GPIOs. Otherwise spurious IRQs will be
-* generated. See OMAP2420 Errata item 1.101. */
- if (!(bank->enabled_non_wakeup_gpios))
- goto save_gpio_context;
+ return 0;
+}
+
+static int omap_gpio_runtime_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ u32 context_lost_cnt_after;
+ u32 l = 0, gen, gen0, gen1;
+ int j;
+
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
+ clk_enable(bank->dbck);
- bank->saved_datain = __raw_readl(bank->base +
- bank->regs->datain);
- l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
- l2 = __raw_readl(bank->base + bank->regs->risingdetect);
+ if (bank->get_context_loss_count) {
+ context_lost_cnt_after =
+ bank->get_context_loss_count(bank->dev);
+ if (context_lost_cnt_after != bank->context_loss_count ||
+ !context_lost_cnt_after)
+ omap_gpio_restore_context(bank);
+ else
+ return 0;
+ }
- bank->saved_fallingdetect = l1;
- bank->saved_risingdetect = l2;
- l1 &= ~bank->enabled_non_wakeup_gpios;
- l2 &= ~bank->enabled_non_wakeup_gpios;
+ if (!(bank->enabled_non_wakeup_gpios))
+ return 0;
- __raw_writel(l1, bank->base + bank->regs->fallingdetect);
- __raw_writel(l2, bank->base + bank->regs->risingdetect);
+ __raw_writel(bank->saved_fallingdetect,
+ bank->base + bank->regs->fallingdetect);
+ __raw_writel(bank->saved_risingdetect,
+ bank->base + bank->regs->risingdetect);
+ l = __raw_readl(bank->base + ba
[PATCH v6 24/25] gpio/omap: restore OE only after setting the output level
From: Nishanth Menon
Setup the dataout register before setting the GPIO to output mode
in restore path.
Signed-off-by: Nishanth Menon
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index db22df8..a629498 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1326,7 +1326,6 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank->context.wake_en,
bank->base + bank->regs->wkup_en);
__raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
- __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
__raw_writel(bank->context.leveldetect0,
bank->base + bank->regs->leveldetect0);
__raw_writel(bank->context.leveldetect1,
@@ -1336,6 +1335,7 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank->context.fallingdetect,
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
+ __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
if (bank->dbck_enable_mask) {
__raw_writel(bank->context.debounce, bank->base +
--
1.7.0.4
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[PATCH v6 05/25] gpio/omap: handle save/restore context in GPIO driver
From: Charulatha V
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions
to handle save context & restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context. The workaround_enabled flag is no more required and is removed.
Signed-off-by: Charulatha V
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |5 +-
arch/arm/mach-omap2/pm34xx.c | 14
arch/arm/plat-omap/include/plat/gpio.h |5 +-
drivers/gpio/gpio-omap.c | 131 ++--
4 files changed, 65 insertions(+), 90 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9f3a007..6c6b1a7 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,6 +23,7 @@
#include
#include
+#include
#include "powerdomain.h"
@@ -63,7 +64,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->bank_width = dev_attr->bank_width;
pdata->dbck_flag = dev_attr->dbck_flag;
pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
-
+#ifdef CONFIG_PM
+ pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+#endif
pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
if (!pdata) {
pr_err("gpio%d: Memory allocation failed\n", id);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 1915050..b33cf3d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -85,16 +85,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static inline void omap3_per_save_context(void)
-{
- omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
- omap_gpio_restore_context();
-}
-
static void omap3_enable_io_chain(void)
{
int timeout = 0;
@@ -393,8 +383,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
}
/* CORE */
@@ -462,8 +450,6 @@ void omap_sram_idle(void)
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 58d0bf2..2c06e43 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -201,14 +201,15 @@ struct omap_gpio_platform_data {
bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
+
+ /* Return context loss count due to PM states changing */
+ u32 (*get_context_loss_count)(struct device *dev);
};
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
/*-*/
/* Wrappers for "new style" GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index e83109c..d114759 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -72,9 +72,11 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+ u32 context_loss_count;
u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
+ u32 (*get_context_loss_count)(struct device *dev);
struct omap_gpio_reg_offs *regs;
};
@@ -1170,6 +1172,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
bank->loses_context = pdata->loses_context;
+ bank->get_context_loss_count = pdata->get_context_loss_count;
bank->regs = pdata->regs;
if (bank->regs->set_dataout && bank->regs->clr_dataout)
@@ -1314,11 +1317,11 @@ static struct syscore_ops omap_gpio_syscore_ops = {
#ifdef CONFIG_ARCH_OMAP2PLUS
-static int workaround_enabled;
+static vo
[PATCH v6 21/25] gpio/omap: remove omap_gpio_save_context overhead
Context is now saved dynamically in respective functions whenever and
whichever registers are modified. This avoid overhead of saving all
registers context in the runtime callback.
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 62 ++---
1 files changed, 36 insertions(+), 26 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 67c5a96..dc382f6 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -97,6 +97,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int
gpio, int is_input)
else
l &= ~(1 << gpio);
__raw_writel(l, reg);
+ bank->context.oe = l;
}
@@ -127,6 +128,7 @@ static void _set_gpio_dataout_mask(struct gpio_bank *bank,
int gpio, int enable)
else
l &= ~gpio_bit;
__raw_writel(l, reg);
+ bank->context.dataout = l;
}
static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
@@ -212,9 +214,20 @@ static inline void set_gpio_trigger(struct gpio_bank
*bank, int gpio,
MOD_REG_BIT(bank->regs->fallingdetect, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
- if (likely(!(bank->non_wakeup_gpios & gpio_bit)))
+ bank->context.leveldetect0 =
+ __raw_readl(bank->base + bank->regs->leveldetect0);
+ bank->context.leveldetect1 =
+ __raw_readl(bank->base + bank->regs->leveldetect1);
+ bank->context.risingdetect =
+ __raw_readl(bank->base + bank->regs->risingdetect);
+ bank->context.fallingdetect =
+ __raw_readl(bank->base + bank->regs->fallingdetect);
+ if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
MOD_REG_BIT(bank->regs->wkup_en, gpio_bit,
trigger != 0);
+ bank->context.wake_en =
+ __raw_readl(bank->base + bank->regs->wkup_en);
+ }
/* This part needs to be executed always for OMAP{34xx, 44xx} */
if (cpu_is_omap34xx() || cpu_is_omap44xx() ||
@@ -301,6 +314,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int
gpio, int trigger)
/* Enable wake-up during idle for dynamic tick */
MOD_REG_BIT(bank->regs->wkup_en, 1 << gpio, trigger);
+ bank->context.wake_en =
+ __raw_readl(bank->base + bank->regs->wkup_en);
__raw_writel(l, reg);
}
return 0;
@@ -393,6 +408,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
}
__raw_writel(l, reg);
+ bank->context.irqenable1 = l;
}
static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
@@ -413,6 +429,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
}
__raw_writel(l, reg);
+ bank->context.irqenable1 = l;
}
static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int
enable)
@@ -511,6 +528,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
/* Module is enabled, clocks are not gated */
ctrl &= ~GPIO_MOD_CTRL_BIT;
__raw_writel(ctrl, reg);
+ bank->context.ctrl = ctrl;
}
bank->mod_usage |= 1 << offset;
@@ -528,9 +546,12 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
spin_lock_irqsave(&bank->lock, flags);
- if (bank->regs->wkup_en)
+ if (bank->regs->wkup_en) {
/* Disable wake-up during idle for dynamic tick */
MOD_REG_BIT(bank->regs->wkup_en, 1 << offset, 0);
+ bank->context.wake_en =
+ __raw_readl(bank->base + bank->regs->wkup_en);
+ }
bank->mod_usage &= ~(1 << offset);
@@ -542,6 +563,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned
offset)
/* Module is disabled, clocks are gated */
ctrl |= GPIO_MOD_CTRL_BIT;
__raw_writel(ctrl, reg);
+ bank->context.ctrl = ctrl;
}
_reset_gpio(bank, bank->chip.base + offset);
@@ -908,6 +930,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
bank->regs->irqenable_inv == false);
MOD_REG_BIT(bank->regs->irqenable, l, bank->regs->debounce_en != 0);
MOD_REG_BIT(bank->regs->irqenable, l, bank->regs->ctrl != 0);
+ bank->context.irqenable1 =
+ __raw_readl(bank->base + bank->regs->irqenable);
}
static __init void
@@ -1098,6 +1122,7 @@ static int omap_gpio_suspend(struct device *dev)
spin_lock_irqsave(&bank->lock, flags);
bank->saved_wakeup = __raw_readl(wake_status);
MOD_REG_BIT(bank->regs->wkup_en, bank->suspend_wakeup, 1);
+ bank->context.wake_en = __raw_readl(bank->
[PATCH v6 20/25] gpio/omap: skip operations in runtime callbacks
Most operations within runtime callbacks should be skipped when
*_runtime_get_sync() and *_runtime_put_sync() are called in probe(),
*_gpio_request() and *_gpio_free(). We just need clock enable/disable.
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 9d68b15..67c5a96 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1136,6 +1136,9 @@ static int omap_gpio_runtime_suspend(struct device *dev)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
+ if (!bank->mod_usage)
+ return 0;
+
/*
* If going to OFF, remove triggering for all
* non-wakeup GPIOs. Otherwise spurious IRQs will be
@@ -1177,6 +1180,9 @@ static int omap_gpio_runtime_resume(struct device *dev)
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
+ if (!bank->mod_usage)
+ return 0;
+
if (bank->get_context_loss_count) {
context_lost_cnt_after =
bank->get_context_loss_count(bank->dev);
--
1.7.0.4
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[PATCH v6 18/25] gpio/omap: optimize suspend and resume functions
There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 53 +
1 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f36931a..a267a30 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1047,6 +1047,8 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
goto err_free;
}
+ platform_set_drvdata(pdev, bank);
+
pm_runtime_enable(bank->dev);
pm_runtime_irq_safe(bank->dev);
if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
@@ -1082,44 +1084,39 @@ err_exit:
static int omap_gpio_suspend(struct device *dev)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *base = bank->base;
- void __iomem *wake_status;
- unsigned long flags;
-
- if (!bank->regs->wkup_en)
- return 0;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank->base;
+ void __iomem *wake_status;
+ unsigned long flags;
- wake_status = bank->base + bank->regs->wkup_en;
+ if (!bank->regs->wkup_en || !bank->suspend_wakeup)
+ return 0;
- spin_lock_irqsave(&bank->lock, flags);
- bank->saved_wakeup = __raw_readl(wake_status);
- MOD_REG_BIT(bank->regs->wkup_en, bank->suspend_wakeup, 1);
- spin_unlock_irqrestore(&bank->lock, flags);
- pm_runtime_put_sync(dev);
- }
+ wake_status = bank->base + bank->regs->wkup_en;
+ spin_lock_irqsave(&bank->lock, flags);
+ bank->saved_wakeup = __raw_readl(wake_status);
+ MOD_REG_BIT(bank->regs->wkup_en, bank->suspend_wakeup, 1);
+ spin_unlock_irqrestore(&bank->lock, flags);
+ pm_runtime_put_sync(dev);
return 0;
}
static int omap_gpio_resume(struct device *dev)
{
- struct gpio_bank *bank;
-
- list_for_each_entry(bank, &omap_gpio_list, node) {
- void __iomem *base = bank->base;
- unsigned long flags;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank->base;
+ unsigned long flags;
- if (!bank->regs->wkup_en)
- return 0;
+ if (!bank->regs->wkup_en || !bank->saved_wakeup)
+ return 0;
- pm_runtime_get_sync(dev);
- spin_lock_irqsave(&bank->lock, flags);
- MOD_REG_BIT(bank->regs->wkup_en, bank->saved_wakeup, 1);
- spin_unlock_irqrestore(&bank->lock, flags);
- }
+ pm_runtime_get_sync(dev);
+ spin_lock_irqsave(&bank->lock, flags);
+ MOD_REG_BIT(bank->regs->wkup_en, bank->saved_wakeup, 1);
+ spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
--
1.7.0.4
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[PATCH v6 15/25] gpio/omap: remove bank->method & METHOD_* macros
From: Charulatha V
The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.
Signed-off-by: Charulatha V
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio15xx.c |3 +-
arch/arm/mach-omap1/gpio16xx.c |6 +
arch/arm/mach-omap1/gpio7xx.c |8 +--
arch/arm/mach-omap2/gpio.c |2 -
arch/arm/plat-omap/include/plat/gpio.h |8 +--
drivers/gpio/gpio-omap.c | 38 +--
6 files changed, 10 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 950e467..634903e 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -47,7 +47,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride= 1,
.regs = &omap15xx_mpuio_regs,
@@ -90,7 +90,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1510,
.bank_width = 16,
.regs = &omap15xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 86ac415..1c5f90e 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -53,7 +53,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride= 1,
.regs = &omap16xx_mpuio_regs,
@@ -100,7 +100,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -130,7 +129,6 @@ static struct __initdata resource
omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -160,7 +158,6 @@ static struct __initdata resource
omap16xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
@@ -190,7 +187,6 @@ static struct __initdata resource
omap16xx_gpio4_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = &omap16xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 207a23c..433491c 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width = 32,
+ .is_mpuio = true,
.bank_stride= 2,
.regs = &omap7xx_mpuio_regs,
};
@@ -94,7 +94,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_7XX,
.bank_width = 32,
.regs = &omap7xx_gpio_regs,
};
@@ -124,7 +123,6 @
[PATCH v6 17/25] gpio/omap: use pm-runtime framework
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use dev_pm_ops now.
Signed-off-by: Charulatha V
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 89 ++---
1 files changed, 67 insertions(+), 22 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6e7399c..f36931a 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -79,6 +79,8 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
+static void omap_gpio_mod_init(struct gpio_bank *bank);
+
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -476,6 +478,19 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
spin_lock_irqsave(&bank->lock, flags);
+ /*
+* If this is the first gpio_request for the bank,
+* enable the bank module.
+*/
+ if (!bank->mod_usage)
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_get_sync failed\n",
+ __func__, bank->id);
+ spin_unlock_irqrestore(&bank->lock, flags);
+ return -EINVAL;
+ }
+
/* Set trigger to none. You need to enable the desired trigger with
* request_irq() or set_irq_type().
*/
@@ -530,6 +545,19 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
}
_reset_gpio(bank, bank->chip.base + offset);
+
+ /*
+* If this is the last gpio to be freed in the bank,
+* disable the bank module.
+*/
+ if (!bank->mod_usage) {
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d "
+ "pm_runtime_put_sync failed\n",
+ __func__, bank->id);
+ }
+ }
+
spin_unlock_irqrestore(&bank->lock, flags);
}
@@ -556,6 +584,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
bank = irq_get_handler_data(irq);
isr_reg = bank->base + bank->regs->irqstatus;
+ pm_runtime_get_sync(bank->dev);
if (WARN_ON(!isr_reg))
goto exit;
@@ -617,6 +646,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
exit:
if (!unmasked)
chained_irq_exit(chip, desc);
+ pm_runtime_put_sync_suspend(bank->dev);
}
static void gpio_irq_shutdown(struct irq_data *d)
@@ -1018,7 +1048,13 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
}
pm_runtime_enable(bank->dev);
- pm_runtime_get_sync(bank->dev);
+ pm_runtime_irq_safe(bank->dev);
+ if (IS_ERR_VALUE(pm_runtime_get_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d pm_runtime_get_sync "
+ "failed\n", __func__, bank->id);
+ iounmap(bank->base);
+ return -EINVAL;
+ }
if (bank->is_mpuio)
mpuio_init(bank);
@@ -1027,6 +1063,13 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
+ if (IS_ERR_VALUE(pm_runtime_put_sync(bank->dev) < 0)) {
+ dev_err(bank->dev, "%s: GPIO bank %d pm_runtime_put_sync "
+ "failed\n", __func__, bank->id);
+ iounmap(bank->base);
+ return -EINVAL;
+ }
+
list_add_tail(&bank->node, &omap_gpio_list);
return ret;
@@ -1037,7 +1080,7 @@ err_exit:
return ret;
}
-static int omap_gpio_suspend(void)
+static int omap_gpio_suspend(struct device *dev)
{
struct gpio_bank *bank;
@@ -1055,12 +1098,13 @@ static int omap_gpio_suspend(void)
bank->saved_wakeup = __raw_readl(wake_status);
MOD_REG_BIT(bank->regs->wkup_en, bank->suspend_wakeup, 1);
spin_unlock_irqrestore(&bank->lock, flags);
+ pm_runtime_put_sync(dev);
}
return 0;
}
-static void omap_gpio_resume(void)
+static int omap_gpio_resume(struct device *dev)
{
struct gpio_bank *bank;
@@ -1069,18 +1113,16 @@ static void omap_gpio_resume(void)
unsigned long flags;
if (!bank->regs->wkup_en)
- return;
+ return 0;
+ pm_runtime_get_sync(dev);
spin_lock_irqsave(&bank->lock, flags);
MOD_REG_BIT(bank->regs->wkup_en, bank->saved_wakeup, 1);
[PATCH v6 13/25] gpio/omap: use pinctrl offset instead of macro
From: Charulatha V
Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio15xx.c |1 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c |8 +++-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 2adfece..950e467 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -85,6 +85,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
.irqctrl= OMAP1510_GPIO_INT_CONTROL,
+ .pinctrl= OMAP1510_GPIO_PIN_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 92a6262..a4e5ef3 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_reg_offs {
u16 irqctrl;
u16 edgectrl1;
u16 edgectrl2;
+ u16 pinctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index fa2fb4f..e2a8b09 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -481,15 +481,13 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
*/
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-#ifdef CONFIG_ARCH_OMAP15XX
- if (bank->method == METHOD_GPIO_1510) {
- void __iomem *reg;
+ if (bank->regs->pinctrl) {
+ void __iomem *reg = bank->base + bank->regs->pinctrl;
/* Claim the pin for MPU */
- reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
-#endif
+
if (bank->regs->ctrl && !bank->mod_usage) {
void __iomem *reg = bank->base + bank->regs->ctrl;
u32 ctrl;
--
1.7.0.4
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[PATCH v6 14/25] gpio/omap: remove unnecessary bit-masking for read access
Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar --- drivers/gpio/gpio-omap.c |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index e2a8b09..08c7991 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -567,8 +567,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) enabled = _get_gpio_irqbank_mask(bank); isr_saved = isr = __raw_readl(isr_reg) & enabled; - if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO)) - isr &= 0x; if (bank->level_mask) level_mask = bank->level_mask & enabled; -- 1.7.0.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v6 11/25] gpio/omap: cleanup set_gpio_triggering function
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAP_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets.
Signed-off-by: Charulatha V
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio15xx.c |2 +
arch/arm/mach-omap1/gpio16xx.c |3 +
arch/arm/mach-omap1/gpio7xx.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |3 +
drivers/gpio/gpio-omap.c | 148
5 files changed, 46 insertions(+), 112 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f8c15ea..2adfece 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus = OMAP1510_GPIO_INT_STATUS,
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl= OMAP1510_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 1eb47e2..46bb57a 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -90,6 +91,8 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.wkup_en= OMAP1610_GPIO_WAKEUPENABLE,
+ .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
+ .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 923eaa1..207a23c 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE >> 1,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl= OMAP7XX_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 61865b4..92a6262 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -195,6 +195,9 @@ struct omap_gpio_reg_offs {
u16 leveldetect1;
u16 risingdetect;
u16 fallingdetect;
+ u16 irqctrl;
+ u16 edgectrl1;
+ u16 edgectrl2;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f5dab29..ac0c346 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -195,49 +195,25 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
__raw_writel(val, reg);
}
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
{
void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio;
- if (cpu_is_omap44xx()) {
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_LOW);
- MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
- trigger & IRQ_TYPE_LEVEL_HIGH);
- MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_RISING);
- MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
- trigger & IRQ_TYPE_EDGE_FALLING);
- } else {
- MOD_REG_BIT(OMAP24XX_GPI
[PATCH v6 06/25] gpio/omap: make non-wakeup GPIO part of pdata
From: Charulatha V
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |8
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c |8 +---
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 6c6b1a7..a430fb1 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -75,6 +75,14 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
switch (oh->class->rev) {
case 0:
+ if (id == 1)
+ /* non-wakeup GPIO pins for OMAP2 Bank1 */
+ pdata->non_wakeup_gpios = 0xe203ffc0;
+ else if (id == 2)
+ /* non-wakeup GPIO pins for OMAP2 Bank2 */
+ pdata->non_wakeup_gpios = 0x08700040;
+ /* fall through */
+
case 1:
pdata->bank_type = METHOD_GPIO_24XX;
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 2c06e43..a93adeb 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
bool loses_context; /* whether the bank would ever lose context */
+ u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index d114759..69271c4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1017,13 +1017,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
- } else if (cpu_is_omap24xx()) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
- if (bank->id < ARRAY_SIZE(non_wakeup_gpios))
- bank->non_wakeup_gpios =
- non_wakeup_gpios[bank->id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank)) {
@@ -1171,6 +1164,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
+ bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
bank->loses_context = pdata->loses_context;
bank->get_context_loss_count = pdata->get_context_loss_count;
bank->regs = pdata->regs;
--
1.7.0.4
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[PATCH v6 16/25] gpio/omap: fix bankwidth for OMAP7xx MPUIO
From: Charulatha V
In all OMAP1 SoCs, the MPUIO bank width is 16 bits. But, in OMAP7xx,
it is wrongly initialised to 32. Fix this.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio7xx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 433491c..4771d6b 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_width = 32,
.is_mpuio = true,
+ .bank_width = 16,
.bank_stride= 2,
.regs = &omap7xx_mpuio_regs,
};
--
1.7.0.4
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[PATCH v6 03/25] gpio/omap: make gpio_context part of gpio_bank structure
From: Charulatha V
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 76 -
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 9a160d4..e83109c 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -30,6 +30,19 @@
static LIST_HEAD(omap_gpio_list);
+struct gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
@@ -1490,33 +1486,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- gpio_context[i].irqenable1 =
+ bank->context.irqenable1 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
- gpio_context[i].irqenable2 =
+ bank->context.irqenable2 =
__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
- gpio_context[i].wake_en =
+ bank->context.wake_en =
__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- gpio_context[i].ctrl =
+ bank->context.ctrl =
__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- gpio_context[i].oe =
+ bank->context.oe =
__raw_readl(bank->base + OMAP24XX_GPIO_OE);
- gpio_context[i].leveldetect0 =
+ bank->context.leveldetect0 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
- gpio_context[i].leveldetect1 =
+ bank->context.leveldetect1 =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- gpio_context[i].risingdetect =
+ bank->context.risingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
- gpio_context[i].fallingdetect =
+ bank->context.fallingdetect =
__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- gpio_context[i].dataout =
+ bank->context.dataout =
__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
}
}
@@ -1524,33 +1518,31 @@ void omap_gpio_save_context(void)
void omap_gpio_restore_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, &omap_gpio_list, node) {
- i++;
if (!bank->loses_context)
continue;
- __raw_writel(gpio_context[i].irqenable1,
+ __raw_writel(bank->context.irqenable1,
bank->base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(gpio_context[i].irqenable2,
+ __raw_writel(bank->context.irqenable2,
bank->base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(gpio_context[i].wake_en,
+ __raw_writel(bank->context.wake_en,
bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(gpio_context[i].ctrl,
+ __raw_writel(bank->context.ctrl,
bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(gpio_context[i].oe,
+ __raw_writel(bank->context.oe,
bank->base + OMAP24XX_GPIO_OE);
- __raw_writel(gpio_context[i].leveldetect0,
+ __
[PATCH v6 10/25] gpio/omap: remove hardcoded offsets in context save/restore
It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 41 ++-
3 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 06fa913..5ce695c 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -94,6 +94,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -116,6 +117,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 9590532..61865b4 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+ u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index a008fbd..f5dab29 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1362,45 +1362,42 @@ void omap2_gpio_resume_after_idle(void)
static void omap_gpio_save_context(struct gpio_bank *bank)
{
bank->context.irqenable1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_readl(bank->base + bank->regs->irqenable);
bank->context.irqenable2 =
- __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_readl(bank->base + bank->regs->irqenable2);
bank->context.wake_en =
- __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
- bank->context.ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
- bank->context.oe = __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+ __raw_readl(bank->base + bank->regs->wkup_en);
+ bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
+ bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
bank->context.leveldetect0 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_readl(bank->base + bank->regs->leveldetect0);
bank->context.leveldetect1 =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_readl(bank->base + bank->regs->leveldetect1);
bank->context.risingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_readl(bank->base + bank->regs->risingdetect);
bank->context.fallingdetect =
- __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
- bank->context.dataout =
- __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout);
}
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
__raw_writel(bank->context.irqenable1,
- bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ bank->base + bank->regs->irqenable);
__raw_writel(bank->context.irqenable2,
- bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ bank->base + bank->regs->irqenable2);
__raw_writel(bank->context.wake_en,
- bank->base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank->context.ctrl, bank->base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank->context.oe, bank->base + OMAP24XX_GPIO_OE);
+ bank->base + bank->regs->wkup_en);
+ __raw_writel(bank->context.ctrl, bank->base +
[PATCH v6 07/25] gpio/omap: avoid cpu checks during module ena/disable
From: Charulatha V
Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 53 ++--
3 files changed, 26 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index a430fb1..72a640d 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -98,6 +98,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+ pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -114,6 +115,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+ pdata->regs->ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index a93adeb..eaa6de3 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+ u16 ctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 69271c4..fe28f93 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -83,6 +83,7 @@ struct gpio_bank {
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT BIT(0)
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
@@ -573,22 +574,18 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is enabled, clocks are not gated */
- ctrl &= 0xFFFE;
- __raw_writel(ctrl, reg);
- }
- bank->mod_usage |= 1 << offset;
+ if (bank->regs->ctrl && !bank->mod_usage) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is enabled, clocks are not gated */
+ ctrl &= ~GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
+ bank->mod_usage |= 1 << offset;
+
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
@@ -621,22 +618,18 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
__raw_writel(1 << offset, reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- bank->mod_usage &= ~(1 << offset);
- if (!bank->mod_usage) {
- void __iomem *reg = bank->base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
- }
+ bank->mod_usage &= ~(1 << offset);
+
+ if (bank->regs->ctrl && !bank->mod_usage) {
+ void __iomem *reg = bank->base + bank->regs->ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank->chip.base + offset);
spin_unlock_irqrestore(&bank->lock, flags);
}
--
1.7.0.4
--
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[PATCH v6 01/25] gpio/omap: remove dependency on gpio_bank_count
From: Charulatha V
The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio15xx.c |1 -
arch/arm/mach-omap1/gpio16xx.c |2 -
arch/arm/mach-omap1/gpio7xx.c |2 -
arch/arm/mach-omap2/gpio.c |1 -
arch/arm/plat-omap/include/plat/gpio.h |3 -
drivers/gpio/gpio-omap.c | 163
6 files changed, 80 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 399da4c..f8c15ea 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -115,7 +115,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(&omap15xx_mpu_gpio);
platform_device_register(&omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 0f399bd..df4bb44 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -221,8 +221,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 5ab63ea..923eaa1 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -282,8 +282,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 2765cdc..fb162fd 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -121,7 +121,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
omap_device_disable_idle_on_suspend(od);
- gpio_bank_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3..dd330ed 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -202,9 +202,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
};
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0599854..14fced1 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -28,7 +28,10 @@
#include
#include
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+ u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
@@ -865,9 +860,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = &gpio_bank[0];
platform_set_drvdata(&omap_mpuio_device, bank);
if (platform_driver_register(&omap_mpuio_driver) == 0)
@@ -875,13 +869,13 @@ static inline void mpuio_init(void)
}
#else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif /* 16xx */
#else
#define bank_is_mpuio(bank)0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif
@@ -1003,20 +997,8 @@ static void __init omap_gpio_show_rev(struct gpio_bank
*bank)
*/
static struct lock_class_key gpio_lock_class;
-static inline int init_gpio_info(struct platform_device *pdev)
-{
[PATCH v6 22/25] gpio/omap: save and restore debounce registers
From: Nishant Menon
GPIO debounce registers need to be saved and restored for proper functioning
of driver. To save the registers, we cannot cut the clock before the save,
hence move the clk disable after the save.
Signed-off-by: Nishanth Menon
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c | 22 +++---
1 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index dc382f6..67e08e9 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -41,6 +41,8 @@ struct gpio_regs {
u32 risingdetect;
u32 fallingdetect;
u32 dataout;
+ u32 debounce;
+ u32 debounce_en;
};
struct gpio_bank {
@@ -1158,9 +1160,6 @@ static int omap_gpio_runtime_suspend(struct device *dev)
u32 l1 = 0, l2 = 0;
int j;
- for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
- clk_disable(bank->dbck);
-
if (!bank->mod_usage)
return 0;
@@ -1192,6 +1191,16 @@ update_gpio_context_count:
bank->context_loss_count =
bank->get_context_loss_count(bank->dev);
+ if (bank->dbck_enable_mask) {
+ bank->context.debounce = __raw_readl(bank->base +
+ bank->regs->debounce);
+ bank->context.debounce_en = __raw_readl(bank->base +
+ bank->regs->debounce_en);
+ }
+
+ for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
+ clk_disable(bank->dbck);
+
return 0;
}
@@ -1331,6 +1340,13 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank->context.fallingdetect,
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
+
+ if (bank->dbck_enable_mask) {
+ __raw_writel(bank->context.debounce, bank->base +
+ bank->regs->debounce);
+ __raw_writel(bank->context.debounce_en,
+ bank->base + bank->regs->debounce_en);
+ }
}
#else
#define omap_gpio_runtime_suspend NULL
--
1.7.0.4
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[PATCH v6 08/25] gpio/omap: further cleanup using wkup_en register
Wakeup enable register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_en register consistently for
all SoCs wherever applicable.
Signed-off-by: Tarun Kanti DebBarma
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap1/gpio16xx.c |1 +
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 108 ++--
4 files changed, 23 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index df4bb44..1eb47e2 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -89,6 +89,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .wkup_en= OMAP1610_GPIO_WAKEUPENABLE,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 72a640d..b1364b6 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -99,6 +99,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
+ pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -116,6 +117,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
+ pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index eaa6de3..7ea1608 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,7 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 wkup_en;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index fe28f93..eb9849d 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -50,10 +50,8 @@ struct gpio_bank {
u16 irq;
u16 virtual_irq_start;
int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
u32 suspend_wakeup;
u32 saved_wakeup;
-#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
struct gpio_regs context;
@@ -594,30 +592,15 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+ void __iomem *base = bank->base;
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank->method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank->method == METHOD_GPIO_24XX) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 << offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank->method == METHOD_GPIO_44XX) {
+
+ if (bank->regs->wkup_en)
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 << offset, reg);
- }
-#endif
+ MOD_REG_BIT(bank->regs->wkup_en, 1 << offset, 0);
+
bank->mod_usage &= ~(1 << offset);
if (bank->regs->ctrl && !bank->mod_usage) {
@@ -1062,8 +1045,8 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int
irq_start,
ct->chip.irq_mask = irq_gc_mask_set_bit;
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
ct->chip.irq_set_type = gpio_irq_type;
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- if (cpu_is_omap16xx())
+
+ if (bank->regs->wkup_en)
ct->chip.irq_
[PATCH v6 25/25] gpio/omap: handle set_dataout reg capable IP on restore
From: Nishanth Menon
GPIO IP revisions such as those used in OMAP4 have a set_dataout
while the previous revisions used a single dataout register.
Depending on what is available restore the dataout settings
to the right register.
Signed-off-by: Nishanth Menon
Signed-off-by: Tarun Kanti DebBarma
Reviewed-by: Santosh Shilimkar
---
drivers/gpio/gpio-omap.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index a629498..4680b4c 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1334,7 +1334,12 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
bank->base + bank->regs->risingdetect);
__raw_writel(bank->context.fallingdetect,
bank->base + bank->regs->fallingdetect);
- __raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
+ if (bank->regs->set_dataout && bank->regs->clr_dataout)
+ __raw_writel(bank->context.dataout,
+ bank->base + bank->regs->set_dataout);
+ else
+ __raw_writel(bank->context.dataout,
+ bank->base + bank->regs->dataout);
__raw_writel(bank->context.oe, bank->base + bank->regs->direction);
if (bank->dbck_enable_mask) {
--
1.7.0.4
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[PATCH v6 09/25] gpio/omap: use level/edge detect reg offsets
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now
remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |8 ++
arch/arm/plat-omap/include/plat/gpio.h |4 +
drivers/gpio/gpio-omap.c | 118 ++--
3 files changed, 48 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index b1364b6..06fa913 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -100,6 +100,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
+ pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
@@ -118,6 +122,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
+ pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+ pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+ pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
+ pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 7ea1608..9590532 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -190,6 +190,10 @@ struct omap_gpio_reg_offs {
u16 debounce_en;
u16 ctrl;
u16 wkup_en;
+ u16 leveldetect0;
+ u16 leveldetect1;
+ u16 risingdetect;
+ u16 fallingdetect;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index eb9849d..a008fbd 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -253,15 +253,9 @@ static inline void set_24xx_gpio_triggering(struct
gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit;
}
- if (cpu_is_omap44xx()) {
- bank->level_mask =
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank->level_mask =
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
- }
+ bank->level_mask =
+ __raw_readl(bank->base + bank->regs->leveldetect0) |
+ __raw_readl(bank->base + bank->regs->leveldetect1);
}
#endif
@@ -401,12 +395,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned
type)
if (type & ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;
- /* OMAP1 allows only only edge triggering */
- if (!cpu_class_is_omap2()
- && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
+ bank = irq_data_get_irq_chip_data(d);
+
+ if (!bank->regs->leveldetect0 &&
+ (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
- bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(&bank->lock, flags);
@@ -654,9 +648,8 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
isr &= 0x;
- if (cpu_class_is_omap2()) {
+ if (bank->level_mask)
level_mask = bank->level_mask & enabled;
- }
/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
@@ -1260,40 +1253,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_context;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank->saved_datain = __raw_readl(bank->base +
-
[PATCH v6 02/25] gpio/omap: use flag to identify wakeup domain
From: Charulatha V
In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/gpio.c |6 ++
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 13 ++---
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index fb162fd..9f3a007 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include
#include
+#include "powerdomain.h"
+
static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
@@ -39,6 +41,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = "omap_gpio";
int id;
+ struct powerdomain *pwrdm;
/*
* extract the device id from name field available in the
@@ -107,6 +110,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
return -EINVAL;
}
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index dd330ed..58d0bf2 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
+ bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 14fced1..9a160d4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+ bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1172,7 +1173,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank->dbck_flag = pdata->dbck_flag;
bank->stride = pdata->bank_stride;
bank->width = pdata->bank_width;
-
+ bank->loses_context = pdata->loses_context;
bank->regs = pdata->regs;
if (bank->regs->set_dataout && bank->regs->clr_dataout)
@@ -1328,8 +1329,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1396,8 +1396,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) && (bank->id == 0))
+ if (!bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
@@ -1496,7 +1495,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
gpio_context[i].irqenable1 =
@@ -1530,7 +1529,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, &omap_gpio_list, node) {
i++;
- if (bank->id == 0)
+ if (!bank->loses_context)
continue;
__raw_writel(gpio_context[i].irqenable1,
--
1.7.0.4
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[PATCH v6 04/25] gpio/omap: fix pwrdm_post_transition call sequence
From: Charulatha V
The context lost count is modified in omap_sram_idle() path when
pwrdm_post_transition() is called. But pwrdm_post_transition() is called
only after omap_gpio_resume_after_idle() is called. Correct this so that
context lost count is modified before calling omap_gpio_resume_after_idle().
This would be useful when OMAP GPIO save/restore context is called by
the OMAP GPIO driver itself.
Signed-off-by: Charulatha V
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/pm34xx.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7255d9b..1915050 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -363,7 +363,6 @@ void omap_sram_idle(void)
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
return;
}
- pwrdm_pre_transition();
/* NEON control */
if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -386,6 +385,8 @@ void omap_sram_idle(void)
if (!console_trylock())
goto console_still_active;
+ pwrdm_pre_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -455,6 +456,8 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
+ pwrdm_post_transition();
+
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -478,8 +481,6 @@ console_still_active:
omap3_disable_io_chain();
}
- pwrdm_post_transition();
-
clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
}
--
1.7.0.4
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[PATCH v6 00/25] gpio/omap: driver cleanup and fixes
This series is continuation of cleanup of OMAP GPIO driver and fixes.
The cleanup include getting rid of cpu_is_* checks wherever possible,
use of gpio_bank list instead of static array, use of unique platform
specific value associated data member to OMAP platforms to avoid
cpu_is_* checks. The series also include PM runtime support.*
Baseline: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Branch: master
Commit: c6a389f Linux 3.1-rc4
Test Details:
- Compile tested for omap1_defconfig and omap2plus_defconfig.
- OMAP1710-H3: Bootup test pending due to non-availability of setup.
As soon as the setup is available I will boot test and intimate.
- OMAP2430/SDP, OMAP3430/SDP, OMAP4430/SDP, OMAP4430/Blaze: Functional testing.
- PM Testing on OMAP3430-SDP: retention, off_mode, system_wide
suspend and gpio wakeup.
v6:
- Save and restore debounce registers for proper driver operation.
- Restore interrupt enable after all configuration to avoid spurious interrupts.
- Restore dataout register before oe register.
- Restore dataout into dataout_set or dataout based upon the OMAP version.
- Change register name from wkup_status to wkup_en.
- Remove wrapper around omap_pm_get_dev_context_loss_count(). Use it directly.
Also, changed the signature of get_context_loss_count in pdata and bank
structure
from int to u32.
- Use 'context' instead of 'ctx' for clarity wherever it is used.
- Merged two patches into one which are related to bank_is_mpuio() modification.
- Use shift operator instead of following:
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE / 2,
- Remove redundant check from the following
+ if (bank_is_mpuio(bank)) {
+ if (bank->regs->wkup_status) <--- redundant check
+ mpuio_init(bank);
- Change subject of following patch
[PATCH v5 15/22] gpio/omap: use readl in irq_handler for all access
into
[PATCH 14/25] gpio/omap: remove unnecessary bit-masking for read access
- Fix multi-line comments in
[PATCH v5 20/22] gpio/omap: cleanup prepare_for_idle and resume_after_idle
v5:
- Reduce runtime callback overhead when *_get/put_sync() called from probe()
and *_gpio_request/free().
- Dynamic context save within functions where context is modified instead of
saving all context within a common function.
- Removed call to mpuio_init() from omap_gpio_mod_init(). Both the functions are
called once during initialization in *_gpio_probe().
Call to omap_gpio_mod_init() has been removed from omap_gpio_request() on the
first access to gpio bank. One time initialization looks sufficient.
- In *_gpio_irq_handler() use *_put_sync_suspend() instead of *_put_sync().
- Removed hardcoding of OMAP16xx sysconfig register value and instead defined an
associated constant.
- Removed *_get_sync() call from *_gpio_suspend() and *_put_sync() call from
*_gpio_resume(). They got wrongly slipped into the code.
- Removed following redundant zero allocated initialization from
mach-omap2/gpio.c
+ pdata->regs->irqctrl = 0;
+ pdata->regs->edgectrl1 = 0;
+ pdata->regs->edgectrl2 = 0;
- Removed following redundant code in gpio-omap.c
-#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
v4:
- since all accesses to registers are 4-byte aligned, removing special
checks and handling of 16 and 32-bit wide bank registers and instead
use 32-bit read/write access consistently.
- redundant usage of MOD_REG_BIT has been corrected and replaced with
_gpio_rmw().
- omap_gpio_mod_init() function has been simplified further using _gpio_rmw().
- sysconfig register offset specific to omap16xx has been removed along
with its usage.
- additional logic to skip from suspend/resume:
if (!bank->regs->wkup_status || !bank->suspend_wakeup)
return 0;
if (!bank->regs->wkup_status || !bank->saved_wakeup)
return 0;
- separated mpuio related changes into a different patch from the patch where
wakeup status register related changes are done.
- Incorrect replacement of !cpu_class_is_omap2() in gpio_irq_type()
corrected:
+ if (!bank->regs->leveldetect0 &&
+ (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
v3:
- Avoid use of wkup_set and wkup_clear registers. Instead use wkup_status
register for all platforms. This is because on OMAP4 it is recommended
not to use them.
- Remove duplicate code in omap_gpio_mod_init() for handling the same for
32-bit and 16-bit GPIO bank widths. This is accomplished by having two
functions to handle each case while assiging a common function pointer
during initialization.
- Remove OMAP16xx specific one time initialization from omap_gpio_mod_init().
Move it inside omap16xx_gpio_init().
- Avoid usage of USHRT_MAX to indicate undefined values. Use 0 instead.
- In omap_gpio_suspend()/resume() functions remove code that checks
if the feature is supported. Instead, assign these
[PATCH 3/8] OMAP: DSS2: HDMI: change regn definition
regn divider is currently programmed to the registers without change,
but when calculating clock frequencies it is used as regn+1.
To make this similar to how DSI handles the dividers this patch changes
the regn value to be used as such for calculations, but the value
programmed to registers is regn-1.
This simplifies the clock frequency calculations, makes it similar to
DSI, and also allows us to use regn value 0 as undefined.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/hdmi.c |8
include/video/omapdss.h|1 +
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index a3b3899..504c507 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -43,7 +43,7 @@
#include "hdmi.h"
#include "dss_features.h"
-#define HDMI_DEFAULT_REGN 15
+#define HDMI_DEFAULT_REGN 16
#define HDMI_DEFAULT_REGM2 1
static struct {
@@ -208,7 +208,7 @@ static int hdmi_pll_init(enum hdmi_clk_refsel refsel, int
dcofreq,
r = hdmi_read_reg(PLLCTRL_CFG1);
r = FLD_MOD(r, fmt->regm, 20, 9); /* CFG1_PLL_REGM */
- r = FLD_MOD(r, fmt->regn, 8, 1); /* CFG1_PLL_REGN */
+ r = FLD_MOD(r, fmt->regn - 1, 8, 1); /* CFG1_PLL_REGN */
hdmi_write_reg(PLLCTRL_CFG1, r);
@@ -1084,7 +1084,7 @@ static void hdmi_compute_pll(struct omap_dss_device
*dssdev, int phy,
else
pi->regn = dssdev->clocks.hdmi.regn;
- refclk = clkin / (pi->regn + 1);
+ refclk = clkin / pi->regn;
/*
* multiplier is pixel_clk/ref_clk
@@ -1110,7 +1110,7 @@ static void hdmi_compute_pll(struct omap_dss_device
*dssdev, int phy,
* is greater than 1000MHz
*/
pi->dcofreq = phy > 1000 * 100;
- pi->regsd = ((pi->regm * clkin / 10) / ((pi->regn + 1) * 250) + 5) / 10;
+ pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10;
DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf);
DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd);
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 9398dd3..534e3d1 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -460,6 +460,7 @@ struct omap_dss_device {
} dsi;
struct {
+ /* regn is one greater than TRM's REGN value */
u16 regn;
u16 regm2;
} hdmi;
--
1.7.4.1
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[PATCH 06/12] OMAP: DSS2: HDMI: split hdmi_core_ddc_edid
Split the DDC initialization off from hdmi_core_ddc_edid() into a
separate function hdmi_core_ddc_init().
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/hdmi.c | 67 +++-
1 files changed, 45 insertions(+), 22 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index b5aca64..04ce105 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -366,12 +366,8 @@ static void hdmi_phy_off(void)
hdmi_set_phy_pwr(HDMI_PHYPWRCMD_OFF);
}
-static int hdmi_core_ddc_edid(u8 *pedid, int ext)
+static int hdmi_core_ddc_init(void)
{
- u32 i, j;
- char checksum = 0;
- u32 offset = 0;
-
/* Turn on CLK for DDC */
REG_FLD_MOD(HDMI_CORE_AV_DPD, 0x7, 2, 0);
@@ -382,32 +378,55 @@ static int hdmi_core_ddc_edid(u8 *pedid, int ext)
*/
usleep_range(800, 1000);
- if (!ext) {
- /* Clk SCL Devices */
- REG_FLD_MOD(HDMI_CORE_DDC_CMD, 0xA, 3, 0);
+ /* IN_PROG */
+ if (REG_GET(HDMI_CORE_DDC_STATUS, 4, 4) == 1) {
+ /* Abort transaction */
+ REG_FLD_MOD(HDMI_CORE_DDC_CMD, 0xf, 3, 0);
- /* HDMI_CORE_DDC_STATUS_IN_PROG */
+ /* IN_PROG */
if (hdmi_wait_for_bit_change(HDMI_CORE_DDC_STATUS,
- 4, 4, 0) != 0) {
- DSSERR("Failed to program DDC\n");
+ 4, 4, 0) != 0) {
+ DSSERR("Timeout aborting DDC transaction\n");
return -ETIMEDOUT;
}
+ }
- /* Clear FIFO */
- REG_FLD_MOD(HDMI_CORE_DDC_CMD, 0x9, 3, 0);
+ /* Clk SCL Devices */
+ REG_FLD_MOD(HDMI_CORE_DDC_CMD, 0xA, 3, 0);
- /* HDMI_CORE_DDC_STATUS_IN_PROG */
- if (hdmi_wait_for_bit_change(HDMI_CORE_DDC_STATUS,
- 4, 4, 0) != 0) {
- DSSERR("Failed to program DDC\n");
- return -ETIMEDOUT;
- }
+ /* HDMI_CORE_DDC_STATUS_IN_PROG */
+ if (hdmi_wait_for_bit_change(HDMI_CORE_DDC_STATUS, 4, 4, 0) != 0) {
+ DSSERR("Timeout starting SCL clock\n");
+ return -ETIMEDOUT;
+ }
- } else {
- if (ext % 2 != 0)
- offset = 0x80;
+ /* Clear FIFO */
+ REG_FLD_MOD(HDMI_CORE_DDC_CMD, 0x9, 3, 0);
+
+ /* HDMI_CORE_DDC_STATUS_IN_PROG */
+ if (hdmi_wait_for_bit_change(HDMI_CORE_DDC_STATUS, 4, 4, 0) != 0) {
+ DSSERR("Timeout clearing DDC fifo\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int hdmi_core_ddc_edid(u8 *pedid, int ext)
+{
+ u32 i, j;
+ char checksum = 0;
+ u32 offset = 0;
+
+ /* HDMI_CORE_DDC_STATUS_IN_PROG */
+ if (hdmi_wait_for_bit_change(HDMI_CORE_DDC_STATUS, 4, 4, 0) != 0) {
+ DSSERR("Timeout waiting DDC to be ready\n");
+ return -ETIMEDOUT;
}
+ if (ext % 2 != 0)
+ offset = 0x80;
+
/* Load Segment Address Register */
REG_FLD_MOD(HDMI_CORE_DDC_SEGM, ext/2, 7, 0);
@@ -468,6 +487,10 @@ static int read_edid(u8 *pedid, u16 max_length)
int max_ext_blocks = (max_length / 128) - 1;
int len;
+ r = hdmi_core_ddc_init();
+ if (r)
+ return r;
+
r = hdmi_core_ddc_edid(pedid, 0);
if (r)
return r;
--
1.7.4.1
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[PATCH 12/12] OMAPFB: find best mode from edid
Use the new read_edid() function to get EDID information from the
display (when available), and use the information to use a suitable mode
at initialization time.
Hot-plug is not yet supported, so the timings selected at init time will
stay even if the monitor would be changed.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/omapfb/omapfb-main.c | 109 +++---
1 files changed, 99 insertions(+), 10 deletions(-)
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c
b/drivers/video/omap2/omapfb/omapfb-main.c
index cd2cae8e..c84cc29 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -2276,6 +2276,87 @@ static int omapfb_parse_def_modes(struct omapfb2_device
*fbdev)
return r;
}
+static void fb_videomode_to_omap_timings(struct fb_videomode *m,
+ struct omap_video_timings *t)
+{
+ t->x_res = m->xres;
+ t->y_res = m->yres;
+ t->pixel_clock = PICOS2KHZ(m->pixclock);
+ t->hsw = m->hsync_len;
+ t->hfp = m->right_margin;
+ t->hbp = m->left_margin;
+ t->vsw = m->vsync_len;
+ t->vfp = m->lower_margin;
+ t->vbp = m->upper_margin;
+}
+
+static int omapfb_find_best_mode(struct omap_dss_device *display,
+ struct omap_video_timings *timings)
+{
+ struct fb_monspecs *specs;
+ u8 *edid;
+ int r, i, best_xres, best_idx, len;
+
+ if (!display->driver->read_edid)
+ return -ENODEV;
+
+ len = 0x80 * 2;
+ edid = kmalloc(len, GFP_KERNEL);
+
+ r = display->driver->read_edid(display, edid, len);
+ if (r < 0)
+ goto err1;
+
+ specs = kzalloc(sizeof(*specs), GFP_KERNEL);
+
+ fb_edid_to_monspecs(edid, specs);
+
+ if (edid[126] > 0)
+ fb_edid_add_monspecs(edid + 0x80, specs);
+
+ best_xres = 0;
+ best_idx = -1;
+
+ for (i = 0; i < specs->modedb_len; ++i) {
+ struct fb_videomode *m;
+ struct omap_video_timings t;
+
+ m = &specs->modedb[i];
+
+ if (m->pixclock == 0)
+ continue;
+
+ /* skip repeated pixel modes */
+ if (m->xres == 2880 || m->xres == 1440)
+ continue;
+
+ fb_videomode_to_omap_timings(m, &t);
+
+ r = display->driver->check_timings(display, &t);
+ if (r == 0 && best_xres < m->xres) {
+ best_xres = m->xres;
+ best_idx = i;
+ }
+ }
+
+ if (best_xres == 0) {
+ r = -ENOENT;
+ goto err2;
+ }
+
+ fb_videomode_to_omap_timings(&specs->modedb[best_idx], timings);
+
+ r = 0;
+
+err2:
+ fb_destroy_modedb(specs->modedb);
+ kfree(specs);
+err1:
+ kfree(edid);
+
+ return r;
+}
+
static int omapfb_init_display(struct omapfb2_device *fbdev,
struct omap_dss_device *dssdev)
{
@@ -2404,9 +2485,27 @@ static int omapfb_probe(struct platform_device *pdev)
for (i = 0; i < fbdev->num_managers; i++)
fbdev->managers[i] = omap_dss_get_overlay_manager(i);
+ /* gfx overlay should be the default one. find a display
+* connected to that, and use it as default display */
+ ovl = omap_dss_get_overlay(0);
+ if (ovl->manager && ovl->manager->device) {
+ def_display = ovl->manager->device;
+ } else {
+ dev_warn(&pdev->dev, "cannot find default display\n");
+ def_display = NULL;
+ }
+
if (def_mode && strlen(def_mode) > 0) {
if (omapfb_parse_def_modes(fbdev))
dev_warn(&pdev->dev, "cannot parse default modes\n");
+ } else if (def_display && def_display->driver->set_timings &&
+ def_display->driver->check_timings) {
+ struct omap_video_timings t;
+
+ r = omapfb_find_best_mode(def_display, &t);
+
+ if (r == 0)
+ def_display->driver->set_timings(def_display, &t);
}
r = omapfb_create_framebuffers(fbdev);
@@ -2423,16 +2522,6 @@ static int omapfb_probe(struct platform_device *pdev)
DBG("mgr->apply'ed\n");
- /* gfx overlay should be the default one. find a display
-* connected to that, and use it as default display */
- ovl = omap_dss_get_overlay(0);
- if (ovl->manager && ovl->manager->device) {
- def_display = ovl->manager->device;
- } else {
- dev_warn(&pdev->dev, "cannot find default display\n");
- def_display = NULL;
- }
-
if (def_display) {
r = omapfb_init_display(fbdev, def_display);
if (r) {
--
1.7.4.1
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[PATCH 11/12] OMAP: Panda & Beagle: DVI: Add i2c_bus_num
Add i2c bus number for DVI output. The driver uses this to detect if a
panel is connected and to read EDID.
Signed-off-by: Tomi Valkeinen
---
arch/arm/mach-omap2/board-omap3beagle.c |1 +
arch/arm/mach-omap2/board-omap4panda.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 3ae16b4..13244e9 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -207,6 +207,7 @@ static struct panel_generic_dpi_data dvi_panel = {
.name = "generic",
.platform_enable = beagle_enable_dvi,
.platform_disable = beagle_disable_dvi,
+ .i2c_bus_num = 3,
};
static struct omap_dss_device beagle_dvi_device = {
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 9aaa960..d5760e3 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -459,6 +459,7 @@ static struct panel_generic_dpi_data omap4_dvi_panel = {
.name = "generic",
.platform_enable= omap4_panda_enable_dvi,
.platform_disable = omap4_panda_disable_dvi,
+ .i2c_bus_num = 3,
};
struct omap_dss_device omap4_panda_dvi_device = {
--
1.7.4.1
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[PATCH 10/12] OMAP: DSS2: Generic-dpi: add detect & read_edid support
Add i2c_bus_num field to panel_generic_dpi_data, and use it in the
panel-generic-dpi.c to detect if a panel is connected and to read EDID
from the panel.
Original by: Ricardo Salveti de Araujo
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/displays/panel-generic-dpi.c | 92 ++
include/video/omap-panel-generic-dpi.h |2 +
2 files changed, 94 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c
b/drivers/video/omap2/displays/panel-generic-dpi.c
index 9c90f75..6ef36ad 100644
--- a/drivers/video/omap2/displays/panel-generic-dpi.c
+++ b/drivers/video/omap2/displays/panel-generic-dpi.c
@@ -34,6 +34,8 @@
#include
#include
#include
+#include
+#include
#include
@@ -407,6 +409,93 @@ static int generic_dpi_panel_check_timings(struct
omap_dss_device *dssdev,
return dpi_check_timings(dssdev, timings);
}
+
+static int generic_dpi_ddc_read(struct i2c_adapter *adapter,
+ unsigned char *buf, u16 count, u8 offset)
+{
+ int r, retries;
+
+ for (retries = 3; retries > 0; retries--) {
+ struct i2c_msg msgs[] = {
+ {
+ .addr = DDC_ADDR,
+ .flags = 0,
+ .len= 1,
+ .buf= &offset,
+ }, {
+ .addr = DDC_ADDR,
+ .flags = I2C_M_RD,
+ .len= count,
+ .buf= buf,
+ }
+ };
+
+ r = i2c_transfer(adapter, msgs, 2);
+ if (r == 2)
+ return 0;
+
+ if (r != -EAGAIN)
+ break;
+ }
+
+ return r < 0 ? r : -EIO;
+}
+
+static int generic_dpi_panel_read_edid(struct omap_dss_device *dssdev,
+ u8 *edid, int len)
+{
+ struct panel_generic_dpi_data *panel_data = get_panel_data(dssdev);
+ struct i2c_adapter *adapter;
+ int r, l, bytes_read;
+
+ if (panel_data->i2c_bus_num == 0)
+ return -ENODEV;
+
+ adapter = i2c_get_adapter(panel_data->i2c_bus_num);
+ if (!adapter) {
+ dev_err(&dssdev->dev, "Failed to get I2C adapter, bus %d\n",
+ panel_data->i2c_bus_num);
+ return -EINVAL;
+ }
+
+ l = min(EDID_LENGTH, len);
+ r = generic_dpi_ddc_read(adapter, edid, l, 0);
+ if (r)
+ return r;
+
+ bytes_read = l;
+
+ /* if there are extensions, read second block */
+ if (len > EDID_LENGTH && edid[0x7e] > 0) {
+ l = min(EDID_LENGTH, len - EDID_LENGTH);
+
+ r = generic_dpi_ddc_read(adapter, edid + EDID_LENGTH,
+ l, EDID_LENGTH);
+ if (r)
+ return r;
+
+ bytes_read += l;
+ }
+
+ return bytes_read;
+}
+
+static bool generic_dpi_panel_detect(struct omap_dss_device *dssdev)
+{
+ struct panel_generic_dpi_data *panel_data = get_panel_data(dssdev);
+ struct i2c_adapter *adapter;
+ unsigned char out;
+
+ if (panel_data->i2c_bus_num == 0)
+ return true;
+
+ adapter = i2c_get_adapter(panel_data->i2c_bus_num);
+ if (!adapter)
+ return true;
+
+ return generic_dpi_ddc_read(adapter, &out, 1, 0) == 0;
+}
+
static struct omap_dss_driver dpi_driver = {
.probe = generic_dpi_panel_probe,
.remove = __exit_p(generic_dpi_panel_remove),
@@ -420,6 +509,9 @@ static struct omap_dss_driver dpi_driver = {
.get_timings= generic_dpi_panel_get_timings,
.check_timings = generic_dpi_panel_check_timings,
+ .read_edid = generic_dpi_panel_read_edid,
+ .detect = generic_dpi_panel_detect,
+
.driver = {
.name = "generic_dpi_panel",
.owner = THIS_MODULE,
diff --git a/include/video/omap-panel-generic-dpi.h
b/include/video/omap-panel-generic-dpi.h
index 127e3f2..3ab023a 100644
--- a/include/video/omap-panel-generic-dpi.h
+++ b/include/video/omap-panel-generic-dpi.h
@@ -27,11 +27,13 @@ struct omap_dss_device;
* @name: panel name
* @platform_enable: platform specific panel enable function
* @platform_disable: platform specific panel disable function
+ * @i2c_bus_num: i2c bus id for the panel
*/
struct panel_generic_dpi_data {
const char *name;
int (*platform_enable)(struct omap_dss_device *dssdev);
void (*platform_disable)(struct omap_dss_device *dssdev);
+ u16 i2c_bus_num;
};
#endif /* __OMAP_PANEL_GENERIC_DPI_H */
--
1.7.4.1
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[PATCH 08/12] OMAP: DSS2: HDMI: remove error prints in check_timings
check_timings() is supposed to be used to verify if timings are ok or
not. Currently the HDMI driver prints error messages if the timings are
not ok. This is not right, as it is no error to give invalid timings to
check_timings().
Remove the error prints.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/hdmi.c |1 -
drivers/video/omap2/dss/hdmi_omap4_panel.c |6 +-
2 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 34e05ee..55edbd2 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -1105,7 +1105,6 @@ int omapdss_hdmi_display_check_timing(struct
omap_dss_device *dssdev,
cm = hdmi_get_code(timings);
if (cm.code == -1) {
- DSSERR("Invalid timing entered\n");
return -EINVAL;
}
diff --git a/drivers/video/omap2/dss/hdmi_omap4_panel.c
b/drivers/video/omap2/dss/hdmi_omap4_panel.c
index 5e314e8..ffea8d3 100644
--- a/drivers/video/omap2/dss/hdmi_omap4_panel.c
+++ b/drivers/video/omap2/dss/hdmi_omap4_panel.c
@@ -170,11 +170,7 @@ static int hdmi_check_timings(struct omap_dss_device
*dssdev,
mutex_lock(&hdmi.hdmi_lock);
r = omapdss_hdmi_display_check_timing(dssdev, timings);
- if (r) {
- DSSERR("Timing cannot be applied\n");
- goto err;
- }
-err:
+
mutex_unlock(&hdmi.hdmi_lock);
return r;
}
--
1.7.4.1
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[PATCH 09/12] OMAP: DSS2: HDMI: implement detect()
Implement detect() by checking the hot plug detect status.
The implementation is not very good, as it always turns on the HDMI
output to get the detection working. HDMI driver needs improvements so
that we could enable only core parts of it.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/dss.h |1 +
drivers/video/omap2/dss/hdmi.c | 18 ++
drivers/video/omap2/dss/hdmi_omap4_panel.c | 25 +
3 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 6102b80..dd7dc19 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -493,6 +493,7 @@ void omapdss_hdmi_display_set_timing(struct omap_dss_device
*dssdev);
int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
struct omap_video_timings *timings);
int omapdss_hdmi_read_edid(u8 *buf, int len);
+bool omapdss_hdmi_detect(void);
int hdmi_panel_init(void);
void hdmi_panel_exit(void);
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 55edbd2..e8a977e 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -1148,6 +1148,24 @@ int omapdss_hdmi_read_edid(u8 *buf, int len)
return r;
}
+bool omapdss_hdmi_detect(void)
+{
+ int r;
+
+ mutex_lock(&hdmi.lock);
+
+ r = hdmi_runtime_get();
+ BUG_ON(r);
+
+ /* HPD */
+ r = REG_GET(HDMI_CORE_SYS_SYS_STAT, 1, 1);
+
+ hdmi_runtime_put();
+ mutex_unlock(&hdmi.lock);
+
+ return r == 1;
+}
+
int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev)
{
int r = 0;
diff --git a/drivers/video/omap2/dss/hdmi_omap4_panel.c
b/drivers/video/omap2/dss/hdmi_omap4_panel.c
index ffea8d3..c859421 100644
--- a/drivers/video/omap2/dss/hdmi_omap4_panel.c
+++ b/drivers/video/omap2/dss/hdmi_omap4_panel.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include "dss.h"
@@ -198,6 +199,29 @@ err:
return r;
}
+static bool hdmi_detect(struct omap_dss_device *dssdev)
+{
+ int r;
+
+ mutex_lock(&hdmi.hdmi_lock);
+
+ if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) {
+ r = omapdss_hdmi_display_enable(dssdev);
+ if (r)
+ goto err;
+ }
+
+ r = omapdss_hdmi_detect();
+
+ if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED ||
+ dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
+ omapdss_hdmi_display_disable(dssdev);
+err:
+ mutex_unlock(&hdmi.hdmi_lock);
+
+ return r;
+}
+
static struct omap_dss_driver hdmi_driver = {
.probe = hdmi_panel_probe,
.remove = hdmi_panel_remove,
@@ -209,6 +233,7 @@ static struct omap_dss_driver hdmi_driver = {
.set_timings= hdmi_set_timings,
.check_timings = hdmi_check_timings,
.read_edid = hdmi_read_edid,
+ .detect = hdmi_detect,
.driver = {
.name = "hdmi_panel",
.owner = THIS_MODULE,
--
1.7.4.1
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[PATCH 07/12] OMAP: DSS2: HDMI: clean up edid reading & fix checksum
Clean up reading of EDID by passing direct address to the block being
read, instead of start address of the whole EDID memory area. Rewrite
the loop which reads the EDID.
This also fixes the checksum calculation, which used to calculate the
checksum only for the first block.
Signed-off-by: Tomi Valkeinen
---
drivers/video/omap2/dss/hdmi.c | 67 ---
1 files changed, 34 insertions(+), 33 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 04ce105..34e05ee 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -414,8 +414,8 @@ static int hdmi_core_ddc_init(void)
static int hdmi_core_ddc_edid(u8 *pedid, int ext)
{
- u32 i, j;
- char checksum = 0;
+ u32 i;
+ char checksum;
u32 offset = 0;
/* HDMI_CORE_DDC_STATUS_IN_PROG */
@@ -457,21 +457,31 @@ static int hdmi_core_ddc_edid(u8 *pedid, int ext)
return -EIO;
}
- i = ext * 128;
- j = 0;
- while (((REG_GET(HDMI_CORE_DDC_STATUS, 4, 4) == 1) ||
- (REG_GET(HDMI_CORE_DDC_STATUS, 2, 2) == 0)) &&
- j < 128) {
+ for (i = 0; i < 0x80; ++i) {
+ int t;
- if (REG_GET(HDMI_CORE_DDC_STATUS, 2, 2) == 0) {
- /* FIFO not empty */
- pedid[i++] = REG_GET(HDMI_CORE_DDC_DATA, 7, 0);
- j++;
+ /* IN_PROG */
+ if (REG_GET(HDMI_CORE_DDC_STATUS, 4, 4) == 0) {
+ DSSERR("operation stopped when reading edid\n");
+ return -EIO;
+ }
+
+ t = 0;
+ /* FIFO_EMPTY */
+ while (REG_GET(HDMI_CORE_DDC_STATUS, 2, 2) == 1) {
+ if (t++ > 1) {
+ DSSERR("timeout reading edid\n");
+ return -ETIMEDOUT;
+ }
+ udelay(1);
}
+
+ pedid[i] = REG_GET(HDMI_CORE_DDC_DATA, 7, 0);
}
- for (j = 0; j < 128; j++)
- checksum += pedid[j];
+ checksum = 0;
+ for (i = 0; i < 0x80; ++i)
+ checksum += pedid[i];
if (checksum != 0) {
DSSERR("E-EDID checksum failed!!\n");
@@ -481,40 +491,31 @@ static int hdmi_core_ddc_edid(u8 *pedid, int ext)
return 0;
}
-static int read_edid(u8 *pedid, u16 max_length)
+static int read_edid(u8 *edid, int len)
{
- int r = 0, n = 0, i = 0;
- int max_ext_blocks = (max_length / 128) - 1;
- int len;
+ int r, l;
+
+ if (len < 128)
+ return -EINVAL;
r = hdmi_core_ddc_init();
if (r)
return r;
- r = hdmi_core_ddc_edid(pedid, 0);
+ r = hdmi_core_ddc_edid(edid, 0);
if (r)
return r;
- len = 128;
- n = pedid[0x7e];
-
- /*
-* README: need to comply with max_length set by the caller.
-* Better implementation should be to allocate necessary
-* memory to store EDID according to nb_block field found
-* in first block
-*/
- if (n > max_ext_blocks)
- n = max_ext_blocks;
+ l = 128;
- for (i = 1; i <= n; i++) {
- r = hdmi_core_ddc_edid(pedid, i);
+ if (len >= 128 * 2 && edid[0x7e] > 0) {
+ r = hdmi_core_ddc_edid(edid + 0x80, 1);
if (r)
return r;
- len += 128;
+ l += 128;
}
- return len;
+ return l;
}
static int get_timings_index(void)
--
1.7.4.1
--
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