Re: [PATCH 1/4] ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK

2013-06-09 Thread Paul Walmsley
On Thu, 6 Jun 2013, Sebastian Andrzej Siewior wrote:

 From: Philip Avinash avinashphi...@ti.com
 
 EHRPWM module requires explicit clock gating of TBCLK from control
 module. Hence add TBCLK clock node in clock tree for EHRPWM modules.
 
 Signed-off-by: Philip Avinash avinashphi...@ti.com
 [bigeasy: remove CK_AM33XX]
 Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de

Thanks, queued.

- Paul
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Re: [PATCH] ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod

2013-06-09 Thread Paul Walmsley
On Sun, 5 May 2013, Vaibhav Hiremath wrote:

 GFX has a reset status register (PRM_GFX.RM_GFX_RSTST),
 so update the GFX hwmod data with .rstst_off and .st_shift
 information.
 
 Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
 Cc: Paul Walmsley p...@pwsan.com

Thanks, queued.

- Paul
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Re: [PATCH 08/14] MAINTAINERS: fix mach-omap2 clockdomain/powerdomain

2013-06-09 Thread Paul Walmsley
Hi,

On Sat, 2 Mar 2013, Cesar Eduardo Barros wrote:

 The code in these files was moved to cm*.[ch] and prm*.[ch] in the same
 directory by commits 4981539 (ARM: OMAP2+: powerdomain/PRM: move the
 low-level powerdomain functions into PRM) and 4bd5259 (ARM: OMAP2/3:
 clockdomain/PRM/CM: move the low-level clockdomain functions into
 PRM/CM).
 
 I am not sure if this fix is correct, since there are other things in
 these files. Please NAK this patch (and propose a better one) if it is
 wrong.
 
 Cc: Paul Walmsley p...@pwsan.com
 Cc: Rajendra Nayak rna...@ti.com
 Cc: Russ Dill russ.d...@ti.com
 Cc: Santosh Shilimkar santosh.shilim...@ti.com
 Cc: linux-omap@vger.kernel.org
 Signed-off-by: Cesar Eduardo Barros ces...@cesarb.net

Looks like this one got lost in my inbox.  

Acked-by: Paul Walmsley p...@pwsan.com

(but you'll probably need to update it against a recent kernel and resend)


- Paul


 ---
  MAINTAINERS | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)
 
 diff --git a/MAINTAINERS b/MAINTAINERS
 index 92718d8..46c1288 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -5651,10 +5651,8 @@ M: Rajendra Nayak rna...@ti.com
  M:   Paul Walmsley p...@pwsan.com
  L:   linux-omap@vger.kernel.org
  S:   Maintained
 -F:   arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
 -F:   arch/arm/mach-omap2/powerdomain44xx.c
 -F:   arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
 -F:   arch/arm/mach-omap2/clockdomain44xx.c
 +F:   arch/arm/mach-omap2/cm*.[ch]
 +F:   arch/arm/mach-omap2/prm*.[ch]
  
  OMAP AUDIO SUPPORT
  M:   Peter Ujfalusi peter.ujfal...@ti.com
 -- 
 1.7.11.7
 

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[GIT PULL] ARM: OMAP: some clock hwmod changes for v3.11

2013-06-09 Thread Paul Walmsley
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Hi Tony,

The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:

  Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)

are available in the git repository at:

  http://git.kernel.org/cgit/linux/kernel/git/pjw/omap-pending.git 
tags/omap-devel-b-for-3.11

for you to fetch changes up to 563ce4d51a555b45f5d43ff9cf127da8dac9f64d:

  ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK (2013-06-09 01:12:32 -0600)

- 
A few OMAP clock  hwmod changes for v3.11.

Basic test logs are here:

http://www.pwsan.com/omap/testlogs/prcm_devel_v3.11/20130609020805/

- 
Philip Avinash (1):
  ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK

Roger Quadros (1):
  ARM: OMAP3: clock data: get rid of unused USB host clock aliases and 
dummies

Vaibhav Hiremath (1):
  ARM: OMAP2+: AM33xx: Add missing reset status info to GFX hwmod

 arch/arm/mach-omap2/cclock33xx_data.c  |   30 
 arch/arm/mach-omap2/cclock3xxx_data.c  |   11 --
 arch/arm/mach-omap2/control.h  |8 
 arch/arm/mach-omap2/omap_hwmod_33xx_data.c |3 ++-
 4 files changed, 40 insertions(+), 12 deletions(-)

vmlinux object size
(delta in bytes from test_v3.10-rc4 (d683b96b072dc4680fc74964eca77e6a23d1fa6e)):
   text data  bsstotal  kernel
  0 +4480 +448  am33xx_only
  0000  n800_multi_omap2xxx
  0000  n800_only_a
  0000  omap1_defconfig
  0000  omap1_defconfig_1510innovator_only
  0000  omap1_defconfig_5912osk_only
  +4096 +1920+4288  omap2plus_defconfig
  0000  omap2plus_defconfig_2430sdp_only
  0 +1920 +192  omap2plus_defconfig_cpupm
  0 +1920 +192  omap2plus_defconfig_no_pm
  0000  omap2plus_defconfig_omap2_4_only
  0 +1920 +192  omap2plus_defconfig_omap3_4_only
   +176 +128 -176 +128  rmk_omap3430_ldp_allnoconfig
  0 +1920 +192  rmk_omap3430_ldp_oldconfig
   +176 +128 -176 +128  rmk_omap4430_sdp_allnoconfig
  0 +4480 +448  rmk_omap4430_sdp_oldconfig

Boot-time memory difference
(delta in bytes from test_v3.10-rc4 (d683b96b072dc4680fc74964eca77e6a23d1fa6e))
  avail  rsrvd   high  freed  board  kconfig
-8k 8k  .  .  2430sdpomap2plus_defconfig
-8k 8k  .  .  3517evmomap2plus_defconfig
-8k 8k  .  .  3530es3beagle  omap2plus_defconfig
-8k 8k  .  .  3730beaglexm   omap2plus_defconfig
-8k 8k  .  .  4430es2panda   omap2plus_defconfig
-8k 8k  .  .  4460pandaesomap2plus_defconfig
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Re: N900 device tree conversion: how to do first step

2013-06-09 Thread Pali Rohár
On Sunday 09 June 2013 03:59:44 Pavel Machek wrote:
 Hi!
 
 I'd like to convert Nokia N900 to device tree.
 
 Unfortunately, serial port is not easily available (very
 special cable would be needed, does someone know where to get
 one?) and I don't have BDI (and very special cable would be
 needed, too).
 

Hello,

I used serial port only in qemu for debugging. Maybe you can try
to play with qemu first. Qemu has good n900 HW support.

But problematic is to create n900 mtd nand image bootable in
qemu, because it needs closed source nokia bootloader and this
needs to have CAL partition with some unknown data with is
proprietary format.

Nevertheless, there is prebuilded qemu image with maemo5 and with
special version of nokia patches qemu, which was (and still is)
very good for testing anything for n900. Special version of qemu
plus qemu image is part of MADDE development tool, look here:

Info: http://wiki.maemo.org/MADDE
Download link: http://tablets-dev.nokia.com/MADDE.php

Except skinning support and Opengl ES all other nokia patches were
included into Linaro version of qemu, so you can use it without
problems. But you still need proprietary bootloader and correct
CAL partition.

But, nokia released closed redistributable version of bootloader
for qemu and (proprietary) tool which generating mtd nand
partition. You can pass kernel, initfs, rootfs images and it
create correct mtd layout and automatically creating CAL.

Proprietary n900 bootloader (two parts!) for qemu is here:
http://download.meego.com/live/Trunk:/non-oss:/Testing/Trunk_Testing/i586/nolo-qemu-0.20100910-1.2.i586.rpm

Proprietary tool for creating mtd nand file is here:
http://download.meego.com/live/Trunk:/non-oss:/Testing/Trunk_Testing/i586/qflasher-21-1.2.i586.rpm

PS: Sorry for too many closed SW, but there is no FOSS equivalent
and this is the only one option how to use qemu n900 hw support.
U-Boot is ported to n900, but depends on Nokia bootloader...

-- 
Pali Rohár
pali.ro...@gmail.com


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Re: Request for OMAPDSS testing

2013-06-09 Thread Grazvydas Ignotas
Hello,

On Tue, Jun 4, 2013 at 10:40 AM, Tomi Valkeinen tomi.valkei...@ti.com wrote:
 I've made some big changes on the omapdss device model, which involves
 converting all the panel drivers. I've got only a bunch of boards, so I
 hope some of you can perhaps do some minimal tests on some other boards.

Doesn't work on pandora (legacy boardfile boot):

[1.418823] OMAP DSS rev 2.0
[1.447448] omapfb omapfb: no displays
[1.454101] omapfb omapfb: failed to setup omapfb
[1.459106] platform omapfb: Driver omapfb requests probe deferral
...
[2.156860] panel-tpo-td043mtea1 spi1.1: failed to get LCD VCC regulator
[2.164093] spi spi1.1: Driver panel-tpo-td043mtea1 requests probe deferral
...

Needs this small patch:

--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -335,7 +338,7 @@ static struct regulator_consumer_supply
pandora_vdds_supplies[] = {
 };

 static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
-   REGULATOR_SUPPLY(vcc, display0),
+   REGULATOR_SUPPLY(vcc, spi1.1),
 };

 static struct regulator_consumer_supply pandora_usb_phy_supply[] = {

With that it shows Tux and fb console fine, so with above hunk:
Tested-by: Grazvydas Ignotas nota...@gmail.com


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Re: N900 device tree conversion: how to do first step

2013-06-09 Thread Pavel Machek
On Sun 2013-06-09 11:24:40, Pali Rohár wrote:
 On Sunday 09 June 2013 03:59:44 Pavel Machek wrote:
  Hi!
  
  I'd like to convert Nokia N900 to device tree.
  
  Unfortunately, serial port is not easily available (very
  special cable would be needed, does someone know where to get
  one?) and I don't have BDI (and very special cable would be
  needed, too).
  
 
 Hello,
 
 I used serial port only in qemu for debugging. Maybe you can try
 to play with qemu first. Qemu has good n900 HW support.

Yes, qemu is helpful.

For the record: this is how you use it.

KERNEL=/data/l/linux-n900/zImage_dtb
./qflasher -m rx51 -x ./xloader-qemu.bin -s ./secondary-qemu.bin -k $KERNEL -o 
n900.img -p k=6072

 sd-empty
./qemu-system-arm -s -M n900 -mtdblock n900.img -sd sd-empty -serial
stdio -clock unix -redir tcp::10.0.2.15:22

...and this patch is needed to make it past rx51_init.

Author: Pavel pa...@ucw.cz
Date:   Sun Jun 9 18:45:39 2013 +0200

Comment out errata workaround that breaks qemu.

diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 938e46f..0ffd7d3 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -108,11 +108,13 @@ static void __init rx51_init(void)
rx51_peripherals_init();
rx51_camera_init();
 
+#if 0
 #ifdef CONFIG_ARM_ERRATA_430973
printk(KERN_INFO RX-51: Enabling ARM errata 430973 workaround.\n);
/* set IBE to 1 */
rx51_secure_update_aux_cr(1  6, 0);
 #endif
+#endif
 
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);


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Re: N900 device tree conversion: how to do first step

2013-06-09 Thread Pali Rohár
On Sunday 09 June 2013 18:47:45 Pavel Machek wrote:
 On Sun 2013-06-09 11:24:40, Pali Rohár wrote:
  On Sunday 09 June 2013 03:59:44 Pavel Machek wrote:
   Hi!
   
   I'd like to convert Nokia N900 to device tree.
   
   Unfortunately, serial port is not easily available (very
   special cable would be needed, does someone know where to
   get one?) and I don't have BDI (and very special cable
   would be needed, too).
  
  Hello,
  
  I used serial port only in qemu for debugging. Maybe you can
  try to play with qemu first. Qemu has good n900 HW support.
 
 Yes, qemu is helpful.
 
 For the record: this is how you use it.
 
 KERNEL=/data/l/linux-n900/zImage_dtb
 ./qflasher -m rx51 -x ./xloader-qemu.bin -s
 ./secondary-qemu.bin -k $KERNEL -o n900.img -p k=6072
 
  sd-empty
 
 ./qemu-system-arm -s -M n900 -mtdblock n900.img -sd sd-empty
 -serial stdio -clock unix -redir tcp::10.0.2.15:22
 
 ...and this patch is needed to make it past rx51_init.
 
 Author: Pavel pa...@ucw.cz
 Date:   Sun Jun 9 18:45:39 2013 +0200
 
 Comment out errata workaround that breaks qemu.
 
 diff --git a/arch/arm/mach-omap2/board-rx51.c
 b/arch/arm/mach-omap2/board-rx51.c index 938e46f..0ffd7d3
 100644
 --- a/arch/arm/mach-omap2/board-rx51.c
 +++ b/arch/arm/mach-omap2/board-rx51.c
 @@ -108,11 +108,13 @@ static void __init rx51_init(void)
   rx51_peripherals_init();
   rx51_camera_init();
 
 +#if 0
  #ifdef CONFIG_ARM_ERRATA_430973
   printk(KERN_INFO RX-51: Enabling ARM errata 430973
 workaround.\n); /* set IBE to 1 */
   rx51_secure_update_aux_cr(1  6, 0);
  #endif
 +#endif
 
   /* Ensure SDRC pins are mux'd for self-refresh */
   omap_mux_init_signal(sdrc_cke0, OMAP_PIN_OUTPUT);

Hm, right qemu not running in omap secure mode, so it can really 
break booting. So before calling secure code it is needed to 
check if we are really on secure device. I think this code help:

if (omap_type() == OMAP2_DEVICE_TYPE_SEC)

Can somebody confirm if above check is correct for OMAP3 HS 
device? And also if it does not pass in qemu?

-- 
Pali Rohár
pali.ro...@gmail.com


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Re: N900 device tree conversion: how to do first step

2013-06-09 Thread Pavel Machek
On Sun 2013-06-09 03:59:44, Pavel Machek wrote:
 Hi!
 
 I'd like to convert Nokia N900 to device tree.
 
 Unfortunately, serial port is not easily available (very special cable
 would be needed, does someone know where to get one?) and I don't have
 BDI (and very special cable would be needed, too).
 
 So I tried doing very small first step, hoping that I get booting
 system... obviously I did not.
 
 I tried formally switching to device tree while still booting using
 hardcoded functions. No luck. Does anyone see what I did wrong?
 
 Is it possible that n900 has its main memory somewhere else than
 0x8000?

Interesting. It seems that memory setup from atags is indeed 
 0x8000  size 0x0800 
 0x8800  size 0x0800 

. But hopefully that's just complicated way of saying 
 0x8000  size 0x1000 
 
.

Anyway, I now see problem with my reasoning: kernel is full of

if (of_have_populated_dt())

tests, so it is impossible to switch to device tree, and still expect
old-style init to work :-(.

Pavel

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Re: [GIT PULL] omap fixes against v3.10-rc4

2013-06-09 Thread Olof Johansson
On Sat, Jun 8, 2013 at 12:08 PM, Tony Lindgren t...@atomide.com wrote:
 The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:

   Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)

 are available in the git repository at:

   git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap 
 tags/omap-for-v3.10/fixes-v3.10-rc4

Thanks, pulled.


-Olof
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Re: N900 device tree conversion: how to do first step

2013-06-09 Thread Aaro Koskinen
Hi,

On Sun, Jun 09, 2013 at 03:59:44AM +0200, Pavel Machek wrote:
 I'd like to convert Nokia N900 to device tree.
 
 Unfortunately, serial port is not easily available (very special cable
 would be needed, does someone know where to get one?) and I don't have
 BDI (and very special cable would be needed, too).
 
 So I tried doing very small first step, hoping that I get booting
 system... obviously I did not.

The following works for me, it's enough to boot and get the USB networking
working. After that I can connect to the device with ssh. I don't use
serial either, I just have initramfs with busybox+dropbear with hardcoded
interface setup.

---8---

/dts-v1/;

/include/ omap34xx.dtsi

/ {
model = Nokia N900;
compatible = nokia,omap3-n900, ti,omap3;

cpus {
cpu@0 {
cpu0-supply = vcc;
};
};

memory {
device_type = memory;
reg = 0x8000 0x1000; /* 256 MB */
};

};

i2c1 {
clock-frequency = 220;

twl: twl@48 {
reg = 0x48;
interrupts = 7; /* SYS_NIRQ cascaded to intc */
interrupt-parent = intc;
};
};

/include/ twl4030.dtsi

twl_gpio {
ti,pullups  = 0x0;
ti,pulldowns= 0x03ff3f; /* BIT(0..5) | BIT(8..17) */
};

i2c2 {
clock-frequency = 40;
};

i2c3 {
clock-frequency = 10;
};

mmc1 {
status = disabled;
};

mmc2 {
status = disabled;
};

mmc3 {
status = disabled;
};

usb_otg_hs {
interface-type = 0;
usb-phy = usb2_phy;
mode = 2;
power = 50;
};
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[PATCH 0/3] USB: OMAP: Tahvo USB support for 770

2013-06-09 Thread Aaro Koskinen
Hi,

These patches add support for Tahvo USB transceiver and allow using both
host and peripheral modes on Nokia 770.

Tested (peripheral mode, host mode, vbus detection) with 3.10-rc4.

Aaro Koskinen (3):
  ARM: OMAP1: nokia770: enable Tahvo
  USB: OMAP: add omap-otg
  USB: OMAP: Tahvo USB transceiver driver

 arch/arm/mach-omap1/board-nokia770.c |   10 +
 drivers/usb/phy/Kconfig  |   24 ++
 drivers/usb/phy/Makefile |2 +
 drivers/usb/phy/phy-omap-otg.c   |  126 ++
 drivers/usb/phy/phy-tahvo.c  |  429 ++
 include/linux/usb/omap-otg.h |   19 ++
 6 files changed, 610 insertions(+)
 create mode 100644 drivers/usb/phy/phy-omap-otg.c
 create mode 100644 drivers/usb/phy/phy-tahvo.c
 create mode 100644 include/linux/usb/omap-otg.h

-- 
1.7.10.4

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[PATCH 1/3] ARM: OMAP1: nokia770: enable Tahvo

2013-06-09 Thread Aaro Koskinen
Add platform data for Tahvo.

Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
 arch/arm/mach-omap1/board-nokia770.c |   10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/mach-omap1/board-nokia770.c 
b/arch/arm/mach-omap1/board-nokia770.c
index 62a15e2..91449c5 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -234,16 +234,26 @@ static struct i2c_board_info nokia770_i2c_board_info_2[] 
__initdata = {
{
I2C_BOARD_INFO(retu-mfd, 0x01),
},
+   {
+   I2C_BOARD_INFO(tahvo-mfd, 0x02),
+   },
 };
 
 static void __init nokia770_cbus_init(void)
 {
const int retu_irq_gpio = 62;
+   const int tahvo_irq_gpio = 40;
 
if (gpio_request_one(retu_irq_gpio, GPIOF_IN, Retu IRQ))
return;
+   if (gpio_request_one(tahvo_irq_gpio, GPIOF_IN, Tahvo IRQ)) {
+   gpio_free(retu_irq_gpio);
+   return;
+   }
irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
+   irq_set_irq_type(gpio_to_irq(tahvo_irq_gpio), IRQ_TYPE_EDGE_RISING);
nokia770_i2c_board_info_2[0].irq = gpio_to_irq(retu_irq_gpio);
+   nokia770_i2c_board_info_2[1].irq = gpio_to_irq(tahvo_irq_gpio);
i2c_register_board_info(2, nokia770_i2c_board_info_2,
ARRAY_SIZE(nokia770_i2c_board_info_2));
platform_device_register(nokia770_cbus_device);
-- 
1.7.10.4

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[PATCH 2/3] USB: OMAP: add omap-otg

2013-06-09 Thread Aaro Koskinen
Transceivers need to manage OTG controller state on OMAP1 to enable
switching between peripheral and host modes. Provide a driver for that.

Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
 drivers/usb/phy/Kconfig|   10 
 drivers/usb/phy/Makefile   |1 +
 drivers/usb/phy/phy-omap-otg.c |  126 
 include/linux/usb/omap-otg.h   |   19 ++
 4 files changed, 156 insertions(+)
 create mode 100644 drivers/usb/phy/phy-omap-otg.c
 create mode 100644 include/linux/usb/omap-otg.h

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 7ef3eb8..2d2cd5f 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -135,6 +135,16 @@ config USB_GPIO_VBUS
  optionally control of a D+ pullup GPIO as well as a VBUS
  current limit regulator.
 
+config OMAP_OTG
+   tristate OMAP USB OTG controller driver
+   depends on ARCH_OMAP_OTG
+   help
+ Enable this to support some transceivers on OMAP1 platforms. OTG
+ controller is needed to switch between host and peripheral modes.
+
+ This driver can also be built as a module. If so, the module
+ will be called omap-otg.
+
 config USB_ISP1301
tristate NXP ISP1301 USB transceiver support
depends on USB || USB_GADGET
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index a9169cb..c7f391b 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ISP1301_OMAP)+= phy-isp1301-omap.o
 obj-$(CONFIG_MV_U3D_PHY)   += phy-mv-u3d-usb.o
 obj-$(CONFIG_NOP_USB_XCEIV)+= phy-nop.o
 obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
+obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_OMAP_USB3)+= phy-omap-usb3.o
 obj-$(CONFIG_SAMSUNG_USBPHY)   += phy-samsung-usb.o
diff --git a/drivers/usb/phy/phy-omap-otg.c b/drivers/usb/phy/phy-omap-otg.c
new file mode 100644
index 000..cb00ffe
--- /dev/null
+++ b/drivers/usb/phy/phy-omap-otg.c
@@ -0,0 +1,126 @@
+/*
+ * OMAP OTG controller driver
+ *
+ * Based on code from tahvo-usb.c and isp1301_omap.c drivers.
+ *
+ * Copyright (C) 2005-2006 Nokia Corporation
+ * Copyright (C) 2004 Texas Instruments
+ * Copyright (C) 2004 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/io.h
+#include linux/err.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/interrupt.h
+#include linux/usb/omap-otg.h
+#include linux/platform_device.h
+
+struct otg_device {
+   void __iomem*base;
+   struct mutexserialize;
+};
+static struct otg_device *otg_dev;
+
+#define OMAP_OTG_CTRL  (otg_dev-base + 0x0c)
+#define OMAP_OTG_ASESSVLD  (1  20)
+#define OMAP_OTG_BSESSEND  (1  19)
+#define OMAP_OTG_BSESSVLD  (1  18)
+#define OMAP_OTG_VBUSVLD   (1  17)
+#define OMAP_OTG_ID(1  16)
+#define OMAP_OTG_XCEIV_OUTPUTS \
+   (OMAP_OTG_ASESSVLD | OMAP_OTG_BSESSEND | OMAP_OTG_BSESSVLD | \
+OMAP_OTG_VBUSVLD  | OMAP_OTG_ID)
+
+static void omap_otg_ctrl(u32 outputs)
+{
+   u32 l;
+
+   l = readl(OMAP_OTG_CTRL);
+   l = ~OMAP_OTG_XCEIV_OUTPUTS;
+   l |= outputs;
+   writel(l, OMAP_OTG_CTRL);
+}
+
+void omap_otg_set_mode(enum omap_otg_mode mode)
+{
+   if (!otg_dev) {
+   WARN(1, %s: controller not present\n, __func__);
+   return;
+   }
+   mutex_lock(otg_dev-serialize);
+   switch (mode) {
+   case OMAP_OTG_MODE_DEVICE:
+   /*
+* Set B-session valid.
+*/
+   omap_otg_ctrl(OMAP_OTG_ID | OMAP_OTG_BSESSVLD);
+   break;
+   case OMAP_OTG_MODE_HOST:
+   /*
+* Set A-session valid.
+*/
+   omap_otg_ctrl(OMAP_OTG_ASESSVLD);
+   break;
+   case OMAP_OTG_MODE_DISCONNECT:
+   /*
+* Set B-session end to indicate no VBUS.
+*/
+   omap_otg_ctrl(OMAP_OTG_ID | OMAP_OTG_BSESSEND);
+   break;
+   default:
+   WARN(1, %s: unknown mode: %d\n, __func__, mode);
+   }
+   mutex_unlock(otg_dev-serialize);
+}
+EXPORT_SYMBOL_GPL(omap_otg_set_mode);
+
+static int omap_otg_probe(struct platform_device *dev)
+{
+   struct otg_device *odev;
+   u32 rev;
+
+   if (otg_dev)
+  

[PATCH 3/3] USB: OMAP: Tahvo USB transceiver driver

2013-06-09 Thread Aaro Koskinen
Add Tahvo USB transceiver driver.

Based on old code from linux-omap tree. The original driver was written
by Juha Yrjölä, Tony Lindgren, and Timo Teräs.

Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
 drivers/usb/phy/Kconfig |   14 ++
 drivers/usb/phy/Makefile|1 +
 drivers/usb/phy/phy-tahvo.c |  429 +++
 3 files changed, 444 insertions(+)
 create mode 100644 drivers/usb/phy/phy-tahvo.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 2d2cd5f..f796745 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -145,6 +145,20 @@ config OMAP_OTG
  This driver can also be built as a module. If so, the module
  will be called omap-otg.
 
+config TAHVO_USB
+   tristate Tahvo USB transceiver driver
+   depends on MFD_RETU  OMAP_OTG
+   help
+ Enable this to support USB transceiver on Tahvo. This is used
+ at least on Nokia 770.
+
+config TAHVO_USB_HOST_BY_DEFAULT
+   depends on TAHVO_USB
+   boolean Device in USB host mode by default
+   help
+ Say Y here, if you want the device to enter USB host mode
+ by default on bootup.
+
 config USB_ISP1301
tristate NXP ISP1301 USB transceiver support
depends on USB || USB_GADGET
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index c7f391b..f3984d1 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -13,6 +13,7 @@ phy-fsl-usb2-objs := phy-fsl-usb.o 
phy-fsm-usb.o
 obj-$(CONFIG_FSL_USB2_OTG) += phy-fsl-usb2.o
 obj-$(CONFIG_ISP1301_OMAP) += phy-isp1301-omap.o
 obj-$(CONFIG_MV_U3D_PHY)   += phy-mv-u3d-usb.o
+obj-$(CONFIG_TAHVO_USB)+= phy-tahvo.o
 obj-$(CONFIG_NOP_USB_XCEIV)+= phy-nop.o
 obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
 obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c
new file mode 100644
index 000..51bc40e
--- /dev/null
+++ b/drivers/usb/phy/phy-tahvo.c
@@ -0,0 +1,429 @@
+/*
+ * Tahvo USB transceiver driver
+ *
+ * Copyright (C) 2005-2006 Nokia Corporation
+ *
+ * Parts copied from isp1301_omap.c.
+ * Copyright (C) 2004 Texas Instruments
+ * Copyright (C) 2004 David Brownell
+ *
+ * Original driver written by Juha Yrjölä, Tony Lindgren and Timo Teräs.
+ * Modified for Retu/Tahvo MFD by Aaro Koskinen.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/io.h
+#include linux/clk.h
+#include linux/usb.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/usb/otg.h
+#include linux/mfd/retu.h
+#include linux/usb/gadget.h
+#include linux/usb/omap-otg.h
+#include linux/platform_device.h
+
+#define DRIVER_NAME tahvo-usb
+
+#define TAHVO_REG_IDSR 0x02
+#define TAHVO_REG_USBR 0x06
+
+#define USBR_SLAVE_CONTROL (1  8)
+#define USBR_VPPVIO_SW (1  7)
+#define USBR_SPEED (1  6)
+#define USBR_REGOUT(1  5)
+#define USBR_MASTER_SW2(1  4)
+#define USBR_MASTER_SW1(1  3)
+#define USBR_SLAVE_SW  (1  2)
+#define USBR_NSUSPEND  (1  1)
+#define USBR_SEMODE(1  0)
+
+#define TAHVO_MODE_HOST0
+#define TAHVO_MODE_PERIPHERAL  1
+
+struct tahvo_usb {
+   struct platform_device  *pt_dev;
+   struct usb_phy  phy;
+   int vbus_state;
+   struct mutexserialize;
+   struct clk  *ick;
+   int irq;
+   int tahvo_mode;
+};
+
+static ssize_t vbus_state_show(struct device *device,
+  struct device_attribute *attr, char *buf)
+{
+   struct tahvo_usb *tu = dev_get_drvdata(device);
+   return sprintf(buf, %d\n, tu-vbus_state);
+}
+static DEVICE_ATTR(vbus_state, 0444, vbus_state_show, NULL);
+
+static void check_vbus_state(struct tahvo_usb *tu)
+{
+   struct retu_dev *rdev = dev_get_drvdata(tu-pt_dev-dev.parent);
+   int reg, prev_state;
+
+   reg = retu_read(rdev, TAHVO_REG_IDSR);
+   if (reg  TAHVO_STAT_VBUS) {
+   switch (tu-phy.state) {
+   case OTG_STATE_B_IDLE:
+   /* Enable the gadget driver */
+   if (tu-phy.otg-gadget)
+   usb_gadget_vbus_connect(tu-phy.otg-gadget);
+   omap_otg_set_mode(OMAP_OTG_MODE_DEVICE);
+   tu-phy.state = OTG_STATE_B_PERIPHERAL;
+   

Block layer / MMC: Order of segments in SG-list

2013-06-09 Thread Joel A Fernandes
Hi,
So I tried dumping addresses of an SG list in omap_hsmmc driver before
it is passed to DMA.

I found some interesting traces occasionally such as the below SG list
of length 4.

[6.758716] (0) length=4096, sg virt addr=c1318000, sg phy addr=81318000
[6.765863] (1) length=4096, sg virt addr=c1317000, sg phy addr=81317000
[6.773011] (2) length=4096, sg virt addr=c1316000, sg phy addr=81316000
[6.780087] (3) length=4096, sg virt addr=c1315000, sg phy addr=81315000

What is interesting is these chunks are really physically contiguous
but in reverse order in the list. I think a smarter ordering can
actually improve through put considerably and save precious DMA
resources by not having to allocate slots for parts of contiguous
chunk of physical memory.

Is there any particular reason why this might be the case? I traced to
find that the SG list is actually prepared by mmc_queue_map_sg -
blk_rq_map_sg

Thanks in advance on any insight on the above.

Regards,
Joel
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OMAP baseline test results for v3.10-rc5

2013-06-09 Thread Paul Walmsley

Here are some basic OMAP test results for Linux v3.10-rc5.
Logs and other details at:

http://www.pwsan.com/omap/testlogs/test_v3.10-rc5/20130609031534/


Test summary


Build: uImage:
Pass (16/16): am33xx_only, n800_multi_omap2xxx, n800_only_a,
  omap1_defconfig, omap1_defconfig_1510innovator_only, 
  omap1_defconfig_5912osk_only, omap2plus_defconfig, 
  omap2plus_defconfig_2430sdp_only
  omap2plus_defconfig_cpupm, omap2plus_defconfig_no_pm, 
  omap2plus_defconfig_omap2_4_only, 
  omap2plus_defconfig_omap3_4_only, 
  rmk_omap3430_ldp_allnoconfig, 
  rmk_omap3430_ldp_oldconfig, 
  rmk_omap4430_sdp_allnoconfig, 
  rmk_omap4430_sdp_oldconfig

Build: zImage:
Pass ( 1/ 1): omap2plus_defconfig

Boot to userspace:
FAIL ( 3/12): 37xxevm, am335xbone, am335xbonelt
Pass ( 9/12): 2420n800, 2430sdp, 3517evm, 3530es3beagle,
  3730beaglexm, 4430es2panda, 4460pandaes, 5912osk,
  cmt3517

PM: chip retention via suspend:
FAIL ( 3/ 6): 2430sdp, 37xxevm, 4430es2panda
Pass ( 3/ 6): 3530es3beagle, 3730beaglexm, 4460pandaes

PM: chip retention via dynamic idle:
FAIL ( 4/ 6): 2430sdp, 37xxevm, 4430es2panda, 4460pandaes
Pass ( 2/ 6): 3530es3beagle, 3730beaglexm

PM: chip off except CORE via suspend:
Pass ( 1/ 1): 3730beaglexm

PM: chip off except CORE via dynamic idle:
Pass ( 1/ 1): 3730beaglexm

PM: chip off via suspend:
FAIL ( 3/ 4): 37xxevm, 4430es2panda, 4460pandaes
Pass ( 1/ 4): 3530es3beagle

PM: chip off via dynamic idle:
FAIL ( 3/ 4): 37xxevm, 4430es2panda, 4460pandaes
Pass ( 1/ 4): 3530es3beagle


Failing tests: fixed by posted patches
--

(none)


Failing tests: needing investigation


Boot tests:

* 3517EVM  CM-T3517: boot hangs with NFS root
  - Likely some Kconfig, board file, and PM issues with EMAC
  - Longstanding bug
  - Not currently part of the automated test suite

* 37xx EVM: boot fails
  - as of v3.10-rc1
  - Cause unknown

Boot warnings:

* 2420N800, 2430sdp: failed to get counter_32k resource
  - omap2_sync32k_clocksource_init: failed to get counter_32k resource
  - Cause unknown

* CM-T3517: L3 in-band error with IPSS during boot
  - Cause unknown but see http://marc.info/?l=linux-omapm=134833869730129w=2
  - Longstanding issue; does not occur on the 3517EVM

* 2430SDP, 3730 Beagle XM, 3530 Beagle, 3517EVM, CM-T3517: {dmic,mcpdm} lookup 
failure
  - Cause unknown
  - These IP blocks don't exist on OMAP3xxx/AM35xx chips

* 3730 Beagle XM, am335xbone, CM-T3517: uart4_rx.uart4_rx mux failure
  - Cause unknown

PM tests:

* 2430sdp: power domains not entering retention
  - Cause unknown

* 3730 Beagle XM: does not serial wake from off-idle suspend when console
  UART doesn't clock-gate (debug ignore_loglevel)
  - Cause unknown
  - Not yet part of the automated test suite
  - Re-tested at v3.7; still failing:

http://www.pwsan.com/omap/transcripts/20121211-3730beaglexm-3.7-pm-offmode-fail-debug.txt

* 4430es2panda: pwrdm state mismatch on CAM, DSS

* 4430es2panda: CORE, TESLA, IVAHD, L3INIT didn't enter target state
  - Probably due to lack of reset code for M3, DSP, SL2IF, FSUSB
per discussion with Tero Kristo
  - Likely dependent on the bootloader version
- fails with 2012.07-00136-g755de79
  - http://marc.info/?l=linux-arm-kernelm=136432340618226w=2

* 4430es2panda: MPU, ABE didn't enter target state
  - New for v3.10-rc

* 4460pandaes: pwrdm state mismatch on DSS, ABE, IVAHD, TESLA

* 4460pandaes: chip not entering retention in dynamic idle
  - Presumably 4430es2panda also fails this
  - Suspend-to-RAM enters full chip retention

Other:

* 4430es2panda: omap_hwmod: l3_instr: _wait_target_disable failed
  - Unknown cause; could be due to the lack of hierarchical enable/disable
in hwmod code
  - Jon Hunter and Santosh Shilimkar report this does not appear with
the same X-loader/bootloader on his 4430ES2.3 Panda, so could be
ES-level dependent


Failing tests: reported by others 
-

- RTC wakeup from suspend broken on 3730beaglexm
  - as of v3.10-rc1
  - discussion here: http://marc.info/?l=linux-omapm=136915841625434w=2



vmlinux object size
(delta in bytes from test_v3.10-rc4 
(d683b96b072dc4680fc74964eca77e6a23d1fa6e)):
   text data  bsstotal  kernel
   +287   +80 +295  am33xx_only
   +786   +80 +794  n800_multi_omap2xxx
   +818   +80 +826  n800_only_a
  +1207  +160+1223  omap1_defconfig
  +1207  +560+1263  omap1_defconfig_1510innovator_only
  +1239  -160+1223  omap1_defconfig_5912osk_only
  +4451   +80+4459  omap2plus_defconfig
  +1123   +80+1131  omap2plus_defconfig_2430sdp_only
 

RE: [PATCH] ARM: dts: add dtsi for palmas

2013-06-09 Thread J, KEERTHY
Hi Stephen,

Thanks for the review comments.


From: Stephen Warren [swar...@wwwdotorg.org]
Sent: Saturday, June 08, 2013 1:26 AM
To: J, KEERTHY
Cc: Cousson, Benoit; devicetree-disc...@lists.ozlabs.org; 
linux-omap@vger.kernel.org; linux-ker...@vger.kernel.org; ldewan...@nvidia.com; 
grant.lik...@secretlab.ca; swar...@nvidia.com; sa...@linux.intel.com; 
g...@slimlogic.co.uk; lee.jo...@linaro.org
Subject: Re: [PATCH] ARM: dts: add dtsi for palmas

On 06/07/2013 05:28 AM, J Keerthy wrote:
 Adds palmas mfd and palmas regulator nodes. This is
 based on the patch series:

 http://www.mail-archive.com/linux-omap@vger.kernel.org/msg89957.html

 The device tree nodes are based on:
 https://lkml.org/lkml/2013/6/6/25

 diff --git a/arch/arm/boot/dts/palmas.dtsi b/arch/arm/boot/dts/palmas.dtsi

 +palmas {

Hmmm. That (i.e. requiring the board file to declare the node, then
setting up all the content by later including this file) is an
interesting approach. I guess it's reasonable. The one issue is that it
makes it a little harder for the board file to override any of the
properties in this file., although it certainly is possible by including
those overrides after the include.

Irrespective of that, some comments on this:

 + palmas_pmic {

 + ti,ldo6-vibrator;

For example, what if the board doesn't want to have the property set?

 +
 + regulators {
 + smps123_reg: smps123 {
 + regulator-name = smps123;
 + regulator-min-microvolt =  60;
 + regulator-max-microvolt = 150;

Or what if the board wants to limit the voltage range of this regulator
due to what it's used for on the board.

 + regulator-always-on;
 + regulator-boot-on;

And those two properties are almost certainly board-specific policy.

Totally agree to all the above concerns. So can we have a custom .dtsi file
for a board+pmic combination? Or have only the required properties over ridden
in the board file?

Regards,
Keerthy 
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Re: [GIT PULL] ARM: OMAP: hwmod/PRCM: add OMAP5 data

2013-06-09 Thread Tony Lindgren
* Paul Walmsley p...@pwsan.com [130608 13:11]:
 Hi Tony,
 
 The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
 
   Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)
 
 are available in the git repository at:
 
   git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git 
 tags/omap-devel-a-for-3.11
 
 for you to fetch changes up to e4020aa9a8f37d860024fe8a8c8441f003606d2b:
 
   ARM: OMAP5: Enable build and frameowrk initialisations (2013-06-08 12:00:05 
 -0600)
 
 
 Add support for the OMAP5 SoC family.
 
 As part of the transition to DT, no board files will be used
 for OMAP5.  The hwmod data is gradually being transitioned
 away from arch/arm/mach-omap2: IRQ, DMA, and memory map data
 has been moved to DT.  Hopefully the dev_attr and clock role
 data will be the next step.
 
 Basic test logs are available here, although not for OMAP5,
 since I don't have an OMAP5 board:
 http://www.pwsan.com/omap/testlogs/omap5_v3.10/20130608130949/

Thanks pulled into omap-for-v3.11/omap5. I removed the ocp2scp include
as that's unused and the header is removed with the omap4 clean-up.

Regards,

Tony


Author: Tony Lindgren t...@atomide.com
Date:   Sun Jun 9 21:17:15 2013 -0700

ARM: OMAP5: Remove unused include for ocp2scp

This header is not used, and is removed with the omap4 clean-up.

Signed-off-by: Tony Lindgren t...@atomide.com

--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -20,7 +20,6 @@
 #include linux/io.h
 #include linux/platform_data/gpio-omap.h
 #include linux/power/smartreflex.h
-#include linux/platform_data/omap_ocp2scp.h
 #include linux/i2c-omap.h
 
 #include linux/omap-dma.h
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Re: [GIT PULL] ARM: OMAP: some clock hwmod changes for v3.11

2013-06-09 Thread Tony Lindgren
* Paul Walmsley p...@pwsan.com [130609 02:17]:
 Hi Tony,
 
 The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
 
   Linux 3.10-rc4 (2013-06-02 17:11:17 +0900)
 
 are available in the git repository at:
 
   http://git.kernel.org/cgit/linux/kernel/git/pjw/omap-pending.git 
 tags/omap-devel-b-for-3.11
 
 for you to fetch changes up to 563ce4d51a555b45f5d43ff9cf127da8dac9f64d:
 
   ARM: AM33XX: clk: Add clock node for EHRPWM TBCLK (2013-06-09 01:12:32 
 -0600)
 
 
 A few OMAP clock  hwmod changes for v3.11.
 
 Basic test logs are here:
 
 http://www.pwsan.com/omap/testlogs/prcm_devel_v3.11/20130609020805/

Thanks pulled into omap-for-v3.11/soc.

Regards,

Tony
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