[PATCH v2 5/5] arm: dts: am33xx, Add device node for cpsw-ctrl-macid
Add cpsw-ctrl-macid to the am33xx dtsi file. It does not change the
behaviour of boards with a provided mac-address, so it is safe to add it
for all boards with this CPU.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
arch/arm/boot/dts/am33xx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 6d95d3d..5aff257 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -690,11 +690,13 @@
cpsw_emac0: slave@4a100200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
+ ti,mac-address-ctrl = cpsw_ctrl_macid 0;
};
cpsw_emac1: slave@4a100300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
+ ti,mac-address-ctrl = cpsw_ctrl_macid 1;
};
phy_sel: cpsw-phy-sel@44e10650 {
@@ -702,6 +704,13 @@
reg= 0x44e10650 0x4;
reg-names = gmii-sel;
};
+
+ cpsw_ctrl_macid: cpsw-ctrl-macid@44e10630 {
+ compatible = ti,am3352-cpsw-ctrl-macid;
+ #ti,mac-address-ctrl-cells = 1;
+ reg = 0x44e10630 0x10;
+ reg-names = ctrl-macid;
+ };
};
ocmcram: ocmcram@4030 {
--
1.9.0
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[PATCH v2 2/5] net: cpsw: make cpsw.h self-contained
cpsw.h uses the symbol MII_BUS_ID_SIZE which is defined in
linux/phy.h. Add the respective #include to not depend on users to
include it themselves.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
drivers/net/ethernet/ti/cpsw.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/ti/cpsw.h b/drivers/net/ethernet/ti/cpsw.h
index 574f49d..1b71067 100644
--- a/drivers/net/ethernet/ti/cpsw.h
+++ b/drivers/net/ethernet/ti/cpsw.h
@@ -15,6 +15,7 @@
#define __CPSW_H__
#include linux/if_ether.h
+#include linux/phy.h
struct cpsw_slave_data {
charphy_id[MII_BUS_ID_SIZE];
--
1.9.0
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[PATCH v2 0/5] net: cpsw: Support for am335x chip MACIDs
Hi, This series introduces a driver to read and use the MACIDs stored in the am335x control module. These are read-only registers for a unique MACID. At the moment the MACIDs are generated randomly when the mac-address property is not a valid mac address. In v2 I changed the precedence of mac-address and this driver. This driver is only used when no mac-address was set by the bootloader. This way we can avoid using random MAC addresses. There are other minor style and documentation fixes in v2. Best regards, Markus Markus Pargmann (5): net: cpsw: document mac-address being optional net: cpsw: make cpsw.h self-contained net: cpsw: Add control-module macid driver net: cpsw: Use cpsw-ctrl-macid driver arm: dts: am33xx, Add device node for cpsw-ctrl-macid .../devicetree/bindings/net/cpsw-ctrl-macid.txt| 32 + Documentation/devicetree/bindings/net/cpsw.txt | 8 +- arch/arm/boot/dts/am33xx.dtsi | 9 ++ drivers/net/ethernet/ti/Kconfig| 1 + drivers/net/ethernet/ti/Makefile | 2 +- drivers/net/ethernet/ti/cpsw-ctrl-macid.c | 138 + drivers/net/ethernet/ti/cpsw.c | 16 ++- drivers/net/ethernet/ti/cpsw.h | 3 + 8 files changed, 204 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/cpsw-ctrl-macid.txt create mode 100644 drivers/net/ethernet/ti/cpsw-ctrl-macid.c -- 1.9.0 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/5] net: cpsw: document mac-address being optional
mac-address is an optional property. If no mac-address is set, a random mac-address will be generated. Signed-off-by: Markus Pargmann m...@pengutronix.de --- Documentation/devicetree/bindings/net/cpsw.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt index 05d660e..c39f077 100644 --- a/Documentation/devicetree/bindings/net/cpsw.txt +++ b/Documentation/devicetree/bindings/net/cpsw.txt @@ -30,10 +30,10 @@ Required properties: - phy_id : Specifies slave phy id - phy-mode : The interface between the SoC and the PHY (a string that of_get_phy_mode() can understand) -- mac-address : Specifies slave MAC address Optional properties: - dual_emac_res_vlan : Specifies VID to be used to segregate the ports +- mac-address : Specifies slave MAC address Note: ti,hwmods field is used to fetch the base address and irq resources from TI, omap hwmod data base during device registration. -- 1.9.0 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 4/5] net: cpsw: Use cpsw-ctrl-macid driver
Use ctrl-macid driver to obtain the macids stored in the processor. This
is only done when defined in DT.
The internal macid is not used if mac-address is given explicitly. So it
does not change the behavior if the bootloader provides a mac address
through the mac-address property
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
Documentation/devicetree/bindings/net/cpsw.txt | 6 ++
drivers/net/ethernet/ti/cpsw.c | 16 +---
drivers/net/ethernet/ti/cpsw.h | 2 ++
3 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt
b/Documentation/devicetree/bindings/net/cpsw.txt
index c39f077..b997b96 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -34,6 +34,12 @@ Required properties:
Optional properties:
- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
- mac-address : Specifies slave MAC address
+- ti,mac-address-ctrl : When cpsw-ctrl-macid support is compiled-in, this can
+ be set to a phandle with one argument, see
+ cpsw-ctrl-macid.txt. If this method fails, cpsw falls
+ back to a random mac-address. An explicit mac-address
+ property takes precedence.
+
Note: ti,hwmods field is used to fetch the base address and irq
resources from TI, omap hwmod data base during device registration.
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 651087b..05f4948 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -1892,8 +1892,15 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data,
}
mac_addr = of_get_mac_address(slave_node);
- if (mac_addr)
- memcpy(slave_data-mac_addr, mac_addr, ETH_ALEN);
+ if (mac_addr) {
+ memcpy(slave_data-mac_addr, mac_addr,
+ ETH_ALEN);
+ } else {
+ ret = cpsw_ctrl_macid_read(slave_node,
+ slave_data-mac_addr);
+ if (ret == -EPROBE_DEFER)
+ return ret;
+ }
slave_data-phy_if = of_get_phy_mode(slave_node);
if (slave_data-phy_if 0) {
@@ -2038,10 +2045,13 @@ static int cpsw_probe(struct platform_device *pdev)
/* Select default pin state */
pinctrl_pm_select_default_state(pdev-dev);
- if (cpsw_probe_dt(priv-data, pdev)) {
+ ret = cpsw_probe_dt(priv-data, pdev);
+ if (ret == -EINVAL) {
pr_err(cpsw: platform data missing\n);
ret = -ENODEV;
goto clean_runtime_disable_ret;
+ } else if (ret) {
+ goto clean_runtime_disable_ret;
}
data = priv-data;
diff --git a/drivers/net/ethernet/ti/cpsw.h b/drivers/net/ethernet/ti/cpsw.h
index 1b71067..222eebe 100644
--- a/drivers/net/ethernet/ti/cpsw.h
+++ b/drivers/net/ethernet/ti/cpsw.h
@@ -42,4 +42,6 @@ struct cpsw_platform_data {
void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave);
+int cpsw_ctrl_macid_read(struct device_node *np, u8 *mac_addr);
+
#endif /* __CPSW_H__ */
--
1.9.0
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Re: [PATCHv4 4/7] hwspinlock/core: add common OF helpers
On Fri, Mar 14, 2014 at 5:23 PM, Josh Cartwright jo...@codeaurora.org wrote: So, are you suggesting that because fatal errors should be extremely rare, a consuming driver should just assume that if NULL is returned from a hwspin_lock_request*() function that it was the device not yet probed case that was hit? No - it's not the scarcity, it's the severity. The error path that will be optimized here is an invalid id. If this happens, the consumer will crash and burn, and I'm not sure that slightly optimizing his death is very interesting? BTW the hwspinlock core once did use ERR_PTR and friends, and it was changed due to convincing arguments against that methodology on this mailing list. We can change it back but we need a strong(er) case. Note that having the consumer/hwspinlock device relationship modeled in devicetree introduces more potential failure cases... Yeah. Even the error above, presumed to be EPROBE_DEFER, may be a symptom of some other fatal error that occurred, and we can't be sure that a future request will surely be satisfied. So before we bloat our code, I suggest that we wait for consumers to show up and see if there's real benefit. Thanks, Ohad. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/5] iommu/omap: Use the cache cleaning API
On Friday 14 March 2014 09:49 PM, Suman Anna wrote:
Hi Santosh, Laurent, Russell, Arnd,
On 03/14/2014 12:51 PM, Santosh Shilimkar wrote:
On Friday 14 March 2014 12:38 PM, Laurent Pinchart wrote:
Hi Santosh,
On Friday 14 March 2014 12:15:11 Santosh Shilimkar wrote:
+ Russell, Arnd
On Thursday 13 March 2014 10:47 PM, Anna, Suman wrote:
On 03/07/2014 06:46 PM, Laurent Pinchart wrote:
The page table entries must be cleaned from the cache before being
accessed by the IOMMU. Instead of implementing cache management manually
(and ignoring L2 cache), use clean_dcache_area() to make sure the
entries are visible to the device.
Thanks for fixing this, this has been long pending. There have been some
previous attempts at this as well by Ramesh Gupta, with the last thread
(a long time now) being
http://marc.info/?t=13475203541r=1w=2
Santosh,
Can you please take a look at this patch and provide your comments?
regards
Suman
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/iommu/omap-iommu.c | 41
++-
1 file changed, 10 insertions(+), 31 deletions(-)
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index a893eca..bb605c9 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -500,24 +500,9 @@ EXPORT_SYMBOL_GPL(omap_foreach_iommu_device);
/*
*H/W pagetable operations
*/
-static void flush_iopgd_range(u32 *first, u32 *last)
+static void flush_pgtable(void *addr, size_t size)
{
-/* FIXME: L2 cache should be taken care of if it exists */
-do {
-asm(mcrp15, 0, %0, c7, c10, 1 @ flush_pgd
-: : r (first));
-first += L1_CACHE_BYTES / sizeof(*first);
-} while (first = last);
-}
-
-static void flush_iopte_range(u32 *first, u32 *last)
-{
-/* FIXME: L2 cache should be taken care of if it exists */
-do {
-asm(mcrp15, 0, %0, c7, c10, 1 @ flush_pte
-: : r (first));
-first += L1_CACHE_BYTES / sizeof(*first);
-} while (first = last);
+clean_dcache_area(addr, size);
I remember NAKing this approach in past and my stand remains same.
The cache APIs which you are trying to use here are not suppose
to be used outside.
So this particular change has a long history (have to dig through to educate
myself). I have not seen clean_dcache_area attempted before, and I wasn't
sure myself it it can be used here. Ramesh and Fernando definitely did start
out with dmac_flush_range and outer_flush_range which was definitely nacked
[1].
OK. Please wrap the lines appropriately while replying.
Please note that the omap-iommu driver already uses clean_dcache_area().
That's where I got the idea :-)
So that fall through the cracks then ;-)
I think the right way to fix this is to make use of streaming APIs.
If needed, IOMMU can have its own dma_ops for special case
handling if any.
I can replace clean_dcache_area() with dma_map_page() as done by the
arm-smmu
driver. If that's fine I'll modify this patch accordingly in v2.
Ramesh had also attempted to use dma_page_single() previously [2], and
Russell has instead suggested to extend the cpu cache operations [3].
Ramesh had worked based on this suggestion and the series reached v6 [4]
(same as link I mentioned above) and this is the last attempt on this, but
the thread went silent.
I am wondering if that is still valid and is the right way to go, as this
seems to be a common problem. I do see dmac_flush_range being used for
similar purposes in msm_iommu.c and exynos-iommu.c, so looks like they also
fell through the cracks.
Thanks for the links. I think you should revive the v6 series unless and until
RMK has some other suggestion. This can also help to remove the wrong usages
from other IOMMU drivers as you pointed out.
Laurent,
Can you drop this patch out from v2 so that it is not clubbed with the small
cleanup patches, and we can track this separately?
Agree
Regards,
Santosh
[1] http://marc.info/?l=linux-omapm=129907009019355w=2
[2] http://marc.info/?t=13028180495r=1w=2
[3] http://marc.info/?l=linux-omapm=131310179423214w=2
[4] http://marc.info/?t=13475203541r=1w=2
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