[PATCH 00/14] irqchip: crossbar: driver fixes
This series does some cleanup and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on linux-next next-20140602 tag + Tony's omap-for-v3.16/crossbar branch. Nishanth Menon (11): irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse warnings irqchip: crossbar: fix checkpatch warning irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: fix memory leak incase of invalid entry irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write Documentation: dt: OMAP: crossbar: add description for interrupt consumer irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC Rajendra Nayak (1): irqchip: crossbar: DRA7: Fix unused crossbar list Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 27 + drivers/irqchip/irq-crossbar.c | 127 +++- 2 files changed, 125 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/14] irqchip: crossbar: driver fixes
This series does some cleanup and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on linux-next next-20140602 tag + Tony's omap-for-v3.16/crossbar branch. The patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates Nishanth Menon (11): irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse warnings irqchip: crossbar: fix checkpatch warning irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: fix memory leak incase of invalid entry irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write Documentation: dt: OMAP: crossbar: add description for interrupt consumer irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC Rajendra Nayak (1): irqchip: crossbar: DRA7: Fix unused crossbar list Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 27 + drivers/irqchip/irq-crossbar.c | 127 +++- 2 files changed, 125 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/14] irqchip: crossbar: fix sparse warnings
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it be static?
drivers/irqchip/irq-crossbar.c:252:5: warning: symbol 'dra_irqs_unused' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:253:22: warning: symbol 'cb_dra_data' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was
not declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c5415ae..5da9d36 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -16,6 +16,7 @@
#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
@@ -126,7 +127,7 @@ found:
return 0;
}
-const struct irq_domain_ops routable_irq_domain_ops = {
+static const struct irq_domain_ops routable_irq_domain_ops = {
.map = crossbar_domain_map,
.unmap = crossbar_domain_unmap,
.xlate = crossbar_domain_xlate
@@ -249,8 +250,8 @@ err1:
}
/* irq number 10 cannot be used because of hw bug */
-int dra_irqs_unused[] = { 10 };
-struct crossbar_data cb_dra_data = { dra_irqs_unused,
+static int dra_irqs_unused[] = { 10 };
+static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
static const struct of_device_id crossbar_match[] __initconst = {
--
1.7.9.5
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[PATCH 01/14] irqchip: crossbar: remove IS_ERR_VALUE check
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index de021638..c5415ae 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -110,15 +110,15 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- unsigned long ret;
+ int ret;
ret = get_prev_map_irq(intspec[1]);
- if (!IS_ERR_VALUE(ret))
+ if (ret = 0)
goto found;
ret = allocate_free_irq(intspec[1]);
- if (IS_ERR_VALUE(ret))
+ if (ret 0)
return ret;
found:
--
1.7.9.5
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[PATCH 03/14] irqchip: crossbar: fix checkpatch warning
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
WARNING: Missing a blank line after declarations
+ int *register_offsets;
+ void (*write)(int, int);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5da9d36..58790d4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -34,7 +34,8 @@ struct crossbar_device {
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
- void (*write) (int, int);
+
+ void (*write)(int, int);
};
/**
@@ -150,7 +151,7 @@ static int __init crossbar_of_init(struct device_node *node,
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
- cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -176,7 +177,7 @@ static int __init crossbar_of_init(struct device_node *node,
}
}
- cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
1.7.9.5
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[PATCH 04/14] irqchip: crossbar: fix kerneldoc warning
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
Warning(drivers/irqchip/irq-crossbar.c:42): missing initial short description
on line:
* struct crossbar_data: Platform specific data
Info(drivers/irqchip/irq-crossbar.c:42): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:50): No description found for parameter
'safe_map'
4 warnings
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 58790d4..7d4db07 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -23,11 +23,13 @@
#define IRQ_SKIP -3
#define GIC_IRQ_START 32
-/*
+/**
+ * struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
+ * @write: register write function pointer
*/
struct crossbar_device {
uint int_max;
@@ -39,9 +41,10 @@ struct crossbar_device {
};
/**
- * struct crossbar_data: Platform specific data
+ * struct crossbar_data - Platform specific data
* @irqs_unused: array of irqs that cannot be used because of hw erratas
* @size: size of the irqs_unused array
+ * @safe_map: safe value to write to crossbar register
*/
struct crossbar_data {
const uint *irqs_unused;
--
1.7.9.5
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[PATCH 05/14] irqchip: crossbar: DRA7: Fix unused crossbar list
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
Technical Reference Manual documentation update expected
DRA72x-TRMINC00067 is being used to track the update.
Reported-by: Nishanth Menon n...@ti.com
Reported-by: Sricharan R r.sricha...@ti.com
Reported-by: Suman Anna s-a...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 7d4db07..42a2e62 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -253,8 +253,8 @@ err1:
return -ENOMEM;
}
-/* irq number 10 cannot be used because of hw bug */
-static int dra_irqs_unused[] = { 10 };
+/* irq number 10,133,139 and 140 cannot be used because of hw bug */
+static int dra_irqs_unused[] = { 10 , 133, 139, 140 };
static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
--
1.7.9.5
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[PATCH 07/14] irqchip: crossbar: return proper error value
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors, return proper
error results in case of failures.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index fea3e5d..524e6e9 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -140,20 +140,26 @@ static const struct irq_domain_ops
routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node,
const struct crossbar_data *data)
{
- int i, size, max, reserved = 0, entry, safe_map;
+ int i, size, max = 0, reserved = 0, entry, safe_map;
const __be32 *irqsr;
const int *irqsk = NULL;
+ int ret = -ENOMEM;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
if (!cb)
- return -ENOMEM;
+ return ret;
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
+ if (!max) {
+ pr_err(missing 'ti,max-irqs' property\n);
+ ret = -EINVAL;
+ goto err2;
+ }
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -174,6 +180,7 @@ static int __init crossbar_of_init(struct device_node *node,
i, entry);
if (entry max) {
pr_err(Invalid reserved entry\n);
+ ret = -EINVAL;
goto err3;
}
cb-irq_map[entry] = IRQ_RESERVED;
@@ -198,6 +205,7 @@ static int __init crossbar_of_init(struct device_node *node,
break;
default:
pr_err(Invalid reg-size property\n);
+ ret = -EINVAL;
goto err4;
break;
}
@@ -225,6 +233,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
+ ret = -EINVAL;
goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
@@ -250,7 +259,7 @@ err2:
iounmap(cb-crossbar_base);
err1:
kfree(cb);
- return -ENOMEM;
+ return ret;
}
/* irq number 10,133,139 and 140 cannot be used because of hw bug */
--
1.7.9.5
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[PATCH 08/14] irqchip: crossbar: change the goto naming
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 524e6e9..cf0d79f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -152,17 +152,17 @@ static int __init crossbar_of_init(struct device_node
*node,
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
- goto err1;
+ goto err_cb;
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
ret = -EINVAL;
- goto err2;
+ goto err_base;
}
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
- goto err2;
+ goto err_base;
cb-int_max = max;
@@ -181,7 +181,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid reserved entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_RESERVED;
}
@@ -189,7 +189,7 @@ static int __init crossbar_of_init(struct device_node *node,
cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
- goto err3;
+ goto err_irq_map;
of_property_read_u32(node, ti,reg-size, size);
@@ -206,7 +206,7 @@ static int __init crossbar_of_init(struct device_node *node,
default:
pr_err(Invalid reg-size property\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
break;
}
@@ -234,7 +234,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
}
cb-irq_map[entry] = IRQ_SKIP;
}
@@ -251,13 +251,13 @@ static int __init crossbar_of_init(struct device_node
*node,
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
-err4:
+err_reg_offset:
kfree(cb-register_offsets);
-err3:
+err_irq_map:
kfree(cb-irq_map);
-err2:
+err_base:
iounmap(cb-crossbar_base);
-err1:
+err_cb:
kfree(cb);
return ret;
}
--
1.7.9.5
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[PATCH 06/14] irqchip: crossbar: fix memory leak incase of invalid entry
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
register_offsets are freed as well.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 42a2e62..fea3e5d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -225,7 +225,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
- goto err3;
+ goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
}
--
1.7.9.5
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[PATCH 14/14] irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 816d11b..7476d9b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -35,8 +35,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped as
a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -44,3 +46,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+ device_y@0x4a033000 {
+ /* Direct mapped GIC SPI 1 used */
+ interrupts = GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 745ad0a..2b61bbb 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -98,8 +98,13 @@ static inline int allocate_free_irq(int cb_no)
static inline bool needs_crossbar_write(irq_hw_number_t hw)
{
- if (hw GIC_IRQ_START)
- return true;
+ int cb_no;
+
+ if (hw GIC_IRQ_START) {
+ cb_no = cb-irq_map[hw - GIC_IRQ_START];
+ if (cb_no != IRQ_RESERVED cb_no != IRQ_SKIP)
+ return true;
+ }
return false;
}
@@ -139,8 +144,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
int ret;
int req_num = intspec[1];
+ int direct_map_num;
if (req_num = cb-max_crossbar_sources) {
+ direct_map_num = req_num - cb-max_crossbar_sources;
+ if (direct_map_num cb-int_max) {
+ ret = cb-irq_map[direct_map_num];
+ if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
+ /* We use the interrupt num as h/w irq num */
+ ret = direct_map_num;
+ goto found;
+ }
+ }
+
pr_err(%s: requested crossbar number %d max %d\n,
__func__, req_num, cb-max_crossbar_sources);
return -EINVAL;
--
1.7.9.5
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[PATCH 13/14] Documentation: dt: OMAP: crossbar: add description for interrupt consumer
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 6d2e2f5..816d11b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -27,3 +27,20 @@ Examples:
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
+
+Consumer:
+
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
+Documentation/devicetree/bindings/arm/gic.txt for further details.
+
+An interrupt consumer on an SoC using crossbar will use:
+ interrupts = GIC_SPI request_number interrupt_level
+request number shall be between 0 to that described by
+ti,max-crossbar-sources
+
+Example:
+ device_x@0x4a023000 {
+ /* Crossbar 8 used */
+ interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
--
1.7.9.5
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[PATCH 12/14] irqchip: crossbar: introduce centralized check for crossbar write
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index cf69c4d..745ad0a 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -96,10 +96,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -117,7 +127,7 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START)
+ if (needs_crossbar_write(hw))
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
}
--
1.7.9.5
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[PATCH 11/14] irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..6d2e2f5 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -22,6 +23,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ ti,max-crossbar-sources = 400;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 2a73a66..cf69c4d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
/**
* struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -33,6 +34,7 @@
*/
struct crossbar_device {
uint int_max;
+ uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -126,12 +128,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+ int req_num = intspec[1];
- ret = get_prev_map_irq(intspec[1]);
+ if (req_num = cb-max_crossbar_sources) {
+ pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+ return -EINVAL;
+ }
+
+ ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
- ret = allocate_free_irq(intspec[1]);
+ ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -164,6 +173,14 @@ static int __init crossbar_of_init(struct device_node
*node,
if (!cb-crossbar_base)
goto err_cb;
+ of_property_read_u32(node, ti,max-crossbar-sources,
+cb-max_crossbar_sources);
+ if (!cb-max_crossbar_sources) {
+ pr_err(missing 'ti,max-crossbar-sources' property\n);
+ ret = -EINVAL;
+ goto err_base;
+ }
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
--
1.7.9.5
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[PATCH 10/14] irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq) gets called when irq_desc(irq) is disposed.
After this the irq is anyways unusable and have to mapped again.
Adding the above kerneldoc for unmap callback clarity.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5f3e75a..2a73a66 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -101,6 +101,16 @@ static int crossbar_domain_map(struct irq_domain *d,
unsigned int irq,
return 0;
}
+/**
+ * crossbar_domain_unmap - unmap a crossbar-irq connection
+ * @d: domain of irq to unmap
+ * @irq: virq number
+ *
+ * The map/unmap callbacks need not be called same number of times for
+ * a particular irq. But still use counting is not needed here, because
+ * unmap(irq) gets called when irq_desc(irq) is disposed. After this the
+ * irq is anyways unusuable and have to be mapped again.
+ */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
--
1.7.9.5
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[PATCH 09/14] irqchip: crossbar: set cb pointer to null in case of error
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R r.sricha...@ti.com --- drivers/irqchip/irq-crossbar.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index cf0d79f..5f3e75a 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -259,6 +259,8 @@ err_base: iounmap(cb-crossbar_base); err_cb: kfree(cb); + + cb = NULL; return ret; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
am335x: system doesn't reboot after flashing NAND
Kernel: 3.14, 3.15 (I haven't tried another kernels) As soon as I write something to my NAND flash (via cat image /dev/mtdblockx or ubiupdatevol) and make reboot or press a reset button, I see only C and nothing happens before I make a power cycle. Any idea? Yegor -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] mfd: Immutable branch between MFD and OMAP, due for v3.16
On Mon, 02 Jun 2014, Tony Lindgren wrote: * Tony Lindgren t...@atomide.com [140528 11:11]: * Lee Jones lee.jo...@linaro.org [140528 00:14]: Thanks Tony, here's the pull-request: The following changes since commit 455c6fdbd219161bd09b1165f11699d6d73de11c: Linux 3.14 (2014-03-30 20:40:15 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git tags/mfd-omap-v3.16-1 for you to fetch changes up to 43fef47f94a1ae46fb2720dada32fa3b5547bee2: mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle (2014-05-28 08:06:18 +0100) Second immutable branch between MFD and OMAP due for the v3.16 merge window. Thanks a lot, this will make it easier for me to chase down potential PM related regressions ;) I'm merging this for testing only into the linux-omap master branch, no need for me to include it into any of my upstream heading branches. Lee, I'm not seeing this in linux next, did you maybe forget to merge it into the MFD tree? I didn't forget, but I didn't do it either. :) I have re-merged all of the IBs this morning, so should be in -next by tomorrow. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] ARM: OMAP2+: remove DMA interrupt if DT provided
This series removes the DMA interrupt registration if DT provides interrupts, so we have no need for hwmod provided interrupt number. This is a pre-req for crossbar migration as DMA is the last driver to use interrupt definition from hwmod. Nishanth Menon (2): ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver ARM: DRA7: hwmod: remove interrupts for DMA arch/arm/mach-omap2/dma.c |3 +++ arch/arm/mach-omap2/omap_hwmod_7xx_data.c |9 - arch/arm/plat-omap/dma.c |5 +++-- include/linux/omap-dma.h |1 + 4 files changed, 7 insertions(+), 11 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver
From: Nishanth Menon n...@ti.com
we have currently 2 DMA drivers that try to co-exist.
drivers/dma/omap-dma.c which registers it's own IRQ and is device tree
aware and uses arch/arm/plat-omap/dma.c instance created by
arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).
Currently both try to register interrupts and mach-omap2/plat-omap dma.c
attempts to use the IRQ number registered by hwmod to register it's own
interrupt handler.
Now, there is no reasonable way of static allocating DMA irq in GIC
SPI when we use crossbar. However, since the dma_chan structure is
freed as a result of IRQ not being present due to devm allocation,
maintaining information of channel by platform code fails at a later
point in time when that region of memory is reused.
So, if hwmod does not indicate an IRQ number, then, assume that
dma-engine will take care of the interrupt handling.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/dma.c |3 +++
arch/arm/plat-omap/dma.c |5 +++--
include/linux/omap-dma.h |1 +
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index a6d2cf1..e1a56d8 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -259,6 +259,9 @@ static int __init omap2_system_dma_init_dev(struct
omap_hwmod *oh, void *unused)
if (cpu_is_omap34xx() (omap_type() != OMAP2_DEVICE_TYPE_GP))
d-dev_caps |= HS_CHANNELS_RESERVED;
+ if (platform_get_irq_byname(pdev, 0) 0)
+ d-dev_caps |= DMA_ENGINE_HANDLE_IRQ;
+
/* Check the capabilities register for descriptor loading feature */
if (dma_read(CAPS_0, 0) DMA_HAS_DESCRIPTOR_CAPS)
dma_common_ch_end = CCDN;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b5608b1..7aae0e5 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2100,7 +2100,7 @@ static int omap_system_dma_probe(struct platform_device
*pdev)
omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
DMA_DEFAULT_FIFO_DEPTH, 0);
- if (dma_omap2plus()) {
+ if (dma_omap2plus() !(d-dev_caps DMA_ENGINE_HANDLE_IRQ)) {
strcpy(irq_name, 0);
dma_irq = platform_get_irq_byname(pdev, irq_name);
if (dma_irq 0) {
@@ -2145,7 +2145,8 @@ static int omap_system_dma_remove(struct platform_device
*pdev)
char irq_name[4];
strcpy(irq_name, 0);
dma_irq = platform_get_irq_byname(pdev, irq_name);
- remove_irq(dma_irq, omap24xx_dma_irq);
+ if (dma_irq = 0)
+ remove_irq(dma_irq, omap24xx_dma_irq);
} else {
int irq_rel = 0;
for ( ; irq_rel dma_chan_count; irq_rel++) {
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index c29a6de..8b2b46d 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -147,6 +147,7 @@ static inline bool omap_dma_filter_fn(struct dma_chan *c,
void *d)
#define IS_WORD_16 BIT(0xd)
#define ENABLE_16XX_MODE BIT(0xe)
#define HS_CHANNELS_RESERVED BIT(0xf)
+#define DMA_ENGINE_HANDLE_IRQ BIT(0x10)
/* Defines for DMA Capabilities */
#define DMA_HAS_TRANSPARENT_CAPS (0x1 18)
--
1.7.9.5
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[PATCH 2/2] ARM: DRA7: hwmod: remove interrupts for DMA
From: Nishanth Menon n...@ti.com
DMA interrupts are now available in of, and the definitions are
duplicates in hwmod. This prevents us from dynamically allocating
interrupt resources for dma from devicetree.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c |9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..31fd260 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -343,19 +343,10 @@ static struct omap_dma_dev_attr dma_dev_attr = {
};
/* dma_system */
-static struct omap_hwmod_irq_info dra7xx_dma_system_irqs[] = {
- { .name = 0, .irq = 12 + DRA7XX_IRQ_GIC_START },
- { .name = 1, .irq = 13 + DRA7XX_IRQ_GIC_START },
- { .name = 2, .irq = 14 + DRA7XX_IRQ_GIC_START },
- { .name = 3, .irq = 15 + DRA7XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod dra7xx_dma_system_hwmod = {
.name = dma_system,
.class = dra7xx_dma_hwmod_class,
.clkdm_name = dma_clkdm,
- .mpu_irqs = dra7xx_dma_system_irqs,
.main_clk = l3_iclk_div,
.prcm = {
.omap4 = {
--
1.7.9.5
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[PATCH 2/2] ARM: dts: DRA7: Add crossbar device binding
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Benoit Cousson bcous...@baylibre.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
Tested-by: Darren Etheridge detheri...@ti.com
Tested-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 133 ---
1 file changed, 75 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1cf4ee1..0fedbcd 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -80,8 +80,8 @@
ti,hwmods = l3_main_1, l3_main_2;
reg = 0x4400 0x100,
0x4500 0x1000;
- interrupts = GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH;
prm: prm@4ae06000 {
compatible = ti,dra7-prm;
@@ -156,10 +156,10 @@
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
- interrupts = GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
#dma-cells = 1;
#dma-channels = 32;
#dma-requests = 127;
@@ -168,7 +168,7 @@
gpio1: gpio@4ae1 {
compatible = ti,omap4-gpio;
reg = 0x4ae1 0x200;
- interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio1;
gpio-controller;
#gpio-cells = 2;
@@ -179,7 +179,7 @@
gpio2: gpio@48055000 {
compatible = ti,omap4-gpio;
reg = 0x48055000 0x200;
- interrupts = GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio2;
gpio-controller;
#gpio-cells = 2;
@@ -190,7 +190,7 @@
gpio3: gpio@48057000 {
compatible = ti,omap4-gpio;
reg = 0x48057000 0x200;
- interrupts = GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio3;
gpio-controller;
#gpio-cells = 2;
@@ -201,7 +201,7 @@
gpio4: gpio@48059000 {
compatible = ti,omap4-gpio;
reg = 0x48059000 0x200;
- interrupts = GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio4;
gpio-controller;
#gpio-cells = 2;
@@ -212,7 +212,7 @@
gpio5: gpio@4805b000 {
compatible = ti,omap4-gpio;
reg = 0x4805b000 0x200;
- interrupts = GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio5;
gpio-controller;
#gpio-cells = 2;
@@ -223,7 +223,7 @@
gpio6: gpio@4805d000 {
compatible = ti,omap4-gpio;
reg = 0x4805d000 0x200;
- interrupts = GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio6;
[PATCH 0/2] ARM: dts: dra7: Add crossbar dt support
This series introduces DT support for crossbar device and changes dra7 peripherals to use crossbar number instead of irq. This depends on below driver fixes and DMA cleanup series. http://www.spinics.net/lists/arm-kernel/msg336594.html R Sricharan (2): ARM: dts: DRA7: Add routable-irqs property for gic node ARM: dts: DRA7: Add crossbar device binding arch/arm/boot/dts/dra7.dtsi | 134 --- 1 file changed, 76 insertions(+), 58 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: dts: DRA7: Add routable-irqs property for gic node
From: R Sricharan r.sricha...@ti.com There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Cc: Benoit Cousson bcous...@baylibre.com Cc: Santosh Shilimkar santosh.shilim...@ti.com Cc: Rajendra Nayak rna...@ti.com Cc: Tony Lindgren t...@atomide.com Tested-by: Darren Etheridge detheri...@ti.com Tested-by: Roger Quadros rog...@ti.com --- arch/arm/boot/dts/dra7.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e..1cf4ee1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -45,6 +45,7 @@ compatible = arm,cortex-a15-gic; interrupt-controller; #interrupt-cells = 3; + arm,routable-irqs = 192; reg = 0x48211000 0x1000, 0x48212000 0x1000, 0x48214000 0x2000, -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] ARM: dts: dra7: Add crossbar dt support
Hi, On Tuesday 03 June 2014 02:40 PM, Sricharan R wrote: This series introduces DT support for crossbar device and changes dra7 peripherals to use crossbar number instead of irq. This depends on below driver fixes and DMA cleanup series. Sorry, i meant to say crossbar driver fixes and cleanup series. Regards, Sricharan http://www.spinics.net/lists/arm-kernel/msg336594.html R Sricharan (2): ARM: dts: DRA7: Add routable-irqs property for gic node ARM: dts: DRA7: Add crossbar device binding arch/arm/boot/dts/dra7.dtsi | 134 --- 1 file changed, 76 insertions(+), 58 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ASoC: free jack GPIOs before the sound card is freed
On Fri, May 30, 2014 at 12:42:57PM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com This is the same change as commit fb6b8e71448a ASoC: tegra: free jack GPIOs before the sound card is freed, but applied to all other ASoC machine drivers where code inspection indicates the same problem exists. Applied, thanks. signature.asc Description: Digital signature
[PATCH] usb: dwc3: Keeping 'resource' related code together
Putting together the code related to getting the 'IORESOURCE_MEM'
and assigning the same to dwc-xhci_resources, for increasing
the readability.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Based on 'next' branch of Felipe's usb tree.
Also cleanly applies to 'usb-next' branch of Greg's usb tree.
drivers/usb/dwc3/core.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 3f59c12..4ca925d 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -656,6 +656,25 @@ static int dwc3_probe(struct platform_device *pdev)
return -ENODEV;
}
+ dwc-xhci_resources[0].start = res-start;
+ dwc-xhci_resources[0].end = dwc-xhci_resources[0].start +
+ DWC3_XHCI_REGS_END;
+ dwc-xhci_resources[0].flags = res-flags;
+ dwc-xhci_resources[0].name = res-name;
+
+ res-start += DWC3_GLOBALS_REGS_START;
+
+ /*
+* Request memory region but exclude xHCI regs,
+* since it will be requested by the xhci-plat driver.
+*/
+ regs = devm_ioremap_resource(dev, res);
+ if (IS_ERR(regs))
+ return PTR_ERR(regs);
+
+ dwc-regs = regs;
+ dwc-regs_size = resource_size(res);
+
if (node) {
dwc-maximum_speed = of_usb_get_maximum_speed(node);
@@ -676,28 +695,9 @@ static int dwc3_probe(struct platform_device *pdev)
if (ret)
return ret;
- dwc-xhci_resources[0].start = res-start;
- dwc-xhci_resources[0].end = dwc-xhci_resources[0].start +
- DWC3_XHCI_REGS_END;
- dwc-xhci_resources[0].flags = res-flags;
- dwc-xhci_resources[0].name = res-name;
-
- res-start += DWC3_GLOBALS_REGS_START;
-
- /*
-* Request memory region but exclude xHCI regs,
-* since it will be requested by the xhci-plat driver.
-*/
- regs = devm_ioremap_resource(dev, res);
- if (IS_ERR(regs))
- return PTR_ERR(regs);
-
spin_lock_init(dwc-lock);
platform_set_drvdata(pdev, dwc);
- dwc-regs = regs;
- dwc-regs_size = resource_size(res);
-
dev-dma_mask = dev-parent-dma_mask;
dev-dma_parms = dev-parent-dma_parms;
dma_set_coherent_mask(dev, dev-parent-coherent_dma_mask);
--
1.7.10.4
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Re: am335x: system doesn't reboot after flashing NAND
On Tue, Jun 3, 2014 at 9:57 AM, Yegor Yefremov yegorsli...@googlemail.com wrote: Kernel: 3.14, 3.15 (I haven't tried another kernels) As soon as I write something to my NAND flash (via cat image /dev/mtdblockx or ubiupdatevol) and make reboot or press a reset button, I see only C and nothing happens before I make a power cycle. Any idea? Just forgot to mention, that I was actually booting from MMC (mmc1). The boot sequence is UART0...XIP...MMC0...NAND. If I just mount ubifs partition as rootfs and change some files, I still can perform reboot and boot from MMC again. The issue seems to occur only, if I write to /dev/mtdblock directly. What can affect ROM boot so that it doesn't follow the boot sequence? Yegor -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
HSI: fix omap ssi driver dependency
The SSI protocol implementation has an incorrect dependency on the OMAP_SSI driver, which allows SSI to be built-in while the underlying OMAP_SSI implementation is a loadable module, causing a link error. This changes the dependency to the simpler 'depends on OMAP_SSI' that also ensures that SSI-protocol can only be a module if OMAP_SSI is not built-in. Signed-off-by: Arnd Bergmann a...@arndb.de Cc: Sebastian Reichel s...@kernel.org Cc: Ivaylo Dimitrov ivo.g.dimitrov...@gmail.com Cc: Pavel Machek pa...@ucw.cz --- diff --git a/drivers/hsi/clients/Kconfig b/drivers/hsi/clients/Kconfig index 71b9f9a..bc60dec 100644 --- a/drivers/hsi/clients/Kconfig +++ b/drivers/hsi/clients/Kconfig @@ -15,7 +15,7 @@ config NOKIA_MODEM config SSI_PROTOCOL tristate SSI protocol - depends on HSI PHONET (OMAP_SSI=y || OMAP_SSI=m) + depends on HSI PHONET OMAP_SSI help If you say Y here, you will enable the SSI protocol aka McSAAB. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/14] irqchip: crossbar: driver fixes
On Tue, 3 Jun 2014, Sricharan R wrote: Please Cc all maintainers on such changes plus the relevant mailinglist. See MAINTAINERS. Thanks, tglx -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 0/5] Add support for SW babble Control
George, On Mon, May 26, 2014 at 4:20 AM, George Cherian george.cher...@ti.com wrote: Series add support for SW babble control logic found in new silicon versions of AM335x. Runtime differentiation of silicon version is done by checking the BABBLE_CTL register. For newer silicon the register default value read is 0x4 and for older versions its 0x0. Please add 'Tested-by: Bin Liu b-...@ti.com' to this series. Thanks, -Bin. Patch 1 - Handle Babble only if MUSB is in HOST mode Patch 2 - Convert recover work to delayed work. Patch 3 - usb_phy_vbus_(off/_on) are NOPs for am335x PHY so use usb_phy(_shutdown/_init) in musb_platform_reset() Patch 4 - Add return value for musb_platform_reset() in prepration to support SW babble_ctrl Patch 5 - Add and Enable sw babble control for newer silicon v5 - v6 : Squash patch 5 and 6 form v5 to avoid build warnings. v4 - v5 : Added a debug print before resetting MUSB. changed a musb_readb to dsps_readb introduced in Patch#5 of v4. v3 - v4 : Fixes an issue in gagdet mode - BUS RESET should not be handled as a BABBLE. Added a check for the same.(Patch #1) Enable sw babble control properly (Patch #6) v2 - v3 : Modify musb_platform_reset() to return zero on success. George Cherian (5): usb: musb: core: Handle Babble condition only in HOST mode usb: musb: core: Convert babble recover work to delayed work usb: musb: dsps: Call usb_phy(_shutdown/_init) during musb_platform_reset() usb: musb: core: Convert the musb_platform_reset to have a return value. usb: musb: dsps: Add the sw_babble_control() and Enable for newer silicon drivers/usb/musb/musb_core.c | 27 -- drivers/usb/musb/musb_core.h | 12 +++--- drivers/usb/musb/musb_dsps.c | 88 ++-- drivers/usb/musb/musb_regs.h | 7 4 files changed, 114 insertions(+), 20 deletions(-) -- 1.8.3.1 -- To unsubscribe from this list: send the line unsubscribe linux-usb in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] usb: dwc3: Keeping 'resource' related code together
From: linux-usb-ow...@vger.kernel.org
[mailto:linux-usb-ow...@vger.kernel.org] On Behalf Of Vivek Gautam
Sent: Tuesday, June 03, 2014 3:40 AM
Putting together the code related to getting the 'IORESOURCE_MEM'
and assigning the same to dwc-xhci_resources, for increasing
the readability.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
Based on 'next' branch of Felipe's usb tree.
Also cleanly applies to 'usb-next' branch of Greg's usb tree.
drivers/usb/dwc3/core.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 3f59c12..4ca925d 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -656,6 +656,25 @@ static int dwc3_probe(struct platform_device *pdev)
return -ENODEV;
}
+ dwc-xhci_resources[0].start = res-start;
+ dwc-xhci_resources[0].end = dwc-xhci_resources[0].start +
+ DWC3_XHCI_REGS_END;
+ dwc-xhci_resources[0].flags = res-flags;
+ dwc-xhci_resources[0].name = res-name;
+
+ res-start += DWC3_GLOBALS_REGS_START;
+
+ /*
+ * Request memory region but exclude xHCI regs,
+ * since it will be requested by the xhci-plat driver.
+ */
+ regs = devm_ioremap_resource(dev, res);
+ if (IS_ERR(regs))
+ return PTR_ERR(regs);
+
+ dwc-regs = regs;
+ dwc-regs_size = resource_size(res);
+
if (node) {
dwc-maximum_speed = of_usb_get_maximum_speed(node);
I think this will break if the following dwc3_core_get_phy() call returns
-EPROBE_DEFER. Since you have incremented res-start above, the next time
this probe function is called, res-start will have the wrong value.
Provided I'm reading the code correctly of course :)
I think you could fix that by decrementing res-start back to its
original value just after the call to resource_size() above.
--
Paul
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Re: [PATCH 1/3] clk: ti: add 'ti,round-rate' flag
On Fri, 30 May 2014, Mike Turquette wrote: Quoting Tomi Valkeinen (2014-05-15 05:25:37) On 15/05/14 09:08, Mike Turquette wrote: Quoting Tomi Valkeinen (2014-05-12 05:13:51) On 12/05/14 15:02, Tero Kristo wrote: On 05/08/2014 12:06 PM, Tomi Valkeinen wrote: The current DPLL code does not try to round the clock rate, and instead returns an error if the requested clock rate cannot be produced exactly by the DPLL. It could be argued that this is a bug, but as the current drivers may depend on that behavior, a new flag 'ti,round-rate' is added which enables clock rate rounding. Someone could probably argue that this flag is not a hardware feature, I fully agree. but instead is used to describe linux-kernel behavior, and would probably be frowned upon by the DT enthusiasts. Othen than that, I like this approach better than a global setting, but would like second opinions here. I think the dpll code should always do rounding. That's what round_rate() is supposed to do, afaik. The current behavior of not rounding and returning an error is a bug in my opinion. From include/linux/clk.h: /** * clk_round_rate - adjust a rate to the exact rate a clock can provide * @clk: clock source * @rate: desired clock rate in Hz * * Returns rounded clock rate in Hz, or negative errno. */ long clk_round_rate(struct clk *clk, unsigned long rate); Definitely not rounding the rate is a bug, with respect to the API definition. Has anyone tried making the new flag as the default behavior and seeing if anything breaks? The v1 of the patch fixed the rounding unconditionally: http://article.gmane.org/gmane.linux.ports.arm.kernel/295077 Paul wanted it optional so that existing drivers would not break. No one knows if there is such a driver, or what would the driver's code look like that would cause an issue. And, as I've pointed out in the above thread, as clk-divider driver doesn't an error code from the dpll driver, my opinion is that such drivers would not work even now. I like v1 more. In any case, I hope we'd get something merged ASAP so that we fix the display AM3xxx boards and we'd still have time to possibly find out if some other driver breaks. Resurrecting this thread. Can we reach a consensus? I prefer V1 as well for the reasons stated above, and also since ti,round-rate isn't really describing the hardware at all in DT. What's really needed is better control over rounding in the clock code. Both the driver API should be improved; and, to the extent that clock sources share the same underlying code implementation, probably some clock source configuration data enhancement is needed (DT or whatever). Furthermore, clk_set_rate() should never silently round a requested rate - it should just return an error if it can't satisfy the requested rate precisely. Silently rounding a rate is racy, and, if we care about drivers behaving consistently across different integration environments, prone to behavior that the driver may not expect. Frankly, a DT ti,round-rate property is risible. I certainly understand why you don't like it and I don't know why that specific property was proposed. The issue has never been whether clk_round_rate() should round rates. Of course it should. The more pertinent question is, *how* should it round the rate? A more reasonable DT property approach would be to specify how the clock's rate should be rounded: to the closest rate, to the closest rate equal to or less than the desired rate, to the closest rate greater than or equal to the desired rate; what the tolerance of the closest rate should be, etc. But drivers, e.g. many drivers that control external I/O, should always be able to state that they want an exact rate. ... In terms of the short-term thing to do, I'm currently thinking that the thing to do is to modify the PLL set_rate() code in mach-omap2/ to not round the rate at all, and then switch the PLL rate rounding code to equal-or-closest-lesser-rate, with something like the oldhardcoded rate tolerances. That should push the responsibility out to the drivers to control how they want the rounding to happen. Then the drivers should be able to probe available rates with repeated calls to clk_round_rate() if they want, and if people get unhappy with that, then it might drive rounding improvements in the clock API. But all this won't happen in -rc8; this is 3.16 material.. We can always see how it goes and fix it up afterwards when everything explodes. No thanks... that's what leads to these kinds of messes :-( - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: HSI: fix omap ssi driver dependency
Hi Arnd, On Tue, Jun 03, 2014 at 05:14:01PM +0200, Arnd Bergmann wrote: The SSI protocol implementation has an incorrect dependency on the OMAP_SSI driver, which allows SSI to be built-in while the underlying OMAP_SSI implementation is a loadable module, causing a link error. This changes the dependency to the simpler 'depends on OMAP_SSI' that also ensures that SSI-protocol can only be a module if OMAP_SSI is not built-in. Signed-off-by: Arnd Bergmann a...@arndb.de Thanks, applied: https://git.kernel.org/cgit/linux/kernel/git/sre/linux-hsi.git/commit/?h=for-nextid=518e1624f56615a88c91bc79c7b4b4d9eb2419e5 -- Sebastian signature.asc Description: Digital signature
