Re: [RFC PATCH 2/2] lib: devres: Add exec versions of devm_ioremap_resource and friends
On Wed, Nov 26, 2014 at 10:14 PM, Dave Gerlach d-gerl...@ti.com wrote:
--- a/lib/devres.c
+++ b/lib/devres.c
@@ -72,6 +72,64 @@ void __iomem *devm_ioremap_nocache(struct device *dev,
resource_size_t offset,
EXPORT_SYMBOL(devm_ioremap_nocache);
/**
+ * devm_ioremap_exec - Managed ioremap_exec()
+ * @dev: Generic device to remap IO address for
+ * @offset: BUS offset to map
+ * @size: Size of map
+ *
+ * Managed ioremap_exec(). Map is automatically unmapped on driver detach.
+ */
+void __iomem *devm_ioremap_exec(struct device *dev, resource_size_t offset,
+ unsigned long size)
+{
[...]
+ addr = ioremap_exec(offset, size);
[...]
+}
+EXPORT_SYMBOL(devm_ioremap_exec);
+
+/**
+ * devm_ioremap_exec_nocache - Managed ioremap_exec_nocache()
+ * @dev: Generic device to remap IO address for
+ * @offset: BUS offset to map
+ * @size: Size of map
+ *
+ * Managed ioremap_exec_nocache(). Map is automatically unmapped on driver
+ * detach.
+ */
+void __iomem *devm_ioremap_exec_nocache(struct device *dev,
+ resource_size_t offset,
+ unsigned long size)
+{
[...]
+ addr = ioremap_exec_nocache(offset, size);
[...]
+}
+EXPORT_SYMBOL(devm_ioremap_exec_nocache);
+
Both of these are identical to the already-existing devm_ioremap() and
devm_ioremap_nocache(), except for the call to the underlying
ioremap*() variant.
Can't the variant selection be done by passing a flag around, set by
the top-level inline functions, to avoid code duplication?
Some architecture-specific ioremap() implementations already work that
way, cfr. arch/m68k/include/asm/io_mm.h:
static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
static inline void __iomem *ioremap_nocache(unsigned long physaddr,
unsigned lonn
g size)
{
return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
}
static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
}
static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
unsigned long size)
{
return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
}
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say programmer or something like that.
-- Linus Torvalds
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[PATCH 0/3] ARM: edma: Correct header file usage
Hi, The linux/platform_data/edma.h file was used for API definition as well, which is not correct since the header should only contain platform data related structures, defines, etc. Mark: I think this series can go via arm since it is just changing include stuff under ASoC. Regards, Peter --- Peter Ujfalusi (3): ASoC: davinci-evm: Do not include edma headers ARM: edma: Rename header file for dmaengine filter function definition ARM: edma: Split up header file to platform_data and API file arch/arm/common/edma.c | 3 +- arch/arm/mach-davinci/devices.c| 1 + arch/arm/mach-davinci/include/mach/da8xx.h | 1 + drivers/dma/edma.c | 2 +- drivers/mmc/host/davinci_mmc.c | 3 +- drivers/spi/spi-davinci.c | 2 +- include/linux/edma-dmaengine.h | 29 ++ include/linux/edma.h | 152 ++--- include/linux/platform_data/edma.h | 148 ++-- sound/soc/davinci/davinci-evm.c| 3 - sound/soc/davinci/davinci-pcm.h| 1 + sound/soc/davinci/edma-pcm.c | 2 +- 12 files changed, 182 insertions(+), 165 deletions(-) create mode 100644 include/linux/edma-dmaengine.h -- 2.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
Rename the include/linux/edma.h to include/linux/edma-dmaengine.h
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 3 +--
drivers/spi/spi-davinci.c | 2 +-
include/linux/edma-dmaengine.h | 29 +
include/linux/edma.h | 29 -
sound/soc/davinci/edma-pcm.c | 2 +-
6 files changed, 33 insertions(+), 34 deletions(-)
create mode 100644 include/linux/edma-dmaengine.h
delete mode 100644 include/linux/edma.h
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 5662a872689b..bac677e65c76 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
#include linux/platform_device.h
#include linux/io.h
#include linux/slab.h
-#include linux/edma.h
+#include linux/edma-dmaengine.h
#include linux/dma-mapping.h
#include linux/of_address.h
#include linux/of_device.h
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 1625f908dc70..47323662c818 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -32,12 +32,11 @@
#include linux/delay.h
#include linux/dmaengine.h
#include linux/dma-mapping.h
-#include linux/edma.h
+#include linux/edma-dmaengine.h
#include linux/mmc/mmc.h
#include linux/of.h
#include linux/of_device.h
-#include linux/platform_data/edma.h
#include linux/platform_data/mmc-davinci.h
/*
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index b3707badb1e5..d61b7cdb2deb 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -27,7 +27,7 @@
#include linux/clk.h
#include linux/dmaengine.h
#include linux/dma-mapping.h
-#include linux/edma.h
+#include linux/edma-dmaengine.h
#include linux/of.h
#include linux/of_device.h
#include linux/of_gpio.h
diff --git a/include/linux/edma-dmaengine.h b/include/linux/edma-dmaengine.h
new file mode 100644
index ..8a2602809a77
--- /dev/null
+++ b/include/linux/edma-dmaengine.h
@@ -0,0 +1,29 @@
+/*
+ * TI EDMA DMA engine driver
+ *
+ * Copyright 2012 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __LINUX_EDMA_DMAENGINE_H
+#define __LINUX_EDMA_DMAENGINE_H
+
+struct dma_chan;
+
+#if defined(CONFIG_TI_EDMA) || defined(CONFIG_TI_EDMA_MODULE)
+bool edma_filter_fn(struct dma_chan *, void *);
+#else
+static inline bool edma_filter_fn(struct dma_chan *chan, void *param)
+{
+ return false;
+}
+#endif
+
+#endif
diff --git a/include/linux/edma.h b/include/linux/edma.h
deleted file mode 100644
index a1307e7827e8..
--- a/include/linux/edma.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * TI EDMA DMA engine driver
- *
- * Copyright 2012 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed as is WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef __LINUX_EDMA_H
-#define __LINUX_EDMA_H
-
-struct dma_chan;
-
-#if defined(CONFIG_TI_EDMA) || defined(CONFIG_TI_EDMA_MODULE)
-bool edma_filter_fn(struct dma_chan *, void *);
-#else
-static inline bool edma_filter_fn(struct dma_chan *chan, void *param)
-{
- return false;
-}
-#endif
-
-#endif
diff --git a/sound/soc/davinci/edma-pcm.c b/sound/soc/davinci/edma-pcm.c
index 59e588abe54b..873c8a090427 100644
--- a/sound/soc/davinci/edma-pcm.c
+++ b/sound/soc/davinci/edma-pcm.c
@@ -23,7 +23,7 @@
#include sound/pcm_params.h
#include sound/soc.h
#include sound/dmaengine_pcm.h
-#include linux/edma.h
+#include linux/edma-dmaengine.h
#include edma-pcm.h
--
2.1.3
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[PATCH 3/3] ARM: edma: Split up header file to platform_data and API file
include/linux/platform_data/ is not a correct place to keep the API
definitions for edma, it is meant to be only for the pdata for the device.
Clean up this by moving the API to include/linux/edma.h
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 3 +-
arch/arm/mach-davinci/devices.c| 1 +
arch/arm/mach-davinci/include/mach/da8xx.h | 1 +
drivers/dma/edma.c | 2 +-
include/linux/edma.h | 153 +
include/linux/platform_data/edma.h | 148 ++--
sound/soc/davinci/davinci-pcm.h| 1 +
7 files changed, 165 insertions(+), 144 deletions(-)
create mode 100644 include/linux/edma.h
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index bac677e65c76..6c49887d326e 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -25,6 +25,7 @@
#include linux/platform_device.h
#include linux/io.h
#include linux/slab.h
+#include linux/edma.h
#include linux/edma-dmaengine.h
#include linux/dma-mapping.h
#include linux/of_address.h
@@ -33,8 +34,6 @@
#include linux/of_irq.h
#include linux/pm_runtime.h
-#include linux/platform_data/edma.h
-
/* Offsets matching struct edmacc_param */
#define PARM_OPT 0x00
#define PARM_SRC 0x04
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 6257aa452568..28572ef24d9c 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -23,6 +23,7 @@
#include linux/platform_data/mmc-davinci.h
#include mach/time.h
#include linux/platform_data/edma.h
+#include linux/edma.h
#include davinci.h
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h
b/arch/arm/mach-davinci/include/mach/da8xx.h
index 39e58b48e826..313129cb6f4a 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -23,6 +23,7 @@
#include mach/serial.h
#include mach/pm.h
#include linux/platform_data/edma.h
+#include linux/edma.h
#include linux/platform_data/i2c-davinci.h
#include linux/platform_data/mmc-davinci.h
#include linux/platform_data/usb-davinci.h
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 8880d6977e5d..126048e79dfc 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -25,7 +25,7 @@
#include linux/spinlock.h
#include linux/of.h
-#include linux/platform_data/edma.h
+#include linux/edma.h
#include dmaengine.h
#include virt-dma.h
diff --git a/include/linux/edma.h b/include/linux/edma.h
new file mode 100644
index ..9df92198c117
--- /dev/null
+++ b/include/linux/edma.h
@@ -0,0 +1,153 @@
+/*
+ * TI EDMA definitions
+ *
+ * Copyright (C) 2006-2013 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This EDMA3 programming framework exposes two basic kinds of resource:
+ *
+ * ChannelTriggers transfers, usually from a hardware event but
+ * also manually or by chaining from DMA completions.
+ * Each channel is coupled to a Parameter RAM (PaRAM) slot.
+ *
+ * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
+ * set), source and destination addresses, a link to a
+ * next PaRAM slot (if any), options for the transfer, and
+ * instructions for updating those addresses. There are
+ * more than twice as many slots as event channels.
+ *
+ * Each PaRAM set describes a sequence of transfers, either for one large
+ * buffer or for several discontiguous smaller buffers. An EDMA transfer
+ * is driven only from a channel, which performs the transfers specified
+ * in its PaRAM slot until there are no more transfers. When that last
+ * transfer completes, the link field may be used to reload the channel's
+ * PaRAM slot with a new transfer descriptor.
+ *
+ * The EDMA Channel Controller (CC) maps requests from channels into physical
+ * Transfer Controller (TC) requests when the channel triggers (by hardware
+ * or software events, or by chaining). The two physical DMA channels provided
+ * by the TCs are thus shared by many logical channels.
+ *
+ * DaVinci hardware also has a QDMA mechanism which is not currently
+ * supported through this interface. (DSP firmware uses it though.)
+ */
+
+#ifndef __LINUX_EDMA_H_
+#define __LINUX_EDMA_H_
+
+#include linux/platform_data/edma.h
+
+/* PaRAM slots are laid out like this */
+struct edmacc_param {
+ u32 opt;
+ u32 src;
+ u32 a_b_cnt;
+ u32 dst;
[PATCH 1/3] ASoC: davinci-evm: Do not include edma headers
The machine driver has no business with the underlying dma. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com --- sound/soc/davinci/davinci-evm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c index 158cb3d1db70..d1a8b6e3ac3b 100644 --- a/sound/soc/davinci/davinci-evm.c +++ b/sound/soc/davinci/davinci-evm.c @@ -14,7 +14,6 @@ #include linux/timer.h #include linux/interrupt.h #include linux/platform_device.h -#include linux/platform_data/edma.h #include linux/i2c.h #include linux/of_platform.h #include linux/clk.h @@ -25,8 +24,6 @@ #include asm/dma.h #include asm/mach-types.h -#include linux/edma.h - #include davinci-pcm.h #include davinci-i2s.h -- 2.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ASoC: davinci-evm: Do not include edma headers
On Thu, Nov 27, 2014 at 12:41:29PM +0200, Peter Ujfalusi wrote: The machine driver has no business with the underlying dma. Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com Acked-by: Mark Brown broo...@kernel.org signature.asc Description: Digital signature
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On Thursday 27 November 2014 12:41:30 Peter Ujfalusi wrote:
diff --git a/include/linux/edma-dmaengine.h b/include/linux/edma-dmaengine.h
new file mode 100644
index ..8a2602809a77
--- /dev/null
+++ b/include/linux/edma-dmaengine.h
@@ -0,0 +1,29 @@
+struct dma_chan;
+
+#if defined(CONFIG_TI_EDMA) || defined(CONFIG_TI_EDMA_MODULE)
+bool edma_filter_fn(struct dma_chan *, void *);
+#else
+static inline bool edma_filter_fn(struct dma_chan *chan, void *param)
+{
+ return false;
+}
+#endif
+
+#endif
It's better not to hardcode the name of the filter function in a driver,
better move the filter function into platform code and pass it down
to the driver in the platform_data pointer in davinci_mmc_config and
davinci_spi_platform_data to get rid of this dependency.
Something roughly like the patch below.
Arnd
---
[DRAFT] ARM: davinci: pass dma config through platform data
DMA slave drivers are supposed to be written independent of the dma engine
driver, which means that the mmc and spi drivers on davinci should not
reference the edma_filter_fn or know about the specific format of the
data passed into it.
This changes the channel data from a resource into a void pointer and
passes it as platform data along with the filter function.
TODO: do the same thing for SPI, and adapt the filter function for the
new format.
Signed-off-by: Arnd Bergmann a...@arndb.de
arch/arm/mach-davinci/devices-da8xx.c | 26 ++
arch/arm/mach-davinci/devices.c | 22 ++
drivers/mmc/host/davinci_mmc.c| 27 +++
include/linux/platform_data/mmc-davinci.h | 5 +
4 files changed, 28 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c
b/arch/arm/mach-davinci/devices-da8xx.c
index b85b781b05fd..4aa872dc6dc3 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -671,16 +671,6 @@ static struct resource da8xx_mmcsd0_resources[] = {
.end= IRQ_DA8XX_MMCSDINT0,
.flags = IORESOURCE_IRQ,
},
- { /* DMA RX */
- .start = DA8XX_DMA_MMCSD0_RX,
- .end= DA8XX_DMA_MMCSD0_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA8XX_DMA_MMCSD0_TX,
- .end= DA8XX_DMA_MMCSD0_TX,
- .flags = IORESOURCE_DMA,
- },
};
static struct platform_device da8xx_mmcsd0_device = {
@@ -693,6 +683,9 @@ static struct platform_device da8xx_mmcsd0_device = {
int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
{
da8xx_mmcsd0_device.dev.platform_data = config;
+ config-filter = edma_filter_fn;
+ config-rxdma = (void *)DA8XX_DMA_MMCSD0_RX;
+ config-txdma = (void *)DA8XX_DMA_MMCSD0_TX;
return platform_device_register(da8xx_mmcsd0_device);
}
@@ -708,16 +701,6 @@ static struct resource da850_mmcsd1_resources[] = {
.end= IRQ_DA850_MMCSDINT0_1,
.flags = IORESOURCE_IRQ,
},
- { /* DMA RX */
- .start = DA850_DMA_MMCSD1_RX,
- .end= DA850_DMA_MMCSD1_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA850_DMA_MMCSD1_TX,
- .end= DA850_DMA_MMCSD1_TX,
- .flags = IORESOURCE_DMA,
- },
};
static struct platform_device da850_mmcsd1_device = {
@@ -730,6 +713,9 @@ static struct platform_device da850_mmcsd1_device = {
int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
{
da850_mmcsd1_device.dev.platform_data = config;
+ config-filter = edma_filter_fn;
+ config-rxdma = (void *)DA8XX_DMA_MMCSD1_RX;
+ config-txdma = (void *)DA8XX_DMA_MMCSD1_TX;
return platform_device_register(da850_mmcsd1_device);
}
#endif
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 6257aa452568..7b7039d9b079 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -144,14 +144,6 @@ static struct resource mmcsd0_resources[] = {
.start = IRQ_SDIOINT,
.flags = IORESOURCE_IRQ,
},
- /* DMA channels: RX, then TX */
- {
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
- .flags = IORESOURCE_DMA,
- }, {
- .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
- .flags = IORESOURCE_DMA,
- },
};
static struct platform_device davinci_mmcsd0_device = {
@@ -181,14 +173,6 @@ static struct resource mmcsd1_resources[] = {
.start = IRQ_DM355_SDIOINT1,
.flags = IORESOURCE_IRQ,
},
- /* DMA channels: RX, then TX */
- {
- .start = EDMA_CTLR_CHAN(0, 30), /* rx */
-
Re: [PATCH] ARM: OMAP2+: Warn about deprecated legacy booting mode
8
From: Tony Lindgren t...@atomide.com
Date: Wed, 26 Nov 2014 11:55:29 -0800
Subject: [PATCH] ARM: OMAP2+: Fix n900 board name for legacy user space
N900 legacy user space apps need the board name in
/proc/cpuinfo to work properly for the Hardware entry.
For other boards this should not be an issues and they
can use the generic Hardware entry.
Let's fix the issue by adding a custom DT_MACHINE_START
for n900.
Signed-off-by: Tony Lindgren t...@atomide.com
Acked-by: Pavel Machek pa...@ucw.cz
Thanks!
Pavel
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -118,6 +118,24 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
+/* Some boards need board name for legacy userspace in /proc/cpuinfo */
+static const char *const n900_boards_compat[] __initconst = {
+ nokia,omap3-n900,
+ NULL,
+};
+
+DT_MACHINE_START(OMAP3_N900_DT, Nokia RX-51 board)
+ .reserve= omap_reserve,
+ .map_io = omap3_map_io,
+ .init_early = omap3430_init_early,
+ .init_machine = omap_generic_init,
+ .init_late = omap3_init_late,
+ .init_time = omap3_sync32k_timer_init,
+ .dt_compat = n900_boards_compat,
+ .restart= omap3xxx_restart,
+MACHINE_END
+
+/* Generic omap3 boards, most boards can use these */
static const char *const omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
--
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(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [PATCH] ARM: OMAP2+: Warn about deprecated legacy booting mode
On Thursday 27 November 2014 02:12:04 Tony Lindgren wrote: * Pali Rohár pali.ro...@gmail.com [141126 15:40]: With enabled CONFIG_ARM_APPENDED_DTB=y file /proc/atags is missing. OK I guess it should not be needed for DT based booting. If I do not enable CONFIG_ARM_APPENDED_DTB=y then kernel is booting in legacy mode (not in DT). The build_tag_list() should parse ATAG_REVISION and then parse_tag_revision() should copy it to system_rev. Maybe try adding some printks to see if those functions get called? Now I see... Problem is that build_tag_list() is called from convert_to_tag_list() which is called from setup_machine_tags() which is called from setup_arch() only if setup_machine_fdt() call fails. And it fails for *non* DT boot. You can check this chain too. Thinking about this probably the best long term solution is to pass optional board_revision in the kernel cmdline that can be parsed early and copied to system_rev variable. Not possible. Our bootloader is closed proprietary. I tried to replace it with u-boot I was not able to do that. So we will use that Nokia closed bootloader forever and it can provide data only in ATAG structure. Or if you can think of some other way to get it, we can set system_rev in pdata-quirks.c. Or maybe add some code to copy the ATAGs somewhere where they are out of the way and don't conflict with the device tree data? Then we can query ATAG_REVISION from pdata-quirks.c and set system_rev. Regards, Tony If we are able to read ATAG from pdata-quirks, then we can parse it there and fix problems... But I do not know if address of ATAG structure is available there... -- Pali Rohár pali.ro...@gmail.com signature.asc Description: This is a digitally signed message part.
Re: [PATCH v7 6/8] net: can: c_can: Disable pins when CAN interface is down
On Fri, Nov 14, 2014 at 4:40 PM, Roger Quadros rog...@ti.com wrote: DRA7 CAN IP suffers from a problem which causes it to be prevented from fully turning OFF (i.e. stuck in transition) if the module was disabled while there was traffic on the CAN_RX line. To work around this issue we select the SLEEP pin state by default on probe and use the DEFAULT pin state on CAN up and back to the SLEEP pin state on CAN down. Signed-off-by: Roger Quadros rog...@ti.com Reviewed-by: Linus Walleij linus.wall...@linaro.org I see you figured it out all by yourselves :D (Sorry for being absent.) +#include linux/pinctrl/consumer.h + pinctrl_pm_select_default_state(dev-dev.parent); + pinctrl_pm_select_sleep_state(dev-dev.parent); + pinctrl_pm_select_sleep_state(dev-dev.parent); NB: in drivers/base/pinctrl.c: #ifdef CONFIG_PM /* * If power management is enabled, we also look for the optional * sleep and idle pin states, with semantics as defined in * linux/pinctrl/pinctrl-state.h */ dev-pins-sleep_state = pinctrl_lookup_state(dev-pins-p, PINCTRL_STATE_SLEEP); So if these states are necessary for the driver to work, put depends on PM or select PM in the Kconfig. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 6/8] net: can: c_can: Disable pins when CAN interface is down
On Fri, Nov 14, 2014 at 2:43 PM, Roger Quadros rog...@ti.com wrote: On 11/13/2014 06:03 PM, Marc Kleine-Budde wrote: On 11/13/2014 04:23 PM, Roger Quadros wrote: I just stumbled over pinctrl_pm_select_sleep_state(), is it possible to integrate this into runtime pm? http://lxr.free-electrons.com/source/drivers/pinctrl/core.c#L1282 I think those functions are there for the same reason but not sure why aren't they used in runtime pm core. Linus W. any hints? It is not used from PM core because there are cases where you may want to put pins to sleep for completely PM-core unrelated things. Things like turning off a serial port from userspace, for example. That should put the pins to sleep. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
dts: n900: isp1704 gpio
Hello, in commit ARM: dts: OMAP3-N900: Add isp1704 support e17337a26962943c27124a14b0794eabe76af437 was added support for isp1704 chip with configured gpio 3. Now I looked into legacy board rx51 data and there is gpio 67 for isp1704. I would like to ask, why we have different gpio in board data and in DTS data? I'm sure that isp1704 worked from legacy board data without problem, so I do not understand why in DTS code is different gpio number. -- Pali Rohár pali.ro...@gmail.com signature.asc Description: This is a digitally signed message part.
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On 11/27/2014 01:14 PM, Arnd Bergmann wrote:
On Thursday 27 November 2014 12:41:30 Peter Ujfalusi wrote:
diff --git a/include/linux/edma-dmaengine.h b/include/linux/edma-dmaengine.h
new file mode 100644
index ..8a2602809a77
--- /dev/null
+++ b/include/linux/edma-dmaengine.h
@@ -0,0 +1,29 @@
+struct dma_chan;
+
+#if defined(CONFIG_TI_EDMA) || defined(CONFIG_TI_EDMA_MODULE)
+bool edma_filter_fn(struct dma_chan *, void *);
+#else
+static inline bool edma_filter_fn(struct dma_chan *chan, void *param)
+{
+return false;
+}
+#endif
+
+#endif
It's better not to hardcode the name of the filter function in a driver,
better move the filter function into platform code and pass it down
to the driver in the platform_data pointer in davinci_mmc_config and
davinci_spi_platform_data to get rid of this dependency.
Something roughly like the patch below.
This will only work in case of legacy boot. When booting with DT we do not
have pdata and after this patch in dt boot we are not going to be able to get
the DMA resources either.
I think if we want to do something like this, it has to be done within the
dmaengine framework. The dma controller's of_dma_filter_info already have
.filter_fn which could be used by the framework.
On the other hand the davinci_mmc (and spi-davinci) is only going to work on
davinci devices, so I don't really see issue with 'hard coding' davinci
related callback in the code.
--
Péter
Arnd
---
[DRAFT] ARM: davinci: pass dma config through platform data
DMA slave drivers are supposed to be written independent of the dma engine
driver, which means that the mmc and spi drivers on davinci should not
reference the edma_filter_fn or know about the specific format of the
data passed into it.
This changes the channel data from a resource into a void pointer and
passes it as platform data along with the filter function.
TODO: do the same thing for SPI, and adapt the filter function for the
new format.
Signed-off-by: Arnd Bergmann a...@arndb.de
arch/arm/mach-davinci/devices-da8xx.c | 26 ++
arch/arm/mach-davinci/devices.c | 22 ++
drivers/mmc/host/davinci_mmc.c| 27 +++
include/linux/platform_data/mmc-davinci.h | 5 +
4 files changed, 28 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c
b/arch/arm/mach-davinci/devices-da8xx.c
index b85b781b05fd..4aa872dc6dc3 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -671,16 +671,6 @@ static struct resource da8xx_mmcsd0_resources[] = {
.end= IRQ_DA8XX_MMCSDINT0,
.flags = IORESOURCE_IRQ,
},
- { /* DMA RX */
- .start = DA8XX_DMA_MMCSD0_RX,
- .end= DA8XX_DMA_MMCSD0_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA8XX_DMA_MMCSD0_TX,
- .end= DA8XX_DMA_MMCSD0_TX,
- .flags = IORESOURCE_DMA,
- },
};
static struct platform_device da8xx_mmcsd0_device = {
@@ -693,6 +683,9 @@ static struct platform_device da8xx_mmcsd0_device = {
int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
{
da8xx_mmcsd0_device.dev.platform_data = config;
+ config-filter = edma_filter_fn;
+ config-rxdma = (void *)DA8XX_DMA_MMCSD0_RX;
+ config-txdma = (void *)DA8XX_DMA_MMCSD0_TX;
return platform_device_register(da8xx_mmcsd0_device);
}
@@ -708,16 +701,6 @@ static struct resource da850_mmcsd1_resources[] = {
.end= IRQ_DA850_MMCSDINT0_1,
.flags = IORESOURCE_IRQ,
},
- { /* DMA RX */
- .start = DA850_DMA_MMCSD1_RX,
- .end= DA850_DMA_MMCSD1_RX,
- .flags = IORESOURCE_DMA,
- },
- { /* DMA TX */
- .start = DA850_DMA_MMCSD1_TX,
- .end= DA850_DMA_MMCSD1_TX,
- .flags = IORESOURCE_DMA,
- },
};
static struct platform_device da850_mmcsd1_device = {
@@ -730,6 +713,9 @@ static struct platform_device da850_mmcsd1_device = {
int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
{
da850_mmcsd1_device.dev.platform_data = config;
+ config-filter = edma_filter_fn;
+ config-rxdma = (void *)DA8XX_DMA_MMCSD1_RX;
+ config-txdma = (void *)DA8XX_DMA_MMCSD1_TX;
return platform_device_register(da850_mmcsd1_device);
}
#endif
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 6257aa452568..7b7039d9b079 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -144,14 +144,6 @@ static struct resource mmcsd0_resources[] = {
.start = IRQ_SDIOINT,
.flags = IORESOURCE_IRQ,
},
-
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On Thursday 27 November 2014 16:23:31 Peter Ujfalusi wrote: This will only work in case of legacy boot. When booting with DT we do not have pdata and after this patch in dt boot we are not going to be able to get the DMA resources either. No, when booting with DT, the filter_fn and data are not used at all, we get the dma channel by parsing the DT instead. I think if we want to do something like this, it has to be done within the dmaengine framework. The dma controller's of_dma_filter_info already have .filter_fn which could be used by the framework. No, of_dma_filter_info/of_dma_simple_xlate was a mistake, we should never have even introduced that. All drivers that rely on this can simply provide their own xlate function that calls of_dma_get_slave_channel() or one of the related functions. edma is particularly trivial, it can just use of_dma_xlate_by_chan_id() instead of of_dma_simple_xlate, as it looks up the channel by its number. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: dts: n900: isp1704 gpio
Hi, On Thu, Nov 27, 2014 at 03:13:43PM +0100, Pali Rohár wrote: Hello, in commit ARM: dts: OMAP3-N900: Add isp1704 support e17337a26962943c27124a14b0794eabe76af437 was added support for isp1704 chip with configured gpio 3. Now I looked into legacy board rx51 data and there is gpio 67 for isp1704. I would like to ask, why we have different gpio in board data and in DTS data? I'm sure that isp1704 worked from legacy board data without problem, so I do not understand why in DTS code is different gpio number. it's magic! Seriously though, each GPIO bank as 32 GPIOs with numbers starting at 0, note that DTS uses the 3rd GPIO line on the 3rd GPIO bank. Bank0 handles GPIOs 0 - 31, Bank1 handles GPIOs 32 - 63, Bank 2 handles GPIOs 64 - 95, and so on... Offset 3 on Bank 3 would be 64 + 3 == 67. Yay, magic. -- balbi signature.asc Description: Digital signature
[PATCH 07/23] ARM: OMAP2+: PRM: add generic API for clear_mod_irqs
OMAP2/3 now use generic API for the prm_clear_mod_irqs, the SoC specific
implementation details are provided through prm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm24xx.c | 24 +++-
arch/arm/mach-omap2/pm34xx.c | 18 --
arch/arm/mach-omap2/prm.h|2 ++
arch/arm/mach-omap2/prm2xxx.c|4 +++-
arch/arm/mach-omap2/prm2xxx.h|2 --
arch/arm/mach-omap2/prm3xxx.c|3 ++-
arch/arm/mach-omap2/prm3xxx.h|1 -
arch/arm/mach-omap2/prm_common.c | 21 +
8 files changed, 47 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index fe01c5a..b1aad7e 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void)
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
- omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+ omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
@@ -104,18 +104,16 @@ no_sleep:
clk_enable(osc_ck);
/* clear CORE wake-up events */
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
- omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
+ omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
/* MPU domain wake events */
- omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
- 0x1);
+ omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1);
- omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
- 0x20);
+ omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20);
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
@@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void)
* it is in retention mode. */
if (omap2_allow_mpu_retention()) {
/* REVISIT: These write to reserved bits? */
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
- omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
- omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+ omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+ omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
/* Try to enter MPU retention */
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 990d802..2d9383b 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -137,8 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void
*unused)
{
int c;
- c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK);
+ c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
+ OMAP3430_ST_IO_CHAIN_MASK);
return c ? IRQ_HANDLED : IRQ_NONE;
}
@@ -152,15 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void
*unused)
* these are handled in a separate handler to avoid acking
* IO events before parsing in mux code
*/
- c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
- ~(OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK));
- c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
- c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
+ c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, ~(OMAP3430_ST_IO_MASK |
+ OMAP3430_ST_IO_CHAIN_MASK));
+ c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
+ c += omap_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
if (omap_rev() OMAP3430_REV_ES1_0) {
- c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0);
- c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1,
-~0);
+ c +=
[PATCH 06/23] ARM: OMAP3: PRM: invert the wkst_mask for the prm_clear_mod_irqs
This makes the API the same as used with OMAP2, and makes it possible
to implement a generic driver API for the functionality.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 18 +-
arch/arm/mach-omap2/prm3xxx.c |8
arch/arm/mach-omap2/prm3xxx.h |2 +-
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 175564c..990d802 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -137,9 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void
*unused)
{
int c;
- c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
- ~(OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK));
+ c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
+ OMAP3430_ST_IO_CHAIN_MASK);
return c ? IRQ_HANDLED : IRQ_NONE;
}
@@ -154,13 +153,14 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void
*unused)
* IO events before parsing in mux code
*/
c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
- OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK);
- c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, 0);
- c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0);
+ ~(OMAP3430_ST_IO_MASK |
+ OMAP3430_ST_IO_CHAIN_MASK));
+ c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
+ c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
if (omap_rev() OMAP3430_REV_ES1_0) {
- c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, 0);
- c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0);
+ c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0);
+ c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1,
+~0);
}
return c ? IRQ_HANDLED : IRQ_NONE;
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index c5e00c6..3ec1ff4 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -217,7 +217,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
* omap3xxx_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
* @module: PRM module to clear wakeups from
* @regs: register set to clear, 1 or 3
- * @ignore_bits: wakeup status bits to ignore
+ * @wkst_mask: wkst bits to clear
*
* The purpose of this function is to clear any wake-up events latched
* in the PRCM PM_WKST_x registers. It is possible that a wake-up event
@@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
* that any peripheral wake-up events occurring while attempting to
* clear the PM_WKST_x are detected and cleared.
*/
-int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)
+int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
{
u32 wkst, fclk, iclk, clken;
u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
@@ -238,7 +238,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32
ignore_bits)
wkst = omap2_prm_read_mod_reg(module, wkst_off);
wkst = omap2_prm_read_mod_reg(module, grpsel_off);
- wkst = ~ignore_bits;
+ wkst = wkst_mask;
if (wkst) {
iclk = omap2_cm_read_mod_reg(module, iclk_off);
fclk = omap2_cm_read_mod_reg(module, fclk_off);
@@ -254,7 +254,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32
ignore_bits)
omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
omap2_prm_write_mod_reg(wkst, module, wkst_off);
wkst = omap2_prm_read_mod_reg(module, wkst_off);
- wkst = ~ignore_bits;
+ wkst = wkst_mask;
c++;
}
omap2_cm_write_mod_reg(iclk, module, iclk_off);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index cfde3f4..24edef6 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -146,7 +146,7 @@ extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8
offset);
extern int __init omap3xxx_prm_init(void);
extern u32 omap3xxx_prm_get_reset_sources(void);
-int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
+int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
void omap3xxx_prm_iva_idle(void);
void omap3_prm_reset_modem(void);
int omap3xxx_prm_clear_global_cold_reset(void);
--
1.7.9.5
--
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[PATCH 08/23] ARM: OMAP3+: PRM: remove prm_get_reset_sources declaration from headers
There is no implementation for this anywhere, so remove it from the header files also. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/prm3xxx.h |1 - arch/arm/mach-omap2/prm44xx_54xx.h |1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 17abe43..5a09a74 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -145,7 +145,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap3xxx_prm_init(void); -extern u32 omap3xxx_prm_get_reset_sources(void); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); int omap3xxx_prm_clear_global_cold_reset(void); diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index f751251..7143295 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -39,7 +39,6 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap44xx_prm_init(void); -extern u32 omap44xx_prm_get_reset_sources(void); #endif -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 05/23] ARM: OMAP2: CM: remove unused PLL functions
omap2xxx_cm_get_pll_config and omap2xxx_cm_get_pll_status are not used
for anything, so remove these.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm2xxx.c | 10 --
arch/arm/mach-omap2/cm2xxx.h |2 --
2 files changed, 12 deletions(-)
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index a96d901..ef62ac9 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -370,16 +370,6 @@ u32 omap2xxx_cm_get_core_pll_config(void)
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
}
-u32 omap2xxx_cm_get_pll_config(void)
-{
- return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
-}
-
-u32 omap2xxx_cm_get_pll_status(void)
-{
- return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
-}
-
void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
{
u32 tmp;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index c89502b..83b6c59 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -60,8 +60,6 @@ extern int omap2xxx_cm_fclks_active(void);
extern int omap2xxx_cm_mpu_retention_allowed(void);
extern u32 omap2xxx_cm_get_core_clk_src(void);
extern u32 omap2xxx_cm_get_core_pll_config(void);
-extern u32 omap2xxx_cm_get_pll_config(void);
-extern u32 omap2xxx_cm_get_pll_status(void);
extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
u32 mdm);
--
1.7.9.5
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[PATCH 21/23] ARM: OMAP2+: CM: move SoC specific init calls within a generic API
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the CM driver. Done in preparation to make CM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm.h |3 +++
arch/arm/mach-omap2/cm2xxx.c |3 +--
arch/arm/mach-omap2/cm2xxx.h |2 +-
arch/arm/mach-omap2/cm33xx.c |3 +--
arch/arm/mach-omap2/cm33xx.h |3 ++-
arch/arm/mach-omap2/cm3xxx.c |3 +--
arch/arm/mach-omap2/cm3xxx.h |2 +-
arch/arm/mach-omap2/cm44xx.h |2 +-
arch/arm/mach-omap2/cm_common.c | 36
arch/arm/mach-omap2/cminst44xx.c |3 +--
arch/arm/mach-omap2/io.c | 14 +-
arch/arm/mach-omap2/prcm-common.h |2 ++
arch/arm/mach-omap2/prm_common.c |8 +++-
13 files changed, 58 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 1fe3e6b..5fd84f3 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -28,6 +28,9 @@ extern void __iomem *cm2_base;
extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
# endif
+#define CM_NO_CLOCKS 0x1
+#define CM_SINGLE_INSTANCE 0x2
+
/*
* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
* the PRCM to request that a module enter the inactive state in the
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index f18c844..3e5fd35 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -393,9 +393,8 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
.wait_module_ready = omap2xxx_cm_wait_module_ready,
};
-int __init omap2xxx_cm_init(void)
+int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data)
{
- omap2_cm_base_init();
return cm_register(omap2xxx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 83b6c59..7b8c79c 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -63,7 +63,7 @@ extern u32 omap2xxx_cm_get_core_pll_config(void);
extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
u32 mdm);
-extern int __init omap2xxx_cm_init(void);
+int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data);
#endif
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 4c5038c..3e85214 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -373,9 +373,8 @@ static struct cm_ll_data am33xx_cm_ll_data = {
.module_disable = am33xx_cm_module_disable,
};
-int __init am33xx_cm_init(void)
+int __init am33xx_cm_init(const struct omap_prcm_init_data *data)
{
- omap2_cm_base_init();
return cm_register(am33xx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 046b4b2..a91f7d2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -19,6 +19,7 @@
#include cm.h
#include cm-regbits-33xx.h
+#include prcm-common.h
/* CM base address */
#define AM33XX_CM_BASE 0x44e0
@@ -374,6 +375,6 @@
#ifndef __ASSEMBLER__
-int am33xx_cm_init(void);
+int am33xx_cm_init(const struct omap_prcm_init_data *data);
#endif /* ASSEMBLER */
#endif
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 8e91f38..f7b64c2 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -671,9 +671,8 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
.wait_module_ready = omap3xxx_cm_wait_module_ready,
};
-int __init omap3xxx_cm_init(void)
+int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data)
{
- omap2_cm_base_init();
return cm_register(omap3xxx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 734a858..bc444e2 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -72,7 +72,7 @@ extern void omap3_cm_save_context(void);
extern void omap3_cm_restore_context(void);
extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
-extern int __init omap3xxx_cm_init(void);
+int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data);
#endif
diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index ad6e263..309a4c9 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,6 +23,6 @@
#define OMAP4_CM_CLKSTCTRL 0x
#define OMAP4_CM_STATICDEP 0x0004
-int omap4_cm_init(void);
+int omap4_cm_init(const struct omap_prcm_init_data *data);
#endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index
[PATCH 12/23] ARM: OMAP2+: clock: add support for static clock memmap indexes
All clock provider related drivers will now register their iomaps
individually, and provide index number to the provider init. The
clock related drivers also add support for providing init data
through the DT match functionality; this is initially used only
to provide the index variable, but can be expanded later to provide
more functionality.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock.c | 32 --
arch/arm/mach-omap2/clock.h | 10 +++-
arch/arm/mach-omap2/cm_common.c | 43 +++---
arch/arm/mach-omap2/control.c | 37 +
arch/arm/mach-omap2/prcm-common.h |8 +++
arch/arm/mach-omap2/prm_common.c | 46 ++---
6 files changed, 132 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 2e8b868..702bf29 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -117,30 +117,28 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {
/**
* omap2_clk_provider_init - initialize a clock provider
- * @match_table: DT device table to match for devices to init
+ * @np: device node for initializing the clock provider
+ * @index: memory map index for the clock provider
+ * @mem: iomem pointer for the memory map
*
- * Initializes a clock provider module (CM/PRM etc.), allocating the
- * memory mapping, allocating the mapping index and initializing the
- * low level driver infrastructure. Returns 0 in success, -ENOMEM in
- * failure.
+ * Initializes a clock provider module (CM/PRM etc.), registering
+ * the iomap and initializing the low level driver infrastructure.
+ * Returns 0 in success, -EINVAL if multiple registration is attempted.
*/
-int __init omap2_clk_provider_init(const struct of_device_id *match_table)
+int __init omap2_clk_provider_init(struct device_node *np, int index,
+ void __iomem *mem)
{
- struct device_node *np;
- void __iomem *mem;
- static int memmap_index;
-
ti_clk_ll_ops = omap_clk_ll_ops;
- for_each_matching_node(np, match_table) {
- mem = of_iomap(np, 0);
- if (!mem)
- return -ENOMEM;
- clk_memmaps[memmap_index] = mem;
- ti_dt_clk_init_provider(np, memmap_index);
- memmap_index++;
+ if (clk_memmaps[index]) {
+ pr_err(%s: duplicate registration for index %d!\n, __func__,
+ index);
+ return -EINVAL;
}
+ clk_memmaps[index] = mem;
+ ti_dt_clk_init_provider(np, index);
+
return 0;
}
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 8f6a0fb..de18199 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -235,6 +235,13 @@ struct ti_clk_features {
#define TI_CLK_DPLL_HAS_FREQSEL(1 0)
+enum {
+ CLK_MEMMAP_INDEX_PRM = 0,
+ CLK_MEMMAP_INDEX_CM1,
+ CLK_MEMMAP_INDEX_CM2,
+ CLK_MEMMAP_INDEX_SCRM,
+};
+
extern struct ti_clk_features ti_clk_features;
extern const struct clkops clkops_omap2_dflt_wait;
@@ -274,7 +281,8 @@ extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
extern void omap_clocks_register(struct omap_clk *oclks, int cnt);
-int __init omap2_clk_provider_init(const struct of_device_id *match_table);
+int __init omap2_clk_provider_init(struct device_node *np, int index,
+ void __iomem *mem);
void __init ti_clk_init_features(void);
#endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index f0a44aa..ff76cb7 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -16,6 +16,7 @@
#include linux/errno.h
#include linux/bug.h
#include linux/of.h
+#include linux/of_address.h
#include cm2xxx.h
#include cm3xxx.h
@@ -215,14 +216,22 @@ int cm_unregister(struct cm_ll_data *cld)
return 0;
}
+static const struct omap_prcm_init_data cm_data = {
+ .index = CLK_MEMMAP_INDEX_CM1,
+};
+
+static const struct omap_prcm_init_data cm2_data = {
+ .index = CLK_MEMMAP_INDEX_CM2,
+};
+
static struct of_device_id omap_cm_dt_match_table[] = {
- { .compatible = ti,omap3-cm },
- { .compatible = ti,omap4-cm1 },
- { .compatible = ti,omap4-cm2 },
- { .compatible = ti,omap5-cm-core-aon },
- { .compatible = ti,omap5-cm-core },
- { .compatible = ti,dra7-cm-core-aon },
- { .compatible = ti,dra7-cm-core },
+ { .compatible = ti,omap3-cm, .data = cm_data },
+ { .compatible = ti,omap4-cm1, .data = cm_data },
+ { .compatible = ti,omap4-cm2, .data = cm2_data },
+ { .compatible = ti,omap5-cm-core-aon, .data = cm_data },
+ { .compatible = ti,omap5-cm-core, .data = cm2_data },
+ { .compatible = ti,dra7-cm-core-aon, .data = cm_data },
+
[PATCH 15/23] ARM: OMAP2+: PRM: determine PRM base address from device tree
There is no need to provide the PRM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the PRM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/io.c | 11 ++-- arch/arm/mach-omap2/prm.h|1 + arch/arm/mach-omap2/prm2xxx.c|1 + arch/arm/mach-omap2/prm33xx.c|1 + arch/arm/mach-omap2/prm3xxx.c|2 ++ arch/arm/mach-omap2/prm44xx.c|1 + arch/arm/mach-omap2/prm_common.c | 53 +++--- 7 files changed, 52 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 8af8411..6a94345 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -386,7 +386,6 @@ void __init omap2420_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -415,7 +414,6 @@ void __init omap2430_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), NULL); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); omap2xxx_check_revision(); omap2xxx_prm_init(); omap2xxx_cm_init(); @@ -448,9 +446,8 @@ void __init omap3_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL); + /* XXX: remove these two once OMAP3 is DT only */ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); - - /* XXX: remove this once OMAP3 is DT only */ omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); omap3xxx_check_revision(); omap3xxx_check_features(); @@ -498,6 +495,7 @@ void __init ti81xx_init_early(void) OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), NULL); + /* XXX: remove these two once TI81xx is DT only */ omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); omap3xxx_check_revision(); @@ -563,7 +561,6 @@ void __init am33xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); omap3xxx_check_revision(); am33xx_check_features(); am33xx_prm_init(); @@ -588,7 +585,6 @@ void __init am43xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), NULL); - omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); omap3xxx_check_revision(); am33xx_check_features(); omap44xx_prm_init(); @@ -614,7 +610,6 @@ void __init omap4430_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); @@ -645,7 +640,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); omap4_pm_init_early(); omap44xx_prm_init(); @@ -673,7 +667,6 @@ void __init dra7xx_init_early(void) omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); - omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
[PATCH 00/23] ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
Hi, Yet another PRCM cleanup set, towards making PRCM a separate driver. This set is most likely too late for 3.19, but hopefully it can make it to 3.20. Couple of related clock patches are also within this set, as some of the clock support code is now obsolete. Most important things this set does, is to separate the PRCM driver initializations under their own parts, and split the control module init under its own driver file also. This set still does not introduce regmap support for PRCM, as I am not too sure whether it should be done at all. It seems we can implement all the clock / vcvp / etc. support rather neatly just with using iomaps. Testing done: am335x-evm: boot am335x-sk: boot am3517-evm: boot am43xx-gpevm: boot beaglebone-black: boot beaglebone: boot dra7xx-evm: boot omap5-evm: boot omap3-beagle: boot, suspend (ret), suspend (off) (UART wakeup seems broken on 3.18-rc1 btw) omap4-panda-es: boot Testing branch pushed here: tree: https://github.com/t-kristo/linux-pm.git branch: for-v3.19/prcm-cleanup-part2 This is based on top of Tony's omap-for-v3.19/prcm. -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 13/23] ARM: OMAP2+: CM: determine CM base address from device tree
There is no need to provide the CM base address through a low-level API
from the low-level IO init, as this information is available through DT.
Re-routed the parsing function to be called from the CM drivers also to
simplify the implementation under io.c.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm.h |1 +
arch/arm/mach-omap2/cm2xxx.c |1 +
arch/arm/mach-omap2/cm33xx.c |1 +
arch/arm/mach-omap2/cm3xxx.c |1 +
arch/arm/mach-omap2/cm_common.c | 56 +++--
arch/arm/mach-omap2/cminst44xx.c |1 +
arch/arm/mach-omap2/io.c | 12 ++--
arch/arm/mach-omap2/prcm-common.h |4 +++
8 files changed, 58 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 748ac33..1fe3e6b 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -71,6 +71,7 @@ int omap_cm_module_disable(u8 part, u16 inst, u16
clkctrl_offs);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
int omap_cm_init(void);
+int omap2_cm_base_init(void);
# endif
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index ef62ac9..f18c844 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -395,6 +395,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
int __init omap2xxx_cm_init(void)
{
+ omap2_cm_base_init();
return cm_register(omap2xxx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b9ad463..4c5038c 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -375,6 +375,7 @@ static struct cm_ll_data am33xx_cm_ll_data = {
int __init am33xx_cm_init(void)
{
+ omap2_cm_base_init();
return cm_register(am33xx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index ebead8f..8e91f38 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -673,6 +673,7 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
int __init omap3xxx_cm_init(void)
{
+ omap2_cm_base_init();
return cm_register(omap3xxx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index ff76cb7..c2d7c7b 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -216,16 +216,26 @@ int cm_unregister(struct cm_ll_data *cld)
return 0;
}
-static const struct omap_prcm_init_data cm_data = {
+static struct omap_prcm_init_data cm_data = {
.index = CLK_MEMMAP_INDEX_CM1,
};
-static const struct omap_prcm_init_data cm2_data = {
+static struct omap_prcm_init_data cm2_data = {
.index = CLK_MEMMAP_INDEX_CM2,
};
+static struct omap_prcm_init_data omap3_cm_data = {
+ .index = CLK_MEMMAP_INDEX_CM1,
+
+ /*
+* IVA2 offset is negative value, must offset the cm_base address
+* by this to get it to positive
+*/
+ .offset = -OMAP3430_IVA2_MOD,
+};
+
static struct of_device_id omap_cm_dt_match_table[] = {
- { .compatible = ti,omap3-cm, .data = cm_data },
+ { .compatible = ti,omap3-cm, .data = omap3_cm_data },
{ .compatible = ti,omap4-cm1, .data = cm_data },
{ .compatible = ti,omap4-cm2, .data = cm2_data },
{ .compatible = ti,omap5-cm-core-aon, .data = cm_data },
@@ -236,6 +246,39 @@ static struct of_device_id omap_cm_dt_match_table[] = {
};
/**
+ * omap2_cm_base_init - initialize iomappings for the CM drivers
+ *
+ * Detects and initializes the iomappings for the CM driver, based
+ * on the DT data. Returns 0 in success, negative error value
+ * otherwise.
+ */
+int __init omap2_cm_base_init(void)
+{
+ struct device_node *np;
+ const struct of_device_id *match;
+ struct omap_prcm_init_data *data;
+ void __iomem *mem;
+
+ for_each_matching_node_and_match(np, omap_cm_dt_match_table, match) {
+ data = (struct omap_prcm_init_data *)match-data;
+
+ mem = of_iomap(np, 0);
+ if (!mem)
+ return -ENOMEM;
+
+ if (data-index == CLK_MEMMAP_INDEX_CM1)
+ cm_base = mem + data-offset;
+
+ if (data-index == CLK_MEMMAP_INDEX_CM2)
+ cm2_base = mem + data-offset;
+
+ data-mem = mem;
+ }
+
+ return 0;
+}
+
+/**
* omap_cm_init - low level init for the CM drivers
*
* Initializes the low level clock infrastructure for CM drivers.
@@ -246,17 +289,12 @@ int __init omap_cm_init(void)
struct device_node *np;
const struct of_device_id *match;
const struct omap_prcm_init_data *data;
- void __iomem *mem;
int ret;
for_each_matching_node_and_match(np, omap_cm_dt_match_table, match) {
data = match-data;
- mem = of_iomap(np, 0);
-
[PATCH 20/23] ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility
PRM device instance offset is now provided through the prm_init_data.
This gets rid of some cpu_is_X / soc_is_X calls from PRM core code,
preparing for PRM to be its own separate driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm-common.h |2 ++
arch/arm/mach-omap2/prm44xx.c |2 ++
arch/arm/mach-omap2/prm_common.c | 28 +---
arch/arm/mach-omap2/prminst44xx.c | 18 +-
arch/arm/mach-omap2/prminst44xx.h |1 +
5 files changed, 35 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm-common.h
b/arch/arm/mach-omap2/prcm-common.h
index d0d81d0..89c09eb 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -524,6 +524,7 @@ struct of_device_id;
* @index: clock memory mapping index to be used
* @mem: IO mem pointer for this module
* @offset: module base address offset from the IO base
+ * @device_inst_offset: device instance offset within the module address space
* @init: low level PRCM init function for this module
* @np: device node for this PRCM module
*/
@@ -531,6 +532,7 @@ struct omap_prcm_init_data {
int index;
void __iomem *mem;
s16 offset;
+ s32 device_inst_offset;
int (*init)(const struct omap_prcm_init_data *data);
struct device_node *np;
};
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index e179dbe..1994dcc 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -712,6 +712,8 @@ int __init omap44xx_prm_init(const struct
omap_prcm_init_data *data)
if (!soc_is_dra7xx())
prm_features |= PRM_HAS_VOLTAGE;
+ omap4_prminst_set_prm_dev_inst(data-device_inst_offset);
+
return prm_register(omap44xx_prm_ll_data);
}
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index b2e1eee..0fc2da9 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -34,6 +34,9 @@
#include prm3xxx.h
#include prm33xx.h
#include prm44xx.h
+#include prm54xx.h
+#include prm7xx.h
+#include prcm43xx.h
#include common.h
#include clock.h
#include cm.h
@@ -647,6 +650,25 @@ static struct omap_prcm_init_data am3_prm_data __initdata
= {
static struct omap_prcm_init_data omap4_prm_data __initdata = {
.index = CLK_MEMMAP_INDEX_PRM,
.init = omap44xx_prm_init,
+ .device_inst_offset = OMAP4430_PRM_DEVICE_INST,
+};
+
+static struct omap_prcm_init_data omap5_prm_data __initdata = {
+ .index = CLK_MEMMAP_INDEX_PRM,
+ .init = omap44xx_prm_init,
+ .device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
+};
+
+static struct omap_prcm_init_data dra7_prm_data __initdata = {
+ .index = CLK_MEMMAP_INDEX_PRM,
+ .init = omap44xx_prm_init,
+ .device_inst_offset = DRA7XX_PRM_DEVICE_INST,
+};
+
+static struct omap_prcm_init_data am4_prm_data __initdata = {
+ .index = CLK_MEMMAP_INDEX_PRM,
+ .init = omap44xx_prm_init,
+ .device_inst_offset = AM43XX_PRM_DEVICE_INST,
};
static struct omap_prcm_init_data scrm_data __initdata = {
@@ -655,14 +677,14 @@ static struct omap_prcm_init_data scrm_data __initdata = {
static struct of_device_id omap_prcm_dt_match_table[] __initdata = {
{ .compatible = ti,am3-prcm, .data = am3_prm_data },
- { .compatible = ti,am4-prcm, .data = omap4_prm_data },
+ { .compatible = ti,am4-prcm, .data = am4_prm_data },
{ .compatible = ti,omap2-prcm, .data = omap2_prm_data },
{ .compatible = ti,omap3-prm, .data = omap3_prm_data },
{ .compatible = ti,omap4-prm, .data = omap4_prm_data },
{ .compatible = ti,omap4-scrm, .data = scrm_data },
- { .compatible = ti,omap5-prm, .data = omap4_prm_data },
+ { .compatible = ti,omap5-prm, .data = omap5_prm_data },
{ .compatible = ti,omap5-scrm, .data = scrm_data },
- { .compatible = ti,dra7-prm, .data = omap4_prm_data },
+ { .compatible = ti,dra7-prm, .data = dra7_prm_data },
{ }
};
diff --git a/arch/arm/mach-omap2/prminst44xx.c
b/arch/arm/mach-omap2/prminst44xx.c
index 8adf7b1..c4859c4 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -47,22 +47,14 @@ void omap_prm_base_init(void)
s32 omap4_prmst_get_prm_dev_inst(void)
{
- if (prm_dev_inst != PRM_INSTANCE_UNKNOWN)
- return prm_dev_inst;
-
- /* This cannot be done way early at boot.. as things are not setup */
- if (cpu_is_omap44xx())
- prm_dev_inst = OMAP4430_PRM_DEVICE_INST;
- else if (soc_is_omap54xx())
- prm_dev_inst = OMAP54XX_PRM_DEVICE_INST;
- else if (soc_is_dra7xx())
- prm_dev_inst = DRA7XX_PRM_DEVICE_INST;
- else if (soc_is_am43xx())
- prm_dev_inst = AM43XX_PRM_DEVICE_INST;
-
return prm_dev_inst;
}
+void omap4_prminst_set_prm_dev_inst(s32 dev_inst)
+{
+
[PATCH 03/23] ARM: OMAP2+: PRCM: split PRCM module init to their own driver files
Splits the clock related provider module inits under their own driver files.
Previously this was done for all modules under the common PRM driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm.h |1 +
arch/arm/mach-omap2/cm_common.c | 24
arch/arm/mach-omap2/control.c| 20
arch/arm/mach-omap2/control.h|1 +
arch/arm/mach-omap2/io.c |4
arch/arm/mach-omap2/prm_common.c | 20
6 files changed, 58 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 6222e87..748ac33 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -70,6 +70,7 @@ int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16
clkctrl_offs);
int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
+int omap_cm_init(void);
# endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 8fe02fce..f0a44aa 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -15,10 +15,12 @@
#include linux/init.h
#include linux/errno.h
#include linux/bug.h
+#include linux/of.h
#include cm2xxx.h
#include cm3xxx.h
#include cm44xx.h
+#include clock.h
/*
* cm_ll_data: function pointers to SoC-specific implementations of
@@ -212,3 +214,25 @@ int cm_unregister(struct cm_ll_data *cld)
return 0;
}
+
+static struct of_device_id omap_cm_dt_match_table[] = {
+ { .compatible = ti,omap3-cm },
+ { .compatible = ti,omap4-cm1 },
+ { .compatible = ti,omap4-cm2 },
+ { .compatible = ti,omap5-cm-core-aon },
+ { .compatible = ti,omap5-cm-core },
+ { .compatible = ti,dra7-cm-core-aon },
+ { .compatible = ti,dra7-cm-core },
+ { }
+};
+
+/**
+ * omap_cm_init - low level init for the CM drivers
+ *
+ * Initializes the low level clock infrastructure for CM drivers.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_cm_init(void)
+{
+ return omap2_clk_provider_init(omap_cm_dt_match_table);
+}
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index da041b4..a53341f 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -25,6 +25,7 @@
#include sdrc.h
#include pm.h
#include control.h
+#include clock.h
/* Used by omap3_ctrl_save_padconf() */
#define START_PADCONF_SAVE 0x2
@@ -611,3 +612,22 @@ void __init omap3_ctrl_init(void)
omap3_ctrl_setup_d2d_padconf();
}
#endif /* CONFIG_ARCH_OMAP3 CONFIG_PM */
+
+static struct of_device_id omap_scrm_dt_match_table[] = {
+ { .compatible = ti,am3-scrm },
+ { .compatible = ti,am4-scrm },
+ { .compatible = ti,omap2-scrm },
+ { .compatible = ti,omap3-scrm },
+ { }
+};
+
+/**
+ * omap_control_init - low level init for the control driver
+ *
+ * Initializes the low level clock infrastructure for control driver.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_control_init(void)
+{
+ return omap2_clk_provider_init(omap_scrm_dt_match_table);
+}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a3c0133..8a9d97d7 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -456,6 +456,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
void omap3_ctrl_init(void);
+int omap_control_init(void);
extern void omap2_set_globals_control(void __iomem *ctrl,
void __iomem *ctrl_pad);
#else
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4f269be..ec2ace0 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -731,6 +731,10 @@ int __init omap_clk_init(void)
ti_clk_init_features();
+ ret = omap_control_init();
+ if (ret)
+ return ret;
+
ret = omap_prcm_init();
if (ret)
return ret;
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index f155aaf..52746ea 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -35,6 +35,7 @@
#include prm44xx.h
#include common.h
#include clock.h
+#include cm.h
/*
* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -568,25 +569,14 @@ int prm_unregister(struct prm_ll_data *pld)
static const struct of_device_id omap_prcm_dt_match_table[] = {
{ .compatible = ti,am3-prcm },
- { .compatible = ti,am3-scrm },
{ .compatible = ti,am4-prcm },
- { .compatible = ti,am4-scrm },
{ .compatible = ti,omap2-prcm },
- { .compatible = ti,omap2-scrm },
{ .compatible = ti,omap3-prm },
- { .compatible
[PATCH 09/23] ARM: OMAP3+: PRM: add common APIs for prm_vp_check/clear_txdone
PRM driver now only exports a generic API for clearing / checking
VP txdone status.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm.h | 14 ++
arch/arm/mach-omap2/prm3xxx.c |6 --
arch/arm/mach-omap2/prm3xxx.h |4
arch/arm/mach-omap2/prm44xx.c |6 --
arch/arm/mach-omap2/prm44xx_54xx.h |4
arch/arm/mach-omap2/prm_common.c | 34 ++
arch/arm/mach-omap2/vp.h |9 -
arch/arm/mach-omap2/vp3xxx_data.c |4 ++--
arch/arm/mach-omap2/vp44xx_data.c |4 ++--
9 files changed, 60 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 14d504b..6521eaa 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -146,6 +146,8 @@ struct prm_ll_data {
u16 offset);
void (*reset_system)(void);
int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask);
+ u32 (*vp_check_txdone)(u8 vp_id);
+ void (*vp_clear_txdone)(u8 vp_id);
};
extern int prm_register(struct prm_ll_data *pld);
@@ -163,6 +165,18 @@ void omap_prm_reset_system(void);
void omap_prm_reconfigure_io_chain(void);
int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
+/*
+ * Voltage Processor (VP) identifiers
+ */
+#define OMAP3_VP_VDD_MPU_ID0
+#define OMAP3_VP_VDD_CORE_ID 1
+#define OMAP4_VP_VDD_CORE_ID 0
+#define OMAP4_VP_VDD_IVA_ID1
+#define OMAP4_VP_VDD_MPU_ID2
+
+u32 omap_prm_vp_check_txdone(u8 vp_id);
+void omap_prm_vp_clear_txdone(u8 vp_id);
+
#endif
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 95fed03..8993ab7 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -96,7 +96,7 @@ static struct omap3_vp omap3_vp[] = {
#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
-u32 omap3_prm_vp_check_txdone(u8 vp_id)
+static u32 omap3_prm_vp_check_txdone(u8 vp_id)
{
struct omap3_vp *vp = omap3_vp[vp_id];
u32 irqstatus;
@@ -106,7 +106,7 @@ u32 omap3_prm_vp_check_txdone(u8 vp_id)
return irqstatus vp-tranxdone_status;
}
-void omap3_prm_vp_clear_txdone(u8 vp_id)
+static void omap3_prm_vp_clear_txdone(u8 vp_id)
{
struct omap3_vp *vp = omap3_vp[vp_id];
@@ -665,6 +665,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
.is_hardreset_asserted = omap2_prm_is_hardreset_asserted,
.reset_system = omap3xxx_prm_dpll3_reset,
.clear_mod_irqs = omap3xxx_prm_clear_mod_irqs,
+ .vp_check_txdone = omap3_prm_vp_check_txdone,
+ .vp_clear_txdone = omap3_prm_vp_clear_txdone,
};
int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 5a09a74..55e4c89 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -132,10 +132,6 @@
#ifndef __ASSEMBLER__
-/* OMAP3-specific VP functions */
-u32 omap3_prm_vp_check_txdone(u8 vp_id);
-void omap3_prm_vp_clear_txdone(u8 vp_id);
-
/*
* OMAP3 access functions for voltage controller (VC) and
* voltage proccessor (VP) in the PRM.
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index cc170fb..0f0e49f 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -137,7 +137,7 @@ static struct omap4_vp omap4_vp[] = {
},
};
-u32 omap4_prm_vp_check_txdone(u8 vp_id)
+static u32 omap4_prm_vp_check_txdone(u8 vp_id)
{
struct omap4_vp *vp = omap4_vp[vp_id];
u32 irqstatus;
@@ -148,7 +148,7 @@ u32 omap4_prm_vp_check_txdone(u8 vp_id)
return irqstatus vp-tranxdone_status;
}
-void omap4_prm_vp_clear_txdone(u8 vp_id)
+static void omap4_prm_vp_clear_txdone(u8 vp_id)
{
struct omap4_vp *vp = omap4_vp[vp_id];
@@ -698,6 +698,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.deassert_hardreset = omap4_prminst_deassert_hardreset,
.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
.reset_system = omap4_prminst_global_warm_sw_reset,
+ .vp_check_txdone= omap4_prm_vp_check_txdone,
+ .vp_clear_txdone= omap4_prm_vp_clear_txdone,
};
int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h
b/arch/arm/mach-omap2/prm44xx_54xx.h
index 7143295..a470185 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -26,10 +26,6 @@
/* Function prototypes */
#ifndef __ASSEMBLER__
-/* OMAP4/OMAP5-specific VP functions */
-u32 omap4_prm_vp_check_txdone(u8 vp_id);
-void omap4_prm_vp_clear_txdone(u8 vp_id);
-
/*
* OMAP4/OMAP5 access functions for voltage controller (VC) and
* voltage proccessor (VP) in the PRM.
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 772b8f6..c0bfc92 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@
[PATCH 18/23] ARM: OMAP2+: control: determine control module base address from DT
There is no need to provide the control module base address through a
low-level API from the low-level IO init, as this information is
available through DT. This patch adds a new API to initialize the
control module though, but mostly makes the old API obsolete. The
old API can be completely removed once OMAP3 is made DT only.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/control.c | 36 ++--
arch/arm/mach-omap2/control.h |1 +
arch/arm/mach-omap2/io.c | 34 ++
3 files changed, 53 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index e664dba..7067807 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -595,6 +595,7 @@ void __init omap3_ctrl_init(void)
struct control_init_data {
int index;
+ void __iomem *mem;
};
static const struct control_init_data ctrl_data = {
@@ -610,6 +611,34 @@ static struct of_device_id omap_scrm_dt_match_table[] = {
};
/**
+ * omap2_control_base_init - initialize iomappings for the control driver
+ *
+ * Detects and initializes the iomappings for the control driver, based
+ * on the DT data. Returns 0 in success, negative error value
+ * otherwise.
+ */
+int __init omap2_control_base_init(void)
+{
+ struct device_node *np;
+ const struct of_device_id *match;
+ struct control_init_data *data;
+ void __iomem *mem;
+
+ for_each_matching_node_and_match(np, omap_scrm_dt_match_table, match) {
+ data = (struct control_init_data *)match-data;
+
+ mem = of_iomap(np, 0);
+ if (!mem)
+ return -ENOMEM;
+
+ omap2_ctrl_base = mem;
+ data-mem = mem;
+ }
+
+ return 0;
+}
+
+/**
* omap_control_init - low level init for the control driver
*
* Initializes the low level clock infrastructure for control driver.
@@ -620,17 +649,12 @@ int __init omap_control_init(void)
struct device_node *np;
const struct of_device_id *match;
const struct control_init_data *data;
- void __iomem *mem;
int ret;
for_each_matching_node_and_match(np, omap_scrm_dt_match_table, match) {
data = match-data;
- mem = of_iomap(np, 0);
- if (!mem)
- return -ENOMEM;
-
- ret = omap2_clk_provider_init(np, data-index, mem);
+ ret = omap2_clk_provider_init(np, data-index, data-mem);
if (ret)
return ret;
}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index c08c00f..5790fcc 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -454,6 +454,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
void omap3_ctrl_init(void);
+int omap2_control_base_init(void);
int omap_control_init(void);
void omap2_set_globals_control(void __iomem *ctrl);
#else
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3a61b31..89b7762 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -384,7 +384,7 @@ void __init omap2420_init_early(void)
omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE));
+ omap2_control_base_init();
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -411,7 +411,7 @@ void __init omap2430_init_early(void)
omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE));
+ omap2_control_base_init();
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -442,10 +442,15 @@ void __init omap3_init_early(void)
omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
- /* XXX: remove these two once OMAP3 is DT only */
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
- omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
+ /* XXX: remove these once OMAP3 is DT only */
+ if (!of_have_populated_dt()) {
+ omap2_set_globals_control(
+
[PATCH 10/23] ARM: OMAP4+: PRM: move omap_prm_base_init under OMAP4 PRM driver
There is no need to call this separately from io.c, rather this can be
done commonly under the PRM driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c |4
arch/arm/mach-omap2/prm44xx.c |2 ++
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index ec2ace0..782d4bc 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -591,7 +591,6 @@ void __init am43xx_init_early(void)
NULL);
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
- omap_prm_base_init();
omap_cm_base_init();
omap3xxx_check_revision();
am33xx_check_features();
@@ -622,7 +621,6 @@ void __init omap4430_init_early(void)
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
- omap_prm_base_init();
omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
@@ -658,7 +656,6 @@ void __init omap5_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap_prm_base_init();
omap_cm_base_init();
omap44xx_prm_init();
omap5xxx_check_revision();
@@ -690,7 +687,6 @@ void __init dra7xx_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap_prm_base_init();
omap_cm_base_init();
omap44xx_prm_init();
dra7xxx_check_revision();
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0f0e49f..2692339 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -704,6 +704,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
int __init omap44xx_prm_init(void)
{
+ omap_prm_base_init();
+
if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
prm_features |= PRM_HAS_IO_WAKEUP;
--
1.7.9.5
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[PATCH 04/23] ARM: OMAP24xx: clock: remove unused apll code
APLL clock type is no longer needed as the legacy clock support is removed.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/Makefile|1 -
arch/arm/mach-omap2/clkt2xxx_apll.c | 142 ---
arch/arm/mach-omap2/clock2xxx.h | 11 ---
3 files changed, 154 deletions(-)
delete mode 100644 arch/arm/mach-omap2/clkt2xxx_apll.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 3b653b3..ba35217 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -181,7 +181,6 @@ obj-$(CONFIG_SOC_DRA7XX)+=
clockdomains7xx_data.o
obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o
obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o
-obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o
obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o
obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c
b/arch/arm/mach-omap2/clkt2xxx_apll.c
deleted file mode 100644
index c78e893..000
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * OMAP2xxx APLL clock control functions
- *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
- * Copyright (C) 2004-2010 Nokia Corporation
- *
- * Contacts:
- * Richard Woodruff r-woodru...@ti.com
- * Paul Walmsley
- *
- * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
- * Gordon McNutt and RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk.h
-#include linux/io.h
-
-
-#include clock.h
-#include clock2xxx.h
-#include cm2xxx.h
-#include cm-regbits-24xx.h
-
-/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
-#define EN_APLL_STOPPED0
-#define EN_APLL_LOCKED 3
-
-/* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */
-#define APLLS_CLKIN_19_2MHZ0
-#define APLLS_CLKIN_13MHZ 2
-#define APLLS_CLKIN_12MHZ 3
-
-/* Private functions */
-
-/**
- * omap2xxx_clk_apll_locked - is the APLL locked?
- * @hw: struct clk_hw * of the APLL to check
- *
- * If the APLL IP block referred to by @hw indicates that it's locked,
- * return true; otherwise, return false.
- */
-static bool omap2xxx_clk_apll_locked(struct clk_hw *hw)
-{
- struct clk_hw_omap *clk = to_clk_hw_omap(hw);
- u32 r, apll_mask;
-
- apll_mask = EN_APLL_LOCKED clk-enable_bit;
-
- r = omap2xxx_cm_get_pll_status();
-
- return ((r apll_mask) == apll_mask) ? true : false;
-}
-
-int omap2_clk_apll96_enable(struct clk_hw *hw)
-{
- return omap2xxx_cm_apll96_enable();
-}
-
-int omap2_clk_apll54_enable(struct clk_hw *hw)
-{
- return omap2xxx_cm_apll54_enable();
-}
-
-static void _apll96_allow_idle(struct clk_hw_omap *clk)
-{
- omap2xxx_cm_set_apll96_auto_low_power_stop();
-}
-
-static void _apll96_deny_idle(struct clk_hw_omap *clk)
-{
- omap2xxx_cm_set_apll96_disable_autoidle();
-}
-
-static void _apll54_allow_idle(struct clk_hw_omap *clk)
-{
- omap2xxx_cm_set_apll54_auto_low_power_stop();
-}
-
-static void _apll54_deny_idle(struct clk_hw_omap *clk)
-{
- omap2xxx_cm_set_apll54_disable_autoidle();
-}
-
-void omap2_clk_apll96_disable(struct clk_hw *hw)
-{
- omap2xxx_cm_apll96_disable();
-}
-
-void omap2_clk_apll54_disable(struct clk_hw *hw)
-{
- omap2xxx_cm_apll54_disable();
-}
-
-unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- return (omap2xxx_clk_apll_locked(hw)) ? 5400 : 0;
-}
-
-unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- return (omap2xxx_clk_apll_locked(hw)) ? 9600 : 0;
-}
-
-/* Public data */
-const struct clk_hw_omap_ops clkhwops_apll54 = {
- .allow_idle = _apll54_allow_idle,
- .deny_idle = _apll54_deny_idle,
-};
-
-const struct clk_hw_omap_ops clkhwops_apll96 = {
- .allow_idle = _apll96_allow_idle,
- .deny_idle = _apll96_deny_idle,
-};
-
-/* Public functions */
-
-u32 omap2xxx_get_apll_clkin(void)
-{
- u32 aplls, srate = 0;
-
- aplls = omap2xxx_cm_get_pll_config();
- aplls = OMAP24XX_APLLS_CLKIN_MASK;
- aplls = OMAP24XX_APLLS_CLKIN_SHIFT;
-
- if (aplls == APLLS_CLKIN_19_2MHZ)
- srate = 1920;
- else if (aplls == APLLS_CLKIN_13MHZ)
- srate = 1300;
- else if (aplls == APLLS_CLKIN_12MHZ)
- srate = 1200;
-
- return srate;
-}
-
diff --git a/arch/arm/mach-omap2/clock2xxx.h
[PATCH 16/23] ARM: OMAP4: omapdss: remove legacy pad muxing support
OMAP4 is DT only now, so the legacy mux support is not needed anymore.
Padconf is used instead from the driver / DT. This removes the need
for having the mux APIs exported from the control module driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Tomi Valkeinen tomi.valkei...@ti.com
---
arch/arm/mach-omap2/display.c | 38 --
1 file changed, 38 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 7a050f9..c5a4592 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -104,51 +104,13 @@ static const struct omap_dss_hwmod_data
omap4_dss_hwmod_data[] __initconst = {
{ dss_hdmi, omapdss_hdmi, -1 },
};
-static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
-{
- u32 enable_mask, enable_shift;
- u32 pipd_mask, pipd_shift;
- u32 reg;
-
- if (dsi_id == 0) {
- enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
- enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
- pipd_mask = OMAP4_DSI1_PIPD_MASK;
- pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
- } else if (dsi_id == 1) {
- enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
- enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
- pipd_mask = OMAP4_DSI2_PIPD_MASK;
- pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
- } else {
- return -ENODEV;
- }
-
- reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
-
- reg = ~enable_mask;
- reg = ~pipd_mask;
-
- reg |= (lanes enable_shift) enable_mask;
- reg |= (lanes pipd_shift) pipd_mask;
-
- omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
-
- return 0;
-}
-
static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
{
- if (cpu_is_omap44xx())
- return omap4_dsi_mux_pads(dsi_id, lane_mask);
-
return 0;
}
static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
{
- if (cpu_is_omap44xx())
- omap4_dsi_mux_pads(dsi_id, 0);
}
static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
--
1.7.9.5
--
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[PATCH 19/23] ARM: OMAP2+: PRM: move SoC specific init calls within a generic API
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the PRM driver. Done in preparation to make PRM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c | 17 +++---
arch/arm/mach-omap2/prcm-common.h |4
arch/arm/mach-omap2/prm.h |1 +
arch/arm/mach-omap2/prm2xxx.c |3 +--
arch/arm/mach-omap2/prm2xxx.h |2 +-
arch/arm/mach-omap2/prm33xx.c |3 +--
arch/arm/mach-omap2/prm33xx.h |2 +-
arch/arm/mach-omap2/prm3xxx.c |4 +---
arch/arm/mach-omap2/prm3xxx.h |2 +-
arch/arm/mach-omap2/prm44xx.c |3 +--
arch/arm/mach-omap2/prm44xx.h |1 -
arch/arm/mach-omap2/prm44xx_54xx.h |4 +++-
arch/arm/mach-omap2/prm54xx.h |1 -
arch/arm/mach-omap2/prm7xx.h |2 +-
arch/arm/mach-omap2/prm_common.c | 43 +++-
15 files changed, 58 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 89b7762..cab93d5 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -386,7 +386,7 @@ void __init omap2420_init_early(void)
OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_control_base_init();
omap2xxx_check_revision();
- omap2xxx_prm_init();
+ omap2_prcm_base_init();
omap2xxx_cm_init();
omap2xxx_voltagedomains_init();
omap242x_powerdomains_init();
@@ -413,7 +413,7 @@ void __init omap2430_init_early(void)
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_control_base_init();
omap2xxx_check_revision();
- omap2xxx_prm_init();
+ omap2_prcm_base_init();
omap2xxx_cm_init();
omap2xxx_voltagedomains_init();
omap243x_powerdomains_init();
@@ -453,7 +453,8 @@ void __init omap3_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
omap3xxx_check_features();
- omap3xxx_prm_init();
+ omap2_prcm_base_init();
+ omap3xxx_prm_init(NULL);
omap3xxx_cm_init();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
@@ -568,7 +569,7 @@ void __init am33xx_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
am33xx_check_features();
- am33xx_prm_init();
+ omap2_prcm_base_init();
am33xx_cm_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
@@ -591,7 +592,7 @@ void __init am43xx_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
am33xx_check_features();
- omap44xx_prm_init();
+ omap2_prcm_base_init();
omap4_cm_init();
am43xx_powerdomains_init();
am43xx_clockdomains_init();
@@ -616,7 +617,7 @@ void __init omap4430_init_early(void)
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
- omap44xx_prm_init();
+ omap2_prcm_base_init();
omap4_cm_init();
omap4_pm_init_early();
omap44xx_voltagedomains_init();
@@ -644,7 +645,7 @@ void __init omap5_init_early(void)
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap44xx_prm_init();
+ omap2_prcm_base_init();
omap5xxx_check_revision();
omap4_cm_init();
omap54xx_voltagedomains_init();
@@ -670,7 +671,7 @@ void __init dra7xx_init_early(void)
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap44xx_prm_init();
+ omap2_prcm_base_init();
dra7xxx_check_revision();
omap4_cm_init();
dra7xx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/prcm-common.h
b/arch/arm/mach-omap2/prcm-common.h
index 6a103c9..d0d81d0 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -524,11 +524,15 @@ struct of_device_id;
* @index: clock memory mapping index to be used
* @mem: IO mem pointer for this module
* @offset: module base address offset from the IO base
+ * @init: low level PRCM init function for this module
+ * @np: device node for this PRCM module
*/
struct omap_prcm_init_data {
int index;
void __iomem *mem;
s16 offset;
+ int (*init)(const struct omap_prcm_init_data *data);
+ struct device_node *np;
};
extern void omap_prcm_irq_cleanup(void);
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 6707333..3936e6c 100644
[PATCH 17/23] ARM: OMAP4: control: remove support for legacy padconf APIs
These are no longer needed for anything with the introduction of
pinctrl DT support, thus removed.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/control.c | 23 +--
arch/arm/mach-omap2/control.h |5 +
arch/arm/mach-omap2/io.c | 27 +--
3 files changed, 11 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index f9519f1..e664dba 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -33,7 +33,6 @@
#define PADCONF_SAVE_DONE 0x1
static void __iomem *omap2_ctrl_base;
-static void __iomem *omap4_ctrl_pad_base;
#if defined(CONFIG_ARCH_OMAP3) defined(CONFIG_PM)
struct omap3_scratchpad {
@@ -136,13 +135,10 @@ static struct omap3_control_regs control_context;
#endif /* CONFIG_ARCH_OMAP3 CONFIG_PM */
#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
-#define OMAP4_CTRL_PAD_REGADDR(reg)(omap4_ctrl_pad_base + (reg))
-void __init omap2_set_globals_control(void __iomem *ctrl,
- void __iomem *ctrl_pad)
+void __init omap2_set_globals_control(void __iomem *ctrl)
{
omap2_ctrl_base = ctrl;
- omap4_ctrl_pad_base = ctrl_pad;
}
void __iomem *omap_ctrl_base_get(void)
@@ -180,23 +176,6 @@ void omap_ctrl_writel(u32 val, u16 offset)
writel_relaxed(val, OMAP_CTRL_REGADDR(offset));
}
-/*
- * On OMAP4 control pad are not addressable from control
- * core base. So the common omap_ctrl_read/write APIs breaks
- * Hence export separate APIs to manage the omap4 pad control
- * registers. This APIs will work only for OMAP4
- */
-
-u32 omap4_ctrl_pad_readl(u16 offset)
-{
- return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
-void omap4_ctrl_pad_writel(u32 val, u16 offset)
-{
- writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
#ifdef CONFIG_ARCH_OMAP3
/**
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 8a9d97d7..c08c00f 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -436,11 +436,9 @@ extern void __iomem *omap_ctrl_base_get(void);
extern u8 omap_ctrl_readb(u16 offset);
extern u16 omap_ctrl_readw(u16 offset);
extern u32 omap_ctrl_readl(u16 offset);
-extern u32 omap4_ctrl_pad_readl(u16 offset);
extern void omap_ctrl_writeb(u8 val, u16 offset);
extern void omap_ctrl_writew(u16 val, u16 offset);
extern void omap_ctrl_writel(u32 val, u16 offset);
-extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
extern void omap3_save_scratchpad_contents(void);
extern void omap3_clear_scratchpad_contents(void);
@@ -457,8 +455,7 @@ extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
void omap3_ctrl_init(void);
int omap_control_init(void);
-extern void omap2_set_globals_control(void __iomem *ctrl,
- void __iomem *ctrl_pad);
+void omap2_set_globals_control(void __iomem *ctrl);
#else
#define omap_ctrl_base_get() 0
#define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 6a94345..3a61b31 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -384,8 +384,7 @@ void __init omap2420_init_early(void)
omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
- NULL);
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -412,8 +411,7 @@ void __init omap2430_init_early(void)
omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
- NULL);
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -444,8 +442,7 @@ void __init omap3_init_early(void)
omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
- omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
- NULL);
+ omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
/* XXX: remove these two once OMAP3 is DT only */
[PATCH 01/23] ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Splits the clock provider init out of the PRM driver and moves it to
clock driver. This is needed so that once the PRCM drivers are separated,
they can logically just access the clock driver not needing to go through
common PRM code. This would be wrong in the case of control module for
example.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock.c | 67 +++--
arch/arm/mach-omap2/clock.h |4 +--
arch/arm/mach-omap2/prcm-common.h |2 ++
arch/arm/mach-omap2/prm_common.c | 34 +--
4 files changed, 61 insertions(+), 46 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ff2eb66..2e8b868 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -24,6 +24,7 @@
#include linux/io.h
#include linux/bitops.h
#include linux/clk-private.h
+#include linux/of_address.h
#include asm/cpu.h
#include trace/events/power.h
@@ -73,32 +74,76 @@ struct ti_clk_features ti_clk_features;
static bool clkdm_control = true;
static LIST_HEAD(clk_hw_omap_clocks);
-void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
+static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
+
+static void clk_memmap_writel(u32 val, void __iomem *reg)
+{
+ struct clk_omap_reg *r = (struct clk_omap_reg *)reg;
+
+ writel_relaxed(val, clk_memmaps[r-index] + r-offset);
+}
+
+static u32 clk_memmap_readl(void __iomem *reg)
+{
+ struct clk_omap_reg *r = (struct clk_omap_reg *)reg;
+
+ return readl_relaxed(clk_memmaps[r-index] + r-offset);
+}
void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg)
{
- if (clk-flags MEMMAP_ADDRESSING) {
- struct clk_omap_reg *r = (struct clk_omap_reg *)reg;
- writel_relaxed(val, clk_memmaps[r-index] + r-offset);
- } else {
+ if (clk-flags MEMMAP_ADDRESSING)
+ clk_memmap_writel(val, reg);
+ else
writel_relaxed(val, reg);
- }
}
u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg)
{
u32 val;
- if (clk-flags MEMMAP_ADDRESSING) {
- struct clk_omap_reg *r = (struct clk_omap_reg *)reg;
- val = readl_relaxed(clk_memmaps[r-index] + r-offset);
- } else {
+ if (clk-flags MEMMAP_ADDRESSING)
+ val = clk_memmap_readl(reg);
+ else
val = readl_relaxed(reg);
- }
return val;
}
+static struct ti_clk_ll_ops omap_clk_ll_ops = {
+ .clk_readl = clk_memmap_readl,
+ .clk_writel = clk_memmap_writel,
+};
+
+/**
+ * omap2_clk_provider_init - initialize a clock provider
+ * @match_table: DT device table to match for devices to init
+ *
+ * Initializes a clock provider module (CM/PRM etc.), allocating the
+ * memory mapping, allocating the mapping index and initializing the
+ * low level driver infrastructure. Returns 0 in success, -ENOMEM in
+ * failure.
+ */
+int __init omap2_clk_provider_init(const struct of_device_id *match_table)
+{
+ struct device_node *np;
+ void __iomem *mem;
+ static int memmap_index;
+
+ ti_clk_ll_ops = omap_clk_ll_ops;
+
+ for_each_matching_node(np, match_table) {
+ mem = of_iomap(np, 0);
+ if (!mem)
+ return -ENOMEM;
+ clk_memmaps[memmap_index] = mem;
+ ti_dt_clk_init_provider(np, memmap_index);
+ memmap_index++;
+ }
+
+ return 0;
+}
+
/*
* OMAP2+ specific clock functions
*/
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 4592a27..8f6a0fb 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -267,8 +267,6 @@ extern const struct clksel_rate div_1_3_rates[];
extern const struct clksel_rate div_1_4_rates[];
extern const struct clksel_rate div31_1to31_rates[];
-extern void __iomem *clk_memmaps[];
-
extern int am33xx_clk_init(void);
extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
@@ -276,5 +274,7 @@ extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
extern void omap_clocks_register(struct omap_clk *oclks, int cnt);
+int __init omap2_clk_provider_init(const struct of_device_id *match_table);
+
void __init ti_clk_init_features(void);
#endif
diff --git a/arch/arm/mach-omap2/prcm-common.h
b/arch/arm/mach-omap2/prcm-common.h
index a8e4b58..22afef0 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -517,6 +517,8 @@ struct omap_prcm_irq_setup {
.priority = _priority \
}
+struct of_device_id;
+
extern void omap_prcm_irq_cleanup(void);
extern int omap_prcm_register_chain_handler(
struct omap_prcm_irq_setup *irq_setup);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 779940c..9f736d2 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@
[PATCH 02/23] ARM: OMAP2+: PRCM: rename of_prcm_init to omap_prcm_init
This avoids conflicts in the global namespace, and is more descriptive
of the purpose anyway.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c |2 +-
arch/arm/mach-omap2/prm.h|2 +-
arch/arm/mach-omap2/prm_common.c |8 +++-
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4fc8383..4f269be 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -731,7 +731,7 @@ int __init omap_clk_init(void)
ti_clk_init_features();
- ret = of_prcm_init();
+ ret = omap_prcm_init();
if (ret)
return ret;
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 77752e4..a38eaeb 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -19,7 +19,7 @@
extern void __iomem *prm_base;
extern u16 prm_features;
extern void omap2_set_globals_prm(void __iomem *prm);
-int of_prcm_init(void);
+int omap_prcm_init(void);
# endif
/*
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 9f736d2..f155aaf 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -590,7 +590,13 @@ static const struct of_device_id
omap_prcm_dt_match_table[] = {
{ }
};
-int __init of_prcm_init(void)
+/**
+ * omap_prcm_init - low level init for the PRCM drivers
+ *
+ * Initializes the low level clock infrastructure for PRCM drivers.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_prcm_init(void)
{
return omap2_clk_provider_init(omap_prcm_dt_match_table);
}
--
1.7.9.5
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[PATCH 14/23] ARM: OMAP4: PRM: move omap4xxx_prm_init earlier in init order
OMAP4 has different ordering of PRM and CM init calls in the early init. Re-oder these accordingly for OMAP4 also. This is needed so that we can do some optimizations in the following patches for the PRCM init. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/io.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 9014eca..8af8411 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -618,9 +618,9 @@ void __init omap4430_init_early(void) omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); omap4xxx_check_revision(); omap4xxx_check_features(); + omap44xx_prm_init(); omap4_cm_init(); omap4_pm_init_early(); - omap44xx_prm_init(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 22/23] ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags
Currently some cpu_is_X checks are used to setup prm_features, however
the same can be accomplished by just passing these flags from the PRM
init data. This is done in preparation to make PRM a separate driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm44xx.c|4 ++--
arch/arm/mach-omap2/prm_common.c |3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 1994dcc..af12302b 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -706,10 +706,10 @@ int __init omap44xx_prm_init(const struct
omap_prcm_init_data *data)
{
omap_prm_base_init();
- if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
+ if (data-flags PRM_HAS_IO_WAKEUP)
prm_features |= PRM_HAS_IO_WAKEUP;
- if (!soc_is_dra7xx())
+ if (data-flags PRM_HAS_VOLTAGE)
prm_features |= PRM_HAS_VOLTAGE;
omap4_prminst_set_prm_dev_inst(data-device_inst_offset);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index b828352..d5bb649 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -651,18 +651,21 @@ static struct omap_prcm_init_data omap4_prm_data
__initdata = {
.index = CLK_MEMMAP_INDEX_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
+ .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
};
static struct omap_prcm_init_data omap5_prm_data __initdata = {
.index = CLK_MEMMAP_INDEX_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
+ .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
};
static struct omap_prcm_init_data dra7_prm_data __initdata = {
.index = CLK_MEMMAP_INDEX_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = DRA7XX_PRM_DEVICE_INST,
+ .flags = PRM_HAS_IO_WAKEUP,
};
static struct omap_prcm_init_data am4_prm_data __initdata = {
--
1.7.9.5
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[PATCH 11/23] ARM: OMAP4+: CM: move omap_cm_base_init under OMAP4 CM driver
There is no need to call this separately from io.c, rather this can be
done commonly under the CM driver. Also, this patch makes the API static,
as it is no longer used outside the driver file.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm44xx.h |1 -
arch/arm/mach-omap2/cminst44xx.c |4 +++-
arch/arm/mach-omap2/io.c |4
3 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index 728d06a..ad6e263 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,7 +23,6 @@
#define OMAP4_CM_CLKSTCTRL 0x
#define OMAP4_CM_STATICDEP 0x0004
-void omap_cm_base_init(void);
int omap4_cm_init(void);
#endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 95a8cff..9319034 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -63,7 +63,7 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];
* Populates the base addresses of the _cm_bases
* array used for read/write of cm module registers.
*/
-void omap_cm_base_init(void)
+static void omap_cm_base_init(void)
{
_cm_bases[OMAP4430_PRM_PARTITION] = prm_base;
_cm_bases[OMAP4430_CM1_PARTITION] = cm_base;
@@ -516,6 +516,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = {
int __init omap4_cm_init(void)
{
+ omap_cm_base_init();
+
return cm_register(omap4xxx_cm_ll_data);
}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 782d4bc..1147320 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -591,7 +591,6 @@ void __init am43xx_init_early(void)
NULL);
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
- omap_cm_base_init();
omap3xxx_check_revision();
am33xx_check_features();
omap44xx_prm_init();
@@ -621,7 +620,6 @@ void __init omap4430_init_early(void)
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
- omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
omap4_cm_init();
@@ -656,7 +654,6 @@ void __init omap5_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap_cm_base_init();
omap44xx_prm_init();
omap5xxx_check_revision();
omap4_cm_init();
@@ -687,7 +684,6 @@ void __init dra7xx_init_early(void)
OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
- omap_cm_base_init();
omap44xx_prm_init();
dra7xxx_check_revision();
omap4_cm_init();
--
1.7.9.5
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[PATCH 23/23] ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init
The compatible DT node is now passed with the prm init, so there is no
need to do node matching here again. Added a new flag to the init data
also, to detect default IRQ support for OMAP4. Also, any booting omap4
DT setup always has a PRM node, so there is no need to check against
the special case where it would be missing.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm.h|2 ++
arch/arm/mach-omap2/prm44xx.c| 50 +++---
arch/arm/mach-omap2/prm_common.c |2 +-
3 files changed, 22 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 3936e6c..c64cb8e 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -29,9 +29,11 @@ int omap2_prcm_base_init(void);
*
* PRM_HAS_IO_WAKEUP: has IO wakeup capability
* PRM_HAS_VOLTAGE: has voltage domains
+ * PRM_IRQ_DEFAULT: use default irq number for PRM irq
*/
#define PRM_HAS_IO_WAKEUP (1 0)
#define PRM_HAS_VOLTAGE(1 1)
+#define PRM_IRQ_DEFAULT(1 2)
/*
* MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index af12302b..ce16f2f 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -702,10 +702,14 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.vp_clear_txdone= omap4_prm_vp_clear_txdone,
};
+static const struct omap_prcm_init_data *prm_init_data;
+
int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
{
omap_prm_base_init();
+ prm_init_data = data;
+
if (data-flags PRM_HAS_IO_WAKEUP)
prm_features |= PRM_HAS_IO_WAKEUP;
@@ -717,16 +721,8 @@ int __init omap44xx_prm_init(const struct
omap_prcm_init_data *data)
return prm_register(omap44xx_prm_ll_data);
}
-static struct of_device_id omap_prm_dt_match_table[] = {
- { .compatible = ti,omap4-prm },
- { .compatible = ti,omap5-prm },
- { .compatible = ti,dra7-prm },
- { }
-};
-
static int omap44xx_prm_late_init(void)
{
- struct device_node *np;
int irq_num;
if (!(prm_features PRM_HAS_IO_WAKEUP))
@@ -736,31 +732,23 @@ static int omap44xx_prm_late_init(void)
if (!of_have_populated_dt())
return 0;
- np = of_find_matching_node(NULL, omap_prm_dt_match_table);
-
- if (!np) {
- /* Default loaded up with OMAP4 values */
- if (!cpu_is_omap44xx())
- return 0;
- } else {
- irq_num = of_irq_get(np, 0);
- /*
-* Already have OMAP4 IRQ num. For all other platforms, we need
-* IRQ numbers from DT
-*/
- if (irq_num 0 !cpu_is_omap44xx()) {
- if (irq_num == -EPROBE_DEFER)
- return irq_num;
-
- /* Have nothing to do */
- return 0;
- }
-
- /* Once OMAP4 DT is filled as well */
- if (irq_num = 0)
- omap4_prcm_irq_setup.irq = irq_num;
+ irq_num = of_irq_get(prm_init_data-np, 0);
+ /*
+* Already have OMAP4 IRQ num. For all other platforms, we need
+* IRQ numbers from DT
+*/
+ if (irq_num 0 !(prm_init_data-flags PRM_IRQ_DEFAULT)) {
+ if (irq_num == -EPROBE_DEFER)
+ return irq_num;
+
+ /* Have nothing to do */
+ return 0;
}
+ /* Once OMAP4 DT is filled as well */
+ if (irq_num = 0)
+ omap4_prcm_irq_setup.irq = irq_num;
+
omap44xx_prm_enable_io_wakeup();
return omap_prcm_register_chain_handler(omap4_prcm_irq_setup);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index d5bb649..3f26df6 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -651,7 +651,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata
= {
.index = CLK_MEMMAP_INDEX_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
- .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
+ .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT,
};
static struct omap_prcm_init_data omap5_prm_data __initdata = {
--
1.7.9.5
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Re: [PATCH 16/23] ARM: OMAP4: omapdss: remove legacy pad muxing support
On 27/11/14 17:51, Tero Kristo wrote: OMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver. We still use those mux functions for DT. The mux registers for DSI are so funny that we can't use the normal padconf for them. I did do some work to use syscon, but I never had time to finish it. Tomi signature.asc Description: OpenPGP digital signature
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On 11/27/2014 04:50 PM, Arnd Bergmann wrote: On Thursday 27 November 2014 16:23:31 Peter Ujfalusi wrote: This will only work in case of legacy boot. When booting with DT we do not have pdata and after this patch in dt boot we are not going to be able to get the DMA resources either. No, when booting with DT, the filter_fn and data are not used at all, we get the dma channel by parsing the DT instead. Correct. I think if we want to do something like this, it has to be done within the dmaengine framework. The dma controller's of_dma_filter_info already have .filter_fn which could be used by the framework. No, of_dma_filter_info/of_dma_simple_xlate was a mistake, we should never have even introduced that. All drivers that rely on this can simply provide their own xlate function that calls of_dma_get_slave_channel() or one of the related functions. edma is particularly trivial, it can just use of_dma_xlate_by_chan_id() instead of of_dma_simple_xlate, as it looks up the channel by its number. I see. With this series I did not planed to fix all edma related issues, just as a start clean up the related header files. I would rather not add fixes to mmc, spi, etc drivers since while you have valid point it is not in the scope of this series. Can we do the changes you are suggesting in an incremental manner? -- Péter -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/23] ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
On Thu, 27 Nov 2014, Tero Kristo wrote: Yet another PRCM cleanup set, towards making PRCM a separate driver. This set is most likely too late for 3.19, but hopefully it can make it to 3.20. Yep too late for 3.19. ... Testing done: ... omap3-beagle: boot, suspend (ret), suspend (off) (UART wakeup seems broken on 3.18-rc1 btw) v3.18-rc1 UART wakeups worked here on both of the 35xx Beagles: http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/README.txt http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es3beagle/3530es3beagle_log.txt http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es31beagle/3530es31beagle_log.txt - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 6/8] net: can: c_can: Disable pins when CAN interface is down
On 11/27/2014 02:26 PM, Linus Walleij wrote: On Fri, Nov 14, 2014 at 4:40 PM, Roger Quadros rog...@ti.com wrote: DRA7 CAN IP suffers from a problem which causes it to be prevented from fully turning OFF (i.e. stuck in transition) if the module was disabled while there was traffic on the CAN_RX line. To work around this issue we select the SLEEP pin state by default on probe and use the DEFAULT pin state on CAN up and back to the SLEEP pin state on CAN down. Signed-off-by: Roger Quadros rog...@ti.com Reviewed-by: Linus Walleij linus.wall...@linaro.org Thanks, however the patch is already upstream. I see you figured it out all by yourselves :D (Sorry for being absent.) +#include linux/pinctrl/consumer.h + pinctrl_pm_select_default_state(dev-dev.parent); + pinctrl_pm_select_sleep_state(dev-dev.parent); + pinctrl_pm_select_sleep_state(dev-dev.parent); NB: in drivers/base/pinctrl.c: #ifdef CONFIG_PM /* * If power management is enabled, we also look for the optional * sleep and idle pin states, with semantics as defined in * linux/pinctrl/pinctrl-state.h */ dev-pins-sleep_state = pinctrl_lookup_state(dev-pins-p, PINCTRL_STATE_SLEEP); So if these states are necessary for the driver to work, put depends on PM or select PM in the Kconfig. Roger, you can prepare a patch, if needed. Thanks, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions| Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917- | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | signature.asc Description: OpenPGP digital signature
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On Thursday 27 November 2014 20:46:12 Peter Ujfalusi wrote: I see. With this series I did not planed to fix all edma related issues, just as a start clean up the related header files. I would rather not add fixes to mmc, spi, etc drivers since while you have valid point it is not in the scope of this series. Can we do the changes you are suggesting in an incremental manner? Sure, but I'd leave the existing filter function declaration alone then and not move it, since we wouldn't want to keep it in the long run. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs
On Mon, Nov 17, 2014 at 12:48:22PM +0100, Marek Szyprowski wrote:
This is an updated patchset, which intends to add support for L2 cache
on Exynos4 SoCs on boards running under secure firmware, which requires
certain initialization steps to be done with help of firmware, as
selected registers are writable only from secure mode.
First four patches extend existing support for secure write in L2C driver
to account for design of secure firmware running on Exynos. Namely:
1) direct read access to certain registers is needed on Exynos, because
secure firmware calls set several registers at once,
2) not all boards are running secure firmware, so .write_sec callback
needs to be installed in Exynos firmware ops initialization code,
3) write access to {DATA,TAG}_LATENCY_CTRL registers fron non-secure world
is not allowed and so must use l2c_write_sec as well,
4) on certain boards, default value of prefetch register is incorrect
and must be overridden at L2C initialization.
For boards running with firmware that provides access to individual
L2C registers this series should introduce no functional changes. However
since the driver is widely used on other platforms I'd like to kindly ask
any interested people for testing.
Further three patches add implementation of .write_sec and .configure
callbacks for Exynos secure firmware and necessary DT nodes to enable
L2 cache.
Changes in this version tested on Exynos4412-based TRATS2 and OdroidU3+
boards (both with secure firmware). There should be no functional change
for Exynos boards running without secure firmware. I do not have access
to affected non-Exynos boards, so I could not test on them.
So, I applied this series, and now I get a conflicts between my tree and
arm-soc for:
arch/arm/mach-exynos/firmware.c
arch/arm/mach-exynos/sleep.S
So, I'm going to un-stage the exynos bits, and we'll have to work out
some way to handle those.
--
FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up
according to speedtest.net.
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[PATCH] ARM: OMAP2+: AM43x: Add ID for ES1.2
ES1.2 is a minor variant of ES1.1. Major changes since ES1.1 are updating ROM for fixing the following boot modes: - NAND boot - UART boot - Ethernet boot - USB HOST/Client boot This patch adds ID support for AM437x ES1.2 silicon. There are no additional kernel fixes required for ES1.2 silicon. Latest Technical Documentation can be found here: http://www.ti.com/lsds/ti/arm/sitara_arm_cortex_a_processor/arm_cortex_a9_core/am437x_arm_cortex_a9/tech_docs.page Signed-off-by: Lokesh Vutla lokeshvu...@ti.com --- arch/arm/mach-omap2/id.c | 8 ++-- arch/arm/mach-omap2/soc.h | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 53841de..c25feba 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -471,11 +471,15 @@ void __init omap3xxx_check_revision(void) cpu_rev = 1.0; break; case 1: - /* FALLTHROUGH */ - default: omap_revision = AM437X_REV_ES1_1; cpu_rev = 1.1; break; + case 2: + /* FALLTHROUGH */ + default: + omap_revision = AM437X_REV_ES1_2; + cpu_rev = 1.2; + break; } break; case 0xb8f2: diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 4376f59..c1a3b44 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -446,6 +446,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define AM437X_CLASS 0x4370 #define AM437X_REV_ES1_0 (AM437X_CLASS | (0x10 8)) #define AM437X_REV_ES1_1 (AM437X_CLASS | (0x11 8)) +#define AM437X_REV_ES1_2 (AM437X_CLASS | (0x12 8)) #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 8)) -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] ARM: edma: Rename header file for dmaengine filter function definition
On 11/27/2014 11:52 PM, Arnd Bergmann wrote: On Thursday 27 November 2014 20:46:12 Peter Ujfalusi wrote: I see. With this series I did not planed to fix all edma related issues, just as a start clean up the related header files. I would rather not add fixes to mmc, spi, etc drivers since while you have valid point it is not in the scope of this series. Can we do the changes you are suggesting in an incremental manner? Sure, but I'd leave the existing filter function declaration alone then and not move it, since we wouldn't want to keep it in the long run. but if you want to reference the filter function (which is in drivers/dma/edma.c) in arch/arm/mach-davinci/ directory, we will need it. Don't we? If I leave the header as it is, then how would we clean up the edma headers? I would not put the API definitions for the arch code into the same file as we have the filter definition. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Péter -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 16/23] ARM: OMAP4: omapdss: remove legacy pad muxing support
On 11/27/2014 06:09 PM, Tomi Valkeinen wrote: On 27/11/14 17:51, Tero Kristo wrote: OMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver. We still use those mux functions for DT. The mux registers for DSI are so funny that we can't use the normal padconf for them. Ah hmm, so it seems, I overlooked the omapdss_init_of() function. Looks like some of the patches in this set needs to be dropped for now then, namely 16, 17, and patch 18 has to be modified. The direct omap4 padconf hacks are very bad though. Maybe it should be changed to only allow access to that single DSIPHY register. -Tero I did do some work to use syscon, but I never had time to finish it. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
