[PATCH 1/3] rtc: omap: Unlock and Lock rtc registers before and after register writes

2015-03-31 Thread Lokesh Vutla
RTC module contains a kicker mechanism to prevent any spurious writes
from changing the register values. This mechanism requires two MMR
writes to the KICK0 and KICK1 registers with exact data values
before the kicker lock mechanism is released.

Currently the driver release the lock in the probe and leaves it enabled
until the rtc driver removal. This eliminates the idea of preventing
spurious writes when RTC driver is loaded.
So implement rtc lock and unlock functions before and after register writes.

Signed-off-by: Lokesh Vutla 
---
- This is as advised by Paul to implement lock and unlock functions in
  the driver and not to unlock and leave it in probe.
  The same discussion can be seen here:
  http://www.mail-archive.com/linux-omap%40vger.kernel.org/msg111588.html

 drivers/rtc/rtc-omap.c | 46 ++
 1 file changed, 38 insertions(+), 8 deletions(-)

diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 8e5851a..96cc613 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -156,6 +156,22 @@ static inline void rtc_writel(struct omap_rtc *rtc, 
unsigned int reg, u32 val)
writel(val, rtc->base + reg);
 }
 
+static void rtc_unlock(struct omap_rtc *rtc)
+{
+   if (rtc->type->has_kicker) {
+   rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
+   rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
+   }
+}
+
+static void rtc_lock(struct omap_rtc *rtc)
+{
+   if (rtc->type->has_kicker) {
+   rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
+   rtc_writel(rtc, OMAP_RTC_KICK1_REG, 0);
+   }
+}
+
 /*
  * We rely on the rtc framework to handle locking (rtc->ops_lock),
  * so the only other requirement is that register accesses which
@@ -186,7 +202,9 @@ static irqreturn_t rtc_irq(int irq, void *dev_id)
 
/* alarm irq? */
if (irq_data & OMAP_RTC_STATUS_ALARM) {
+   rtc_unlock(rtc);
rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
+   rtc_lock(rtc);
events |= RTC_IRQF | RTC_AF;
}
 
@@ -218,9 +236,11 @@ static int omap_rtc_alarm_irq_enable(struct device *dev, 
unsigned int enabled)
irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
}
rtc_wait_not_busy(rtc);
+   rtc_unlock(rtc);
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
if (rtc->type->has_irqwakeen)
rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
+   rtc_lock(rtc);
local_irq_enable();
 
return 0;
@@ -293,12 +313,14 @@ static int omap_rtc_set_time(struct device *dev, struct 
rtc_time *tm)
local_irq_disable();
rtc_wait_not_busy(rtc);
 
+   rtc_unlock(rtc);
rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
+   rtc_lock(rtc);
 
local_irq_enable();
 
@@ -341,6 +363,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct 
rtc_wkalrm *alm)
local_irq_disable();
rtc_wait_not_busy(rtc);
 
+   rtc_unlock(rtc);
rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
@@ -362,6 +385,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct 
rtc_wkalrm *alm)
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
if (rtc->type->has_irqwakeen)
rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
+   rtc_lock(rtc);
 
local_irq_enable();
 
@@ -391,6 +415,7 @@ static void omap_rtc_power_off(void)
unsigned long now;
u32 val;
 
+   rtc_unlock(rtc);
/* enable pmic_power_en control */
val = rtc_readl(rtc, OMAP_RTC_PMIC_REG);
rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN);
@@ -423,6 +448,7 @@ static void omap_rtc_power_off(void)
val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG,
val | OMAP_RTC_INTERRUPTS_IT_ALARM2);
+   rtc_lock(rtc);
 
/*
 * Wait for alarm to trigger (within two seconds) and external PMIC to
@@ -527,10 +553,7 @@ static int __init omap_rtc_probe(struct platform_device 
*pdev)
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
 
-   if (rtc->type->has_kicker) {
-   rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
-   rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
-   }
+   rtc_unlock(rtc);
 
/*
 * disable interrupts
@@ -593,6 +616,8 @@ static int __init omap_rtc_probe(struct platform_device 
*pdev)

[PATCH 3/3] rtc: omap: use module_platform_driver

2015-03-31 Thread Lokesh Vutla
module_platform_driver_probe() prevents driver from requesting probe deferral.
So using module_platform_drive() to support probe deferral.

Signed-off-by: Lokesh Vutla 
---
 drivers/rtc/rtc-omap.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 96cc613..a4965a0 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -510,7 +510,7 @@ static const struct of_device_id omap_rtc_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
 
-static int __init omap_rtc_probe(struct platform_device *pdev)
+static int omap_rtc_probe(struct platform_device *pdev)
 {
struct omap_rtc *rtc;
struct resource *res;
@@ -745,6 +745,7 @@ static void omap_rtc_shutdown(struct platform_device *pdev)
 }
 
 static struct platform_driver omap_rtc_driver = {
+   .probe  = omap_rtc_probe,
.remove = __exit_p(omap_rtc_remove),
.shutdown   = omap_rtc_shutdown,
.driver = {
@@ -755,7 +756,7 @@ static struct platform_driver omap_rtc_driver = {
.id_table   = omap_rtc_id_table,
 };
 
-module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
+module_platform_driver(omap_rtc_driver);
 
 MODULE_ALIAS("platform:omap_rtc");
 MODULE_AUTHOR("George G. Davis (and others)");
-- 
1.9.1

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[PATCH 0/3] rtc: omap: Fix misc bugs

2015-03-31 Thread Lokesh Vutla
This patch series fixes miscellaneous bugs in OMAP RTC driver.

Tested on DRA72-evm with an out of tree patch for RTC hwmod.
Logs: http://pastebin.ubuntu.com/10716566/

Lokesh Vutla (3):
  rtc: omap: Unlock and Lock rtc registers before and after register
writes
  rtc: omap: Update Kconfig for OMAP RTC
  rtc: omap: use module_platform_driver

 drivers/rtc/Kconfig|  6 +++---
 drivers/rtc/rtc-omap.c | 51 --
 2 files changed, 44 insertions(+), 13 deletions(-)

-- 
1.9.1

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[PATCH 2/3] rtc: omap: Update Kconfig for OMAP RTC

2015-03-31 Thread Lokesh Vutla
RTC is present in AM43xx and DRA7xx also. Updating the Kconfig
to depend on ARCH_OMAP or ARCH_DAVINCI

Signed-off-by: Lokesh Vutla 
---
 drivers/rtc/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index b5b5c3d..40faf56 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1121,11 +1121,11 @@ config RTC_DRV_IMXDI
   will be called "rtc-imxdi".
 
 config RTC_DRV_OMAP
-   tristate "TI OMAP1"
-   depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || 
ARCH_DAVINCI_DA8XX || SOC_AM33XX
+   tristate "TI OMAP Real Time Clock"
+   depends on ARCH_OMAP || ARCH_DAVINCI
help
  Say "yes" here to support the on chip real time clock
- present on TI OMAP1, AM33xx and DA8xx/OMAP-L13x.
+ present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx.
 
  This driver can also be built as a module, if so, module
  will be called rtc-omap.
-- 
1.9.1

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Re: [PATCH 2/2] EDMA: TI: fixed wrongly initialized data parameter to the edma callback

2015-03-31 Thread Vinod Koul
On Mon, Mar 23, 2015 at 09:35:01PM +0100, Petr Kulhavy wrote:
> The "data" parameter passed indirectly to the edma_callback() should be
> edma_chan and not the dma_chan.
> 
> This bug was so far harmless since the offset of struct dma_chan within struct
> edma_chan is 0. However as soon as someone changes struct edma_chan this would
> cause troubles.
Applied now, but do ensure you are using right subsystem anmes for patches.
I have fixed up now

-- 
~Vinod

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Re: Possible regression in next-20150323 due to "ARM, arm64: kvm: get rid of the bounce page"

2015-03-31 Thread Kevin Hilman
Hi Ard,

Ard Biesheuvel  writes:

[...]

> I think Will and I were both under the impression that this patch
>
> https://git.kernel.org/cgit/linux/kernel/git/arm64/linux.git/log/?h=kvm-bounce-page
>
> fixed the issue conclusively.

Nope, that branch is already part of linux-next, and linux-next still
fails to compile for 20+ defconfigs[1]

> Could you elaborate on the issue please? What is the error you are
> getting, and can you confirm that is is caused by ld choking on the
> linker script? If not, this is another error than the one we have been
> trying to fix

It's definitely not linker script related.

Using "arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-12ubuntu1) 4.7.3",
here's the error when building for multi_v7_defconfig (full log
available[2]):

../mm/migrate.c: In function 'migrate_pages':
../mm/migrate.c:1148:1: internal compiler error: in push_minipool_fix, at 
config/arm/arm.c:13101
Please submit a full bug report,
with preprocessed source if appropriate.
See  for instructions.
Preprocessed source stored into /tmp/ccO1Nz1m.out file, please attach
this to your bugreport.
make[2]: *** [mm/migrate.o] Error 1
make[2]: Target `__build' not remade because of errors.
make[1]: *** [mm] Error 2

build bisect points to commit 21f992084aeb[3], but that doesn't revert
cleanly so I haven't got any further than that yet.

Kevin

[1] http://kernelci.org/build/next/kernel/next-20150331/
[2] 
http://storage.kernelci.org/next/next-20150331/arm-multi_v7_defconfig/build.log
[3] 21f992084aeb777675ba5f9c2dc6663e8a06e467 is the first bad commit

Author: Kirill A. Shutemov 
Date:   Wed Mar 25 13:02:28 2015 +1100

page-flags: define behavior of FS/IO-related flags on compound pages

It seems we don't have compound page on FS/IO path currently.  Use
NO_COMPOUND to catch if we have.

The odd exception is PG_dirty: sound uses compound pages and maps
them
with PTEs.  NO_COMPOUND triggers VM_BUG_ON() in set_page_dirty() on
handling shared fault.  Let's use HEAD for PG_dirty.

Signed-off-by: Kirill A. Shutemov 
Cc: Andrea Arcangeli 
Cc: Hugh Dickins 
Cc: Dave Hansen 
Cc: Mel Gorman 
Cc: Rik van Riel 
Cc: Vlastimil Babka 
Cc: Christoph Lameter  
Cc: Naoya Horiguchi 
Cc: Steve Capper 
Cc: "Aneesh Kumar K.V" 
Cc: Johannes Weiner 
Cc: Michal Hocko 
Cc: Jerome Marchand 
Signed-off-by: Andrew Morton 

:04 04 0d621460af1123de8fc33c881ae314c914725afc
b843f45fb2a1c2537e8c17946d3f8af512cab84d M  include
bisect run success
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Re: Possible regression in next-20150323 due to "ARM, arm64: kvm: get rid of the bounce page"

2015-03-31 Thread Ard Biesheuvel
On 31 March 2015 at 20:58, Kevin Hilman  wrote:
> Will, Ard,
>
> Will Deacon  writes:
>
>> On Fri, Mar 27, 2015 at 12:25:54AM +, Simon Horman wrote:
>>> On Thu, Mar 26, 2015 at 08:29:21AM -0700, Tyler Baker wrote:
>>> > On 26 March 2015 at 06:36, Will Deacon  wrote:
>>> > > On Thu, Mar 26, 2015 at 12:39:39AM +, Simon Horman wrote:
>>> > >> On Tue, Mar 24, 2015 at 11:13:58AM -0500, Nishanth Menon wrote:
>>> > >> > I think we now have a new error: (seen with omap2plus_defconfig)
>>> > >> > on next-20150324 :
>>> > >> > ./arch/arm/kernel/vmlinux.lds:677: undefined symbol 
>>> > >> > `__hyp_idmap_size'
>>> > >> > referenced in expression
>>> > >> > make: *** [vmlinux] Error 1
>>> > >>
>>> > >> Thanks, I am seeing that too.
>>> > >>
>>> > >> My armchair suggestion is that the following should be reverted.
>>> > >>
>>> > >> e60a1fec44a2f ("ARM: kvm: implement replacement for ld's LOG2CEIL()")
>>> > >> 06f75a1f62000 ("ARM, arm64: kvm: get rid of the bounce page")
>>> > >
>>> > > Can you try again with the latest -next please? We've merged an 
>>> > > additional
>>> > > patch aimed at sorting this out. Reverting isn't really an option, as
>>> > > there's an awful lot of code that depends on the bounce page removal.
>>> >
>>> > Here are the kernelci.org -next results[1], if you click the build
>>> > status you can dig down into the build failures. next-20150326 has now
>>> > hit a compiler bug, Arnd mentioned he was looking into this issue.
>>>
>>> I have confirmed that next-20150326 does not compile without
>>> the following reverted:
>>>
>>> 12eb3e833961 ("ARM: kvm: assert on HYP section boundaries not actual code 
>>> size")
>>> e60a1fec44a2 ("ARM: kvm: implement replacement for ld's LOG2CEIL()")
>>> 06f75a1f6200 ("ARM, arm64: kvm: get rid of the bounce page")
>>
>> Thanks for testing this and sorry for the continued breakage. Which
>> toolchain did you say you were using? Ard has some more patches trying to
>> fix this, but none of our toolchains seem to tickle the issue.
>
> I've also tested on the default ARM toolchains available with ubuntu[1]
>
> Are there any updates on this issue?
>

I think Will and I were both under the impression that this patch

https://git.kernel.org/cgit/linux/kernel/git/arm64/linux.git/log/?h=kvm-bounce-page

fixed the issue conclusively.

Could you elaborate on the issue please? What is the error you are
getting, and can you confirm that is is caused by ld choking on the
linker script? If not, this is another error than the one we have been
trying to fix

-- 
Ard.



> It ha broken most of the ARM defconfigs in linux-next[2], and since it's
> been broken for a week now, it is masking other types of issues that we
> can normally find via automated boot testing.
>
> Kevin
>
>
> [1]
> arm-linux-gnueabihf-gcc (Ubuntu/Linaro 4.8.2-16ubuntu4) 4.8.2
> arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.7.3-12ubuntu1) 4.7.3
>
> [2] http://kernelci.org/job/next/
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Re: [PATCHv3 0/2] N900 Modem Speech Support

2015-03-31 Thread Sebastian Reichel
Hi,

On Sat, Mar 21, 2015 at 08:09:15PM +0100, Sebastian Reichel wrote:
> This patchset contains the missing speech data support for the
> Nokia N900 modem.
>
> [...]
>
>   HSI: cmt_speech: Add cmt-speech driver
>   HSI: nokia-modem: Add cmt-speech support
> 
>  drivers/hsi/clients/Kconfig  |   12 +-
>  drivers/hsi/clients/Makefile |1 +
>  drivers/hsi/clients/cmt_speech.c | 1456 
> ++
>  drivers/hsi/clients/nokia-modem.c|   32 +-
>  include/uapi/linux/hsi/Kbuild|2 +-
>  include/uapi/linux/hsi/cs-protocol.h |  113 +++
>  6 files changed, 1613 insertions(+), 3 deletions(-)
>  create mode 100644 drivers/hsi/clients/cmt_speech.c
>  create mode 100644 include/uapi/linux/hsi/cs-protocol.h

I added the patches to my linux-hsi.git for-next branch aimed for
4.1.

-- Sebastian



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[PATCH 3.13.y-ckt 055/143] usb: musb: omap2plus bus glue needs USB host support

2015-03-31 Thread Kamal Mostafa
3.13.11-ckt18 -stable review patch.  If anyone has any objections, please let 
me know.

--

From: Arnd Bergmann 

commit a8d191c8bb2f11a8f381e7cb98f978b7288c1401 upstream.

The musb/omap2430.c bus glue driver calls usb_hcd_poll_rh_status,
which is only available if CONFIG_USB is also set, i.e. we
are building USB host mode and not just endpoint mode.

Signed-off-by: Arnd Bergmann 
Cc: linux-omap@vger.kernel.org
Signed-off-by: Felipe Balbi 
Signed-off-by: Kamal Mostafa 
---
 drivers/usb/musb/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 57dfc0c..a70f46f 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -74,7 +74,7 @@ config USB_MUSB_TUSB6010
 
 config USB_MUSB_OMAP2PLUS
tristate "OMAP2430 and onwards"
-   depends on ARCH_OMAP2PLUS
+   depends on ARCH_OMAP2PLUS && USB
select GENERIC_PHY
 
 config USB_MUSB_AM35X
-- 
1.9.1

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[PATCHv6 24/34] ARM: dts: omap24xx: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430
SoCs, and moves some of the generic peripherals under it. System control
module nodes are moved under this new interconnect also, and the SCM
clock layout is changed to use the new SCM node as the clock provider.

Signed-off-by: Tero Kristo 
---
 Documentation/devicetree/bindings/arm/omap/l4.txt  |   17 
 .../devicetree/bindings/arm/omap/prcm.txt  |2 +-
 arch/arm/boot/dts/omap2420.dtsi|   80 +--
 arch/arm/boot/dts/omap2430-clocks.dtsi |8 +-
 arch/arm/boot/dts/omap2430.dtsi|  107 +++-
 arch/arm/boot/dts/omap24xx-clocks.dtsi |6 +-
 arch/arm/mach-omap2/control.c  |7 +-
 7 files changed, 140 insertions(+), 87 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/omap/l4.txt

diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
new file mode 100644
index 000..57569cc8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -0,0 +1,17 @@
+L4 interconnect bindings
+
+These bindings describe the OMAP SoCs L4 interconnect bus.
+
+Required properties:
+- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
+  Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
+- ranges : contains the IO map range for the bus
+
+Examples:
+
+l4: l4@4800 {
+   compatible "ti,omap2-l4", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4800 0x10>;
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index 68f96f8..cce8365 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -14,7 +14,7 @@ Required properties:
"ti,am4-prcm"
"ti,am4-scrm"
"ti,omap2-prcm"
-   "ti,omap2-scrm"
+   "ti,omap2-scm"
"ti,omap3-prm"
"ti,omap3-cm"
"ti,omap3-scrm"
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index e2b2e93..5b9a376 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -14,47 +14,65 @@
compatible = "ti,omap2420", "ti,omap2";
 
ocp {
-   prcm: prcm@48008000 {
-   compatible = "ti,omap2-prcm";
-   reg = <0x48008000 0x1000>;
+   l4: l4@4800 {
+   compatible = "ti,omap2-l4", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4800 0x10>;
 
-   prcm_clocks: clocks {
-   #address-cells = <1>;
-   #size-cells = <0>;
-   };
+   prcm: prcm@8000 {
+   compatible = "ti,omap2-prcm";
+   reg = <0x8000 0x1000>;
 
-   prcm_clockdomains: clockdomains {
-   };
-   };
+   prcm_clocks: clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
 
-   scrm: scrm@4800 {
-   compatible = "ti,omap2-scrm";
-   reg = <0x4800 0x1000>;
+   prcm_clockdomains: clockdomains {
+   };
+   };
 
-   scrm_clocks: clocks {
+   scm: scm@0 {
+   compatible = "ti,omap2-scm", "simple-bus";
+   reg = <0x0 0x1000>;
#address-cells = <1>;
-   #size-cells = <0>;
+   #size-cells = <1>;
+   ranges = <0 0x0 0x1000>;
+
+   omap2420_pmx: pinmux@30 {
+   compatible = "ti,omap2420-padconf",
+"pinctrl-single";
+   reg = <0x30 0x0113>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-single,register-width = <8>;
+   pinctrl-single,function-mask = <0x3f>;
+   };
+
+   scm_conf: scm_conf@270 {
+   compatible = "syscon";
+   reg = <0x270 0x100>;
+   

[PATCHv6 28/34] ARM: dts: am4372: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates an l4_wkup interconnect for AM43xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM nodea as the clock provider.

Signed-off-by: Tero Kristo 
---
 Documentation/devicetree/bindings/arm/omap/l4.txt  |1 +
 .../devicetree/bindings/arm/omap/prcm.txt  |2 +-
 arch/arm/boot/dts/am4372.dtsi  |   85 +++-
 arch/arm/boot/dts/am43xx-clocks.dtsi   |2 +-
 arch/arm/mach-omap2/control.c  |2 +-
 5 files changed, 53 insertions(+), 39 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index d333f0a..941b914 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -7,6 +7,7 @@ Required properties:
   Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
   Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
   Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
+  Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus
 - ranges : contains the IO map range for the bus
 
 Examples:
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index c8e2027..8af4f32 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -12,7 +12,7 @@ Required properties:
"ti,am3-prcm"
"ti,am3-scm"
"ti,am4-prcm"
-   "ti,am4-scrm"
+   "ti,am4-scm"
"ti,omap2-prcm"
"ti,omap2-scm"
"ti,omap3-prm"
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 1943fc3..f8a02a2 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -57,22 +57,6 @@
cache-level = <2>;
};
 
-   am43xx_control_module: control_module@4a002000 {
-   compatible = "syscon";
-   reg = <0x44e1 0x7f4>;
-   };
-
-   am43xx_pinmux: pinmux@44e10800 {
-   compatible = "ti,am437-padconf", "pinctrl-single";
-   reg = <0x44e10800 0x31c>;
-   #address-cells = <1>;
-   #size-cells = <0>;
-   #interrupt-cells = <1>;
-   interrupt-controller;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x>;
-   };
-
ocp {
compatible = "ti,am4372-l3-noc", "simple-bus";
#address-cells = <1>;
@@ -84,29 +68,58 @@
interrupts = ,
 ;
 
-   prcm: prcm@44df {
-   compatible = "ti,am4-prcm";
-   reg = <0x44df 0x11000>;
-
-   prcm_clocks: clocks {
-   #address-cells = <1>;
-   #size-cells = <0>;
-   };
+   l4_wkup: l4_wkup@44c0 {
+   compatible = "ti,am4-l4-wkup", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x44c0 0x287000>;
 
-   prcm_clockdomains: clockdomains {
-   };
-   };
+   prcm: prcm@1f {
+   compatible = "ti,am4-prcm";
+   reg = <0x1f 0x11000>;
 
-   scrm: scrm@44e1 {
-   compatible = "ti,am4-scrm";
-   reg = <0x44e1 0x2000>;
+   prcm_clocks: clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
 
-   scrm_clocks: clocks {
-   #address-cells = <1>;
-   #size-cells = <0>;
+   prcm_clockdomains: clockdomains {
+   };
};
 
-   scrm_clockdomains: clockdomains {
+   scm: scm@21 {
+   compatible = "ti,am4-scm", "simple-bus";
+   reg = <0x21 0x4000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x21 0x4000>;
+
+   am43xx_pinmux: pinmux@800 {
+   compatible = "ti,am437-padconf",
+"pinctrl-single";
+   

[PATCHv6 34/34] ARM: OMAP4+: control: add support for initializing control module via DT

2015-03-31 Thread Tero Kristo
OMAP4, OMAP5 and DRA7 now parse DT entries for control module address spaces,
and set up syscon mappings appropriately. Low level IO init is updated to
remove the legacy control module mappings for these devices also.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/control.c |3 +++
 arch/arm/mach-omap2/io.c  |6 +++---
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index c8565d3..af95a62 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -650,6 +650,9 @@ static const struct of_device_id omap_scrm_dt_match_table[] 
= {
{ .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data },
{ .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data },
{ .compatible = "ti,dm816-scrm", .data = &ctrl_data },
+   { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
+   { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
+   { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
{ }
 };
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 6c39cc0..7743e367 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -631,8 +631,8 @@ void __init omap4430_init_early(void)
 {
omap2_set_globals_tap(OMAP443X_CLASS,
  OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+   omap2_control_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
omap2_prcm_base_init();
@@ -659,8 +659,8 @@ void __init omap5_init_early(void)
 {
omap2_set_globals_tap(OMAP54XX_CLASS,
  OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+   omap2_control_base_init();
omap4_pm_init_early();
omap2_prcm_base_init();
omap5xxx_check_revision();
@@ -684,8 +684,8 @@ void __init omap5_init_late(void)
 void __init dra7xx_init_early(void)
 {
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+   omap2_control_base_init();
omap4_pm_init_early();
omap2_prcm_base_init();
dra7xxx_check_revision();
-- 
1.7.9.5

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[PATCHv6 33/34] ARM: dts: dra7: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates the l4_cfg and l4_wkup interconnects for DRA7, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.

Signed-off-by: Tero Kristo 
---
 .../devicetree/bindings/arm/omap/ctrl.txt  |1 +
 Documentation/devicetree/bindings/arm/omap/l4.txt  |2 +
 arch/arm/boot/dts/dra7.dtsi|  166 +++-
 3 files changed, 96 insertions(+), 73 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/ctrl.txt 
b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
index acb68ed..3a4e590 100644
--- a/Documentation/devicetree/bindings/arm/omap/ctrl.txt
+++ b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
@@ -23,6 +23,7 @@ Required properties:
"ti,omap4-scm-padconf-core"
"ti,omap5-scm-core"
"ti,omap5-scm-padconf-core"
+   "ti,dra7-scm-core"
 - reg: Contains Control Module register address range
(base address and length)
 
diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index 2fe4211..b4f8a16 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -10,6 +10,8 @@ Required properties:
   Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
   Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
   Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
+  Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus
+  Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus
   Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
   Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus
 - ranges : contains the IO map range for the bus
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fed..8e50ca3 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -94,17 +94,101 @@
interrupts = ,
 ;
 
-   prm: prm@4ae06000 {
-   compatible = "ti,dra7-prm";
-   reg = <0x4ae06000 0x3000>;
-   interrupts = ;
+   l4_cfg: l4@4a00 {
+   compatible = "ti,dra7-l4-cfg", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4a00 0x22c000>;
 
-   prm_clocks: clocks {
+   scm: scm@2000 {
+   compatible = "ti,dra7-scm-core", "simple-bus";
+   reg = <0x2000 0x2000>;
#address-cells = <1>;
-   #size-cells = <0>;
+   #size-cells = <1>;
+   ranges = <0 0x2000 0x2000>;
+
+   scm_conf: scm_conf@0 {
+   compatible = "syscon";
+   reg = <0x0 0x1400>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   pbias_regulator: pbias_regulator {
+   compatible = "ti,pbias-omap";
+   reg = <0xe00 0x4>;
+   syscon = <&scm_conf>;
+   pbias_mmc_reg: pbias_mmc_omap5 {
+   regulator-name = 
"pbias_mmc_omap5";
+   regulator-min-microvolt 
= <180>;
+   regulator-max-microvolt 
= <300>;
+   };
+   };
+   };
+
+   dra7_pmx_core: pinmux@1400 {
+   compatible = "ti,dra7-padconf",
+"pinctrl-single";
+   reg = <0x1400 0x0464>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = 
<0x3fff>;
+   };
+   };
+
+   cm_core_aon: cm_core_aon@5000 {
+   compatibl

[PATCHv6 18/34] ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags

2015-03-31 Thread Tero Kristo
Currently some cpu_is_X checks are used to setup prm_features, however
the same can be accomplished by just passing these flags from the PRM
init data. This is done in preparation to make PRM a separate driver.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/prm44xx.c|4 ++--
 arch/arm/mach-omap2/prm_common.c |3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a980d245..243133c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -707,10 +707,10 @@ int __init omap44xx_prm_init(const struct 
omap_prcm_init_data *data)
 {
omap_prm_base_init();
 
-   if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
+   if (data->flags & PRM_HAS_IO_WAKEUP)
prm_features |= PRM_HAS_IO_WAKEUP;
 
-   if (!soc_is_dra7xx())
+   if (data->flags & PRM_HAS_VOLTAGE)
prm_features |= PRM_HAS_VOLTAGE;
 
omap4_prminst_set_prm_dev_inst(data->device_inst_offset);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 3e932b8..04dfe8f 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -669,6 +669,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata 
= {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
+   .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
 };
 #endif
 
@@ -677,6 +678,7 @@ static struct omap_prcm_init_data omap5_prm_data __initdata 
= {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
+   .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
 };
 #endif
 
@@ -685,6 +687,7 @@ static struct omap_prcm_init_data dra7_prm_data __initdata 
= {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = DRA7XX_PRM_DEVICE_INST,
+   .flags = PRM_HAS_IO_WAKEUP,
 };
 #endif
 
-- 
1.7.9.5

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[PATCHv6 19/34] ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init

2015-03-31 Thread Tero Kristo
The compatible DT node is now passed with the prm init, so there is no
need to do node matching here again. Added a new flag to the init data
also, to detect default IRQ support for OMAP4. Also, any booting omap4
DT setup always has a PRM node, so there is no need to check against
the special case where it would be missing.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/prm.h|6 +++--
 arch/arm/mach-omap2/prm44xx.c|   54 +++---
 arch/arm/mach-omap2/prm_common.c |2 +-
 3 files changed, 26 insertions(+), 36 deletions(-)

diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 3936e6c..233bc84 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -29,9 +29,11 @@ int omap2_prcm_base_init(void);
  *
  * PRM_HAS_IO_WAKEUP: has IO wakeup capability
  * PRM_HAS_VOLTAGE: has voltage domains
+ * PRM_IRQ_DEFAULT: use default irq number for PRM irq
  */
-#define PRM_HAS_IO_WAKEUP  (1 << 0)
-#define PRM_HAS_VOLTAGE(1 << 1)
+#define PRM_HAS_IO_WAKEUP  BIT(0)
+#define PRM_HAS_VOLTAGEBIT(1)
+#define PRM_IRQ_DEFAULTBIT(2)
 
 /*
  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 243133c..c35ad0b 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -703,10 +703,14 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.vp_clear_txdone= omap4_prm_vp_clear_txdone,
 };
 
+static const struct omap_prcm_init_data *prm_init_data;
+
 int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
 {
omap_prm_base_init();
 
+   prm_init_data = data;
+
if (data->flags & PRM_HAS_IO_WAKEUP)
prm_features |= PRM_HAS_IO_WAKEUP;
 
@@ -718,16 +722,8 @@ int __init omap44xx_prm_init(const struct 
omap_prcm_init_data *data)
return prm_register(&omap44xx_prm_ll_data);
 }
 
-static const struct of_device_id omap_prm_dt_match_table[] = {
-   { .compatible = "ti,omap4-prm" },
-   { .compatible = "ti,omap5-prm" },
-   { .compatible = "ti,dra7-prm" },
-   { }
-};
-
 static int omap44xx_prm_late_init(void)
 {
-   struct device_node *np;
int irq_num;
 
if (!(prm_features & PRM_HAS_IO_WAKEUP))
@@ -737,31 +733,23 @@ static int omap44xx_prm_late_init(void)
if (!of_have_populated_dt())
return 0;
 
-   np = of_find_matching_node(NULL, omap_prm_dt_match_table);
-
-   if (!np) {
-   /* Default loaded up with OMAP4 values */
-   if (!cpu_is_omap44xx())
-   return 0;
-   } else {
-   irq_num = of_irq_get(np, 0);
-   /*
-* Already have OMAP4 IRQ num. For all other platforms, we need
-* IRQ numbers from DT
-*/
-   if (irq_num < 0 && !cpu_is_omap44xx()) {
-   if (irq_num == -EPROBE_DEFER)
-   return irq_num;
-
-   /* Have nothing to do */
-   return 0;
-   }
-
-   /* Once OMAP4 DT is filled as well */
-   if (irq_num >= 0) {
-   omap4_prcm_irq_setup.irq = irq_num;
-   omap4_prcm_irq_setup.xlate_irq = NULL;
-   }
+   irq_num = of_irq_get(prm_init_data->np, 0);
+   /*
+* Already have OMAP4 IRQ num. For all other platforms, we need
+* IRQ numbers from DT
+*/
+   if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
+   if (irq_num == -EPROBE_DEFER)
+   return irq_num;
+
+   /* Have nothing to do */
+   return 0;
+   }
+
+   /* Once OMAP4 DT is filled as well */
+   if (irq_num >= 0) {
+   omap4_prcm_irq_setup.irq = irq_num;
+   omap4_prcm_irq_setup.xlate_irq = NULL;
}
 
omap44xx_prm_enable_io_wakeup();
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 04dfe8f..6832a31 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -669,7 +669,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata 
= {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
-   .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
+   .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT,
 };
 #endif
 
-- 
1.7.9.5

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[PATCHv6 07/34] ARM: OMAP4: PRM: move omap4xxx_prm_init earlier in init order

2015-03-31 Thread Tero Kristo
OMAP4 has different ordering of PRM and CM init calls in the early init.
Re-oder these accordingly for OMAP4 also. This is needed so that we
can do some optimizations in the following patches for the PRCM init.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/io.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 364b530..460da22 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -654,9 +654,9 @@ void __init omap4430_init_early(void)
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
+   omap44xx_prm_init();
omap4_cm_init();
omap4_pm_init_early();
-   omap44xx_prm_init();
omap44xx_voltagedomains_init();
omap44xx_powerdomains_init();
omap44xx_clockdomains_init();
-- 
1.7.9.5

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[PATCHv6 29/34] ARM: dts: omap4: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.

Signed-off-by: Tero Kristo 
Reported-by: Tony Lindgren 
---
 .../devicetree/bindings/arm/omap/ctrl.txt  |   76 
 Documentation/devicetree/bindings/arm/omap/l4.txt  |2 +
 .../devicetree/bindings/arm/omap/prcm.txt  |6 -
 arch/arm/boot/dts/omap4.dtsi   |  200 
 4 files changed, 199 insertions(+), 85 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/omap/ctrl.txt

diff --git a/Documentation/devicetree/bindings/arm/omap/ctrl.txt 
b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
new file mode 100644
index 000..2675881
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
@@ -0,0 +1,76 @@
+OMAP Control Module bindings
+
+Control Module contains miscellaneous features under it based on SoC type.
+Pincontrol is one common feature, and it has a specialized support
+described in [1]. Typically some clock nodes are also under control module.
+Syscon is used to share register level access to drivers external to
+control module driver itself.
+
+See [2] for documentation about clock/clockdomain nodes.
+
+[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
+[2] Documentation/devicetree/bindings/clock/ti/*
+
+Required properties:
+- compatible:  Must be one of:
+   "ti,am3-scm"
+   "ti,am4-scm"
+   "ti,dm814-scrm"
+   "ti,dm816-scrm"
+   "ti,omap2-scm"
+   "ti,omap3-scm"
+   "ti,omap4-scm-core"
+   "ti,omap4-scm-padconf-core"
+- reg: Contains Control Module register address range
+   (base address and length)
+
+Optional properties:
+- clocks:  clocks for this module
+- clockdomains:clockdomains for this module
+
+Examples:
+
+scm: scm@2000 {
+   compatible = "ti,omap3-scm", "simple-bus";
+   reg = <0x2000 0x2000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x2000 0x2000>;
+
+   omap3_pmx_core: pinmux@30 {
+   compatible = "ti,omap3-padconf",
+"pinctrl-single";
+   reg = <0x30 0x230>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   pinctrl-single,register-width = <16>;
+   pinctrl-single,function-mask = <0xff1f>;
+   };
+
+   scm_conf: scm_conf@270 {
+   compatible = "syscon";
+   reg = <0x270 0x330>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   scm_clocks: clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+
+   scm_clockdomains: clockdomains {
+   };
+}
+
+&scm_clocks {
+   mcbsp5_mux_fck: mcbsp5_mux_fck {
+   #clock-cells = <0>;
+   compatible = "ti,composite-mux-clock";
+   clocks = <&core_96m_fck>, <&mcbsp_clks>;
+   ti,bit-shift = <4>;
+   reg = <0x02d8>;
+   };
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index 941b914..de18cfa 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -6,6 +6,8 @@ Required properties:
 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
   Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
   Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
+  Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
+  Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
   Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
   Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus
 - ranges : contains the IO map range for the bus
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index 8af4f32..3eb6d7a 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -10,14 +10,10 @@ documentation about the individual clock/clockdomain nodes.
 Required properties:
 - compatible:  Must be one of:
"ti,am3-prcm"
-   "ti,am3-scm"
"ti,am4-prcm"
-   "ti,am4-scm"
"ti,omap2-prcm"
-   "ti,omap2-scm"
"ti,omap3-prm"
"ti,omap3-cm"
-   "ti,omap3-scm"
"ti,omap4-cm1"
"ti,omap4-prm"
"ti,omap4-cm2"
@@ -30,9 +26,7 @@ R

[PATCHv6 31/34] ARM: OMAP4+: control: remove support for legacy pad read/write

2015-03-31 Thread Tero Kristo
omap4_ctrl_pad_readl/writel are no longer used by anybody, so remove
these. Syscon / pinctrl should be used to access the padconf area
instead.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/control.c |   24 +---
 arch/arm/mach-omap2/control.h |5 +
 arch/arm/mach-omap2/io.c  |   11 ---
 3 files changed, 6 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 4047784..c8565d3 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -36,7 +36,6 @@
 
 static void __iomem *omap2_ctrl_base;
 static s16 omap2_ctrl_offset;
-static void __iomem *omap4_ctrl_pad_base;
 static struct regmap *omap2_ctrl_syscon;
 
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
@@ -139,13 +138,9 @@ struct omap3_control_regs {
 static struct omap3_control_regs control_context;
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
 
-#define OMAP4_CTRL_PAD_REGADDR(reg)(omap4_ctrl_pad_base + (reg))
-
-void __init omap2_set_globals_control(void __iomem *ctrl,
- void __iomem *ctrl_pad)
+void __init omap2_set_globals_control(void __iomem *ctrl)
 {
omap2_ctrl_base = ctrl;
-   omap4_ctrl_pad_base = ctrl_pad;
 }
 
 u8 omap_ctrl_readb(u16 offset)
@@ -218,23 +213,6 @@ void omap_ctrl_writel(u32 val, u16 offset)
 val);
 }
 
-/*
- * On OMAP4 control pad are not addressable from control
- * core base. So the common omap_ctrl_read/write APIs breaks
- * Hence export separate APIs to manage the omap4 pad control
- * registers. This APIs will work only for OMAP4
- */
-
-u32 omap4_ctrl_pad_readl(u16 offset)
-{
-   return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
-void omap4_ctrl_pad_writel(u32 val, u16 offset)
-{
-   writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
 #ifdef CONFIG_ARCH_OMAP3
 
 /**
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 5353ff4..80d2b7d 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -443,11 +443,9 @@
 extern u8 omap_ctrl_readb(u16 offset);
 extern u16 omap_ctrl_readw(u16 offset);
 extern u32 omap_ctrl_readl(u16 offset);
-extern u32 omap4_ctrl_pad_readl(u16 offset);
 extern void omap_ctrl_writeb(u8 val, u16 offset);
 extern void omap_ctrl_writew(u16 val, u16 offset);
 extern void omap_ctrl_writel(u32 val, u16 offset);
-extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
 
 extern void omap3_save_scratchpad_contents(void);
 extern void omap3_clear_scratchpad_contents(void);
@@ -465,8 +463,7 @@ extern int omap3_ctrl_save_padconf(void);
 void omap3_ctrl_init(void);
 int omap2_control_base_init(void);
 int omap_control_init(void);
-extern void omap2_set_globals_control(void __iomem *ctrl,
- void __iomem *ctrl_pad);
+void omap2_set_globals_control(void __iomem *ctrl);
 void __init omap3_control_legacy_iomap_init(void);
 #else
 #define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index c3fa739..6c39cc0 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -443,7 +443,7 @@ void __init omap3_init_early(void)
/* XXX: remove these once OMAP3 is DT only */
if (!of_have_populated_dt()) {
omap2_set_globals_control(
-   OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL);
+   OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
 NULL);
@@ -631,8 +631,7 @@ void __init omap4430_init_early(void)
 {
omap2_set_globals_tap(OMAP443X_CLASS,
  OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
+   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
@@ -660,8 +659,7 @@ void __init omap5_init_early(void)
 {
omap2_set_globals_tap(OMAP54XX_CLASS,
  OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
- OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
+   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
omap2_prcm_base_init();
@@ -686,8 +684,7 @@ void __init omap5_init_late(void)
 void __init dra7xx_init_early(void)
 {
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
-   omap2_set_glo

[PATCHv6 09/34] ARM: OMAP2+: PRCM: add support for static clock memmap indices

2015-03-31 Thread Tero Kristo
All clock provider related drivers will now register their iomaps
with a static index. This makes it easier to split up the individual
drivers to their own files in subsequent patches.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/prcm-common.h |8 
 arch/arm/mach-omap2/prm_common.c  |   79 +++--
 include/linux/clk/ti.h|1 +
 3 files changed, 59 insertions(+), 29 deletions(-)

diff --git a/arch/arm/mach-omap2/prcm-common.h 
b/arch/arm/mach-omap2/prcm-common.h
index 6163d66..ee38356 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -518,6 +518,14 @@ struct omap_prcm_irq_setup {
.priority = _priority   \
}
 
+/**
+ * struct omap_prcm_init_data - PRCM driver init data
+ * @index: clock memory mapping index to be used
+ */
+struct omap_prcm_init_data {
+   int index;
+};
+
 extern void omap_prcm_irq_cleanup(void);
 extern int omap_prcm_register_chain_handler(
struct omap_prcm_irq_setup *irq_setup);
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 79cee11..8ec5201 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -633,31 +633,47 @@ int prm_unregister(struct prm_ll_data *pld)
return 0;
 }
 
+static struct omap_prcm_init_data prm_data = {
+   .index = TI_CLKM_PRM,
+};
+
+static struct omap_prcm_init_data cm_data = {
+   .index = TI_CLKM_CM,
+};
+
+static struct omap_prcm_init_data cm2_data = {
+   .index = TI_CLKM_CM2,
+};
+
+static struct omap_prcm_init_data scrm_data = {
+   .index = TI_CLKM_SCRM,
+};
+
 static const struct of_device_id omap_prcm_dt_match_table[] = {
-   { .compatible = "ti,am3-prcm" },
-   { .compatible = "ti,am3-scrm" },
-   { .compatible = "ti,am4-prcm" },
-   { .compatible = "ti,am4-scrm" },
-   { .compatible = "ti,dm814-prcm" },
-   { .compatible = "ti,dm814-scrm" },
-   { .compatible = "ti,dm816-prcm" },
-   { .compatible = "ti,dm816-scrm" },
-   { .compatible = "ti,omap2-prcm" },
-   { .compatible = "ti,omap2-scrm" },
-   { .compatible = "ti,omap3-prm" },
-   { .compatible = "ti,omap3-cm" },
-   { .compatible = "ti,omap3-scrm" },
-   { .compatible = "ti,omap4-cm1" },
-   { .compatible = "ti,omap4-prm" },
-   { .compatible = "ti,omap4-cm2" },
-   { .compatible = "ti,omap4-scrm" },
-   { .compatible = "ti,omap5-prm" },
-   { .compatible = "ti,omap5-cm-core-aon" },
-   { .compatible = "ti,omap5-scrm" },
-   { .compatible = "ti,omap5-cm-core" },
-   { .compatible = "ti,dra7-prm" },
-   { .compatible = "ti,dra7-cm-core-aon" },
-   { .compatible = "ti,dra7-cm-core" },
+   { .compatible = "ti,am3-prcm", .data = &prm_data },
+   { .compatible = "ti,am3-scrm", .data = &scrm_data },
+   { .compatible = "ti,am4-prcm", .data = &prm_data },
+   { .compatible = "ti,am4-scrm", .data = &scrm_data },
+   { .compatible = "ti,dm814-prcm", .data = &prm_data },
+   { .compatible = "ti,dm814-scrm", .data = &scrm_data },
+   { .compatible = "ti,dm816-prcm", .data = &prm_data },
+   { .compatible = "ti,dm816-scrm", .data = &scrm_data },
+   { .compatible = "ti,omap2-prcm", .data = &prm_data },
+   { .compatible = "ti,omap2-scrm", .data = &scrm_data },
+   { .compatible = "ti,omap3-prm", .data = &prm_data },
+   { .compatible = "ti,omap3-cm", .data = &cm_data },
+   { .compatible = "ti,omap3-scrm", .data = &scrm_data },
+   { .compatible = "ti,omap4-cm1", .data = &cm_data },
+   { .compatible = "ti,omap4-prm", .data = &prm_data },
+   { .compatible = "ti,omap4-cm2", .data = &cm2_data },
+   { .compatible = "ti,omap4-scrm", .data = &scrm_data },
+   { .compatible = "ti,omap5-prm", .data = &prm_data },
+   { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
+   { .compatible = "ti,omap5-scrm", .data = &scrm_data },
+   { .compatible = "ti,omap5-cm-core", .data = &cm2_data },
+   { .compatible = "ti,dra7-prm", .data = &prm_data },
+   { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
+   { .compatible = "ti,dra7-cm-core", .data = &cm2_data },
{ }
 };
 
@@ -690,15 +706,20 @@ int __init omap_prcm_init(void)
 {
struct device_node *np;
void __iomem *mem;
-   int memmap_index = 0;
+   const struct of_device_id *match;
+   const struct omap_prcm_init_data *data;
 
ti_clk_ll_ops = &omap_clk_ll_ops;
 
-   for_each_matching_node(np, omap_prcm_dt_match_table) {
+   for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
+   data = match->data;
+
mem = of_iomap(np, 0);
-   clk_memmaps[memmap_index] = mem;
-   ti_dt_clk_init_provider(np, memmap_index);
-   memmap_index++;
+   if (!mem)
+   return -ENOMEM;
+
+  

[PATCHv6 01/34] ARM: OMAP2+: PRCM: rename of_prcm_init to omap_prcm_init

2015-03-31 Thread Tero Kristo
This avoids conflicts in the global namespace, and is more descriptive
of the purpose anyway.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/io.c |2 +-
 arch/arm/mach-omap2/prm.h|2 +-
 arch/arm/mach-omap2/prm_common.c |8 +++-
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index c4871c5..f504f71 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -764,7 +764,7 @@ int __init omap_clk_init(void)
ti_clk_init_features();
 
if (of_have_populated_dt()) {
-   ret = of_prcm_init();
+   ret = omap_prcm_init();
if (ret)
return ret;
 
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index b9061a6..ba9b933 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -19,7 +19,7 @@
 extern void __iomem *prm_base;
 extern u16 prm_features;
 extern void omap2_set_globals_prm(void __iomem *prm);
-int of_prcm_init(void);
+int omap_prcm_init(void);
 void omap3_prcm_legacy_iomaps_init(void);
 # endif
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index bfaa7ba..c5cfaa9 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -625,7 +625,13 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {
.clk_writel = prm_clk_writel,
 };
 
-int __init of_prcm_init(void)
+/**
+ * omap_prcm_init - low level init for the PRCM drivers
+ *
+ * Initializes the low level clock infrastructure for PRCM drivers.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_prcm_init(void)
 {
struct device_node *np;
void __iomem *mem;
-- 
1.7.9.5

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[PATCHv6 21/34] ARM: OMAP2+: control: remove API for getting control module base address

2015-03-31 Thread Tero Kristo
This shall not be used anymore, as control module driver is converted
into using regmap.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/control.c |5 -
 arch/arm/mach-omap2/control.h |2 --
 2 files changed, 7 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 4b40946..202fc72 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -145,11 +145,6 @@ void __init omap2_set_globals_control(void __iomem *ctrl,
omap4_ctrl_pad_base = ctrl_pad;
 }
 
-void __iomem *omap_ctrl_base_get(void)
-{
-   return omap2_ctrl_base;
-}
-
 u8 omap_ctrl_readb(u16 offset)
 {
return readb_relaxed(OMAP_CTRL_REGADDR(offset));
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index c1057eb..5353ff4 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -440,7 +440,6 @@
 
 #ifndef __ASSEMBLY__
 #ifdef CONFIG_ARCH_OMAP2PLUS
-extern void __iomem *omap_ctrl_base_get(void);
 extern u8 omap_ctrl_readb(u16 offset);
 extern u16 omap_ctrl_readw(u16 offset);
 extern u32 omap_ctrl_readl(u16 offset);
@@ -470,7 +469,6 @@ extern void omap2_set_globals_control(void __iomem *ctrl,
  void __iomem *ctrl_pad);
 void __init omap3_control_legacy_iomap_init(void);
 #else
-#define omap_ctrl_base_get()   0
 #define omap_ctrl_readb(x) 0
 #define omap_ctrl_readw(x) 0
 #define omap_ctrl_readl(x) 0
-- 
1.7.9.5

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[PATCHv6 26/34] ARM: dts: am33xx: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates an l4_wkup interconnect for AM33xx, and moves some of
the generic peripherals under it. System control module nodes are moved
under this new interconnect also, and the SCM clock layout is changed
to use the renamed SCM node as the clock provider.

Signed-off-by: Tero Kristo 
---
 Documentation/devicetree/bindings/arm/omap/l4.txt  |1 +
 .../devicetree/bindings/arm/omap/prcm.txt  |2 +-
 arch/arm/boot/dts/am33xx-clocks.dtsi   |2 +-
 arch/arm/boot/dts/am33xx.dtsi  |   87 +++-
 arch/arm/mach-omap2/control.c  |2 +-
 5 files changed, 51 insertions(+), 43 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index 6402022..d333f0a 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -6,6 +6,7 @@ Required properties:
 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
   Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
   Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
+  Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
 - ranges : contains the IO map range for the bus
 
 Examples:
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index ef5a74b..c8e2027 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -10,7 +10,7 @@ documentation about the individual clock/clockdomain nodes.
 Required properties:
 - compatible:  Must be one of:
"ti,am3-prcm"
-   "ti,am3-scrm"
+   "ti,am3-scm"
"ti,am4-prcm"
"ti,am4-scrm"
"ti,omap2-prcm"
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi 
b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 712edce..236c78a 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -7,7 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-&scrm_clocks {
+&scm_clocks {
sys_clkin_ck: sys_clkin_ck {
#clock-cells = <0>;
compatible = "ti,mux-clock";
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index acd3705..21fcc44 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -83,20 +83,6 @@
};
};
 
-   am33xx_control_module: control_module@4a002000 {
-   compatible = "syscon";
-   reg = <0x44e1 0x7fc>;
-   };
-
-   am33xx_pinmux: pinmux@44e10800 {
-   compatible = "pinctrl-single";
-   reg = <0x44e10800 0x0238>;
-   #address-cells = <1>;
-   #size-cells = <0>;
-   pinctrl-single,register-width = <32>;
-   pinctrl-single,function-mask = <0x7f>;
-   };
-
/*
 * XXX: Use a flat representation of the AM33XX interconnect.
 * The real AM33XX interconnect network is quite complex. Since
@@ -111,37 +97,58 @@
ranges;
ti,hwmods = "l3_main";
 
-   prcm: prcm@44e0 {
-   compatible = "ti,am3-prcm";
-   reg = <0x44e0 0x4000>;
-
-   prcm_clocks: clocks {
-   #address-cells = <1>;
-   #size-cells = <0>;
-   };
+   l4_wkup: l4_wkup@44c0 {
+   compatible = "ti,am3-l4-wkup", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x44c0 0x28>;
 
-   prcm_clockdomains: clockdomains {
-   };
-   };
+   prcm: prcm@20 {
+   compatible = "ti,am3-prcm";
+   reg = <0x20 0x4000>;
 
-   scrm: scrm@44e1 {
-   compatible = "ti,am3-scrm";
-   reg = <0x44e1 0x2000>;
+   prcm_clocks: clocks {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
 
-   scrm_clocks: clocks {
-   #address-cells = <1>;
-   #size-cells = <0>;
+   prcm_clockdomains: clockdomains {
+   };
};
 
-   scrm_clockdomains: clockdomains {
+   scm: scm@21 {
+   compatible = "ti,am3-scm", "simple-bus";
+ 

[PATCHv6 14/34] ARM: OMAP2+: control: determine control module base address from DT

2015-03-31 Thread Tero Kristo
There is no need to provide the control module base address through a
low-level API from the low-level IO init, as this information is
available through DT. This patch adds a new API to initialize the
control module though, but mostly makes the old API obsolete. The
old API can be completely removed once OMAP3 is made DT only.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/control.c|   49 +-
 arch/arm/mach-omap2/control.h|2 ++
 arch/arm/mach-omap2/io.c |   34 +-
 arch/arm/mach-omap2/prm.h|1 -
 arch/arm/mach-omap2/prm_common.c |5 
 5 files changed, 61 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index e881824..21ff32c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -616,6 +616,7 @@ void __init omap3_ctrl_init(void)
 
 struct control_init_data {
int index;
+   void __iomem *mem;
 };
 
 static struct control_init_data ctrl_data = {
@@ -627,10 +628,39 @@ static const struct of_device_id 
omap_scrm_dt_match_table[] = {
{ .compatible = "ti,am4-scrm", .data = &ctrl_data },
{ .compatible = "ti,omap2-scrm", .data = &ctrl_data },
{ .compatible = "ti,omap3-scrm", .data = &ctrl_data },
+   { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
{ }
 };
 
 /**
+ * omap2_control_base_init - initialize iomappings for the control driver
+ *
+ * Detects and initializes the iomappings for the control driver, based
+ * on the DT data. Returns 0 in success, negative error value
+ * otherwise.
+ */
+int __init omap2_control_base_init(void)
+{
+   struct device_node *np;
+   const struct of_device_id *match;
+   struct control_init_data *data;
+   void __iomem *mem;
+
+   for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
+   data = (struct control_init_data *)match->data;
+
+   mem = of_iomap(np, 0);
+   if (!mem)
+   return -ENOMEM;
+
+   omap2_ctrl_base = mem;
+   data->mem = mem;
+   }
+
+   return 0;
+}
+
+/**
  * omap_control_init - low level init for the control driver
  *
  * Initializes the low level clock infrastructure for control driver.
@@ -639,7 +669,6 @@ static const struct of_device_id omap_scrm_dt_match_table[] 
= {
 int __init omap_control_init(void)
 {
struct device_node *np;
-   void __iomem *mem;
const struct of_device_id *match;
const struct omap_prcm_init_data *data;
int ret;
@@ -647,14 +676,22 @@ int __init omap_control_init(void)
for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
data = match->data;
 
-   mem = of_iomap(np, 0);
-   if (!mem)
-   return -ENOMEM;
-
-   ret = omap2_clk_provider_init(np, data->index, mem);
+   ret = omap2_clk_provider_init(np, data->index, data->mem);
if (ret)
return ret;
}
 
return 0;
 }
+
+/**
+ * omap3_control_legacy_iomap_init - legacy iomap init for clock providers
+ *
+ * Legacy iomap init for clock provider. Needed only by legacy boot mode,
+ * where the base addresses are not parsed from DT, but still required
+ * by the clock driver to be setup properly.
+ */
+void __init omap3_control_legacy_iomap_init(void)
+{
+   omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap2_ctrl_base);
+}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index baf5783..c1057eb 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -464,9 +464,11 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
 extern void omap3630_ctrl_disable_rta(void);
 extern int omap3_ctrl_save_padconf(void);
 void omap3_ctrl_init(void);
+int omap2_control_base_init(void);
 int omap_control_init(void);
 extern void omap2_set_globals_control(void __iomem *ctrl,
  void __iomem *ctrl_pad);
+void __init omap3_control_legacy_iomap_init(void);
 #else
 #define omap_ctrl_base_get()   0
 #define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 712dd42..622ee3b 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -384,8 +384,7 @@ void __init omap2420_init_early(void)
omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
   OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
-   omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
- NULL);
+   omap2_control_base_init();
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -412,8 +411,7 @@ void __init omap2430_init_ea

[PATCHv6 30/34] ARM: OMAP4: display: convert display to use syscon for dsi muxing

2015-03-31 Thread Tero Kristo
The legacy control module APIs will be gone, thus convert the display
driver to use syscon. This change should eventually be moved to
display driver from the board directory.

Signed-off-by: Tero Kristo 
Cc: Tomi Valkeinen 
---
 arch/arm/mach-omap2/display.c |   15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 7a050f9..f492ae1 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -26,6 +26,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include "omap_hwmod.h"
@@ -104,6 +106,10 @@ static const struct omap_dss_hwmod_data 
omap4_dss_hwmod_data[] __initconst = {
{ "dss_hdmi", "omapdss_hdmi", -1 },
 };
 
+#define OMAP4_DSIPHY_SYSCON_OFFSET 0x78
+
+static struct regmap *omap4_dsi_mux_syscon;
+
 static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
 {
u32 enable_mask, enable_shift;
@@ -124,7 +130,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
return -ENODEV;
}
 
-   reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+   regmap_read(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, ®);
 
reg &= ~enable_mask;
reg &= ~pipd_mask;
@@ -132,7 +138,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
reg |= (lanes << enable_shift) & enable_mask;
reg |= (lanes << pipd_shift) & pipd_mask;
 
-   omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+   regmap_write(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, reg);
 
return 0;
 }
@@ -665,5 +671,10 @@ int __init omapdss_init_of(void)
return r;
}
 
+   /* add DSI info for omap4 */
+   node = of_find_node_by_name(NULL, "omap4_padconf_global");
+   if (node)
+   omap4_dsi_mux_syscon = syscon_node_to_regmap(node);
+
return 0;
 }
-- 
1.7.9.5

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[PATCHv6 32/34] ARM: dts: omap5: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates the l4_cfg and l4_wkup interconnects for OMAP5, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.

Signed-off-by: Tero Kristo 
---
 .../devicetree/bindings/arm/omap/ctrl.txt  |2 +
 Documentation/devicetree/bindings/arm/omap/l4.txt  |2 +
 arch/arm/boot/dts/omap5.dtsi   |  182 
 3 files changed, 116 insertions(+), 70 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/ctrl.txt 
b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
index 2675881..acb68ed 100644
--- a/Documentation/devicetree/bindings/arm/omap/ctrl.txt
+++ b/Documentation/devicetree/bindings/arm/omap/ctrl.txt
@@ -21,6 +21,8 @@ Required properties:
"ti,omap3-scm"
"ti,omap4-scm-core"
"ti,omap4-scm-padconf-core"
+   "ti,omap5-scm-core"
+   "ti,omap5-scm-padconf-core"
 - reg: Contains Control Module register address range
(base address and length)
 
diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index de18cfa..2fe4211 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -8,6 +8,8 @@ Required properties:
   Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
   Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
   Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
+  Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
+  Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
   Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus
   Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus
 - ranges : contains the IO map range for the bus
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index b321fdf..326a429 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -129,99 +129,141 @@
interrupts = ,
 ;
 
-   prm: prm@4ae06000 {
-   compatible = "ti,omap5-prm";
-   reg = <0x4ae06000 0x3000>;
-   interrupts = ;
+   l4_cfg: l4@4a00 {
+   compatible = "ti,omap5-l4-cfg", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4a00 0x22a000>;
 
-   prm_clocks: clocks {
+   scm_core: scm@2000 {
+   compatible = "ti,omap5-scm-core", "simple-bus";
+   reg = <0x2000 0x1000>;
#address-cells = <1>;
-   #size-cells = <0>;
+   #size-cells = <1>;
+   ranges = <0 0x2000 0x800>;
+
+   scm_conf: scm_conf@0 {
+   compatible = "syscon";
+   reg = <0x0 0x800>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   };
};
 
-   prm_clockdomains: clockdomains {
+   scm_padconf_core: scm@2800 {
+   compatible = "ti,omap5-scm-padconf-core",
+"simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x2800 0x800>;
+
+   omap5_pmx_core: pinmux@40 {
+   compatible = "ti,omap5-padconf",
+"pinctrl-single";
+   reg = <0x40 0x01b6>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   pinctrl-single,register-width = <16>;
+   pinctrl-single,function-mask = <0x7fff>;
+   };
+
+   omap5_padconf_global: omap5_padconf_global@5a0 {
+   compatible = "syscon";
+   reg = <0x5a0 0xec>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   pbias_regulator: pbias_regul

[PATCHv6 23/34] ARM: OMAP2+: control: add syscon support for register accesses

2015-03-31 Thread Tero Kristo
Control module driver needs to support syscon for register accesses, as
the DT hierarchy for control module driver is going to be changed. All
the control module related features will be moved under control module
node, including clocks, pinctrl, and generic configuration register
access. Temporary iomap is still provided very early in the boot for
access while syscon is not yet ready.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/control.c |  104 ++---
 1 file changed, 87 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 202fc72..4970c5c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,6 +15,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "soc.h"
 #include "iomap.h"
@@ -33,7 +35,9 @@
 #define PADCONF_SAVE_DONE  0x1
 
 static void __iomem *omap2_ctrl_base;
+static s16 omap2_ctrl_offset;
 static void __iomem *omap4_ctrl_pad_base;
+static struct regmap *omap2_ctrl_syscon;
 
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
 struct omap3_scratchpad {
@@ -135,7 +139,6 @@ struct omap3_control_regs {
 static struct omap3_control_regs control_context;
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
 
-#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
 #define OMAP4_CTRL_PAD_REGADDR(reg)(omap4_ctrl_pad_base + (reg))
 
 void __init omap2_set_globals_control(void __iomem *ctrl,
@@ -147,32 +150,72 @@ void __init omap2_set_globals_control(void __iomem *ctrl,
 
 u8 omap_ctrl_readb(u16 offset)
 {
-   return readb_relaxed(OMAP_CTRL_REGADDR(offset));
+   u32 val;
+   u8 byte_offset = offset & 0x3;
+
+   val = omap_ctrl_readl(offset);
+
+   return (val >> (byte_offset * 8)) & 0xff;
 }
 
 u16 omap_ctrl_readw(u16 offset)
 {
-   return readw_relaxed(OMAP_CTRL_REGADDR(offset));
+   u32 val;
+   u16 byte_offset = offset & 0x2;
+
+   val = omap_ctrl_readl(offset);
+
+   return (val >> (byte_offset * 8)) & 0x;
 }
 
 u32 omap_ctrl_readl(u16 offset)
 {
-   return readl_relaxed(OMAP_CTRL_REGADDR(offset));
+   u32 val;
+
+   offset &= 0xfffc;
+   if (!omap2_ctrl_syscon)
+   val = readl_relaxed(omap2_ctrl_base + offset);
+   else
+   regmap_read(omap2_ctrl_syscon, omap2_ctrl_offset + offset,
+   &val);
+
+   return val;
 }
 
 void omap_ctrl_writeb(u8 val, u16 offset)
 {
-   writeb_relaxed(val, OMAP_CTRL_REGADDR(offset));
+   u32 tmp;
+   u8 byte_offset = offset & 0x3;
+
+   tmp = omap_ctrl_readl(offset);
+
+   tmp &= 0x ^ (0xff << (byte_offset * 8));
+   tmp |= val << (byte_offset * 8);
+
+   omap_ctrl_writel(tmp, offset);
 }
 
 void omap_ctrl_writew(u16 val, u16 offset)
 {
-   writew_relaxed(val, OMAP_CTRL_REGADDR(offset));
+   u32 tmp;
+   u8 byte_offset = offset & 0x2;
+
+   tmp = omap_ctrl_readl(offset);
+
+   tmp &= 0x ^ (0x << (byte_offset * 8));
+   tmp |= val << (byte_offset * 8);
+
+   omap_ctrl_writel(tmp, offset);
 }
 
 void omap_ctrl_writel(u32 val, u16 offset)
 {
-   writel_relaxed(val, OMAP_CTRL_REGADDR(offset));
+   offset &= 0xfffc;
+   if (!omap2_ctrl_syscon)
+   writel_relaxed(val, omap2_ctrl_base + offset);
+   else
+   regmap_write(omap2_ctrl_syscon, omap2_ctrl_offset + offset,
+val);
 }
 
 /*
@@ -611,7 +654,7 @@ void __init omap3_ctrl_init(void)
 
 struct control_init_data {
int index;
-   void __iomem *mem;
+   s16 offset;
 };
 
 static struct control_init_data ctrl_data = {
@@ -639,17 +682,15 @@ int __init omap2_control_base_init(void)
struct device_node *np;
const struct of_device_id *match;
struct control_init_data *data;
-   void __iomem *mem;
 
for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
data = (struct control_init_data *)match->data;
 
-   mem = of_iomap(np, 0);
-   if (!mem)
+   omap2_ctrl_base = of_iomap(np, 0);
+   if (!omap2_ctrl_base)
return -ENOMEM;
 
-   omap2_ctrl_base = mem;
-   data->mem = mem;
+   omap2_ctrl_offset = data->offset;
}
 
return 0;
@@ -663,17 +704,46 @@ int __init omap2_control_base_init(void)
  */
 int __init omap_control_init(void)
 {
-   struct device_node *np;
+   struct device_node *np, *scm_conf;
const struct of_device_id *match;
const struct omap_prcm_init_data *data;
int ret;
+   struct regmap *syscon;
 
for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
data = match->data;
 
-   ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
-   if (ret)
-   return ret;
+   

[PATCHv6 15/34] ARM: OMAP2+: PRM: move SoC specific init calls within a generic API

2015-03-31 Thread Tero Kristo
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the PRM driver. Done in preparation to make PRM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/io.c   |   21 +-
 arch/arm/mach-omap2/prcm-common.h  |4 ++
 arch/arm/mach-omap2/prm.h  |1 +
 arch/arm/mach-omap2/prm2xxx.c  |3 +-
 arch/arm/mach-omap2/prm2xxx.h  |2 +-
 arch/arm/mach-omap2/prm33xx.c  |3 +-
 arch/arm/mach-omap2/prm33xx.h  |2 +-
 arch/arm/mach-omap2/prm3xxx.c  |4 +-
 arch/arm/mach-omap2/prm3xxx.h  |2 +-
 arch/arm/mach-omap2/prm44xx.c  |3 +-
 arch/arm/mach-omap2/prm44xx.h  |1 -
 arch/arm/mach-omap2/prm44xx_54xx.h |4 +-
 arch/arm/mach-omap2/prm54xx.h  |1 -
 arch/arm/mach-omap2/prm7xx.h   |2 +-
 arch/arm/mach-omap2/prm_common.c   |   76 ++--
 15 files changed, 90 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 622ee3b..7632dfe 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -386,7 +386,7 @@ void __init omap2420_init_early(void)
   OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_control_base_init();
omap2xxx_check_revision();
-   omap2xxx_prm_init();
+   omap2_prcm_base_init();
omap2xxx_cm_init();
omap2xxx_voltagedomains_init();
omap242x_powerdomains_init();
@@ -413,7 +413,7 @@ void __init omap2430_init_early(void)
   OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_control_base_init();
omap2xxx_check_revision();
-   omap2xxx_prm_init();
+   omap2_prcm_base_init();
omap2xxx_cm_init();
omap2xxx_voltagedomains_init();
omap243x_powerdomains_init();
@@ -453,7 +453,8 @@ void __init omap3_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
omap3xxx_check_features();
-   omap3xxx_prm_init();
+   omap2_prcm_base_init();
+   omap3xxx_prm_init(NULL);
omap3xxx_cm_init();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
@@ -551,7 +552,7 @@ void __init ti814x_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
ti81xx_check_features();
-   am33xx_prm_init();
+   omap2_prcm_base_init();
am33xx_cm_init();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
@@ -569,7 +570,7 @@ void __init ti816x_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
ti81xx_check_features();
-   am33xx_prm_init();
+   omap2_prcm_base_init();
am33xx_cm_init();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
@@ -589,7 +590,7 @@ void __init am33xx_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
am33xx_check_features();
-   am33xx_prm_init();
+   omap2_prcm_base_init();
am33xx_cm_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
@@ -612,7 +613,7 @@ void __init am43xx_init_early(void)
omap2_control_base_init();
omap3xxx_check_revision();
am33xx_check_features();
-   omap44xx_prm_init();
+   omap2_prcm_base_init();
omap4_cm_init();
am43xx_powerdomains_init();
am43xx_clockdomains_init();
@@ -638,7 +639,7 @@ void __init omap4430_init_early(void)
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
-   omap44xx_prm_init();
+   omap2_prcm_base_init();
omap4_cm_init();
omap4_pm_init_early();
omap44xx_voltagedomains_init();
@@ -667,7 +668,7 @@ void __init omap5_init_early(void)
  OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap44xx_prm_init();
+   omap2_prcm_base_init();
omap5xxx_check_revision();
omap4_cm_init();
omap54xx_voltagedomains_init();
@@ -694,7 +695,7 @@ void __init dra7xx_init_early(void)
  OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap44xx_prm_init();
+   omap2_prcm_base_init();
dra7xxx_check_revision();
omap4_cm_init();
dra7xx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/prcm-common.h 
b/arch/arm/mach-omap2/prcm-common.h
index 9e4dd0b..461bdc4 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -524,12 +52

[PATCHv6 20/34] ARM: OMAP2+: clock: add low-level support for regmap

2015-03-31 Thread Tero Kristo
Some of the TI clock providers will be converted to use syscon, thus
low-level regmap support is needed for the clock drivers also. This
patch adds this support, which can be enabled for individual drivers
in later patches.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/clock.c  |   48 --
 arch/arm/mach-omap2/clock.h  |4 +++-
 arch/arm/mach-omap2/cm_common.c  |2 +-
 arch/arm/mach-omap2/control.c|2 +-
 arch/arm/mach-omap2/prm_common.c |2 +-
 5 files changed, 47 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 94080fb..a699d71 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -23,7 +23,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 
 #include 
@@ -73,20 +75,37 @@ struct ti_clk_features ti_clk_features;
 static bool clkdm_control = true;
 
 static LIST_HEAD(clk_hw_omap_clocks);
-static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
+
+struct clk_iomap {
+   struct regmap *regmap;
+   void __iomem *mem;
+};
+
+static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
 
 static void clk_memmap_writel(u32 val, void __iomem *reg)
 {
struct clk_omap_reg *r = (struct clk_omap_reg *)®
+   struct clk_iomap *io = clk_memmaps[r->index];
 
-   writel_relaxed(val, clk_memmaps[r->index] + r->offset);
+   if (io->regmap)
+   regmap_write(io->regmap, r->offset, val);
+   else
+   writel_relaxed(val, io->mem + r->offset);
 }
 
 static u32 clk_memmap_readl(void __iomem *reg)
 {
+   u32 val;
struct clk_omap_reg *r = (struct clk_omap_reg *)®
+   struct clk_iomap *io = clk_memmaps[r->index];
 
-   return readl_relaxed(clk_memmaps[r->index] + r->offset);
+   if (io->regmap)
+   regmap_read(io->regmap, r->offset, &val);
+   else
+   val = readl_relaxed(io->mem + r->offset);
+
+   return val;
 }
 
 void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg)
@@ -115,18 +134,27 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {
  * @match_table: DT device table to match for devices to init
  * @np: device node pointer for the this clock provider
  * @index: index for the clock provider
- * @mem: iomem pointer for the clock provider memory area
+ + @syscon: syscon regmap pointer
+ * @mem: iomem pointer for the clock provider memory area, only used if
+ *  syscon is not provided
  *
  * Initializes a clock provider module (CM/PRM etc.), registering
  * the memory mapping at specified index and initializing the
  * low level driver infrastructure. Returns 0 in success.
  */
 int __init omap2_clk_provider_init(struct device_node *np, int index,
-  void __iomem *mem)
+  struct regmap *syscon, void __iomem *mem)
 {
+   struct clk_iomap *io;
+
ti_clk_ll_ops = &omap_clk_ll_ops;
 
-   clk_memmaps[index] = mem;
+   io = kzalloc(sizeof(*io), GFP_KERNEL);
+
+   io->regmap = syscon;
+   io->mem = mem;
+
+   clk_memmaps[index] = io;
 
ti_dt_clk_init_provider(np, index);
 
@@ -142,9 +170,15 @@ int __init omap2_clk_provider_init(struct device_node *np, 
int index,
  */
 void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
 {
+   struct clk_iomap *io;
+
ti_clk_ll_ops = &omap_clk_ll_ops;
 
-   clk_memmaps[index] = mem;
+   io = memblock_virt_alloc(sizeof(*io), 0);
+
+   io->mem = mem;
+
+   clk_memmaps[index] = io;
 }
 
 /*
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b6433fc..652ed0a 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -274,8 +274,10 @@ extern const struct clksel_rate div31_1to31_rates[];
 extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
 extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
 
+struct regmap;
+
 int __init omap2_clk_provider_init(struct device_node *np, int index,
-  void __iomem *mem);
+  struct regmap *syscon, void __iomem *mem);
 void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem);
 
 void __init ti_clk_init_features(void);
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index ff24fdf..23e8bce 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -361,7 +361,7 @@ int __init omap_cm_init(void)
if (data->flags & CM_NO_CLOCKS)
continue;
 
-   ret = omap2_clk_provider_init(np, data->index, data->mem);
+   ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
if (ret)
return ret;
}
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 21ff32c..4b40946 100644
--- a/arch/arm/mach-omap2/control.c
+

[PATCHv6 17/34] ARM: OMAP2+: CM: move SoC specific init calls within a generic API

2015-03-31 Thread Tero Kristo
This gets rid of need for some exported driver APIs, and simplifies the
initialization of the CM driver. Done in preparation to make CM a
separate driver. The init data is now also passed to the SoC specific
implementations, allowing future expansion to add feature flags etc.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/cm2xxx.c |3 +-
 arch/arm/mach-omap2/cm2xxx.h |2 +-
 arch/arm/mach-omap2/cm33xx.c |3 +-
 arch/arm/mach-omap2/cm33xx.h |3 +-
 arch/arm/mach-omap2/cm3xxx.c |3 +-
 arch/arm/mach-omap2/cm3xxx.h |2 +-
 arch/arm/mach-omap2/cm44xx.h |2 +-
 arch/arm/mach-omap2/cm_common.c  |   64 --
 arch/arm/mach-omap2/cminst44xx.c |3 +-
 arch/arm/mach-omap2/io.c |   16 +++---
 arch/arm/mach-omap2/prm_common.c |8 -
 11 files changed, 75 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index f18c844..3e5fd35 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -393,9 +393,8 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
.wait_module_ready  = &omap2xxx_cm_wait_module_ready,
 };
 
-int __init omap2xxx_cm_init(void)
+int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data)
 {
-   omap2_cm_base_init();
return cm_register(&omap2xxx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 83b6c59..7b8c79c 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -63,7 +63,7 @@ extern u32 omap2xxx_cm_get_core_pll_config(void);
 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
 u32 mdm);
 
-extern int __init omap2xxx_cm_init(void);
+int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data);
 
 #endif
 
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 221bca3..7b181f9 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -352,9 +352,8 @@ static struct cm_ll_data am33xx_cm_ll_data = {
.module_disable = &am33xx_cm_module_disable,
 };
 
-int __init am33xx_cm_init(void)
+int __init am33xx_cm_init(const struct omap_prcm_init_data *data)
 {
-   omap2_cm_base_init();
return cm_register(&am33xx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 046b4b2..a91f7d2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -19,6 +19,7 @@
 
 #include "cm.h"
 #include "cm-regbits-33xx.h"
+#include "prcm-common.h"
 
 /* CM base address */
 #define AM33XX_CM_BASE 0x44e0
@@ -374,6 +375,6 @@
 
 
 #ifndef __ASSEMBLER__
-int am33xx_cm_init(void);
+int am33xx_cm_init(const struct omap_prcm_init_data *data);
 #endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 88e6cb6..187fa43 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -671,10 +671,9 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
.wait_module_ready  = &omap3xxx_cm_wait_module_ready,
 };
 
-int __init omap3xxx_cm_init(void)
+int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data)
 {
omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD);
-   omap2_cm_base_init();
return cm_register(&omap3xxx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 734a858..bc444e2 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -72,7 +72,7 @@ extern void omap3_cm_save_context(void);
 extern void omap3_cm_restore_context(void);
 extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
 
-extern int __init omap3xxx_cm_init(void);
+int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data);
 
 #endif
 
diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index ad6e263..309a4c9 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,6 +23,6 @@
 #define OMAP4_CM_CLKSTCTRL 0x
 #define OMAP4_CM_STATICDEP 0x0004
 
-int omap4_cm_init(void);
+int omap4_cm_init(const struct omap_prcm_init_data *data);
 
 #endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 32af8fc..ff24fdf 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -20,6 +20,7 @@
 
 #include "cm2xxx.h"
 #include "cm3xxx.h"
+#include "cm33xx.h"
 #include "cm44xx.h"
 #include "clock.h"
 
@@ -37,6 +38,7 @@ void __iomem *cm_base;
 void __iomem *cm2_base;
 
 #define CM_NO_CLOCKS   0x1
+#define CM_SINGLE_INSTANCE 0x2
 
 /**
  * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
@@ -218,21 +220,32 @@ int cm_unregister(struct cm_ll_data *cld)
return 0;
 }
 
-static struct omap_prc

[PATCHv6 13/34] ARM: OMAP2+: PRM: determine PRM base address from device tree

2015-03-31 Thread Tero Kristo
There is no need to provide the PRM base address through a low-level API
from the low-level IO init, as this information is available through DT.
Re-routed the parsing function to be called from the PRM drivers also to
simplify the implementation under io.c.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/io.c |   12 +
 arch/arm/mach-omap2/prm.h|1 +
 arch/arm/mach-omap2/prm2xxx.c|1 +
 arch/arm/mach-omap2/prm33xx.c|1 +
 arch/arm/mach-omap2/prm3xxx.c|5 
 arch/arm/mach-omap2/prm44xx.c|1 +
 arch/arm/mach-omap2/prm_common.c |   51 +++---
 7 files changed, 52 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b43e09d..712dd42 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -386,7 +386,6 @@ void __init omap2420_init_early(void)
   OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -415,7 +414,6 @@ void __init omap2430_init_early(void)
   OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
@@ -448,9 +446,8 @@ void __init omap3_init_early(void)
   OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
  NULL);
+   /* XXX: remove these two once OMAP3 is DT only */
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
-
-   /* XXX: remove this once OMAP3 is DT only */
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
@@ -551,7 +548,6 @@ void __init ti814x_init_early(void)
  OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
omap3xxx_check_revision();
ti81xx_check_features();
am33xx_prm_init();
@@ -571,7 +567,6 @@ void __init ti816x_init_early(void)
  OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
omap3xxx_check_revision();
ti81xx_check_features();
am33xx_prm_init();
@@ -593,7 +588,6 @@ void __init am33xx_init_early(void)
  AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
omap3xxx_check_revision();
am33xx_check_features();
am33xx_prm_init();
@@ -618,7 +612,6 @@ void __init am43xx_init_early(void)
  AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
  NULL);
-   omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap3xxx_check_revision();
am33xx_check_features();
omap44xx_prm_init();
@@ -644,7 +637,6 @@ void __init omap4430_init_early(void)
  OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
  OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
@@ -675,7 +667,6 @@ void __init omap5_init_early(void)
  OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
  OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
-   omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
omap44xx_prm_init();
@@ -703,7 +694,6 @@ void __init dra7xx_init_early(void)
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE))

[PATCHv6 22/34] ARM: OMAP2+: id: cache omap_type value

2015-03-31 Thread Tero Kristo
There is no need to read the register with every invocation of the function,
as the value is constant. Thus, cache the value in a static variable.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/id.c |5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 2a2f4d5..f8121db 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -52,7 +52,10 @@ EXPORT_SYMBOL(omap_rev);
 
 int omap_type(void)
 {
-   u32 val = 0;
+   static u32 val = OMAP2_DEVICETYPE_MASK;
+
+   if (val < OMAP2_DEVICETYPE_MASK)
+   return val;
 
if (cpu_is_omap24xx()) {
val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
-- 
1.7.9.5

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[PATCHv6 06/34] ARM: OMAP4+: CM: move omap_cm_base_init under OMAP4 CM driver

2015-03-31 Thread Tero Kristo
There is no need to call this separately from io.c, rather this can be
done commonly under the CM driver. Also, this patch makes the API static,
as it is no longer used outside the driver file.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/cm44xx.h |1 -
 arch/arm/mach-omap2/cminst44xx.c |4 +++-
 arch/arm/mach-omap2/io.c |4 
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index 728d06a..ad6e263 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,7 +23,6 @@
 #define OMAP4_CM_CLKSTCTRL 0x
 #define OMAP4_CM_STATICDEP 0x0004
 
-void omap_cm_base_init(void);
 int omap4_cm_init(void);
 
 #endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 95a8cff..9319034 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -63,7 +63,7 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];
  * Populates the base addresses of the _cm_bases
  * array used for read/write of cm module registers.
  */
-void omap_cm_base_init(void)
+static void omap_cm_base_init(void)
 {
_cm_bases[OMAP4430_PRM_PARTITION] = prm_base;
_cm_bases[OMAP4430_CM1_PARTITION] = cm_base;
@@ -516,6 +516,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = {
 
 int __init omap4_cm_init(void)
 {
+   omap_cm_base_init();
+
return cm_register(&omap4xxx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5569c2f..364b530 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -623,7 +623,6 @@ void __init am43xx_init_early(void)
  NULL);
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
-   omap_cm_base_init();
omap3xxx_check_revision();
am33xx_check_features();
omap44xx_prm_init();
@@ -653,7 +652,6 @@ void __init omap4430_init_early(void)
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
-   omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
omap4_cm_init();
@@ -688,7 +686,6 @@ void __init omap5_init_early(void)
 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap_cm_base_init();
omap44xx_prm_init();
omap5xxx_check_revision();
omap4_cm_init();
@@ -719,7 +716,6 @@ void __init dra7xx_init_early(void)
 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap_cm_base_init();
omap44xx_prm_init();
dra7xxx_check_revision();
omap4_cm_init();
-- 
1.7.9.5

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[PATCHv6 02/34] ARM: OMAP3: PRM: invert the wkst_mask for the prm_clear_mod_irqs

2015-03-31 Thread Tero Kristo
This makes the API the same as used with OMAP2, and makes it possible
to implement a generic driver API for the functionality.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/pm34xx.c  |   18 +-
 arch/arm/mach-omap2/prm3xxx.c |8 
 arch/arm/mach-omap2/prm3xxx.h |2 +-
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 88721df..2581329 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -137,9 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void 
*unused)
 {
int c;
 
-   c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
-   ~(OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK));
+   c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
+   OMAP3430_ST_IO_CHAIN_MASK);
 
return c ? IRQ_HANDLED : IRQ_NONE;
 }
@@ -154,13 +153,14 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void 
*unused)
 * IO events before parsing in mux code
 */
c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
-   OMAP3430_ST_IO_MASK |
-   OMAP3430_ST_IO_CHAIN_MASK);
-   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, 0);
-   c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0);
+   ~(OMAP3430_ST_IO_MASK |
+ OMAP3430_ST_IO_CHAIN_MASK));
+   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
+   c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
if (omap_rev() > OMAP3430_REV_ES1_0) {
-   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, 0);
-   c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0);
+   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0);
+   c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1,
+~0);
}
 
return c ? IRQ_HANDLED : IRQ_NONE;
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 5713bbd..4cc72e8 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -217,7 +217,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
  * omap3xxx_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
  * @module: PRM module to clear wakeups from
  * @regs: register set to clear, 1 or 3
- * @ignore_bits: wakeup status bits to ignore
+ * @wkst_mask: wkst bits to clear
  *
  * The purpose of this function is to clear any wake-up events latched
  * in the PRCM PM_WKST_x registers. It is possible that a wake-up event
@@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
  * that any peripheral wake-up events occurring while attempting to
  * clear the PM_WKST_x are detected and cleared.
  */
-int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)
+int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask)
 {
u32 wkst, fclk, iclk, clken;
u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
@@ -238,7 +238,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 
ignore_bits)
 
wkst = omap2_prm_read_mod_reg(module, wkst_off);
wkst &= omap2_prm_read_mod_reg(module, grpsel_off);
-   wkst &= ~ignore_bits;
+   wkst &= wkst_mask;
if (wkst) {
iclk = omap2_cm_read_mod_reg(module, iclk_off);
fclk = omap2_cm_read_mod_reg(module, fclk_off);
@@ -254,7 +254,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 
ignore_bits)
omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
omap2_prm_write_mod_reg(wkst, module, wkst_off);
wkst = omap2_prm_read_mod_reg(module, wkst_off);
-   wkst &= ~ignore_bits;
+   wkst &= wkst_mask;
c++;
}
omap2_cm_write_mod_reg(iclk, module, iclk_off);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index ed8a3d8..856f3c5 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -145,7 +145,7 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
 extern int __init omap3xxx_prm_init(void);
-int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
+int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
 void omap3xxx_prm_iva_idle(void);
 void omap3_prm_reset_modem(void);
 int omap3xxx_prm_clear_global_cold_reset(void);
-- 
1.7.9.5

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[PATCHv6 05/34] ARM: OMAP4+: PRM: move omap_prm_base_init under OMAP4 PRM driver

2015-03-31 Thread Tero Kristo
There is no need to call this separately from io.c, rather this can be
done commonly under the PRM driver.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/io.c  |4 
 arch/arm/mach-omap2/prm44xx.c |2 ++
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index f504f71..5569c2f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -623,7 +623,6 @@ void __init am43xx_init_early(void)
  NULL);
omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
-   omap_prm_base_init();
omap_cm_base_init();
omap3xxx_check_revision();
am33xx_check_features();
@@ -654,7 +653,6 @@ void __init omap4430_init_early(void)
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
-   omap_prm_base_init();
omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
@@ -690,7 +688,6 @@ void __init omap5_init_early(void)
 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap_prm_base_init();
omap_cm_base_init();
omap44xx_prm_init();
omap5xxx_check_revision();
@@ -722,7 +719,6 @@ void __init dra7xx_init_early(void)
 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
-   omap_prm_base_init();
omap_cm_base_init();
omap44xx_prm_init();
dra7xxx_check_revision();
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 1af0137..6f647f6 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -705,6 +705,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 
 int __init omap44xx_prm_init(void)
 {
+   omap_prm_base_init();
+
if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
prm_features |= PRM_HAS_IO_WAKEUP;
 
-- 
1.7.9.5

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[PATCHv6 00/34] ARM: OMAP2+: PRCM+SCM cleanup against 4.0-rc1

2015-03-31 Thread Tero Kristo
Hi,

Decided to post a new version because of the number of minor changes
compared to v5, just to avoid any misunderstandings:

- dropped patch #1 ("clk: ti: fix ti_clk_get_reg_addr..."), this has been merged
  through clock tree now
- fixed scm_conf area size issues on am33xx/am43xx
- fixed scm area size issue on am43xx
- fixed size issues on omap3_pmx_core (was 8 bytes short)
- added warnings on omap2_clk_readl/writel in case legacy access is attempted
- fixed omap3 legacy boot
- fixed boot time warning on omap4+ where scm_conf does not contain clocks node
  yet (these may be added to DT later if support is required)
- fixed some randconfig warnings

Testing done:
 1: am335x-evm  : boot
 2: am335x-evmsk: boot
 3: am3517-evm  : boot
 4: am43x-epos-evm  : boot
 5: am437x-gp-evm   : boot
 6: omap3-beagle-xm : boot
 7: omap3-beagle: boot, cpuidle (ret/off), suspend (ret/off), legacy boot
 8: am335x-boneblack: boot
 9: am335x-bone : boot
10: dra7xx-evm  : boot
11: omap3-n900  : boot
12: omap5-uevm  : boot
13: omap4-panda-es  : boot, cpuidle (ret), suspend (ret)
14: omap4-panda : boot
15: omap2430-sdp: boot
16: omap3430-sdp: boot
17: omap4-sdp-es23plus: boot

New branch also pushed:
tree: https://github.com/t-kristo/linux-pm.git
branch: 4.0-rc1-prcm-cleanup-v6

-Tero

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[PATCHv6 27/34] ARM: dts: am43xx-epos-evm: fix pinmux node layout

2015-03-31 Thread Tero Kristo
Pinmux node should be a reference to the base one, not a complete re-write
of it. Having the node like this also prevents modifying the node layout
in the base am4372.dtsi file, which is needed for control module changes.

Signed-off-by: Tero Kristo 
---
 arch/arm/boot/dts/am43x-epos-evm.dts |   84 +-
 1 file changed, 42 insertions(+), 42 deletions(-)

diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts 
b/arch/arm/boot/dts/am43x-epos-evm.dts
index 257c099..72f01bb 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -69,7 +69,48 @@
};
};
 
-   am43xx_pinmux: pinmux@44e10800 {
+   matrix_keypad: matrix_keypad@0 {
+   compatible = "gpio-matrix-keypad";
+   debounce-delay-ms = <5>;
+   col-scan-delay-us = <2>;
+
+   row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 
*/
+&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 
*/
+&gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 
*/
+&gpio0 15 GPIO_ACTIVE_HIGH>;   /* Bank0, pin15 
*/
+
+   col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH  /* Bank3, pin9 
*/
+&gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 
*/
+&gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 
*/
+&gpio2 19 GPIO_ACTIVE_HIGH>;   /* Bank2, pin19 
*/
+
+   linux,keymap = <0x0201  /* P1 */
+   0x01000204  /* P4 */
+   0x02000207  /* P7 */
+   0x0300020a  /* NUMERIC_STAR */
+   0x00010202  /* P2 */
+   0x01010205  /* P5 */
+   0x02010208  /* P8 */
+   0x03010200  /* P0 */
+   0x00020203  /* P3 */
+   0x01020206  /* P6 */
+   0x02020209  /* P9 */
+   0x0302020b  /* NUMERIC_POUND */
+   0x00030067  /* UP */
+   0x0103006a  /* RIGHT */
+   0x0203006c  /* DOWN */
+   0x03030069>;/* LEFT */
+   };
+
+   backlight {
+   compatible = "pwm-backlight";
+   pwms = <&ecap0 0 5 PWM_POLARITY_INVERTED>;
+   brightness-levels = <0 51 53 56 62 75 101 152 255>;
+   default-brightness-level = <8>;
+   };
+};
+
+&am43xx_pinmux {
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
@@ -279,47 +320,6 @@
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | 
MUX_MODE7)
>;
};
-   };
-
-   matrix_keypad: matrix_keypad@0 {
-   compatible = "gpio-matrix-keypad";
-   debounce-delay-ms = <5>;
-   col-scan-delay-us = <2>;
-
-   row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* 
Bank0, pin12 */
-&gpio0 13 GPIO_ACTIVE_HIGH /* 
Bank0, pin13 */
-&gpio0 14 GPIO_ACTIVE_HIGH /* 
Bank0, pin14 */
-&gpio0 15 GPIO_ACTIVE_HIGH>;   /* 
Bank0, pin15 */
-
-   col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH  /* 
Bank3, pin9 */
-&gpio3 10 GPIO_ACTIVE_HIGH /* 
Bank3, pin10 */
-&gpio2 18 GPIO_ACTIVE_HIGH /* 
Bank2, pin18 */
-&gpio2 19 GPIO_ACTIVE_HIGH>;   /* 
Bank2, pin19 */
-
-   linux,keymap = <0x0201  /* P1 */
-   0x01000204  /* P4 */
-   0x02000207  /* P7 */
-   0x0300020a  /* NUMERIC_STAR */
-   0x00010202  /* P2 */
-   0x01010205  /* P5 */
-   0x02010208  /* P8 */
-   0x03010200  /* P0 */
-   0x00020203  /* P3 */
-   0x01020206  /* P6 */
-   0x02020209  /* P9 */
-   0x0302020b  /* NUMERIC_POUND */
-   0x00030067  /* UP */
-   0x0103006a  /* RIGHT */
-   0x0203006c  /* DOWN */
-   0x03030069>;/* LEFT */
-   };
-
-   backlight {
-   compatible = "pwm-backlight";
-   pwms = <&ecap0 0 5 PWM_POLARITY_INVERTED>;
- 

[PATCHv6 11/34] ARM: OMAP2+: PRCM: split PRCM module init to their own driver files

2015-03-31 Thread Tero Kristo
Splits the clock related provider module inits under their own driver files.
Previously this was done for all modules under the common PRM driver.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/cm.h |1 +
 arch/arm/mach-omap2/cm_common.c  |   51 ++
 arch/arm/mach-omap2/control.c|   47 +++
 arch/arm/mach-omap2/control.h|1 +
 arch/arm/mach-omap2/io.c |4 +++
 arch/arm/mach-omap2/prm_common.c |   23 ++---
 include/linux/clk/ti.h   |5 ++--
 7 files changed, 108 insertions(+), 24 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 6222e87..748ac33 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -70,6 +70,7 @@ int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 
clkctrl_offs);
 int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
+int omap_cm_init(void);
 
 # endif
 
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 8fe02fce..f3d578b 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -15,10 +15,13 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm44xx.h"
+#include "clock.h"
 
 /*
  * cm_ll_data: function pointers to SoC-specific implementations of
@@ -212,3 +215,51 @@ int cm_unregister(struct cm_ll_data *cld)
 
return 0;
 }
+
+static struct omap_prcm_init_data cm_data = {
+   .index = TI_CLKM_CM,
+};
+
+static struct omap_prcm_init_data cm2_data = {
+   .index = TI_CLKM_CM2,
+};
+
+static const struct of_device_id omap_cm_dt_match_table[] = {
+   { .compatible = "ti,omap3-cm", .data = &cm_data },
+   { .compatible = "ti,omap4-cm1", .data = &cm_data },
+   { .compatible = "ti,omap4-cm2", .data = &cm2_data },
+   { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
+   { .compatible = "ti,omap5-cm-core", .data = &cm2_data },
+   { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
+   { .compatible = "ti,dra7-cm-core", .data = &cm2_data },
+   { }
+};
+
+/**
+ * omap_cm_init - low level init for the CM drivers
+ *
+ * Initializes the low level clock infrastructure for CM drivers.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_cm_init(void)
+{
+   struct device_node *np;
+   void __iomem *mem;
+   const struct of_device_id *match;
+   const struct omap_prcm_init_data *data;
+   int ret;
+
+   for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
+   data = match->data;
+
+   mem = of_iomap(np, 0);
+   if (!mem)
+   return -ENOMEM;
+
+   ret = omap2_clk_provider_init(np, data->index, mem);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index da041b4..e881824 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -14,6 +14,7 @@
 
 #include 
 #include 
+#include 
 
 #include "soc.h"
 #include "iomap.h"
@@ -25,6 +26,7 @@
 #include "sdrc.h"
 #include "pm.h"
 #include "control.h"
+#include "clock.h"
 
 /* Used by omap3_ctrl_save_padconf() */
 #define START_PADCONF_SAVE 0x2
@@ -611,3 +613,48 @@ void __init omap3_ctrl_init(void)
omap3_ctrl_setup_d2d_padconf();
 }
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
+
+struct control_init_data {
+   int index;
+};
+
+static struct control_init_data ctrl_data = {
+   .index = TI_CLKM_CTRL,
+};
+
+static const struct of_device_id omap_scrm_dt_match_table[] = {
+   { .compatible = "ti,am3-scrm", .data = &ctrl_data },
+   { .compatible = "ti,am4-scrm", .data = &ctrl_data },
+   { .compatible = "ti,omap2-scrm", .data = &ctrl_data },
+   { .compatible = "ti,omap3-scrm", .data = &ctrl_data },
+   { }
+};
+
+/**
+ * omap_control_init - low level init for the control driver
+ *
+ * Initializes the low level clock infrastructure for control driver.
+ * Returns 0 in success, negative error value in failure.
+ */
+int __init omap_control_init(void)
+{
+   struct device_node *np;
+   void __iomem *mem;
+   const struct of_device_id *match;
+   const struct omap_prcm_init_data *data;
+   int ret;
+
+   for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
+   data = match->data;
+
+   mem = of_iomap(np, 0);
+   if (!mem)
+   return -ENOMEM;
+
+   ret = omap2_clk_provider_init(np, data->index, mem);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/cont

[PATCHv6 03/34] ARM: OMAP2+: PRM: add generic API for clear_mod_irqs

2015-03-31 Thread Tero Kristo
OMAP2/3 now use generic API for the prm_clear_mod_irqs, the SoC specific
implementation details are provided through prm_ll_data.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/pm24xx.c |   24 +++-
 arch/arm/mach-omap2/pm34xx.c |   18 --
 arch/arm/mach-omap2/prm.h|2 ++
 arch/arm/mach-omap2/prm2xxx.c|4 +++-
 arch/arm/mach-omap2/prm2xxx.h|2 --
 arch/arm/mach-omap2/prm3xxx.c|3 ++-
 arch/arm/mach-omap2/prm3xxx.h|1 -
 arch/arm/mach-omap2/prm_common.c |   21 +
 8 files changed, 47 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index fe01c5a..b1aad7e 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void)
 
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
-   omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+   omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
 
pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
@@ -104,18 +104,16 @@ no_sleep:
clk_enable(osc_ck);
 
/* clear CORE wake-up events */
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
 
/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
-   omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
+   omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1);
 
/* MPU domain wake events */
-   omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
-   0x1);
+   omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1);
 
-   omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET,
-   0x20);
+   omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20);
 
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
@@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void)
 * it is in retention mode. */
if (omap2_allow_mpu_retention()) {
/* REVISIT: These write to reserved bits? */
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
-   omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
-   omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
+   omap_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0);
+   omap_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0);
 
/* Try to enter MPU retention */
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 2581329..87b98bf9 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -137,8 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void 
*unused)
 {
int c;
 
-   c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
-   OMAP3430_ST_IO_CHAIN_MASK);
+   c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, OMAP3430_ST_IO_MASK |
+   OMAP3430_ST_IO_CHAIN_MASK);
 
return c ? IRQ_HANDLED : IRQ_NONE;
 }
@@ -152,15 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void 
*unused)
 * these are handled in a separate handler to avoid acking
 * IO events before parsing in mux code
 */
-   c = omap3xxx_prm_clear_mod_irqs(WKUP_MOD, 1,
-   ~(OMAP3430_ST_IO_MASK |
- OMAP3430_ST_IO_CHAIN_MASK));
-   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
-   c += omap3xxx_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
+   c = omap_prm_clear_mod_irqs(WKUP_MOD, 1, ~(OMAP3430_ST_IO_MASK |
+  OMAP3430_ST_IO_CHAIN_MASK));
+   c += omap_prm_clear_mod_irqs(CORE_MOD, 1, ~0);
+   c += omap_prm_clear_mod_irqs(OMAP3430_PER_MOD, 1, ~0);
if (omap_rev() > OMAP3430_REV_ES1_0) {
-   c += omap3xxx_prm_clear_mod_irqs(CORE_MOD, 3, ~0);
-   c += omap3xxx_prm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1,
-~0);
+   c += omap_prm_clear_mod_irqs(CORE_MOD, 

[PATCHv6 12/34] ARM: OMAP2+: CM: determine CM base address from device tree

2015-03-31 Thread Tero Kristo
There is no need to provide the CM base address through a low-level API
from the low-level IO init, as this information is available through DT.
Re-routed the parsing function to be called from the CM drivers also to
simplify the implementation under io.c.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/cm.h  |1 +
 arch/arm/mach-omap2/cm2xxx.c  |1 +
 arch/arm/mach-omap2/cm33xx.c  |1 +
 arch/arm/mach-omap2/cm3xxx.c  |2 +
 arch/arm/mach-omap2/cm_common.c   |   73 ++---
 arch/arm/mach-omap2/cminst44xx.c  |1 +
 arch/arm/mach-omap2/io.c  |   14 +--
 arch/arm/mach-omap2/prcm-common.h |6 +++
 arch/arm/mach-omap2/prm_common.c  |1 -
 9 files changed, 81 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 748ac33..1fe3e6b 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -71,6 +71,7 @@ int omap_cm_module_disable(u8 part, u16 inst, u16 
clkctrl_offs);
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
 int omap_cm_init(void);
+int omap2_cm_base_init(void);
 
 # endif
 
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index ef62ac9..f18c844 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -395,6 +395,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
 
 int __init omap2xxx_cm_init(void)
 {
+   omap2_cm_base_init();
return cm_register(&omap2xxx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index cc5aac7..221bca3 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -354,6 +354,7 @@ static struct cm_ll_data am33xx_cm_ll_data = {
 
 int __init am33xx_cm_init(void)
 {
+   omap2_cm_base_init();
return cm_register(&am33xx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index ebead8f..88e6cb6 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -673,6 +673,8 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
 
 int __init omap3xxx_cm_init(void)
 {
+   omap2_clk_legacy_provider_init(TI_CLKM_CM, cm_base + OMAP3430_IVA2_MOD);
+   omap2_cm_base_init();
return cm_register(&omap3xxx_cm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index f3d578b..32af8fc 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -36,6 +36,8 @@ void __iomem *cm_base;
 /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
 void __iomem *cm2_base;
 
+#define CM_NO_CLOCKS   0x1
+
 /**
  * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
  * @cm: CM base virtual address
@@ -224,18 +226,79 @@ static struct omap_prcm_init_data cm2_data = {
.index = TI_CLKM_CM2,
 };
 
+static struct omap_prcm_init_data omap2_prcm_data = {
+   .index = TI_CLKM_CM,
+   .flags = CM_NO_CLOCKS,
+};
+
+static struct omap_prcm_init_data omap3_cm_data = {
+   .index = TI_CLKM_CM,
+
+   /*
+* IVA2 offset is a negative value, must offset the cm_base address
+* by this to get it to positive side on the iomap
+*/
+   .offset = -OMAP3430_IVA2_MOD,
+};
+
+static struct omap_prcm_init_data am3_prcm_data = {
+   .index = TI_CLKM_CM,
+   .flags = CM_NO_CLOCKS,
+};
+
+static struct omap_prcm_init_data am4_prcm_data = {
+   .index = TI_CLKM_CM,
+   .flags = CM_NO_CLOCKS,
+};
+
 static const struct of_device_id omap_cm_dt_match_table[] = {
-   { .compatible = "ti,omap3-cm", .data = &cm_data },
+   { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
+   { .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
{ .compatible = "ti,omap4-cm1", .data = &cm_data },
{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
+   { .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
+   { .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
{ }
 };
 
 /**
+ * omap2_cm_base_init - initialize iomappings for the CM drivers
+ *
+ * Detects and initializes the iomappings for the CM driver, based
+ * on the DT data. Returns 0 in success, negative error value
+ * otherwise.
+ */
+int __init omap2_cm_base_init(void)
+{
+   struct device_node *np;
+   const struct of_device_id *match;
+   struct omap_prcm_init_data *data;
+   void __iomem *mem;
+
+   for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
+   data = (struct omap_prcm_init_data *)match->data;
+
+   mem = of_iomap(np, 0);
+   if

[PATCHv6 10/34] ARM: OMAP2+: clock: move clock provider infrastructure to clock driver

2015-03-31 Thread Tero Kristo
Splits the clock provider init out of the PRM driver and moves it to
clock driver. This is needed so that once the PRCM drivers are separated,
they can logically just access the clock driver not needing to go through
common PRM code. This would be wrong in the case of control module for
example.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/clock.c  |   77 +++---
 arch/arm/mach-omap2/clock.h  |6 ++-
 arch/arm/mach-omap2/prm_common.c |   36 --
 3 files changed, 75 insertions(+), 44 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 6124db5..94080fb 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -72,30 +73,78 @@ struct ti_clk_features ti_clk_features;
 static bool clkdm_control = true;
 
 static LIST_HEAD(clk_hw_omap_clocks);
-void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
+static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
+
+static void clk_memmap_writel(u32 val, void __iomem *reg)
+{
+   struct clk_omap_reg *r = (struct clk_omap_reg *)®
+
+   writel_relaxed(val, clk_memmaps[r->index] + r->offset);
+}
+
+static u32 clk_memmap_readl(void __iomem *reg)
+{
+   struct clk_omap_reg *r = (struct clk_omap_reg *)®
+
+   return readl_relaxed(clk_memmaps[r->index] + r->offset);
+}
 
 void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg)
 {
-   if (clk->flags & MEMMAP_ADDRESSING) {
-   struct clk_omap_reg *r = (struct clk_omap_reg *)®
-   writel_relaxed(val, clk_memmaps[r->index] + r->offset);
-   } else {
+   if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING)))
writel_relaxed(val, reg);
-   }
+   else
+   clk_memmap_writel(val, reg);
 }
 
 u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg)
 {
-   u32 val;
+   if (WARN_ON_ONCE(!(clk->flags & MEMMAP_ADDRESSING)))
+   return readl_relaxed(reg);
+   else
+   return clk_memmap_readl(reg);
+}
 
-   if (clk->flags & MEMMAP_ADDRESSING) {
-   struct clk_omap_reg *r = (struct clk_omap_reg *)®
-   val = readl_relaxed(clk_memmaps[r->index] + r->offset);
-   } else {
-   val = readl_relaxed(reg);
-   }
+static struct ti_clk_ll_ops omap_clk_ll_ops = {
+   .clk_readl = clk_memmap_readl,
+   .clk_writel = clk_memmap_writel,
+};
+
+/**
+ * omap2_clk_provider_init - initialize a clock provider
+ * @match_table: DT device table to match for devices to init
+ * @np: device node pointer for the this clock provider
+ * @index: index for the clock provider
+ * @mem: iomem pointer for the clock provider memory area
+ *
+ * Initializes a clock provider module (CM/PRM etc.), registering
+ * the memory mapping at specified index and initializing the
+ * low level driver infrastructure. Returns 0 in success.
+ */
+int __init omap2_clk_provider_init(struct device_node *np, int index,
+  void __iomem *mem)
+{
+   ti_clk_ll_ops = &omap_clk_ll_ops;
+
+   clk_memmaps[index] = mem;
+
+   ti_dt_clk_init_provider(np, index);
+
+   return 0;
+}
+
+/**
+ * omap2_clk_legacy_provider_init - initialize a legacy clock provider
+ * @index: index for the clock provider
+ * @mem: iomem pointer for the clock provider memory area
+ *
+ * Initializes a legacy clock provider memory mapping.
+ */
+void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
+{
+   ti_clk_ll_ops = &omap_clk_ll_ops;
 
-   return val;
+   clk_memmaps[index] = mem;
 }
 
 /*
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index a56742f..b6433fc 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -271,10 +271,12 @@ extern const struct clksel_rate div_1_3_rates[];
 extern const struct clksel_rate div_1_4_rates[];
 extern const struct clksel_rate div31_1to31_rates[];
 
-extern void __iomem *clk_memmaps[];
-
 extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
 extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
 
+int __init omap2_clk_provider_init(struct device_node *np, int index,
+  void __iomem *mem);
+void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem);
+
 void __init ti_clk_init_features(void);
 #endif
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 8ec5201..1bfd00e 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -677,25 +677,6 @@ static const struct of_device_id 
omap_prcm_dt_match_table[] = {
{ }
 };
 
-static struct clk_hw_omap memmap_dummy_ck = {
-   .flags = MEMMAP_ADDRESSING,
-};
-
-static u32 prm_clk_readl(void __iomem *reg)
-{
-   return omap2_clk_readl(&memmap_dummy_ck, reg);
-}
-
-static void prm_clk_writel(u32 val, void

[PATCHv6 04/34] ARM: OMAP3+: PRM: add common APIs for prm_vp_check/clear_txdone

2015-03-31 Thread Tero Kristo
PRM driver now only exports a generic API for clearing / checking
VP txdone status.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/prm.h  |   14 ++
 arch/arm/mach-omap2/prm3xxx.c  |6 --
 arch/arm/mach-omap2/prm3xxx.h  |4 
 arch/arm/mach-omap2/prm44xx.c  |6 --
 arch/arm/mach-omap2/prm44xx_54xx.h |4 
 arch/arm/mach-omap2/prm_common.c   |   34 ++
 arch/arm/mach-omap2/vp.h   |9 -
 arch/arm/mach-omap2/vp3xxx_data.c  |4 ++--
 arch/arm/mach-omap2/vp44xx_data.c  |4 ++--
 9 files changed, 60 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 2a01a58..4e390ec 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -147,6 +147,8 @@ struct prm_ll_data {
 u16 offset);
void (*reset_system)(void);
int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask);
+   u32 (*vp_check_txdone)(u8 vp_id);
+   void (*vp_clear_txdone)(u8 vp_id);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
@@ -164,6 +166,18 @@ void omap_prm_reset_system(void);
 void omap_prm_reconfigure_io_chain(void);
 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
 
+/*
+ * Voltage Processor (VP) identifiers
+ */
+#define OMAP3_VP_VDD_MPU_ID0
+#define OMAP3_VP_VDD_CORE_ID   1
+#define OMAP4_VP_VDD_CORE_ID   0
+#define OMAP4_VP_VDD_IVA_ID1
+#define OMAP4_VP_VDD_MPU_ID2
+
+u32 omap_prm_vp_check_txdone(u8 vp_id);
+void omap_prm_vp_clear_txdone(u8 vp_id);
+
 #endif
 
 
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index a444334..2b478adc 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -96,7 +96,7 @@ static struct omap3_vp omap3_vp[] = {
 
 #define MAX_VP_ID ARRAY_SIZE(omap3_vp);
 
-u32 omap3_prm_vp_check_txdone(u8 vp_id)
+static u32 omap3_prm_vp_check_txdone(u8 vp_id)
 {
struct omap3_vp *vp = &omap3_vp[vp_id];
u32 irqstatus;
@@ -106,7 +106,7 @@ u32 omap3_prm_vp_check_txdone(u8 vp_id)
return irqstatus & vp->tranxdone_status;
 }
 
-void omap3_prm_vp_clear_txdone(u8 vp_id)
+static void omap3_prm_vp_clear_txdone(u8 vp_id)
 {
struct omap3_vp *vp = &omap3_vp[vp_id];
 
@@ -665,6 +665,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
.reset_system = &omap3xxx_prm_dpll3_reset,
.clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs,
+   .vp_check_txdone = &omap3_prm_vp_check_txdone,
+   .vp_clear_txdone = &omap3_prm_vp_clear_txdone,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 5a09a74..55e4c89 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -132,10 +132,6 @@
 
 #ifndef __ASSEMBLER__
 
-/* OMAP3-specific VP functions */
-u32 omap3_prm_vp_check_txdone(u8 vp_id);
-void omap3_prm_vp_clear_txdone(u8 vp_id);
-
 /*
  * OMAP3 access functions for voltage controller (VC) and
  * voltage proccessor (VP) in the PRM.
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a08a617..1af0137 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -138,7 +138,7 @@ static struct omap4_vp omap4_vp[] = {
},
 };
 
-u32 omap4_prm_vp_check_txdone(u8 vp_id)
+static u32 omap4_prm_vp_check_txdone(u8 vp_id)
 {
struct omap4_vp *vp = &omap4_vp[vp_id];
u32 irqstatus;
@@ -149,7 +149,7 @@ u32 omap4_prm_vp_check_txdone(u8 vp_id)
return irqstatus & vp->tranxdone_status;
 }
 
-void omap4_prm_vp_clear_txdone(u8 vp_id)
+static void omap4_prm_vp_clear_txdone(u8 vp_id)
 {
struct omap4_vp *vp = &omap4_vp[vp_id];
 
@@ -699,6 +699,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.deassert_hardreset = omap4_prminst_deassert_hardreset,
.is_hardreset_asserted  = omap4_prminst_is_hardreset_asserted,
.reset_system   = omap4_prminst_global_warm_sw_reset,
+   .vp_check_txdone= omap4_prm_vp_check_txdone,
+   .vp_clear_txdone= omap4_prm_vp_clear_txdone,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h 
b/arch/arm/mach-omap2/prm44xx_54xx.h
index 7143295..a470185 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -26,10 +26,6 @@
 /* Function prototypes */
 #ifndef __ASSEMBLER__
 
-/* OMAP4/OMAP5-specific VP functions */
-u32 omap4_prm_vp_check_txdone(u8 vp_id);
-void omap4_prm_vp_clear_txdone(u8 vp_id);
-
 /*
  * OMAP4/OMAP5 access functions for voltage controller (VC) and
  * voltage proccessor (VP) in the PRM.
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 2c2e7ed..79cee11 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -555,6

[PATCHv6 16/34] ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility

2015-03-31 Thread Tero Kristo
PRM device instance offset is now provided through the prm_init_data.
This gets rid of some cpu_is_X / soc_is_X calls from PRM core code,
preparing for PRM to be its own separate driver.

Signed-off-by: Tero Kristo 
---
 arch/arm/mach-omap2/prcm-common.h |2 ++
 arch/arm/mach-omap2/prm44xx.c |2 ++
 arch/arm/mach-omap2/prm_common.c  |   37 -
 arch/arm/mach-omap2/prminst44xx.c |   18 +-
 arch/arm/mach-omap2/prminst44xx.h |1 +
 5 files changed, 42 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-omap2/prcm-common.h 
b/arch/arm/mach-omap2/prcm-common.h
index 461bdc4..6ae0b3a 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -524,6 +524,7 @@ struct omap_prcm_irq_setup {
  * @mem: IO mem pointer for this module
  * @offset: module base address offset from the IO base
  * @flags: PRCM module init flags
+ * @device_inst_offset: device instance offset within the module address space
  * @init: low level PRCM init function for this module
  * @np: device node for this PRCM module
  */
@@ -532,6 +533,7 @@ struct omap_prcm_init_data {
void __iomem *mem;
s16 offset;
u16 flags;
+   s32 device_inst_offset;
int (*init)(const struct omap_prcm_init_data *data);
struct device_node *np;
 };
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index e3f2d31..a980d245 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -713,6 +713,8 @@ int __init omap44xx_prm_init(const struct 
omap_prcm_init_data *data)
if (!soc_is_dra7xx())
prm_features |= PRM_HAS_VOLTAGE;
 
+   omap4_prminst_set_prm_dev_inst(data->device_inst_offset);
+
return prm_register(&omap44xx_prm_ll_data);
 }
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index aede589..a834124 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -34,6 +34,9 @@
 #include "prm3xxx.h"
 #include "prm33xx.h"
 #include "prm44xx.h"
+#include "prm54xx.h"
+#include "prm7xx.h"
+#include "prcm43xx.h"
 #include "common.h"
 #include "clock.h"
 #include "cm.h"
@@ -661,11 +664,35 @@ static struct omap_prcm_init_data am3_prm_data __initdata 
= {
 };
 #endif
 
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-   defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
+#ifdef CONFIG_ARCH_OMAP4
 static struct omap_prcm_init_data omap4_prm_data __initdata = {
.index = TI_CLKM_PRM,
.init = omap44xx_prm_init,
+   .device_inst_offset = OMAP4430_PRM_DEVICE_INST,
+};
+#endif
+
+#ifdef CONFIG_SOC_OMAP5
+static struct omap_prcm_init_data omap5_prm_data __initdata = {
+   .index = TI_CLKM_PRM,
+   .init = omap44xx_prm_init,
+   .device_inst_offset = OMAP54XX_PRM_DEVICE_INST,
+};
+#endif
+
+#ifdef CONFIG_SOC_DRA7XX
+static struct omap_prcm_init_data dra7_prm_data __initdata = {
+   .index = TI_CLKM_PRM,
+   .init = omap44xx_prm_init,
+   .device_inst_offset = DRA7XX_PRM_DEVICE_INST,
+};
+#endif
+
+#ifdef CONFIG_SOC_AM43XX
+static struct omap_prcm_init_data am4_prm_data __initdata = {
+   .index = TI_CLKM_PRM,
+   .init = omap44xx_prm_init,
+   .device_inst_offset = AM43XX_PRM_DEVICE_INST,
 };
 #endif
 
@@ -680,7 +707,7 @@ static const struct of_device_id omap_prcm_dt_match_table[] 
__initconst = {
{ .compatible = "ti,am3-prcm", .data = &am3_prm_data },
 #endif
 #ifdef CONFIG_SOC_AM43XX
-   { .compatible = "ti,am4-prcm", .data = &omap4_prm_data },
+   { .compatible = "ti,am4-prcm", .data = &am4_prm_data },
 #endif
 #ifdef CONFIG_SOC_TI81XX
{ .compatible = "ti,dm814-prcm", .data = &am3_prm_data },
@@ -697,11 +724,11 @@ static const struct of_device_id 
omap_prcm_dt_match_table[] __initconst = {
{ .compatible = "ti,omap4-scrm", .data = &scrm_data },
 #endif
 #ifdef CONFIG_SOC_OMAP5
-   { .compatible = "ti,omap5-prm", .data = &omap4_prm_data },
+   { .compatible = "ti,omap5-prm", .data = &omap5_prm_data },
{ .compatible = "ti,omap5-scrm", .data = &scrm_data },
 #endif
 #ifdef CONFIG_SOC_DRA7XX
-   { .compatible = "ti,dra7-prm", .data = &omap4_prm_data },
+   { .compatible = "ti,dra7-prm", .data = &dra7_prm_data },
 #endif
{ }
 };
diff --git a/arch/arm/mach-omap2/prminst44xx.c 
b/arch/arm/mach-omap2/prminst44xx.c
index 8adf7b1..c4859c4 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -47,22 +47,14 @@ void omap_prm_base_init(void)
 
 s32 omap4_prmst_get_prm_dev_inst(void)
 {
-   if (prm_dev_inst != PRM_INSTANCE_UNKNOWN)
-   return prm_dev_inst;
-
-   /* This cannot be done way early at boot.. as things are not setup */
-   if (cpu_is_omap44xx())
-   prm_dev_inst = OMAP4430_PRM_DEVICE_INST;
-   else if (soc_is_omap54xx())
-   prm_dev_inst = OMAP54XX_PRM_DEVICE_INST;
-   

[PATCHv6 08/34] Documentation: DT: document PRCM compatible strings for dm81x SoCs

2015-03-31 Thread Tero Kristo
These PRCM nodes were earlier added in patch 7800064ba5 ("ARM: dts: Add
basic dm816x device tree configuration"), but the documentation for
the same wasn't added. Fix this by adding the missing compatible strings
under the generic prcm.txt document.

Signed-off-by: Tero Kristo 
---
 .../devicetree/bindings/arm/omap/prcm.txt  |4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index 79074da..68f96f8 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -29,6 +29,10 @@ Required properties:
"ti,dra7-prm"
"ti,dra7-cm-core-aon"
"ti,dra7-cm-core"
+   "ti,dm814-prcm"
+   "ti,dm814-scrm"
+   "ti,dm816-prcm"
+   "ti,dm816-scrm"
 - reg: Contains PRCM module register address range
(base address and length)
 - clocks:  clocks for this module
-- 
1.7.9.5

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[PATCHv6 25/34] ARM: dts: omap3: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo
This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.

Signed-off-by: Tero Kristo 
Reported-by: Tony Lindgren 
---
 Documentation/devicetree/bindings/arm/omap/l4.txt  |1 +
 .../devicetree/bindings/arm/omap/prcm.txt  |2 +-
 arch/arm/boot/dts/am3517.dtsi  |2 +-
 arch/arm/boot/dts/am35xx-clocks.dtsi   |2 +-
 arch/arm/boot/dts/omap3.dtsi   |   96 +++-
 arch/arm/boot/dts/omap3xxx-clocks.dtsi |   13 +--
 arch/arm/mach-omap2/control.c  |2 +-
 7 files changed, 67 insertions(+), 51 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/omap/l4.txt 
b/Documentation/devicetree/bindings/arm/omap/l4.txt
index 57569cc8..6402022 100644
--- a/Documentation/devicetree/bindings/arm/omap/l4.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l4.txt
@@ -5,6 +5,7 @@ These bindings describe the OMAP SoCs L4 interconnect bus.
 Required properties:
 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
   Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
+  Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
 - ranges : contains the IO map range for the bus
 
 Examples:
diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt 
b/Documentation/devicetree/bindings/arm/omap/prcm.txt
index cce8365..ef5a74b 100644
--- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
+++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
@@ -17,7 +17,7 @@ Required properties:
"ti,omap2-scm"
"ti,omap3-prm"
"ti,omap3-cm"
-   "ti,omap3-scrm"
+   "ti,omap3-scm"
"ti,omap4-cm1"
"ti,omap4-prm"
"ti,omap4-cm2"
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index c90724b..f164dce 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -31,7 +31,7 @@
status = "disabled";
reg = <0x5c00 0x3>;
interrupts = <67 68 69 70>;
-   syscon = <&omap3_scm_general>;
+   syscon = <&scm_conf>;
ti,davinci-ctrl-reg-offset = <0x1>;
ti,davinci-ctrl-mod-reg-offset = <0>;
ti,davinci-ctrl-ram-offset = <0x2>;
diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi 
b/arch/arm/boot/dts/am35xx-clocks.dtsi
index df489d3..518b8fd 100644
--- a/arch/arm/boot/dts/am35xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am35xx-clocks.dtsi
@@ -7,7 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-&scrm_clocks {
+&scm_clocks {
emac_ick: emac_ick {
#clock-cells = <0>;
compatible = "ti,am35xx-gate-clock";
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b7111..b28791a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -87,6 +87,60 @@
ranges;
ti,hwmods = "l3_main";
 
+   l4_core: l4@4800 {
+   compatible = "ti,omap3-l4-core", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4800 0x100>;
+
+   scm: scm@2000 {
+   compatible = "ti,omap3-scm", "simple-bus";
+   reg = <0x2000 0x2000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x2000 0x2000>;
+
+   omap3_pmx_core: pinmux@30 {
+   compatible = "ti,omap3-padconf",
+"pinctrl-single";
+   reg = <0x30 0x238>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   pinctrl-single,register-width = <16>;
+   pinctrl-single,function-mask = <0xff1f>;
+   };
+
+   scm_conf: scm_conf@270 {
+   compatible = "syscon";
+   reg = <0x270 0x330>;
+   #address-cells = <1>;
+   #size-cel

Re: [PATCH 32/35 linux-next] clk: constify of_device_id array

2015-03-31 Thread Fabian Frederick


> On 27 March 2015 at 08:19 Stephen Boyd  wrote:
>
>
> On 03/22, Fabian Frederick wrote:
> >
> >
> > > On 18 March 2015 at 15:15 Michael Turquette  wrote:
> > >
> > >
> > > Quoting Fabian Frederick (2015-03-16 12:59:06)
> > > > of_device_id is always used as const.
> > > > (See driver.of_match_table and open firmware functions)
> > > >
> > > > Signed-off-by: Fabian Frederick 
> > >
> > > Acked-by: Michael Turquette 
> >
> > Thanks :)
> >
> > btw, something I forgot to mention in changelog is the __initdata ->
> > __initconst
> > for ti_clkdm_match_table[]
> >
> > I can send it again with a new changelog if necessary ...
> >
>
> Did you want us to take this through clk-next? If so please
> resend with the new commit text.

Of course :) I hope V2 is ok.

Regards,
Fabian
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
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[PATCH V2 linux-next] clk: constify of_device_id array

2015-03-31 Thread Fabian Frederick
of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)

__initdata updated to __initconst for
static const struct of_device_id ti_clkdm_match_table[]

Signed-off-by: Fabian Frederick 
---
V2:
add __initdata -> __initconst in changelog

 drivers/clk/clk-palmas.c | 2 +-
 drivers/clk/st/clkgen-fsyn.c | 2 +-
 drivers/clk/st/clkgen-mux.c  | 8 
 drivers/clk/st/clkgen-pll.c  | 4 ++--
 drivers/clk/ti/clk-dra7-atl.c| 2 +-
 drivers/clk/ti/clockdomain.c | 2 +-
 drivers/clk/versatile/clk-vexpress-osc.c | 2 +-
 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/clk-palmas.c b/drivers/clk/clk-palmas.c
index 8d45992..45a535a 100644
--- a/drivers/clk/clk-palmas.c
+++ b/drivers/clk/clk-palmas.c
@@ -161,7 +161,7 @@ static struct palmas_clks_of_match_data 
palmas_of_clk32kgaudio = {
},
 };
 
-static struct of_device_id palmas_clks_of_match[] = {
+static const struct of_device_id palmas_clks_of_match[] = {
{
.compatible = "ti,palmas-clk32kg",
.data = &palmas_of_clk32kg,
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index af94ed8..a917c4c 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -1057,7 +1057,7 @@ static struct clk * __init st_clk_register_quadfs_fsynth(
return clk;
 }
 
-static struct of_device_id quadfs_of_match[] = {
+static const struct of_device_id quadfs_of_match[] = {
{
.compatible = "st,stih416-quadfs216",
.data = &st_fs216c65_416
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index 9a15ec3..fdcff10 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -341,7 +341,7 @@ static struct clkgena_divmux_data st_divmux_c32odf3 = {
.fb_start_bit_idx = 24,
 };
 
-static struct of_device_id clkgena_divmux_of_match[] = {
+static const struct of_device_id clkgena_divmux_of_match[] = {
{
.compatible = "st,clkgena-divmux-c65-hs",
.data = &st_divmux_c65hs,
@@ -479,7 +479,7 @@ static struct clkgena_prediv_data prediv_c32_data = {
.table = prediv_table16,
 };
 
-static struct of_device_id clkgena_prediv_of_match[] = {
+static const struct of_device_id clkgena_prediv_of_match[] = {
{ .compatible = "st,clkgena-prediv-c65", .data = &prediv_c65_data },
{ .compatible = "st,clkgena-prediv-c32", .data = &prediv_c32_data },
{}
@@ -586,7 +586,7 @@ static struct clkgen_mux_data stih407_a9_mux_data = {
.width = 2,
 };
 
-static struct of_device_id mux_of_match[] = {
+static const struct of_device_id mux_of_match[] = {
{
.compatible = "st,stih416-clkgenc-vcc-hd",
.data = &clkgen_mux_c_vcc_hd_416,
@@ -693,7 +693,7 @@ static struct clkgen_vcc_data st_clkgenf_vcc_416 = {
.lock = &clkgenf_lock,
 };
 
-static struct of_device_id vcc_of_match[] = {
+static const struct of_device_id vcc_of_match[] = {
{ .compatible = "st,stih416-clkgenc", .data = &st_clkgenc_vcc_416 },
{ .compatible = "st,stih416-clkgenf", .data = &st_clkgenf_vcc_416 },
{}
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 29769d7..d204ba8 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -593,7 +593,7 @@ static struct clk * __init clkgen_odf_register(const char 
*parent_name,
return clk;
 }
 
-static struct of_device_id c32_pll_of_match[] = {
+static const struct of_device_id c32_pll_of_match[] = {
{
.compatible = "st,plls-c32-a1x-0",
.data = &st_pll3200c32_a1x_0,
@@ -708,7 +708,7 @@ err:
 }
 CLK_OF_DECLARE(clkgen_c32_pll, "st,clkgen-plls-c32", clkgen_c32_pll_setup);
 
-static struct of_device_id c32_gpu_pll_of_match[] = {
+static const struct of_device_id c32_gpu_pll_of_match[] = {
{
.compatible = "st,stih415-gpu-pll-c32",
.data = &st_pll1200c32_gpu_415,
diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c
index 59bb4b3..d86bc46 100644
--- a/drivers/clk/ti/clk-dra7-atl.c
+++ b/drivers/clk/ti/clk-dra7-atl.c
@@ -294,7 +294,7 @@ static int of_dra7_atl_clk_remove(struct platform_device 
*pdev)
return 0;
 }
 
-static struct of_device_id of_dra7_atl_clk_match_tbl[] = {
+static const struct of_device_id of_dra7_atl_clk_match_tbl[] = {
{ .compatible = "ti,dra7-atl", },
{},
 };
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
index b4c5fac..35fe108 100644
--- a/drivers/clk/ti/clockdomain.c
+++ b/drivers/clk/ti/clockdomain.c
@@ -52,7 +52,7 @@ static void __init of_ti_clockdomain_setup(struct device_node 
*node)
}
 }
 
-static struct of_device_id ti_clkdm_match_table[] __initdata = {
+static const struct of_device_id ti_clkdm_match_table[] __initconst = {
{ .compa

[3.13.y-ckt stable] Patch "usb: musb: omap2plus bus glue needs USB host support" has been added to staging queue

2015-03-31 Thread Kamal Mostafa
This is a note to let you know that I have just added a patch titled

usb: musb: omap2plus bus glue needs USB host support

to the linux-3.13.y-queue branch of the 3.13.y-ckt extended stable tree 
which can be found at:

 
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.13.y-queue

This patch is scheduled to be released in version 3.13.11-ckt18.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.13.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

--

>From d2711f357bc9387a10a1ac2151b3bae75ca5a35e Mon Sep 17 00:00:00 2001
From: Arnd Bergmann 
Date: Thu, 8 May 2014 15:52:16 +0200
Subject: usb: musb: omap2plus bus glue needs USB host support

commit a8d191c8bb2f11a8f381e7cb98f978b7288c1401 upstream.

The musb/omap2430.c bus glue driver calls usb_hcd_poll_rh_status,
which is only available if CONFIG_USB is also set, i.e. we
are building USB host mode and not just endpoint mode.

Signed-off-by: Arnd Bergmann 
Cc: linux-omap@vger.kernel.org
Signed-off-by: Felipe Balbi 
Signed-off-by: Kamal Mostafa 
---
 drivers/usb/musb/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 57dfc0c..a70f46f 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -74,7 +74,7 @@ config USB_MUSB_TUSB6010

 config USB_MUSB_OMAP2PLUS
tristate "OMAP2430 and onwards"
-   depends on ARCH_OMAP2PLUS
+   depends on ARCH_OMAP2PLUS && USB
select GENERIC_PHY

 config USB_MUSB_AM35X
--
1.9.1

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Re: [PATCHv5 00/35] ARM: OMAP2+: PRCM/SCM cleanups against 4.0-rc

2015-03-31 Thread Tero Kristo

On 03/31/2015 04:25 AM, Tony Lindgren wrote:

* Tony Lindgren  [150330 17:15]:

Hi Tero,

* Tero Kristo  [150320 11:45]:

Hi,

v5 contains the following changes still:

- re-ordered patches a bit, the single clock driver fix moved to beginning
   of the set, waiting for a separate merge from Mike
- Changed patch #23 to fix the slightly misleading logic (removed the extra +1)
- Changed patches #16 and #18 to fix OMAP2/3/4 etc. only builds
- Fixed ti81xx boot issues (hopefully, I don't have access to hardware
   to test it)
- Changed control module DTS layout based on discussions with Tony, this
   includes addition of minimal l4 bus (patch #25+)

Testing done for v5:
  1: am335x-evm  : boot
  2: am335x-evmsk: boot
  3: am3517-evm  : boot
  4: am43x-epos-evm  : boot
  5: am437x-gp-evm   : boot
  6: omap3-beagle-xm : boot
  7: omap3-beagle: boot, suspend (ret/off), cpuidle (ret/off)
  8: am335x-boneblack: boot
  9: am335x-bone : boot
10: dra7xx-evm  : boot
11: omap3-n900  : boot
12: omap5-uevm  : boot
13: omap4-panda-es  : boot, suspend (ret), cpuidle (ret)
14: omap4-panda : boot
15: omap2430-sdp: boot
16: omap3430-sdp: boot
17: omap4-sdp-es23plus: boot

Branch available at:
- tree: https://github.com/t-kristo/linux-pm.git
- branch: 4.0-rc1-prcm-cleanup-v5


I found few more issues regarding diff of the dmesg before and after,
you may want to diff also dra7 before and after.

Then I just noticed this series won't boot on omap3 with the legacy mode.
You can test this by building a uImage with the following command:

$ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 \
-n "Linux" -d arch/arm/boot/zImage /tmp/uImage

Then make sure you're not passing a .dtb file.

Below is the error I'm getting with debug_ll + earlyprintk enabled.


Also noticed a make randconfig build warning:

arch/arm/mach-omap2/prm_common.c:702:35: warning: ‘scrm_data’ defined but not 
used [-Wunused-variable]

That seems to happen at least with the following selection:

# CONFIG_ARCH_OMAP2 is not set
# CONFIG_ARCH_OMAP3 is not set
# CONFIG_ARCH_OMAP4 is not set
# CONFIG_SOC_OMAP5 is not set
# CONFIG_SOC_AM33XX is not set
CONFIG_SOC_AM43XX=y
# CONFIG_SOC_DRA7XX is not set
CONFIG_ARCH_OMAP2PLUS=y


Ok will fix that warning also and repost in a bit.

-Tero



Regards,

Tony



[0.00] PC is at regmap_read+0x10/0x60
[0.00] LR is at clk_memmap_readl+0x34/0x54
[0.00] pc : []lr : []psr: 21d3
[0.00] sp : c08d1e90  ip :   fp : 
[0.00] r10: c07efaa8  r9 : 0040  r8 : c601c5c0
[0.00] r7 : c601bbc0  r6 : c601c5c0  r5 : 0040  r4 : 0001
[0.00] r3 : fa004000  r2 : c08d1ea4  r1 : 0040  r0 : 0040
[0.00] Flags: nzCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment 
kernel
[0.00] Control: 10c5387d  Table: 80004019  DAC: 0015
[0.00] Process swapper/0 (pid: 0, stack limit = 0xc08d0218)
[0.00] Stack: (0xc08d1e90 to 0xc08d2000)
[0.00] 1e80:  c601bbc0 
c601c5c0 c0035694
[0.00] 1ea0: c6001c8c c6001c40 c07f c04d7d78  0001 
c07efaa8 c04d4dd0
[0.00] 1ec0:   c04d08c4 c115c5bc 61d3 c601bbc0 
0020 0001
[0.00] 1ee0: 0003 0013 0040 c07efaa8  c04d8284 
 c07f
[0.00] 1f00: c094e4e8 c07efaa8 c06683ec c08d1efc c7eff101 0020 
c0951fe4 0001
[0.00] 1f20:   c0951fcc c7eff140 c0965000 c04d840c 
0013 0003
[0.00] 1f40: 0001  039457c8 0040 c601bb80 c0951fcc 
c0945dac c094e504
[0.00] 1f60: c08b3280 c08a7694  c601bb80 c094e4e8 c601bb80 
c094e508 c08a77a8
[0.00] 1f80: c08aa480  c0965000  c08d28c0 c08b3280 
c7eff140 c0965000
[0.00] 1fa0:  c08aa490 c08aa480  c0965000 c086f7a4 
c08b1e58 c0863aec
[0.00] 1fc0:   c0863678   c08b3280 
c0965214 c08d296c
[0.00] 1fe0: c08b327c c08d7a0c 80004059 411fc083  8000807c 
 
[0.00] [] (regmap_read) from [] 
(clk_memmap_readl+0x34/0x54)
[0.00] [] (clk_memmap_readl) from [] 
(ti_clk_divider_recalc_rate+0x20/0xf8)
[0.00] [] (ti_clk_divider_recalc_rate) from [] 
(clk_register+0x360/0x6f8)
[0.00] [] (clk_register) from [] 
(_register_divider.constprop.5+0xb8/0x120)
[0.00] [] (_register_divider.constprop.5) from [] 
(ti_clk_register_divider+0x80/0xa4)
[0.00] [] (ti_clk_register_divider) from [] 
(ti_clk_register_clk+0x88/0x17c)
[0.00] [] (ti_clk_register_clk) from [] 
(ti_clk_register_legacy_clks+0x20/0x158)
[0.00] [] (ti_clk_register_legacy_clks) from [] 
(omap3430_clk_legacy_init+0x10/0x58)
[0.00] [] (omap3430_clk_legacy_init) from [] 
(omap3_sync32k_timer_init+0x8/0x58)
[0.00] [] (omap3_sync32k_timer_init) from [] 
(st

Re: [PATCH v3 1/7] dmaengine: of_dma: Support for DMA routers

2015-03-31 Thread Peter Ujfalusi
On 03/28/2015 03:44 AM, Arnd Bergmann wrote:
> On Friday 27 March 2015, Peter Ujfalusi wrote:
>> +Required property:
>> +- dma-device:  phandle of the DMA controller. The router is 
>> modifying
>> +   the DMA requests for this controller.
> 
> This property seems rather specific to the case at hand, I would expect that
> one might also see routers like this that are connected to more than one
> dma-device, so maybe make it a list?

Yeah, it is intentional from my part.
In dra7xx family we actually have two DMA controllers: sDMA and eDMA. They
both have identical crossbar up front but you can not choose the DMA request
to be routed to either eDMA or sDMA. They are always routed to both and in the
crossbar you select which signal goes to which DMA request of the given
controller.
At the moment I was not aware of different designs (current and future), but
it might be possible that a design you described might surface at some point.
For sure, the list will complicate things quite a bit it might require
different API and callbacks at the end. I need to think about this how it is
going to work best.

> It might also be better to name this as 'dma-controllers' or 'dma-masters',
> as it is not entirely obvious (without referencing the binding document)
> whether a dma device refers to the slave or the master.

I think the 'dma-masters' sounds much better.

PS: I'm out of office this week so do not expect v4 before mid next week.

-- 
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Re: patch "phy: Add a driver for dm816x USB PHY" added to linux-phy tree

2015-03-31 Thread Tony Lindgren
* Kishon Vijay Abraham I  [150331 09:37]:
> Hi Tony,
> 
> On Thursday 26 March 2015 09:34 PM, Tony Lindgren wrote:
> >* Matthijs van Duin  [150326 00:02]:
> >>On 26 March 2015 at 00:36, Kishon Vijay Abraham I  wrote:
> >>>Let me know if you find any problems with this patch.
> >>
> >>I spotted a minor issue in drivers/phy/Kconfig:
> >>
> >>>+ Enable this for dm81xx USB to work.
> >>
> >>This should say dm816x instead.
> >
> >Yes that's correct, the phy on dm814x seems to be like on am335x,
> >not like on dm816x. Kishon, let me know if you prefer a follow-up
> >patch to fix this.
> 
> No. I've fixed this in my tree
> https://git.kernel.org/cgit/linux/kernel/git/kishon/linux-phy.git/commit
> /?h=next&id=9fa9fd4ffc90582091b8c6219f2054265f71e4ef

OK thanks!

> >I'm not seeing the original mail for this thread anywhere for some
> >reason BTW. It does not seem to be in the mailing list archives
> >either, well at least not yet.
> 
> It's an automated mail that is sent to notify the authors and other who are
> explicitly added in the signed-off by section when a patch is being merged in
> the linux-phy tree. So it won't be in the mailing list archives.
> 
> But I'm not sure why you didn't receive it :-(

No idea, maybe I accidentally deleted it or something.

Regards,

Tony
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Re: patch "phy: Add a driver for dm816x USB PHY" added to linux-phy tree

2015-03-31 Thread Kishon Vijay Abraham I

Hi Tony,

On Thursday 26 March 2015 09:34 PM, Tony Lindgren wrote:

* Matthijs van Duin  [150326 00:02]:

On 26 March 2015 at 00:36, Kishon Vijay Abraham I  wrote:

Let me know if you find any problems with this patch.


I spotted a minor issue in drivers/phy/Kconfig:


+ Enable this for dm81xx USB to work.


This should say dm816x instead.


Yes that's correct, the phy on dm814x seems to be like on am335x,
not like on dm816x. Kishon, let me know if you prefer a follow-up
patch to fix this.


No. I've fixed this in my tree
https://git.kernel.org/cgit/linux/kernel/git/kishon/linux-phy.git/commit
/?h=next&id=9fa9fd4ffc90582091b8c6219f2054265f71e4ef


I'm not seeing the original mail for this thread anywhere for some
reason BTW. It does not seem to be in the mailing list archives
either, well at least not yet.


It's an automated mail that is sent to notify the authors and other who are
explicitly added in the signed-off by section when a patch is being merged in
the linux-phy tree. So it won't be in the mailing list archives.

But I'm not sure why you didn't receive it :-(

Thanks
Kishon
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Re: [PATCH 01/25] arm: Use bool function return values of true/false not 1/0

2015-03-31 Thread Marc Zyngier
On Tue, 31 Mar 2015 16:58:28 +0100
Paolo Bonzini  wrote:

> On 31/03/2015 01:45, Joe Perches wrote:
> > Use the normal return values for bool functions
> > 
> > Signed-off-by: Joe Perches 
> > ---
> >  arch/arm/include/asm/dma-mapping.h |  8 
> >  arch/arm/include/asm/kvm_emulate.h |  2 +-
> >  arch/arm/mach-omap2/powerdomain.c  | 14 +++---
> >  3 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/arm/include/asm/dma-mapping.h 
> > b/arch/arm/include/asm/dma-mapping.h
> > index b52101d..166e1e1 100644
> > --- a/arch/arm/include/asm/dma-mapping.h
> > +++ b/arch/arm/include/asm/dma-mapping.h
> > @@ -151,18 +151,18 @@ static inline bool dma_capable(struct device *dev, 
> > dma_addr_t addr, size_t size)
> > u64 limit, mask;
> >  
> > if (!dev->dma_mask)
> > -   return 0;
> > +   return false;
> >  
> > mask = *dev->dma_mask;
> >  
> > limit = (mask + 1) & ~mask;
> > if (limit && size > limit)
> > -   return 0;
> > +   return false;
> >  
> > if ((addr | (addr + size - 1)) & ~mask)
> > -   return 0;
> > +   return false;
> >  
> > -   return 1;
> > +   return true;
> >  }
> >  
> >  static inline void dma_mark_clean(void *addr, size_t size) { }
> > diff --git a/arch/arm/include/asm/kvm_emulate.h 
> > b/arch/arm/include/asm/kvm_emulate.h
> > index a9c80a2..ad200a0 100644
> > --- a/arch/arm/include/asm/kvm_emulate.h
> > +++ b/arch/arm/include/asm/kvm_emulate.h
> > @@ -51,7 +51,7 @@ static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, 
> > unsigned long hcr)
> >  
> >  static inline bool vcpu_mode_is_32bit(struct kvm_vcpu *vcpu)
> >  {
> > -   return 1;
> > +   return true;
> >  }
> >  
> >  static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
> > diff --git a/arch/arm/mach-omap2/powerdomain.c 
> > b/arch/arm/mach-omap2/powerdomain.c
> > index 78af6d8..897f9fb 100644
> > --- a/arch/arm/mach-omap2/powerdomain.c
> > +++ b/arch/arm/mach-omap2/powerdomain.c
> > @@ -950,7 +950,7 @@ int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
> >   */
> >  bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
> >  {
> > -   return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
> > +   return pwrdm && (pwrdm->flags & PWRDM_HAS_HDWR_SAR);
> >  }
> >  
> >  int pwrdm_state_switch_nolock(struct powerdomain *pwrdm)
> > @@ -1185,24 +1185,24 @@ bool pwrdm_can_ever_lose_context(struct powerdomain 
> > *pwrdm)
> > if (!pwrdm) {
> > pr_debug("powerdomain: %s: invalid powerdomain pointer\n",
> >  __func__);
> > -   return 1;
> > +   return true;
> > }
> >  
> > if (pwrdm->pwrsts & PWRSTS_OFF)
> > -   return 1;
> > +   return true;
> >  
> > if (pwrdm->pwrsts & PWRSTS_RET) {
> > if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF)
> > -   return 1;
> > +   return true;
> >  
> > for (i = 0; i < pwrdm->banks; i++)
> > if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF)
> > -   return 1;
> > +   return true;
> > }
> >  
> > for (i = 0; i < pwrdm->banks; i++)
> > if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF)
> > -   return 1;
> > +   return true;
> >  
> > -   return 0;
> > +   return false;
> >  }
> > 
> 
> Marc/Christoffer, please pick this up yourself.

Given that it touches a range of completely unrelated files, for the
KVM part:

Acked-by: Marc Zyngier 

M.
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Re: [PATCH 01/25] arm: Use bool function return values of true/false not 1/0

2015-03-31 Thread Paolo Bonzini
On 31/03/2015 01:45, Joe Perches wrote:
> Use the normal return values for bool functions
> 
> Signed-off-by: Joe Perches 
> ---
>  arch/arm/include/asm/dma-mapping.h |  8 
>  arch/arm/include/asm/kvm_emulate.h |  2 +-
>  arch/arm/mach-omap2/powerdomain.c  | 14 +++---
>  3 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/include/asm/dma-mapping.h 
> b/arch/arm/include/asm/dma-mapping.h
> index b52101d..166e1e1 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -151,18 +151,18 @@ static inline bool dma_capable(struct device *dev, 
> dma_addr_t addr, size_t size)
>   u64 limit, mask;
>  
>   if (!dev->dma_mask)
> - return 0;
> + return false;
>  
>   mask = *dev->dma_mask;
>  
>   limit = (mask + 1) & ~mask;
>   if (limit && size > limit)
> - return 0;
> + return false;
>  
>   if ((addr | (addr + size - 1)) & ~mask)
> - return 0;
> + return false;
>  
> - return 1;
> + return true;
>  }
>  
>  static inline void dma_mark_clean(void *addr, size_t size) { }
> diff --git a/arch/arm/include/asm/kvm_emulate.h 
> b/arch/arm/include/asm/kvm_emulate.h
> index a9c80a2..ad200a0 100644
> --- a/arch/arm/include/asm/kvm_emulate.h
> +++ b/arch/arm/include/asm/kvm_emulate.h
> @@ -51,7 +51,7 @@ static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, 
> unsigned long hcr)
>  
>  static inline bool vcpu_mode_is_32bit(struct kvm_vcpu *vcpu)
>  {
> - return 1;
> + return true;
>  }
>  
>  static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
> diff --git a/arch/arm/mach-omap2/powerdomain.c 
> b/arch/arm/mach-omap2/powerdomain.c
> index 78af6d8..897f9fb 100644
> --- a/arch/arm/mach-omap2/powerdomain.c
> +++ b/arch/arm/mach-omap2/powerdomain.c
> @@ -950,7 +950,7 @@ int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
>   */
>  bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
>  {
> - return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
> + return pwrdm && (pwrdm->flags & PWRDM_HAS_HDWR_SAR);
>  }
>  
>  int pwrdm_state_switch_nolock(struct powerdomain *pwrdm)
> @@ -1185,24 +1185,24 @@ bool pwrdm_can_ever_lose_context(struct powerdomain 
> *pwrdm)
>   if (!pwrdm) {
>   pr_debug("powerdomain: %s: invalid powerdomain pointer\n",
>__func__);
> - return 1;
> + return true;
>   }
>  
>   if (pwrdm->pwrsts & PWRSTS_OFF)
> - return 1;
> + return true;
>  
>   if (pwrdm->pwrsts & PWRSTS_RET) {
>   if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF)
> - return 1;
> + return true;
>  
>   for (i = 0; i < pwrdm->banks; i++)
>   if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF)
> - return 1;
> + return true;
>   }
>  
>   for (i = 0; i < pwrdm->banks; i++)
>   if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF)
> - return 1;
> + return true;
>  
> - return 0;
> + return false;
>  }
> 

Marc/Christoffer, please pick this up yourself.

Paolo
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Re: [PATCH 01/25] arm: Use bool function return values of true/false not 1/0

2015-03-31 Thread Tony Lindgren
* Joe Perches  [150330 16:47]:
> Use the normal return values for bool functions
> 
> Signed-off-by: Joe Perches 

Acked-by: Tony Lindgren 

> ---
>  arch/arm/include/asm/dma-mapping.h |  8 
>  arch/arm/include/asm/kvm_emulate.h |  2 +-
>  arch/arm/mach-omap2/powerdomain.c  | 14 +++---
>  3 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/include/asm/dma-mapping.h 
> b/arch/arm/include/asm/dma-mapping.h
> index b52101d..166e1e1 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -151,18 +151,18 @@ static inline bool dma_capable(struct device *dev, 
> dma_addr_t addr, size_t size)
>   u64 limit, mask;
>  
>   if (!dev->dma_mask)
> - return 0;
> + return false;
>  
>   mask = *dev->dma_mask;
>  
>   limit = (mask + 1) & ~mask;
>   if (limit && size > limit)
> - return 0;
> + return false;
>  
>   if ((addr | (addr + size - 1)) & ~mask)
> - return 0;
> + return false;
>  
> - return 1;
> + return true;
>  }
>  
>  static inline void dma_mark_clean(void *addr, size_t size) { }
> diff --git a/arch/arm/include/asm/kvm_emulate.h 
> b/arch/arm/include/asm/kvm_emulate.h
> index a9c80a2..ad200a0 100644
> --- a/arch/arm/include/asm/kvm_emulate.h
> +++ b/arch/arm/include/asm/kvm_emulate.h
> @@ -51,7 +51,7 @@ static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, 
> unsigned long hcr)
>  
>  static inline bool vcpu_mode_is_32bit(struct kvm_vcpu *vcpu)
>  {
> - return 1;
> + return true;
>  }
>  
>  static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
> diff --git a/arch/arm/mach-omap2/powerdomain.c 
> b/arch/arm/mach-omap2/powerdomain.c
> index 78af6d8..897f9fb 100644
> --- a/arch/arm/mach-omap2/powerdomain.c
> +++ b/arch/arm/mach-omap2/powerdomain.c
> @@ -950,7 +950,7 @@ int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
>   */
>  bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
>  {
> - return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
> + return pwrdm && (pwrdm->flags & PWRDM_HAS_HDWR_SAR);
>  }
>  
>  int pwrdm_state_switch_nolock(struct powerdomain *pwrdm)
> @@ -1185,24 +1185,24 @@ bool pwrdm_can_ever_lose_context(struct powerdomain 
> *pwrdm)
>   if (!pwrdm) {
>   pr_debug("powerdomain: %s: invalid powerdomain pointer\n",
>__func__);
> - return 1;
> + return true;
>   }
>  
>   if (pwrdm->pwrsts & PWRSTS_OFF)
> - return 1;
> + return true;
>  
>   if (pwrdm->pwrsts & PWRSTS_RET) {
>   if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF)
> - return 1;
> + return true;
>  
>   for (i = 0; i < pwrdm->banks; i++)
>   if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF)
> - return 1;
> + return true;
>   }
>  
>   for (i = 0; i < pwrdm->banks; i++)
>   if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF)
> - return 1;
> + return true;
>  
> - return 0;
> + return false;
>  }
> -- 
> 2.1.2
> 
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Re: [PATCH v3 6/7] dmaengine: omap-dma: Remove mapping between virtual channels and requests

2015-03-31 Thread Peter Ujfalusi
On 03/27/2015 10:22 PM, Russell King - ARM Linux wrote:
> On Fri, Mar 27, 2015 at 02:26:52PM +0200, Peter Ujfalusi wrote:
>> Do not direct map the virtual channels to sDMA request number. When the
>> sDMA is behind of a crossbar this direct mapping can cause situations when
>> certain channel can not be requested since the crossbar request number
>> will no longer match with the sDMA request line.
>> The direct mapping for virtual channels with HW request lines will make it
>> harder to implement MEM_TO_MEM mode for the driver.
> 
> There's no point having 127 virtual DMA channels then... is there?
> We might as well reduce the number down to a more reasonable set
> rather than wasting memory.

I was also come to the same conclusion. My plan was to change the virtual DMA
channels to the same as the sDMA's logical channels.

>> @@ -1049,7 +1050,6 @@ static int omap_dma_chan_init(struct omap_dmadev *od, 
>> int dma_sig)
>>  return -ENOMEM;
>>  
>>  c->reg_map = od->reg_map;
>> -c->dma_sig = dma_sig;
> 
> That's the only user of dma_sig in this function.  Why not remove it from
> the function prototype and its caller?
> 


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Re: [PATCH] ti-soc-thermal: implement omap3 support

2015-03-31 Thread Grazvydas Ignotas
On Tue, Mar 31, 2015 at 11:42 AM, Pavel Machek  wrote:
>
> This adds support for OMAP3 chips to ti-soc-thermal. As requested by
> TI people, it is marked unreliable and warning is printed.
>
> Signed-off-by: Pavel Machek 
>
> ---
> ...
> --- /dev/null
> +++ b/drivers/thermal/ti-soc-thermal/omap3-thermal-data.c
> @@ -0,0 +1,103 @@
> +/*
> + * OMAP3 thermal driver.
> + *
> + * Copyright (C) 2011-2012 Texas Instruments Inc.
> + * Copyright (C) 2014 Pavel Machek 
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Note
> + * http://www.ti.com/lit/er/sprz278f/sprz278f.pdf "Advisory
> + * 3.1.1.186 MMC OCP Clock Not Gated When Thermal Sensor Is Used"
> + *
> + * Also TI says:
> + * Just be careful when you try to make thermal policy like decisions
> + * based on this sensor. Placement of the sensor w.r.t the actual logic
> + * generating heat has to be a factor as well. If you are just looking
> + * for an approximation temperature (thermometerish kind), you might be
> + * ok with this. I am not sure we'd find any TI data around this.. just a
> + * heads up.
> + */
> +
> +#include "ti-thermal.h"
> +#include "ti-bandgap.h"
> +
> +/*
> + * OMAP34XX has one instance of thermal sensor for MPU
> + * need to describe the individual bit fields
> + */
> +static struct temp_sensor_registers
> +omap34xx_mpu_temp_sensor_registers = {
> +   .temp_sensor_ctrl = 0,
> +   .bgap_soc_mask = BIT(8),
> +   .bgap_eocz_mask = BIT(7),
> +   .bgap_dtemp_mask = 0x7f,
> +
> +   .bgap_mode_ctrl = 0,
> +   .mode_ctrl_mask = BIT(9),
> +};
> +
> +/* Thresholds and limits for OMAP34XX MPU temperature sensor */
> +static struct temp_sensor_data omap34xx_mpu_temp_sensor_data = {
> +   .min_freq = 32768,
> +   .max_freq = 32768,
> +   .max_temp = -99000,
> +   .min_temp = 99000,

This looks mixed up. Also, perhaps use -4 to 125000 to match the
table below?

> +   .hyst_val = 5000,
> +};
> +
> +/*
> + * Temperature values in milli degree celsius
> + */
> +static const int
> +omap34xx_adc_to_temp[128] = {
> +   -4, -4, -4, -4, -4, -39000, -38000, -36000,
> +   -34000, -32000, -31000, -29000, -28000, -26000, -25000, -24000,
> +   -22000, -21000, -19000, -18000, -17000, -15000, -14000, -12000,
> +   -11000, -9000, -8000, -7000, -5000, -4000, -2000, -1000, ,
> +   1000, 3000, 4000, 5000, 7000, 8000, 1, 11000, 13000, 14000,
> +   15000, 17000, 18000, 2, 21000, 22000, 24000, 25000, 27000,
> +   28000, 3, 31000, 32000, 34000, 35000, 37000, 38000, 39000,
> +   41000, 42000, 44000, 45000, 47000, 48000, 49000, 51000, 52000,
> +   53000, 55000, 56000, 58000, 59000, 6, 62000, 63000, 65000,
> +   66000, 67000, 69000, 7, 72000, 73000, 74000, 76000, 77000,
> +   79000, 8, 81000, 83000, 84000, 85000, 87000, 88000, 89000,
> +   91000, 92000, 94000, 95000, 96000, 98000, 99000, 10,
> +   102000, 103000, 105000, 106000, 107000, 109000, 11, 111000,
> +   113000, 114000, 116000, 117000, 118000, 12, 121000, 122000,
> +   124000, 124000, 125000, 125000, 125000, 125000, 125000
> +};
>

Gražvydas
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Re: [PATCHv5 00/35] ARM: OMAP2+: PRCM/SCM cleanups against 4.0-rc

2015-03-31 Thread Tero Kristo

On 03/31/2015 03:10 AM, Tony Lindgren wrote:

Hi Tero,

* Tero Kristo  [150320 11:45]:

Hi,

v5 contains the following changes still:

- re-ordered patches a bit, the single clock driver fix moved to beginning
   of the set, waiting for a separate merge from Mike
- Changed patch #23 to fix the slightly misleading logic (removed the extra +1)
- Changed patches #16 and #18 to fix OMAP2/3/4 etc. only builds
- Fixed ti81xx boot issues (hopefully, I don't have access to hardware
   to test it)
- Changed control module DTS layout based on discussions with Tony, this
   includes addition of minimal l4 bus (patch #25+)

Testing done for v5:
  1: am335x-evm  : boot
  2: am335x-evmsk: boot
  3: am3517-evm  : boot
  4: am43x-epos-evm  : boot
  5: am437x-gp-evm   : boot
  6: omap3-beagle-xm : boot
  7: omap3-beagle: boot, suspend (ret/off), cpuidle (ret/off)
  8: am335x-boneblack: boot
  9: am335x-bone : boot
10: dra7xx-evm  : boot
11: omap3-n900  : boot
12: omap5-uevm  : boot
13: omap4-panda-es  : boot, suspend (ret), cpuidle (ret)
14: omap4-panda : boot
15: omap2430-sdp: boot
16: omap3430-sdp: boot
17: omap4-sdp-es23plus: boot

Branch available at:
- tree: https://github.com/t-kristo/linux-pm.git
- branch: 4.0-rc1-prcm-cleanup-v5


I found few more issues regarding diff of the dmesg before and after,
you may want to diff also dra7 before and after.

Then I just noticed this series won't boot on omap3 with the legacy mode.
You can test this by building a uImage with the following command:

$ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 \
-n "Linux" -d arch/arm/boot/zImage /tmp/uImage

Then make sure you're not passing a .dtb file.

Below is the error I'm getting with debug_ll + earlyprintk enabled.


Yeah, I forgot to check the legacy boot and of course broke it, kind of 
annoying to test it atm. >.<


Made a simple fix, will repost.

-Tero



Regards,

Tony


[0.00] PC is at regmap_read+0x10/0x60
[0.00] LR is at clk_memmap_readl+0x34/0x54
[0.00] pc : []lr : []psr: 21d3
[0.00] sp : c08d1e90  ip :   fp : 
[0.00] r10: c07efaa8  r9 : 0040  r8 : c601c5c0
[0.00] r7 : c601bbc0  r6 : c601c5c0  r5 : 0040  r4 : 0001
[0.00] r3 : fa004000  r2 : c08d1ea4  r1 : 0040  r0 : 0040
[0.00] Flags: nzCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment 
kernel
[0.00] Control: 10c5387d  Table: 80004019  DAC: 0015
[0.00] Process swapper/0 (pid: 0, stack limit = 0xc08d0218)
[0.00] Stack: (0xc08d1e90 to 0xc08d2000)
[0.00] 1e80:  c601bbc0 
c601c5c0 c0035694
[0.00] 1ea0: c6001c8c c6001c40 c07f c04d7d78  0001 
c07efaa8 c04d4dd0
[0.00] 1ec0:   c04d08c4 c115c5bc 61d3 c601bbc0 
0020 0001
[0.00] 1ee0: 0003 0013 0040 c07efaa8  c04d8284 
 c07f
[0.00] 1f00: c094e4e8 c07efaa8 c06683ec c08d1efc c7eff101 0020 
c0951fe4 0001
[0.00] 1f20:   c0951fcc c7eff140 c0965000 c04d840c 
0013 0003
[0.00] 1f40: 0001  039457c8 0040 c601bb80 c0951fcc 
c0945dac c094e504
[0.00] 1f60: c08b3280 c08a7694  c601bb80 c094e4e8 c601bb80 
c094e508 c08a77a8
[0.00] 1f80: c08aa480  c0965000  c08d28c0 c08b3280 
c7eff140 c0965000
[0.00] 1fa0:  c08aa490 c08aa480  c0965000 c086f7a4 
c08b1e58 c0863aec
[0.00] 1fc0:   c0863678   c08b3280 
c0965214 c08d296c
[0.00] 1fe0: c08b327c c08d7a0c 80004059 411fc083  8000807c 
 
[0.00] [] (regmap_read) from [] 
(clk_memmap_readl+0x34/0x54)
[0.00] [] (clk_memmap_readl) from [] 
(ti_clk_divider_recalc_rate+0x20/0xf8)
[0.00] [] (ti_clk_divider_recalc_rate) from [] 
(clk_register+0x360/0x6f8)
[0.00] [] (clk_register) from [] 
(_register_divider.constprop.5+0xb8/0x120)
[0.00] [] (_register_divider.constprop.5) from [] 
(ti_clk_register_divider+0x80/0xa4)
[0.00] [] (ti_clk_register_divider) from [] 
(ti_clk_register_clk+0x88/0x17c)
[0.00] [] (ti_clk_register_clk) from [] 
(ti_clk_register_legacy_clks+0x20/0x158)
[0.00] [] (ti_clk_register_legacy_clks) from [] 
(omap3430_clk_legacy_init+0x10/0x58)
[0.00] [] (omap3430_clk_legacy_init) from [] 
(omap3_sync32k_timer_init+0x8/0x58)
[0.00] [] (omap3_sync32k_timer_init) from [] 
(start_kernel+0x238/0x3e8)
[0.00] [] (start_kernel) from [<8000807c>] (0x8000807c)
[0.00] Code: e92d4070 e1a04000 e1a05001 e1a1 (e594117c)
[0.00] ---[ end trace cb88537fdc8fa200 ]---



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Re: [PATCHv5 30/35] ARM: dts: omap4: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo

On 03/31/2015 02:01 AM, Tony Lindgren wrote:

Hi,

* Tero Kristo  [150320 11:46]:

This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and
moves some of the generic peripherals under it. System control module
support is added to the device tree also, and the existing SCM related
functionality is moved under it.


Doing a diff on the dmesg output before and after this series now
produces this extra warning on omap4:

+ti_dt_clk_init_provider: scm_conf missing 'clocks' child node


Nice test case you got there.

Added a check against missing clocks node, control module no longer 
attempts clock registration if the clocks are not defined. Will repost.


-Tero
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Re: [PATCHv5 26/35] ARM: dts: omap3: add minimal l4 bus layout with control module support

2015-03-31 Thread Tero Kristo

On 03/31/2015 01:56 AM, Tony Lindgren wrote:

Hi,

* Tero Kristo  [150320 11:46]:

--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -87,6 +87,60 @@
ranges;
ti,hwmods = "l3_main";

+   l4_core: l4@4800 {
+   compatible = "ti,omap3-l4-core", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x4800 0x100>;
+
+   scm: scm@2000 {
+   compatible = "ti,omap3-scm", "simple-bus";
+   reg = <0x2000 0x2000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x2000 0x2000>;
+
+   omap3_pmx_core: pinmux@30 {
+   compatible = "ti,omap3-padconf",
+"pinctrl-single";
+   reg = <0x30 0x230>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   #interrupt-cells = <1>;
+   interrupt-controller;
+   pinctrl-single,register-width = <16>;
+   pinctrl-single,function-mask = <0xff1f>;
+   };


Just noticed we may be now missing few pins as diffing the dmesg before
and after this series produces this on omap3:

-pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
+pinctrl-single 48002030.pinmux: 280 pins at pa fa002030 size 560

Care to check that?


True, there is a typo in the omap3.dtsi file. Will fix this and repost.

-Tero
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Re: [PATCH v3 5/7] dmaengine: omap-dma: Take DMA request number from DT if it is available

2015-03-31 Thread Peter Ujfalusi
On 03/27/2015 10:24 PM, Russell King - ARM Linux wrote:
> On Fri, Mar 27, 2015 at 02:26:51PM +0200, Peter Ujfalusi wrote:
>> +if (!pdev->dev.of_node || of_property_read_u32(pdev->dev.of_node,
>> +   "dma-requests",
>> +   &od->dma_requests)) {
>> +dev_info(&pdev->dev,
>> + "Missing dma-requests property, using %u.\n",
>> + OMAP_SDMA_REQUESTS);
>> +od->dma_requests = OMAP_SDMA_REQUESTS;
>> +}
> 
> Are all OMAPs including OMAP1 being converted to DT?  If not, don't
> introduce noisy printks for which a platform can't do anything about.
> Think about this please - if there's no of_node, then why complain
> about a missing OF property?

Yes, you are perfectly right on this. Will fix it up.

Thanks,
Péter
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Re: [PATCH RESEND] ARM: dts: OMAP3-N900: Add microphone bias voltages

2015-03-31 Thread Sebastian Reichel
Hi,

On Mon, Mar 30, 2015 at 10:50:52AM -0700, Tony Lindgren wrote:
> * Jarkko Nikula  [150330 10:46]:
> > Well, there has been regression but finding exactly how far should the
> > fix go didn't look instantly straightforward due all DT, codec driver
> > mic bias etc changes and I ended up not cc'ing stable.
> > 
> > But well, I guess first kernel where this commit makes sense is 3.16+
> > due commit f7d0f2a08567 ("ARM: dts: omap3-n900: Add sound support").
> > Although it applies on top of commit 14e3e295b2b9 ("ARM: dts:
> > omap3-n900: Add TLV320AIC3X support") too (3.12+) but not before that.
> 
> OK I think debian is using v3.16 kernel

Yes. It will be used for Debian jessie (not yet released) and the
N900 related drivers are enabled in the armmp flavour. Unfortunately
it does not work together with thumb using userland because the
errata 430973 workaround is not enabled.

See https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=768890

I guess it should be tried to change the workaround, so that it does
only change the behaviour of affected platforms. Otherwise its a
hard decision for distributions to enable the workaround.

> and that's pretty much the first kernel that is usable with dts on
> many omap3 devices so might make sense for that.

DT support for N900's soundcard has been added in 3.16, so before
that the audio stuff didn't work at all.

> I can add it if you think it makes sense.

I guess backporting this makes sense because of fewer "broken" DTB
files in the wild.

-- Sebastian


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[PATCH] ti-soc-thermal: implement omap3 support

2015-03-31 Thread Pavel Machek

This adds support for OMAP3 chips to ti-soc-thermal. As requested by
TI people, it is marked unreliable and warning is printed.

Signed-off-by: Pavel Machek 

---

Patch is against thermal linus tree, please apply so that it has
chance for 4.1.

diff --git a/drivers/thermal/ti-soc-thermal/Kconfig 
b/drivers/thermal/ti-soc-thermal/Kconfig
index bd4c7be..d414c2d 100644
--- a/drivers/thermal/ti-soc-thermal/Kconfig
+++ b/drivers/thermal/ti-soc-thermal/Kconfig
@@ -21,6 +21,21 @@ config TI_THERMAL
  This includes trip points definitions, extrapolation rules and
  CPU cooling device bindings.
 
+config OMAP3_THERMAL
+   bool "Texas Instruments OMAP3 thermal support"
+   depends on TI_SOC_THERMAL
+   depends on ARCH_OMAP3
+   help
+ If you say yes here you get thermal support for the Texas Instruments
+ OMAP3 SoC family. The current chips supported are:
+  - OMAP3430
+
+ OMAP3 chips normally don't need thermal management, and sensors in
+ this generation are not accurate, nor they are very close to
+ the important hotspots.
+
+ Say 'N' here.
+
 config OMAP4_THERMAL
bool "Texas Instruments OMAP4 thermal support"
depends on TI_SOC_THERMAL
diff --git a/drivers/thermal/ti-soc-thermal/Makefile 
b/drivers/thermal/ti-soc-thermal/Makefile
index 1226b24..0f89bdf 100644
--- a/drivers/thermal/ti-soc-thermal/Makefile
+++ b/drivers/thermal/ti-soc-thermal/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_TI_SOC_THERMAL)+= ti-soc-thermal.o
 ti-soc-thermal-y   := ti-bandgap.o
 ti-soc-thermal-$(CONFIG_TI_THERMAL)+= ti-thermal-common.o
 ti-soc-thermal-$(CONFIG_DRA752_THERMAL)+= dra752-thermal-data.o
+ti-soc-thermal-$(CONFIG_OMAP3_THERMAL) += omap3-thermal-data.o
 ti-soc-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal-data.o
 ti-soc-thermal-$(CONFIG_OMAP5_THERMAL) += omap5-thermal-data.o
diff --git a/drivers/thermal/ti-soc-thermal/omap3-thermal-data.c 
b/drivers/thermal/ti-soc-thermal/omap3-thermal-data.c
new file mode 100644
index 000..86a4e2d
--- /dev/null
+++ b/drivers/thermal/ti-soc-thermal/omap3-thermal-data.c
@@ -0,0 +1,103 @@
+/*
+ * OMAP3 thermal driver.
+ *
+ * Copyright (C) 2011-2012 Texas Instruments Inc.
+ * Copyright (C) 2014 Pavel Machek 
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Note
+ * http://www.ti.com/lit/er/sprz278f/sprz278f.pdf "Advisory
+ * 3.1.1.186 MMC OCP Clock Not Gated When Thermal Sensor Is Used"
+ *
+ * Also TI says:
+ * Just be careful when you try to make thermal policy like decisions
+ * based on this sensor. Placement of the sensor w.r.t the actual logic
+ * generating heat has to be a factor as well. If you are just looking
+ * for an approximation temperature (thermometerish kind), you might be
+ * ok with this. I am not sure we'd find any TI data around this.. just a
+ * heads up.
+ */
+
+#include "ti-thermal.h"
+#include "ti-bandgap.h"
+
+/*
+ * OMAP34XX has one instance of thermal sensor for MPU
+ * need to describe the individual bit fields
+ */
+static struct temp_sensor_registers
+omap34xx_mpu_temp_sensor_registers = {
+   .temp_sensor_ctrl = 0,
+   .bgap_soc_mask = BIT(8),
+   .bgap_eocz_mask = BIT(7),
+   .bgap_dtemp_mask = 0x7f,
+
+   .bgap_mode_ctrl = 0,
+   .mode_ctrl_mask = BIT(9),
+};
+
+/* Thresholds and limits for OMAP34XX MPU temperature sensor */
+static struct temp_sensor_data omap34xx_mpu_temp_sensor_data = {
+   .min_freq = 32768,
+   .max_freq = 32768,
+   .max_temp = -99000,
+   .min_temp = 99000,
+   .hyst_val = 5000,
+};
+
+/*
+ * Temperature values in milli degree celsius
+ */
+static const int
+omap34xx_adc_to_temp[128] = {
+   -4, -4, -4, -4, -4, -39000, -38000, -36000,
+   -34000, -32000, -31000, -29000, -28000, -26000, -25000, -24000,
+   -22000, -21000, -19000, -18000, -17000, -15000, -14000, -12000,
+   -11000, -9000, -8000, -7000, -5000, -4000, -2000, -1000, ,
+   1000, 3000, 4000, 5000, 7000, 8000, 1, 11000, 13000, 14000,
+   15000, 17000, 18000, 2, 21000, 22000, 24000, 25000, 27000,
+   28000, 3, 31000, 32000, 34000, 35000, 37000, 38000, 39000,
+   41000, 42000, 44000, 45000, 47000, 48000, 49000, 51000, 52000,
+   53000, 55000, 56000, 58000, 59000, 6, 62000, 63000, 65000,
+   66000, 67000, 69000, 7, 72000, 73000, 74000, 76000, 77000,
+   79000, 8, 81000, 83000, 84000, 85000, 87000, 88000, 89000,
+   91000, 92000, 94000, 95000, 96000, 98000, 99000, 10,
+   1

Re: [PATCH v4 3/6] Documentation: DT: Document twl4030-madc-battery bindings

2015-03-31 Thread Pavel Machek
Hi!

> > >> +io-channels = <&twl_madc 1>,
> > >> +  <&twl_madc 10>,
> > >> +  <&twl_madc 12>;
> > >> +io-channel-names = "temp",
> > >> +   "ichg",
> > >> +   "vbat";
> > >> +};
> > > 
> > > Rather than just making platform_data into device tree properties..
> > > 
> > > Can't you hide the these custom properties behind the compatible flag?
> > > 
> > > You can initialize that data in the driver based on the compatible
> > > flag and the match data.
> > > 
> > > This makes sense if you can group things to similar configurations.
> > 
> > Maybe I have not completely understood your proposal.
> > 
> > Do you mean to go back to have big parameter tables for each device/battery
> > combination in the driver code and the compatible flag (e.g. compatible = 
> > “board17”)
> > chooses the right data set for the charging map and channels?
> 
> If you can somehow group them, then yes. Not for every board if there
> are many of them naturally.
>  
> > I thought this is what the DT was introduced for - to have the same driver 
> > code but adapt to different boards depending on hardware variations.
> 
> Yeah but you also need to consider the issues related to introducing
> new device tree properties. The device tree properties introduced
> should be generic where possible.
> 
> > And batteries have very different characteristics and vary between devices…
> 
> Right. Maybe that has been already agreed on to use capacity-uah for
> batteries in general? In that case I have not problem with that as
> it's a generic property :)
>  
> > The charging maps are depending on the battery type connected to the twl4030
> > and which madc channel is which value is also a little hardware dependent
> > (although the twl4030 doesn’t give much choice).
> 
> Just to consider alternatives before introducing driver specific
> property for the maps.. Maybe here you could have few different type
> of maps and select something safe by default? Of course it could be this
> is higly board specific, I think some devices may be able to run below
> 3.3V for example..

As I explained in some other mail, those tables should not be
neccessary at all. They can be computed from li-ion characteristics
and internal resistance, and assumed current during charge and
discharge.

Running below 3.3V.. not really. At that point, the battery is really
_empty_, and voltage is going down really really fast.

Plus, you are damaging the battery at that point.
Pavel
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(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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4.0-rc1 to -rc4: random sound and speed problems on n900

2015-03-31 Thread Pavel Machek
Hi!

4.0-rc4 (or more specifically 7b09ac704bac2de5bf0362793edc22a0094e381c
based kernel boots really really slowly on n900, and there's an ugly
backtrace from sound in the dmesg.

I re-tested 4.0-rc4 and it worked ok. Weird. I guess we have some
random stuff going on during boot

Pavel

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(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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